[Linaro-uefi] End of interrupt in GicV3

Hi,

I am observing SError on a ARM64 system where EOI mode is zero. And the reason for SError is writing into EOI register when there is no active interrupt.

In UEFI ArmPkg code, I see that EOI register is written two times. Once it is called from the registered interrupt handler and then from GicV3IrqInterruptHandler. For example, when generic timer interrupt is generated, the TimerInterruptHandler calls gInterrupt->EndOfInterrupt (gInterrupt, Source)

If EOI mode is zero, writing into EOI register drops the priority and deactivates the interrupt unless it is an LPI.

Thank you, Jayanthi