Set the PCD to 0 so that the code will read frequency from register and be adapted to 66M and 50M boards.
Change-Id: I5ca7e766a592de27c8151752e749e480af896671 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo guoheyi@huawei.com --- Platforms/Hisilicon/D03/D03.dsc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Platforms/Hisilicon/D03/D03.dsc b/Platforms/Hisilicon/D03/D03.dsc index b144c57..7167f4d 100644 --- a/Platforms/Hisilicon/D03/D03.dsc +++ b/Platforms/Hisilicon/D03/D03.dsc @@ -219,7 +219,9 @@ # # ARM Architectual Timer Frequency # - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|66000000 + # Set it to 0 so that the code will read frequence from register and be + # adapted to 66M and 50M boards + gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE