On Fri, Mar 17, 2017 at 01:40:30AM +0100, Marcin Wojtas wrote:
From: Konstantin Porotchkin kostap@marvell.com
Extend the COMPHY configuration table by CP-slave entry. Change the chip type to be different for CP-master and CP-slave (Cp110m, Cp110s). This is a preparation commit for adding support for new SoC - Armada 80x0, which comprises two CP110 HW blocks with peripherals.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Konstantin Porotchkin kostap@marvell.com Signed-off-by: Marcin Wojtas mw@semihalf.com
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
Platforms/Marvell/Armada/Armada70x0.dsc | 2 +- Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c | 8 ++++++-- 2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/Platforms/Marvell/Armada/Armada70x0.dsc b/Platforms/Marvell/Armada/Armada70x0.dsc index 134ab71..83842da 100644 --- a/Platforms/Marvell/Armada/Armada70x0.dsc +++ b/Platforms/Marvell/Armada/Armada70x0.dsc @@ -103,7 +103,7 @@ gMarvellTokenSpaceGuid.PcdChip0ComPhyBaseAddress|0xF2441000 gMarvellTokenSpaceGuid.PcdChip0Hpipe3BaseAddress|0xF2120000 gMarvellTokenSpaceGuid.PcdChip0ComPhyMuxBitCount|4
- gMarvellTokenSpaceGuid.PcdChip0Compatible|L"Cp110"
- gMarvellTokenSpaceGuid.PcdChip0Compatible|L"Cp110m"
#UtmiPhy gMarvellTokenSpaceGuid.PcdUtmiPhyCount|2 diff --git a/Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c b/Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c index 1b45bb7..9efefb2 100644 --- a/Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c +++ b/Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c @@ -46,8 +46,12 @@ CHAR16 * SpeedStringTable [] = {L"-", L"1.25 Gbps", L"1.5 Gbps", L"2.5 Gbps", L"6 Gbps", L"6.25 Gbps", L"10.31 Gbps"}; CHIP_COMPHY_CONFIG ChipCfgTbl[] = {
- {
- .ChipType = L"Cp110",
- { /* CP master */
- .ChipType = L"Cp110m",
- .Init = ComPhyCp110Init
- },
- { /* CP slave */
- .ChipType = L"Cp110s", .Init = ComPhyCp110Init }
};
1.8.3.1