On 23 February 2017 at 22:33, Jeremy Linton jeremy.linton@arm.com wrote:
Add EXT_SCSI_PASS_THRU structures to SI3132_PORT structure, along with helpers and new entry points.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com
Reviewed-by: Ard Biesheuvel ard.biesheuvel@linaro.org
EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h | 93 ++++++++++++++++++++++-- 1 file changed, 88 insertions(+), 5 deletions(-)
diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h index a7bc956..4cfef29 100644 --- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h +++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h @@ -20,6 +20,7 @@
#include <Protocol/AtaPassThru.h> #include <Protocol/PciIo.h> +#include <Protocol/ScsiPassThruExt.h>
#include <Library/UefiLib.h> #include <Library/DebugLib.h> @@ -57,6 +58,7 @@ #define SII3132_PORT_SLOTSTATUS_REG 0x1800 #define SII3132_PORT_CMDACTIV_REG 0x1C00 #define SII3132_PORT_SSTATUS_REG 0x1F04 +#define SII3132_PORT_SERROR_REG 0x1F08
#define SII3132_PORT_CONTROL_RESET (1 << 0) #define SII3132_PORT_DEVICE_RESET (1 << 1) @@ -81,6 +83,7 @@ #define PRB_CTRL_INT_MASK 0x40 #define PRB_CTRL_SRST 0x80
+#define PRB_PROT_DEFAULT 0x00 #define PRB_PROT_PACKET 0x01 #define PRB_PROT_LEGACY_QUEUE 0x02 #define PRB_PROT_NATIVE_QUEUE 0x04 @@ -88,11 +91,18 @@ #define PRB_PROT_WRITE 0x10 #define PRB_PROT_TRANSPARENT 0x20
+#define SII_FIS_REGISTER_H2D 0x27 //Register FIS - Host to Device +#define SII_FIS_CONTROL_CMD (1 << 7) //Indicate FIS is a command
#define SGE_XCF (1 << 28) #define SGE_DRD (1 << 29) #define SGE_LNK (1 << 30) #define SGE_TRM 0x80000000
+#define SI_MAX_CDB 12 //MAX supported CDB +#define SI_MAX_SENSE 256 +#define SI_DEFAULT_TIMEOUT 50000
typedef struct _SATA_SI3132_SGE { UINT32 DataAddressLow; UINT32 DataAddressHigh; @@ -121,6 +131,8 @@ typedef struct _SATA_SI3132_DEVICE { UINTN Index; struct _SATA_SI3132_PORT *Port; //Parent Port UINT32 BlockSize;
- BOOLEAN Atapi; //ATAPI device
- BOOLEAN Cdb16; //Uses 16byte CDB transfers (or 12)
} SATA_SI3132_DEVICE;
typedef struct _SATA_SI3132_PORT { @@ -140,14 +152,16 @@ typedef struct _SATA_SI3132_INSTANCE { UINTN Signature;
SATA_SI3132_PORT Ports[SATA_SII3132_MAXPORT];
- EFI_ATA_PASS_THRU_PROTOCOL AtaPassThruProtocol;
- EFI_ATA_PASS_THRU_MODE AtaPassThruMode;
- EFI_ATA_PASS_THRU_PROTOCOL AtaPassThruProtocol;
- EFI_EXT_SCSI_PASS_THRU_MODE ExtScsiPassThruMode;
- EFI_EXT_SCSI_PASS_THRU_PROTOCOL ExtScsiPassThru; EFI_PCI_IO_PROTOCOL *PciIo;
} SATA_SI3132_INSTANCE;
#define SATA_SII3132_SIGNATURE SIGNATURE_32('s', 'i', '3', '2') -#define INSTANCE_FROM_ATAPASSTHRU_THIS(a) CR(a, SATA_SI3132_INSTANCE, AtaPassThruProtocol, SATA_SII3132_SIGNATURE) +#define INSTANCE_FROM_ATAPASSTHRU_THIS(a) CR (a, SATA_SI3132_INSTANCE, AtaPassThruProtocol, SATA_SII3132_SIGNATURE) +#define INSTANCE_FROM_SCSIPASSTHRU_THIS(a) CR (a, SATA_SI3132_INSTANCE, ExtScsiPassThru, SATA_SII3132_SIGNATURE)
#define SATA_GLOBAL_READ32(Offset, Value) PciIo->Mem.Read (PciIo, EfiPciIoWidthUint32, 0, Offset, 1, Value) #define SATA_GLOBAL_WRITE32(Offset, Value) { UINT32 Value32 = Value; PciIo->Mem.Write (PciIo, EfiPciIoWidthUint32, 0, Offset, 1, &Value32); } @@ -155,7 +169,7 @@ typedef struct _SATA_SI3132_INSTANCE { #define SATA_PORT_READ32(Offset, Value) PciIo->Mem.Read (PciIo, EfiPciIoWidthUint32, 1, Offset, 1, Value) #define SATA_PORT_WRITE32(Offset, Value) { UINT32 Value32 = Value; PciIo->Mem.Write (PciIo, EfiPciIoWidthUint32, 1, Offset, 1, &Value32); }
-#define SATA_TRACE(txt) DEBUG((EFI_D_VERBOSE, "ARM_SATA: " txt "\n")) +#define SATA_TRACE(txt) DEBUG ((DEBUG_VERBOSE, "ARM_SATA: " txt "\n"))
extern EFI_COMPONENT_NAME_PROTOCOL gSataSiI3132ComponentName; extern EFI_COMPONENT_NAME2_PROTOCOL gSataSiI3132ComponentName2; @@ -266,4 +280,73 @@ EFI_STATUS SiI3132ResetDevice ( IN UINT16 PortMultiplierPort );
+/**
- EFI ATA Pass Thru Entry points for SCSI Protocol
- */
+SATA_SI3132_DEVICE* GetSataDevice (
- IN SATA_SI3132_INSTANCE *SataInstance,
- IN UINT16 Port,
- IN UINT16 PortMultiplierPort
- );
+EFI_STATUS SiI3132IssueCommand (
- IN SATA_SI3132_PORT *SataPort,
- EFI_PCI_IO_PROTOCOL *PciIo,
- IN UINT32 Timeout,
- VOID *StatusBlock
- );
+/**
- EFI SCSI Pass Thru Protocol
- */
+EFI_STATUS SiI3132ScsiPassThru (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
- IN EFI_EVENT Event OPTIONAL
- );
+EFI_STATUS SiI3132GetNextTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target,
- IN OUT UINT64 *Lun
+);
+EFI_STATUS SiI3132GetNextTargetLun2 (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
- );
+EFI_STATUS SiI3132ScsiBuildDevicePath (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun,
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
- );
+EFI_STATUS SiI3132GetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINT8 **Target,
- OUT UINT64 *Lun
- );
+EFI_STATUS SiI3132ResetChannel (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
- );
+EFI_STATUS SiI3132ResetTargetLun (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN UINT8 *Target,
- IN UINT64 Lun
- );
+EFI_STATUS SiI3132GetNextTarget (
- IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
- IN OUT UINT8 **Target
- );
#endif
2.9.3