Re: [Linaro-uefi] [linaro-uefi v7 01/38] Hisilicon/D02/D03: refine serdes lib structure

On Wed, Dec 07, 2016 at 07:48:58PM +0800, Heyi Guo wrote:

Refine serdes lib structure and modify the file which using this lib accordingly.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo heyi.guo@linaro.org

Reviewed-by: Leif Lindholm leif.lindholm@linaro.org

---

.../Type09/MiscSystemSlotDesignationFunction.c | 14 +-- Chips/Hisilicon/Hi1610/Include/Library/SerdesLib.h | 108 ++++++++++----------- Chips/Hisilicon/Pv660/Include/Library/SerdesLib.h | 89 ++++++++--------- .../D02/Library/OemMiscLibD02/BoardFeatureD02.c | 18 ++-- .../Library/OemMiscLib2P/BoardFeature2PHi1610.c | 68 ++++++------- 5 files changed, 141 insertions(+), 156 deletions(-)

diff --git a/Chips/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c b/Chips/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c index 62e4b7f..bc33639 100644 --- a/Chips/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c +++ b/Chips/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c @@ -73,8 +73,8 @@ UpdateSlotUsage( ) { EFI_STATUS Status;

• serdes_param_t SerdesParamA;
• serdes_param_t SerdesParamB;

• SERDES_PARAM SerdesParamA;
• SERDES_PARAM SerdesParamB;

Status = OemGetSerdesParam (&SerdesParamA, &SerdesParamB, 0); if(EFI_ERROR(Status)) @@ -87,7 +87,7 @@ UpdateSlotUsage( // PCIE0 // if (((UINTN)InputData == (UINTN)&MiscSystemSlotDesignationPcie0Data)

•    && SerdesParamA.hilink1_mode == EM_HILINK1_PCIE0_8LANE) {
  

•    && SerdesParamA.Hilink1Mode == EmHilink1Pcie0X8) {
     InputData->CurrentUsage = SlotUsageAvailable;
  

  }

@@ -96,7 +96,7 @@ UpdateSlotUsage( // if ((UINTN)InputData == (UINTN)&MiscSystemSlotDesignationPcie1Data) {

•    if (SerdesParamA.hilink0_mode == EM_HILINK0_PCIE1_4LANE_PCIE2_4LANE) {
  

•    if (SerdesParamA.Hilink0Mode == EmHilink0Pcie1X4Pcie2X4) {
         InputData->SlotDataBusWidth = SlotDataBusWidth4X;
     }
  

  }

@@ -106,10 +106,10 @@ UpdateSlotUsage( // if ((UINTN)InputData == (UINTN)&MiscSystemSlotDesignationPcie2Data) {

•    if (SerdesParamA.hilink0_mode == EM_HILINK0_PCIE1_4LANE_PCIE2_4LANE) {
  

•    if (SerdesParamA.Hilink0Mode == EmHilink0Pcie1X4Pcie2X4) {
         InputData->SlotDataBusWidth = SlotDataBusWidth4X;
         InputData->CurrentUsage = SlotUsageAvailable;
  

•    } else if (SerdesParamA.hilink2_mode == EM_HILINK2_PCIE2_8LANE) {
  

•    } else if (SerdesParamA.Hilink2Mode == EmHilink2Pcie2X8) {
         InputData->CurrentUsage = SlotUsageAvailable;
     }
  

  }

@@ -118,7 +118,7 @@ UpdateSlotUsage( // PCIE3 // if (((UINTN)InputData == (UINTN)&MiscSystemSlotDesignationPcie3Data)

•    && SerdesParamA.hilink5_mode == EM_HILINK5_PCIE3_4LANE) {
  

•    && SerdesParamA.Hilink5Mode == EmHilink5Pcie3X4) {
     InputData->CurrentUsage = SlotUsageAvailable;
  

  }

} diff --git a/Chips/Hisilicon/Hi1610/Include/Library/SerdesLib.h b/Chips/Hisilicon/Hi1610/Include/Library/SerdesLib.h index 3bd5a0f..077dd5e 100755 --- a/Chips/Hisilicon/Hi1610/Include/Library/SerdesLib.h +++ b/Chips/Hisilicon/Hi1610/Include/Library/SerdesLib.h @@ -16,60 +16,52 @@ #ifndef _SERDES_LIB_H_ #define _SERDES_LIB_H_ -typedef enum hilink0_mode_type -{

• EM_HILINK0_HCCS1_8LANE = 0,
• EM_HILINK0_PCIE1_8LANE = 2,
• EM_HILINK0_PCIE1_4LANE_PCIE2_4LANE = 3,
• EM_HILINK0_SAS2_8LANE = 4,
• EM_HILINK0_HCCS1_8LANE_16,
• EM_HILINK0_HCCS1_8LANE_32,

-}hilink0_mode_type_e;

-typedef enum hilink1_mode_type -{

• EM_HILINK1_SAS2_1LANE = 0,
• EM_HILINK1_HCCS0_8LANE = 1,
• EM_HILINK1_PCIE0_8LANE = 2,
• EM_HILINK1_HCCS0_8LANE_16,
• EM_HILINK1_HCCS0_8LANE_32,

-}hilink1_mode_type_e;

-typedef enum hilink2_mode_type -{

• EM_HILINK2_PCIE2_8LANE = 0,
• EM_HILINK2_SAS0_8LANE = 2,

-}hilink2_mode_type_e;

-typedef enum hilink5_mode_type -{

• EM_HILINK5_PCIE3_4LANE = 0,
• EM_HILINK5_PCIE2_2LANE_PCIE3_2LANE = 1,
• EM_HILINK5_SAS1_4LANE = 2,

-}hilink5_mode_type_e;

-typedef enum board_type_em -{

• EM_32CORE_EVB_BOARD = 0,
• EM_16CORE_EVB_BOARD = 1,
• EM_V2R1CO5_BORAD = 2,
• EM_OTHER_BORAD

-}board_type_e;

-typedef struct serdes_param -{

• hilink0_mode_type_e hilink0_mode;
• hilink1_mode_type_e hilink1_mode;
• hilink2_mode_type_e hilink2_mode;
• UINT32 hilink3_mode;
• UINT32 hilink4_mode;
• hilink5_mode_type_e hilink5_mode;
• UINT32 hilink6_mode;
• UINT32 use_ssc;
• //board_type_e board_type;

-}serdes_param_t; +typedef enum {

• EmHilink0Hccs1X8 = 0,
• EmHilink0Pcie1X8 = 2,
• EmHilink0Pcie1X4Pcie2X4 = 3,
• EmHilink0Sas2X8 = 4,
• EmHilink0Hccs1X8Width16,
• EmHilink0Hccs1X8Width32,

+} HILINK0_MODE_TYPE;

+typedef enum {

• EmHilink1Sas2X1 = 0,
• EmHilink1Hccs0X8 = 1,
• EmHilink1Pcie0X8 = 2,
• EmHilink1Hccs0X8Width16,
• EmHilink1Hccs0X8Width32,

+} HILINK1_MODE_TYPE;

+typedef enum {

• EmHilink2Pcie2X8 = 0,
• EmHilink2Sas0X8 = 2,

+} HILINK2_MODE_TYPE;

+typedef enum {

• EmHilink5Pcie3X4 = 0,
• EmHilink5Pcie2X2Pcie3X2 = 1,
• EmHilink5Sas1X4 = 2,

+} HILINK5_MODE_TYPE;

+typedef enum {

• Em32coreEvbBoard = 0,
• Em16coreEvbBoard = 1,
• EmV2R1CO5Borad = 2,
• EmOtherBorad

+} BOARD_TYPE;

+typedef struct {

• HILINK0_MODE_TYPE Hilink0Mode;
• HILINK1_MODE_TYPE Hilink1Mode;
• HILINK2_MODE_TYPE Hilink2Mode;
• UINT32 Hilink3Mode;
• UINT32 Hilink4Mode;
• HILINK5_MODE_TYPE Hilink5Mode;
• UINT32 Hilink6Mode;
• UINT32 UseSsc;

+} SERDES_PARAM; #define SERDES_INVALID_MACRO_ID 0xFFFFFFFF @@ -77,12 +69,12 @@ typedef struct serdes_param #define SERDES_INVALID_RATE_MODE 0xFFFFFFFF typedef struct {

• UINT32 MacroId;
• UINT32 DsNum;
• UINT32 DsCfg;

• UINT32 MacroId;
• UINT32 DsNum;
• UINT32 DsCfg;

} SERDES_POLARITY_INVERT; -EFI_STATUS OemGetSerdesParam (serdes_param_t *ParamA, serdes_param_t *ParamB, UINT32 SocketId); +EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId); extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[]; extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[]; UINT32 GetEthType(UINT8 EthChannel); diff --git a/Chips/Hisilicon/Pv660/Include/Library/SerdesLib.h b/Chips/Hisilicon/Pv660/Include/Library/SerdesLib.h index b6c7e20..64c7b42 100644 --- a/Chips/Hisilicon/Pv660/Include/Library/SerdesLib.h +++ b/Chips/Hisilicon/Pv660/Include/Library/SerdesLib.h @@ -18,53 +18,46 @@ #define _SERDES_LIB_H_ -typedef enum hilink0_mode_type -{

• EM_HILINK0_PCIE1_8LANE = 0,
• EM_HILINK0_PCIE1_4LANE_PCIE2_4LANE = 1,

-}hilink0_mode_type_e;

-typedef enum hilink1_mode_type -{

• EM_HILINK1_PCIE0_8LANE = 0,
• EM_HILINK1_HCCS_8LANE = 1,

-}hilink1_mode_type_e;

-typedef enum hilink2_mode_type -{

• EM_HILINK2_PCIE2_8LANE = 0,
• EM_HILINK2_SAS0_8LANE = 1,

-}hilink2_mode_type_e;

-typedef enum hilink3_mode_type -{

• EM_HILINK3_GE_4LANE = 0,
• EM_HILINK3_GE_2LANE_XGE_2LANE = 1, //lane0,lane1-ge,lane2,lane3 xge

-}hilink3_mode_type_e;

-typedef enum hilink4_mode_type -{

• EM_HILINK4_GE_4LANE = 0,
• EM_HILINK4_XGE_4LANE = 1,

-}hilink4_mode_type_e;

-typedef enum hilink5_mode_type -{

• EM_HILINK5_SAS1_4LANE = 0,
• EM_HILINK5_PCIE3_4LANE = 1,

-}hilink5_mode_type_e;

-typedef struct serdes_param -{

• hilink0_mode_type_e hilink0_mode;
• hilink1_mode_type_e hilink1_mode;
• hilink2_mode_type_e hilink2_mode;
• hilink3_mode_type_e hilink3_mode;
• hilink4_mode_type_e hilink4_mode;
• hilink5_mode_type_e hilink5_mode;

-}serdes_param_t; +typedef enum {

• EmHilink0Pcie1X8 = 0,
• EmHilink0Pcie1X4Pcie2X4 = 1,

+} HILINK0_MODE_TYPE;

+typedef enum {

• EmHilink1Pcie0X8 = 0,
• EmHilink1HccsX8 = 1,

+} HILINK1_MODE_TYPE;

+typedef enum {

• EmHilink2Pcie2X8 = 0,
• EmHilink2Sas0X8 = 1,

+} HILINK2_MODE_TYPE;

+typedef enum {

• EmHilink3GeX4 = 0,
• EmHilink3GeX2XgeX2 = 1, //lane0,lane1-ge,lane2,lane3 xge

+} HILINK3_MODE_TYPE;

+typedef enum {

• EmHilink4GeX4 = 0,
• EmHilink4XgeX4 = 1,

+} HILINK4_MODE_TYPE;

+typedef enum {

• EmHilink5Sas1X4 = 0,
• EmHilink5Pcie3X4 = 1,

+} HILINK5_MODE_TYPE;

+typedef struct {

• HILINK0_MODE_TYPE Hilink0Mode;
• HILINK1_MODE_TYPE Hilink1Mode;
• HILINK2_MODE_TYPE Hilink2Mode;
• HILINK3_MODE_TYPE Hilink3Mode;
• HILINK4_MODE_TYPE Hilink4Mode;
• HILINK5_MODE_TYPE Hilink5Mode;

+} SERDES_PARAM; #define SERDES_INVALID_MACRO_ID 0xFFFFFFFF @@ -76,7 +69,7 @@ typedef struct { } SERDES_POLARITY_INVERT; -EFI_STATUS OemGetSerdesParam (serdes_param_t *ParamA, serdes_param_t *ParamB, UINT32 SocketId); +EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId); extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[]; extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[]; UINT32 GetEthType(UINT8 EthChannel); diff --git a/Platforms/Hisilicon/D02/Library/OemMiscLibD02/BoardFeatureD02.c b/Platforms/Hisilicon/D02/Library/OemMiscLibD02/BoardFeatureD02.c index 7526644..49942e5 100644 --- a/Platforms/Hisilicon/D02/Library/OemMiscLibD02/BoardFeatureD02.c +++ b/Platforms/Hisilicon/D02/Library/OemMiscLibD02/BoardFeatureD02.c @@ -50,16 +50,16 @@ SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[] = {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM} }; -serdes_param_t gSerdesParam = {

• .hilink0_mode = EM_HILINK0_PCIE1_8LANE,
• .hilink1_mode = EM_HILINK1_PCIE0_8LANE,
• .hilink2_mode = EM_HILINK2_PCIE2_8LANE,
• .hilink3_mode = EM_HILINK3_GE_4LANE,
• .hilink4_mode = EM_HILINK4_XGE_4LANE,
• .hilink5_mode = EM_HILINK5_SAS1_4LANE,
• };

+SERDES_PARAM gSerdesParam = {

• .Hilink0Mode = EmHilink0Pcie1X8,
• .Hilink1Mode = EmHilink1Pcie0X8,
• .Hilink2Mode = EmHilink2Pcie2X8,
• .Hilink3Mode = EmHilink3GeX4,
• .Hilink4Mode = EmHilink4XgeX4,
• .Hilink5Mode = EmHilink5Sas1X4,

+}; -EFI_STATUS OemGetSerdesParam (serdes_param_t *ParamA, serdes_param_t *ParamB, UINT32 SocketId) +EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId) { if (ParamA == NULL) { DEBUG((DEBUG_ERROR, "[%a]:[%dL] ParamA == NULL!\n", __FUNCTION__, __LINE__)); diff --git a/Platforms/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c b/Platforms/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c index a54e76f..66d6289 100644 --- a/Platforms/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c +++ b/Platforms/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c @@ -42,40 +42,40 @@ SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[] = {SERDES_INVALID_MACRO_ID, SERDES_INVALID_LANE_NUM} }; -serdes_param_t gSerdesParam = {

• .hilink0_mode = EM_HILINK0_PCIE1_8LANE,
• .hilink1_mode = EM_HILINK1_PCIE0_8LANE,
• .hilink2_mode = EM_HILINK2_PCIE2_8LANE,
• .hilink3_mode = 0x0,
• .hilink4_mode = 0xF,
• .hilink5_mode = EM_HILINK5_SAS1_4LANE,
• .hilink6_mode = 0x0,
• .use_ssc = 0,
• };

-serdes_param_t gSerdesParam0 = {

• .hilink0_mode = EM_HILINK0_HCCS1_8LANE_16,
• .hilink1_mode = EM_HILINK1_HCCS0_8LANE_16,
• .hilink2_mode = EM_HILINK2_PCIE2_8LANE,
• .hilink3_mode = 0x0,
• .hilink4_mode = 0xF,
• .hilink5_mode = EM_HILINK5_SAS1_4LANE,
• .hilink6_mode = 0x0,
• .use_ssc = 0,
• };

-serdes_param_t gSerdesParam1 = {

• .hilink0_mode = EM_HILINK0_HCCS1_8LANE_16,
• .hilink1_mode = EM_HILINK1_HCCS0_8LANE_16,
• .hilink2_mode = EM_HILINK2_PCIE2_8LANE,
• .hilink3_mode = 0x0,
• .hilink4_mode = 0xF,
• .hilink5_mode = EM_HILINK5_PCIE3_4LANE,
• .hilink6_mode = 0xF,
• .use_ssc = 0,
• };

-EFI_STATUS OemGetSerdesParam (serdes_param_t *ParamA, serdes_param_t *ParamB, UINT32 SocketId) +SERDES_PARAM gSerdesParam = {

• .Hilink0Mode = EmHilink0Pcie1X8,
• .Hilink1Mode = EmHilink1Pcie0X8,
• .Hilink2Mode = EmHilink2Pcie2X8,
• .Hilink3Mode = 0x0,
• .Hilink4Mode = 0xF,
• .Hilink5Mode = EmHilink5Sas1X4,
• .Hilink6Mode = 0x0,
• .UseSsc = 0,

+};

+SERDES_PARAM gSerdesParam0 = {

• .Hilink0Mode = EmHilink0Hccs1X8Width16,
• .Hilink1Mode = EmHilink1Hccs0X8Width16,
• .Hilink2Mode = EmHilink2Pcie2X8,
• .Hilink3Mode = 0x0,
• .Hilink4Mode = 0xF,
• .Hilink5Mode = EmHilink5Sas1X4,
• .Hilink6Mode = 0x0,
• .UseSsc = 0,

+};

+SERDES_PARAM gSerdesParam1 = {

• .Hilink0Mode = EmHilink0Hccs1X8Width16,
• .Hilink1Mode = EmHilink1Hccs0X8Width16,
• .Hilink2Mode = EmHilink2Pcie2X8,
• .Hilink3Mode = 0x0,
• .Hilink4Mode = 0xF,
• .Hilink5Mode = EmHilink5Pcie3X4,
• .Hilink6Mode = 0xF,
• .UseSsc = 0,

+};

+EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId) { if (ParamA == NULL) { DEBUG((EFI_D_ERROR, "[%a]:[%dL] Param == NULL!\n", __FUNCTION__, __LINE__)); -- 1.9.1