On Mon, Nov 14, 2016 at 07:29:48PM +0800, Heyi Guo wrote:
D03 have 66M and 50M two types boards, they refer the different reference clock, set the PCD to 0 so that the code will read frequency from register and be adapted to 66M and 50M boards.
OK, this is a lot more clear than in the first version, but these are still referred to as 50MHz and 65MHz in other patches, so can we just use that globally rather than being called 50M/66M in some places?
Regards,
Leif
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo guoheyi@huawei.com
Platforms/Hisilicon/D03/D03.dsc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Platforms/Hisilicon/D03/D03.dsc b/Platforms/Hisilicon/D03/D03.dsc index b144c57..7167f4d 100644 --- a/Platforms/Hisilicon/D03/D03.dsc +++ b/Platforms/Hisilicon/D03/D03.dsc @@ -219,7 +219,9 @@ # # ARM Architectual Timer Frequency #
- gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|66000000
- # Set it to 0 so that the code will read frequence from register and be
- # adapted to 66M and 50M boards
- gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE -- 1.9.1