On 13 July 2018 at 10:15, Ming Huang ming.huang@linaro.org wrote:
The major features of this patchset include: 1 Fix invoke SetMemorySpaceAttributes error bug 2 Correct ATU Cfg0/Cfg1 base address 3 Fix SetAtuConfig1RW bug 4 Add PlatformMiscDxe driver 5 optimize two pcie prots space 6 Correct smbios product name
BTW: 1 D06 source will upstream in July; 2 Installing OS by iso is supported by edk2 commit(824b6e3b5f).
Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git branch: platforms-20180627-v3
Jason Zhang (1): Hisilicon/D03/D05: Correct ATU Cfg0/Cfg1 base address
Ming Huang (5): Hisilicon/D0x: Fix invoke SetMemorySpaceAttributes error bug Hisilicon/D0x: Fix SetAtuConfig1RW bug Hisilicon/D05: Add PlatformMiscDxe driver Hisilicon/D05/Pcie: optimize two pcie ports space Hisilicon/D0x: Correct smbios product name
Patches 1-4 and 6
Reviewed-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Pushed as 2c4d662506bd..a34ea15dbf31
For the legacy INTx issue, I would like to gain a better understanding first of why this issue is particular to D0x.
.../DS3231RealTimeClockLib.inf | 2 + Platform/Hisilicon/D05/D05.dsc | 13 +-- Platform/Hisilicon/D05/D05.fdf | 1 + .../Drivers/PlatformMiscDxe/PlatformMiscDxe.c | 99 +++++++++++++++++++ .../PlatformMiscDxe/PlatformMiscDxe.inf | 47 +++++++++ .../Library/PlatformPciLib/PlatformPciLib.c | 8 +- .../PciHostBridgeDxe/PciRootBridgeIo.c | 13 +-- .../Type01/MiscSystemManufacturerFunction.c | 1 - .../Hi1616/D05AcpiTables/D05Iort.asl | 8 +- .../Hi1616/D05AcpiTables/D05Mcfg.aslc | 8 +- .../Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 32 +++--- 11 files changed, 191 insertions(+), 41 deletions(-) create mode 100644 Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c create mode 100644 Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf
-- 2.17.0