Re: [Linaro-uefi] [PATCH edk2-platforms v1 05/16] Hisilicon/D06: Add more PCIe port INT-x support

On 2/12/2019 1:05 AM, Leif Lindholm wrote:

On Fri, Feb 01, 2019 at 09:34:25PM +0800, Ming Huang wrote:

...

From: Jason Zhang zhangjinsong2@huawei.com

Since NVMe riser width is 6*X4, need add the related port's INT-x support to match OS driver.

Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang ming.huang@linaro.org

---

Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 65 +++++++++++++++----- 1 file changed, 50 insertions(+), 15 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl index 27fde2e09bfe..4d9d9d95be68 100644 --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl @@ -41,11 +41,21 @@ Scope(_SB) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added

•  Package () {0x2FFFF,0,0,640},         // INT_A
  

•  Package () {0x2FFFF,1,0,641},         // INT_B
  

•  Package () {0x2FFFF,2,0,642},         // INT_C
  

•  Package () {0x2FFFF,3,0,643},         // INT_D
  

•  Package () {0x4FFFF,0,0,640},         // INT_A
   Package () {0x4FFFF,1,0,641},         // INT_B
   Package () {0x4FFFF,2,0,642},         // INT_C
   Package () {0x4FFFF,3,0,643},         // INT_D
  

•  Package () {0x6FFFF,0,0,640},         // INT_A
  

•  Package () {0x6FFFF,1,0,641},         // INT_B
  

•  Package () {0x6FFFF,2,0,642},         // INT_C
  

•  Package () {0x6FFFF,3,0,643},         // INT_D
  

•  Package () {0x8FFFF,0,0,640},         // INT_A
   Package () {0x8FFFF,1,0,641},         // INT_B
   Package () {0x8FFFF,2,0,642},         // INT_C
  

@@ -56,6 +66,11 @@ Scope(_SB) Package () {0xCFFFF,2,0,642}, // INT_C Package () {0xCFFFF,3,0,643}, // INT_D

•  Package () {0xEFFFF,0,0,640},         // INT_A
  

•  Package () {0xEFFFF,1,0,641},         // INT_B
  

•  Package () {0xEFFFF,2,0,642},         // INT_C
  

•  Package () {0xEFFFF,3,0,643},         // INT_D
  

•  Package () {0x10FFFF,0,0,640},         // INT_A
   Package () {0x10FFFF,1,0,641},         // INT_B
   Package () {0x10FFFF,2,0,642},         // INT_C
  

@@ -759,26 +774,46 @@ Device (PCI6) // adding RPx INTx configure deponds on hardware board topology, // if UEFI enables RPx, RPy, RPz... related INTx configure // should be added

• Package () {0x04FFFF,0,0,640}, // INT_A
• Package () {0x04FFFF,1,0,641}, // INT_B
• Package () {0x04FFFF,2,0,642}, // INT_C
• Package () {0x04FFFF,3,0,643}, // INT_D
• Package () {0x08FFFF,0,0,640}, // INT_A
• Package () {0x08FFFF,1,0,641}, // INT_B
• Package () {0x08FFFF,2,0,642}, // INT_C
• Package () {0x08FFFF,3,0,643}, // INT_D
• Package () {0x0CFFFF,0,0,640}, // INT_A
• Package () {0x0CFFFF,1,0,641}, // INT_B
• Package () {0x0CFFFF,2,0,642}, // INT_C
• Package () {0x0CFFFF,3,0,643}, // INT_D

Please don't include the non-functional change of dropping the leading 0 (0x0 -> 0x) here together with the functional change of adding new entries. Please submit as a separate patch.

Ok, do it in v2.

/ Leif

...

• Package () {0x2FFFF,0,0,640}, // INT_A
• Package () {0x2FFFF,1,0,641}, // INT_B
• Package () {0x2FFFF,2,0,642}, // INT_C
• Package () {0x2FFFF,3,0,643}, // INT_D
• Package () {0x4FFFF,0,0,640}, // INT_A
• Package () {0x4FFFF,1,0,641}, // INT_B
• Package () {0x4FFFF,2,0,642}, // INT_C
• Package () {0x4FFFF,3,0,643}, // INT_D
• Package () {0x6FFFF,0,0,640}, // INT_A
• Package () {0x6FFFF,1,0,641}, // INT_B
• Package () {0x6FFFF,2,0,642}, // INT_C
• Package () {0x6FFFF,3,0,643}, // INT_D
• Package () {0x8FFFF,0,0,640}, // INT_A
• Package () {0x8FFFF,1,0,641}, // INT_B
• Package () {0x8FFFF,2,0,642}, // INT_C
• Package () {0x8FFFF,3,0,643}, // INT_D
• Package () {0xCFFFF,0,0,640}, // INT_A
• Package () {0xCFFFF,1,0,641}, // INT_B
• Package () {0xCFFFF,2,0,642}, // INT_C
• Package () {0xCFFFF,3,0,643}, // INT_D
• Package () {0xEFFFF,0,0,640}, // INT_A
• Package () {0xEFFFF,1,0,641}, // INT_B
• Package () {0xEFFFF,2,0,642}, // INT_C
• Package () {0xEFFFF,3,0,643}, // INT_D

Package () {0x10FFFF,0,0,640}, // INT_A Package () {0x10FFFF,1,0,641}, // INT_B Package () {0x10FFFF,2,0,642}, // INT_C Package () {0x10FFFF,3,0,643}, // INT_D

• })

• Package () {0x12FFFF,0,0,640}, // INT_A
• Package () {0x12FFFF,1,0,641}, // INT_B
• Package () {0x12FFFF,2,0,642}, // INT_C
• Package () {0x12FFFF,3,0,643}, // INT_D
• })

Method (_CRS, 0, Serialized) { // Root complex resources, _CRS: current resource setting Name (RBUF, ResourceTemplate () { // Name: 19.6.87, ResourceTemplate: 19.6.111, -- 2.9.5