Before the DXE core has a chance to overwrite the in-memory copy of the varstore FV, relocate it to a dynamically allocated buffer. Note that, while this allocation is not made from the temporary PEI heap, the bookkeeping involved in calling AllocateAlignedRuntimePages() appears to push the envelope slightly, and so we need to increase the initial stack size (which is actually stack + heap)
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 6 ++- Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c | 41 ++++++++++++++++++++ Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf | 9 +++++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 6 ++- 4 files changed, 60 insertions(+), 2 deletions(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 98e08ba90828..52b891d9d1e4 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -400,7 +400,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
# Stacks for MPCores in Normal World gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x8001680000 - gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x6000 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800
# Stacks for MPCores in Monitor Mode @@ -524,6 +524,10 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gAmdModulePkgTokenSpaceGuid.PcdSataSerdesBase|0xE1200000 gAmdModulePkgTokenSpaceGuid.PcdSataSerdesOffset|0x00010000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0 + ################################################################################ # # Components Section - list of all EDK II Modules needed by this Platform diff --git a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c index ac172fa526c5..77116274c770 100644 --- a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c +++ b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c @@ -24,6 +24,7 @@ #include <PiPei.h>
#include <Library/ArmPlatformLib.h> +#include <Library/BaseMemoryLib.h> #include <Library/DebugLib.h> #include <Library/HobLib.h> #include <Library/MemoryAllocationLib.h> @@ -56,6 +57,44 @@ InitMmu ( } }
+STATIC +VOID +MoveNvStoreImage ( + VOID + ) +{ + VOID *OldBase, *NewBase; + UINTN Size; + + // + // Move the in-memory image of the NV store firmware volume to a dynamically + // allocated buffer. This gets rid of the annoying static memory reservation + // at the base of memory where all other UEFI allocations are near the top. + // + OldBase = (VOID *)FixedPcdGet64 (PcdFlashNvStorageOriginalBase); + + Size = FixedPcdGet32 (PcdFlashNvStorageVariableSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize); + + NewBase = AllocateAlignedRuntimePages (EFI_SIZE_TO_PAGES (Size), SIZE_64KB); + ASSERT (NewBase != NULL); + + CopyMem (NewBase, OldBase, Size); + + DEBUG ((EFI_D_INFO, "%a: Relocating NV store FV from %p to %p\n", + __FUNCTION__, OldBase, NewBase)); + + PcdSet64 (PcdFlashNvStorageVariableBase64, (UINT64)NewBase); + + PcdSet64 (PcdFlashNvStorageFtwWorkingBase64, (UINT64)NewBase + + FixedPcdGet32 (PcdFlashNvStorageVariableSize)); + + PcdSet64 (PcdFlashNvStorageFtwSpareBase64, (UINT64)NewBase + + FixedPcdGet32 (PcdFlashNvStorageVariableSize) + + FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize)); +} + /*++
Routine Description: @@ -144,5 +183,7 @@ MemoryPeim ( BuildMemoryTypeInformationHob (); }
+ MoveNvStoreImage (); + return EFI_SUCCESS; } diff --git a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf index adacd700083c..0201964003d0 100644 --- a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf +++ b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf @@ -78,9 +78,18 @@
gAmdStyxTokenSpaceGuid.PcdIscpSupport
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize + gAmdStyxTokenSpaceGuid.PcdFlashNvStorageOriginalBase + [Pcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64 + [Depex] gAmdStyxPlatInitPpiGuid diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index d069851b5c93..a1a755180da0 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -404,7 +404,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
# Stacks for MPCores in Normal World gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x8001680000 - gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x6000 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800
# Stacks for MPCores in Monitor Mode @@ -549,6 +549,10 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) gAmdModulePkgTokenSpaceGuid.PcdEthMacB|0x02B1B2B3B4B5 !endif
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0 +
################################################################################ #