Re: [Linaro-uefi] [PATCH v2 1/2] Platforms/AMD/Styx: correct PCIe bus and I/O ranges in DSDT

On 19 September 2016 at 19:45, Jeremy Linton jeremy.linton@arm.com wrote:

Hi,

On 09/19/2016 12:16 PM, Ard Biesheuvel wrote:

...

Change the PCIe bus range in the DSDT from [0x0 .. 0xf] to [0x00 .. 0x7f], which aligns it with the DT descripton. Also fix the I/O window: its range should be listed without taking the translation into account.

Looks good.

FWIW:

Reviewed-by: Jeremy Linton jeremy.linton@arm.com

Thanks, Jeremy. I already pushed these patches, though, so I won't be able to add the tag anymore.

Cheers, Ard.