From: Heyi Guo heyi.guo@linaro.org
Address translation support is added to generic PciHostBridge driver in edk2 by commit 74d0a33, so we can switch to it for Hisilicon D03 and D05 which are using address translation between device address and host address for resource BAR.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo heyi.guo@linaro.org Signed-off-by: Ming Huang ming.huang@linaro.org Cc: Ard Biesheuvel ard.biesheuvel@linaro.org Cc: Leif Lindholm leif.lindholm@linaro.org Cc: Michael D Kinney michael.d.kinney@intel.com Cc: Haojian Zhuang haojian.zhuang@linaro.org --- Platform/Hisilicon/D03/D03.dsc | 14 +++++++++++--- Platform/Hisilicon/D03/D03.fdf | 3 ++- Platform/Hisilicon/D05/D05.dsc | 14 +++++++++++--- Platform/Hisilicon/D05/D05.fdf | 3 ++- Silicon/Hisilicon/Hisilicon.dsc.inc | 6 +++++- 5 files changed, 31 insertions(+), 9 deletions(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 6ceebba4ee..38548a0f23 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -81,7 +81,11 @@ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf + PlatformPciLib|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf SerialPortLib|Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.inf + PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf + PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf + PciPlatformLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.inf
## GIC on D02/D03 is not fully ARM GIC compatible: IRQ cannot be cancelled when ## input signal is de-asserted, except for virtual timer interrupt IRQ #27. @@ -122,6 +126,7 @@
[PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 + gArmTokenSpaceGuid.PcdPciIoTranslation|0
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
@@ -337,6 +342,7 @@ ArmPkg/Drivers/CpuDxe/CpuDxe.inf MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf
Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf @@ -458,10 +464,12 @@ <LibraryClasses> NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf } - Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf - Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { + Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf { + <LibraryClasses> + NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf + } + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { <LibraryClasses> - DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf }
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index 264d134f98..cf11aeccc8 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -157,6 +157,7 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf INF Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf
INF Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf @@ -264,7 +265,7 @@ READ_LOCK_STATUS = TRUE # INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf INF Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf - INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
INF Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 585184654b..f2bbf27639 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -97,6 +97,10 @@
LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf + PlatformPciLib|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf + PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf + PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf + PciPlatformLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.inf
[LibraryClasses.common.SEC] ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf @@ -134,6 +138,7 @@
[PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 + gArmTokenSpaceGuid.PcdPciIoTranslation|0
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
@@ -472,6 +477,7 @@ ArmPkg/Drivers/CpuDxe/CpuDxe.inf MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf
Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf @@ -611,10 +617,12 @@ <LibraryClasses> NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } - Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf - Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { + Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf { + <LibraryClasses> + NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf + } + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { <LibraryClasses> - DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf }
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 2fa7a63d72..701804360e 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -161,6 +161,7 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf INF Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf
INF Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf @@ -286,7 +287,7 @@ READ_LOCK_STATUS = TRUE # INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf INF Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf - INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
INF Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc index 20ff1ec25b..3ac8e20232 100644 --- a/Silicon/Hisilicon/Hisilicon.dsc.inc +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc @@ -254,7 +254,11 @@
[PcdsFixedAtBuild.common] gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|44 - gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0 + # + # IO is mapped to memory space, so we use the same size of + # PcdPrePiCpuMemorySize + # + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|44 gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000