Rather then accessing the ARM_PROCESSOR_TABLE configuration table, retrieve the mailbox addresses for secondaries from the private HOB. This allows us to deprecate and ultimately get rid of this configuration table, since it exposes platform internals via an OS visible table, and this should be avoided if possible.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c index 044ec8b33f9d..2768475aeda2 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c @@ -382,7 +382,6 @@ AmdStyxPrepareFdt ( CHAR8 Name[10]; LIST_ENTRY ResourceList; BDS_SYSTEM_MEMORY_RESOURCE *Resource; - ARM_PROCESSOR_TABLE *ArmProcessorTable; ARM_CORE_INFO *ArmCoreInfoTable; UINTN ArmCoreCount; UINT32 PrimaryClusterId; @@ -547,13 +546,8 @@ AmdStyxPrepareFdt ( // in the kernel documentation: // Documentation/devicetree/bindings/arm/cpus.txt // - ArmProcessorTable = AmdStyxGetArmProcessorTable(); - ASSERT_EFI_ERROR (ArmProcessorTable == NULL); - ArmCoreInfoTable = ArmProcessorTable->ArmCpus; - - // Make sure SoC's core count does not exceed what we want to build - ArmCoreCount = ArmProcessorTable->NumberOfEntries; - ASSERT_EFI_ERROR (ArmCoreCount > NUM_CORES); + ArmCoreInfoTable = AmdStyxGetArmCoreInfoTable (&ArmCoreCount); + ASSERT (ArmCoreCount <= NUM_CORES);
// Get Id from primary CPU MpId = (UINTN) ArmReadMpidr ();