On 30 October 2017 at 03:52, Heyi Guo heyi.guo@linaro.org wrote:
Hi folks,
In NonDiscoverablePciDeviceDxe driver, NonCoherentPciIoAllocateBuffer may allocate EFI_MEMORY_UC buffer depending on input Attributes and GCD capabilities. If it does, it actually allocates memory of "device" type in AArch64, but not "normal uncacheable" memory. For "device" memory type, it requires restrict access alignment and it may trigger alignment fault exception with BaseMemoryLibOptDxe in which read/write alignment is not guaranteed.
Is EFI_MOMORY_WC enough for AArch64 platforms? How about other platforms, like X86?
Hello Heyi,
Do you mean EFI_MEMORY_UC in the last sentence? If not, I don't understand the question.
Anyway, in reality, this code will only allocate EFI_MEMORY_UC memory if any memory already exists in the memory map with that capability, otherwise it will fall back to EFI_MEMORY_WC. On most arm64 platforms, we no longer add this capability to system memory by default, so you should be getting EFI_MEMORY_WC in most cases.
So the question is actually the opposite: does this interfere with correct operation in cases where the shared mapping between the CPU and the device should be strongly ordered, and EFI_MEMORY_WC doesn't give sufficient guarantees.