Hi Ard,
Thanks. I also wrote my remark about AHCI. I hope my comments will do some backing for the solution and it gets faster to the tree. Anyway, do you have any comments to our patchset?
Best regards, Marcin
2016-11-15 12:20 GMT+01:00 Ard Biesheuvel ard.biesheuvel@linaro.org:
Hi Marcin,
On 15 November 2016 at 03:15, Marcin Wojtas mw@semihalf.com wrote:
Hi,
I send v2 of PciEmulation + USB + SATA support. The changes from v1 are significant. The driver was adjusted to cooperate with NonDiscoverablePciDeviceDxe driver, based on: [PATCH v2 0/5] MdeModulePkg: add support for non-discoverable devices
Debug showed that the above patchset had to be modified in a minor way in order to allow XHCI and SD/MMC driver (will be sent later) to operate properly:
a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c +++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c @@ -942,7 +942,7 @@ InitializePciIoProtocol ( Dev->ConfigSpace.Hdr.ClassCode[1] = PCI_CLASS_SERIAL_USB; Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_SERIAL; Dev->BarIndex = 0;
- Dev->BarSize = SIZE_2KB;
Dev->BarSize = SIZE_16KB; break;
case NonDiscoverableDeviceTypeAhci:
@@ -958,7 +958,7 @@ InitializePciIoProtocol ( Dev->ConfigSpace.Hdr.ClassCode[1] = PCI_SUBCLASS_SD_HOST_CONTROLLER; Dev->ConfigSpace.Hdr.ClassCode[2] = PCI_CLASS_SYSTEM_PERIPHERAL; Dev->BarIndex = 0;
- Dev->BarSize = 0x100;
- Dev->BarSize = 0x300; break;
I let know about above on EDK2 mailing lists.
Thanks. I will add these changes when I spin the next version.
As a result the submitted code is greatly simplified and it allows for very flexible adding new devices (currently AHCI, XHCI, SDHCI) - only via PCD, without need of touching the driver.
NOTE: AHCI wasn't tested yet, I'm waiting for the board with the silicon revision, which is supposed to comprise quirkless AHCI IP (it should arrive in coming days).
Please let me know your opinion. Despite NonDiscoverablePciDeviceDxe is not yet in the tree, I'm looking forward to your review and remarks, so that we would be ready on OPP side for this to happen.