Change the PCIe bus range in the DSDT from [0x0 .. 0xf] to [0x00 .. 0x7f], which aligns it with the DT descripton. Also fix the I/O window: its range should be listed without taking the translation into account.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/AcpiTables/Dsdt.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl index 1f0a96fb83ee..7190decbec6d 100644 --- a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl +++ b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl @@ -554,9 +554,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum - 0x000F, // Range Maximum + 0x007F, // Range Maximum 0x0000, // Translation Offset - 0x0010, // Length + 0x0080, // Length ) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity @@ -637,8 +637,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) ) DWordIo (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity - 0xEFFF0000, // Range Minimum - 0xEFFFFFFF, // Range Maximum + 0x00000000, // Range Minimum + 0x0000FFFF, // Range Maximum 0xEFFF0000, // Translation Address 0x00010000 // Length )
This switches Overdrive and Cello to the MdePkg versions of BaseMemoryLib, which have recently been updated to support AARCH64 (as well as ARM).
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 6 +++--- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 0a987cc3b118..52f0c884e45d 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -76,9 +76,7 @@ DEFINE DO_KCS = 0 PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
- # 1/123 faster than Stm or Vstm version - #BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf
# Networking Requirements NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf @@ -166,8 +164,10 @@ DEFINE DO_KCS = 0
[LibraryClasses.common.PEIM, LibraryClasses.common.SEC] MemoryInitPeiLib|OpenPlatformPkg/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
[LibraryClasses.common.PEI_CORE] + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 72ceb8b6994e..be61d2ac3227 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -79,9 +79,7 @@ DEFINE DO_KCS = 1 PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
- # 1/123 faster than Stm or Vstm version - #BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf
# Networking Requirements NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf @@ -173,8 +171,10 @@ DEFINE DO_KCS = 1
[LibraryClasses.common.PEIM, LibraryClasses.common.SEC] MemoryInitPeiLib|OpenPlatformPkg/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
[LibraryClasses.common.PEI_CORE] + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
On 14 September 2016 at 13:52, Ard Biesheuvel ard.biesheuvel@linaro.org wrote:
Change the PCIe bus range in the DSDT from [0x0 .. 0xf] to [0x00 .. 0x7f], which aligns it with the DT descripton. Also fix the I/O window: its range should be listed without taking the translation into account.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/AcpiTables/Dsdt.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl b/Platforms/AMD/Styx/ AcpiTables/Dsdt.asl index 1f0a96fb83ee..7190decbec6d 100644 --- a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl +++ b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl @@ -554,9 +554,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum
0x000F, // Range Maximum
0x007F, // Range Maximum 0x0000, // Translation Offset
0x0010, // Length
0x0080, // Length ) DWordMemory (ResourceProducer, PosDecode, MinFixed,
MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity @@ -637,8 +637,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) ) DWordIo (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity
0xEFFF0000, // Range Minimum
0xEFFFFFFF, // Range Maximum
0x00000000, // Range Minimum
0x0000FFFF, // Range Maximum 0xEFFF0000, // Translation Address 0x00010000 // Length )
This looks correct to me, I have a feeling we did similar to Juno as well in the past.
Acked-by: Graeme Gregory graeme.gregory@linaro.org
Thanks
Hi,
On 09/14/2016 07:52 AM, Ard Biesheuvel wrote:
Change the PCIe bus range in the DSDT from [0x0 .. 0xf] to [0x00 .. 0x7f], which aligns it with the DT descripton. Also fix the I/O window: its range should be listed without taking the translation into account.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/AcpiTables/Dsdt.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl index 1f0a96fb83ee..7190decbec6d 100644 --- a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl +++ b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl @@ -554,9 +554,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum
0x000F, // Range Maximum
0x007F, // Range Maximum 0x0000, // Translation Offset
0x0010, // Length
0x0080, // Length ) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity
@@ -637,8 +637,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) ) DWordIo (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity
0xEFFF0000, // Range Minimum
0xEFFFFFFF, // Range Maximum
0x00000000, // Range Minimum
0x0000FFFF, // Range Maximum 0xEFFF0000, // Translation Address 0x00010000 // Length )
I think the consensus after a fair amount of discussion is that TypeTranslate is required to be correct with respect to the specification. Although linux ignores it right now.
Thanks,
On 19 September 2016 at 16:01, Jeremy Linton jeremy.linton@arm.com wrote:
Hi,
On 09/14/2016 07:52 AM, Ard Biesheuvel wrote:
Change the PCIe bus range in the DSDT from [0x0 .. 0xf] to [0x00 .. 0x7f], which aligns it with the DT descripton. Also fix the I/O window: its range should be listed without taking the translation into account.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/AcpiTables/Dsdt.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl index 1f0a96fb83ee..7190decbec6d 100644 --- a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl +++ b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl @@ -554,9 +554,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum
0x000F, // Range Maximum
0x007F, // Range Maximum 0x0000, // Translation Offset
0x0010, // Length
0x0080, // Length ) DWordMemory (ResourceProducer, PosDecode, MinFixed,
MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity @@ -637,8 +637,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) ) DWordIo (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity
0xEFFF0000, // Range Minimum
0xEFFFFFFF, // Range Maximum
0x00000000, // Range Minimum
0x0000FFFF, // Range Maximum 0xEFFF0000, // Translation Address 0x00010000 // Length )
I think the consensus after a fair amount of discussion is that TypeTranslate is required to be correct with respect to the specification. Although linux ignores it right now.
I did wonder about that. I can live without Linux ignoring it, as long as it doesn't choke on it. I take it that is not the case then?
Hi,
On 09/19/2016 10:28 AM, Ard Biesheuvel wrote:
On 19 September 2016 at 16:01, Jeremy Linton jeremy.linton@arm.com wrote:
Hi,
On 09/14/2016 07:52 AM, Ard Biesheuvel wrote:
Change the PCIe bus range in the DSDT from [0x0 .. 0xf] to [0x00 .. 0x7f], which aligns it with the DT descripton. Also fix the I/O window: its range should be listed without taking the translation into account.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/AcpiTables/Dsdt.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl index 1f0a96fb83ee..7190decbec6d 100644 --- a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl +++ b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl @@ -554,9 +554,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum
0x000F, // Range Maximum
0x007F, // Range Maximum 0x0000, // Translation Offset
0x0010, // Length
0x0080, // Length ) DWordMemory (ResourceProducer, PosDecode, MinFixed,
MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity @@ -637,8 +637,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) ) DWordIo (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity
0xEFFF0000, // Range Minimum
0xEFFFFFFF, // Range Maximum
0x00000000, // Range Minimum
0x0000FFFF, // Range Maximum 0xEFFF0000, // Translation Address 0x00010000 // Length )
I think the consensus after a fair amount of discussion is that TypeTranslate is required to be correct with respect to the specification. Although linux ignores it right now.
I did wonder about that. I can live without Linux ignoring it, as long as it doesn't choke on it. I take it that is not the case then?
Yes everything works fine with it set. For example, Juno has TypeTranslate set, and it works with RHEL/fedora as well as recent kernels. I've been testing PIO in that machine with a radeon HD 5450 for the last couple months. The driver for that card has an extensive PIO based bootstrap process.