The patch corrects Juno LAN9118 base address.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov daniil.egranov@arm.com --- Platforms/ARM/Juno/AcpiTables/Dsdt.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl index c80f46a..c324ded 100644 --- a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl +++ b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl @@ -65,7 +65,7 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_O Name(_HID, "ARMH9118") Name(_UID, Zero) Name(_CRS, ResourceTemplate() { - Memory32Fixed(ReadWrite, 0x1A000000, 0x1000) + Memory32Fixed(ReadWrite, 0x18000000, 0x1000) Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 192 } }) Name(_DSD, Package() {
On 11 May 2016 at 03:07, Daniil Egranov daniil.egranov@arm.com wrote:
The patch corrects Juno LAN9118 base address.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov daniil.egranov@arm.com
Platforms/ARM/Juno/AcpiTables/Dsdt.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl index c80f46a..c324ded 100644 --- a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl +++ b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl @@ -65,7 +65,7 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_O Name(_HID, "ARMH9118") Name(_UID, Zero) Name(_CRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0x1A000000, 0x1000)
Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
0x18000000 is the correct address for LAN9118 on Juno. But I know nothing about ACPI tables to know if this is the correct way to convey that.
Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 192 } }) Name(_DSD, Package() {-- 2.7.4
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On 11 May 2016 at 10:50, Ryan Harkin ryan.harkin@linaro.org wrote:
On 11 May 2016 at 03:07, Daniil Egranov daniil.egranov@arm.com wrote:
The patch corrects Juno LAN9118 base address.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov daniil.egranov@arm.com
Platforms/ARM/Juno/AcpiTables/Dsdt.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl index c80f46a..c324ded 100644 --- a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl +++ b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl @@ -65,7 +65,7 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_O Name(_HID, "ARMH9118") Name(_UID, Zero) Name(_CRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0x1A000000, 0x1000)
Memory32Fixed(ReadWrite, 0x18000000, 0x1000)0x18000000 is the correct address for LAN9118 on Juno. But I know nothing about ACPI tables to know if this is the correct way to convey that.
Its the correct way.
Tested-by: Graeme Gregory graeme.gregory@linaro.org
As it turns out the registers are repeated in memory space, 0x19.... 0x1a.... 0x1b.... all work too.
Graeme
On Wed, May 11, 2016 at 03:58:05PM +0100, G Gregory wrote:
On 11 May 2016 at 10:50, Ryan Harkin ryan.harkin@linaro.org wrote:
On 11 May 2016 at 03:07, Daniil Egranov daniil.egranov@arm.com wrote:
The patch corrects Juno LAN9118 base address.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov daniil.egranov@arm.com
Platforms/ARM/Juno/AcpiTables/Dsdt.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl index c80f46a..c324ded 100644 --- a/Platforms/ARM/Juno/AcpiTables/Dsdt.asl +++ b/Platforms/ARM/Juno/AcpiTables/Dsdt.asl @@ -65,7 +65,7 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_O Name(_HID, "ARMH9118") Name(_UID, Zero) Name(_CRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0x1A000000, 0x1000)
Memory32Fixed(ReadWrite, 0x18000000, 0x1000)0x18000000 is the correct address for LAN9118 on Juno. But I know nothing about ACPI tables to know if this is the correct way to convey that.
Its the correct way.
Tested-by: Graeme Gregory graeme.gregory@linaro.org
As it turns out the registers are repeated in memory space, 0x19.... 0x1a.... 0x1b.... all work too.
Yep.
I've added the following and pushed the patch: --- The previous version specified address 0x1a000000, but the TRM documents it as being located at 0x18000000. Due to the magic of hardwarealiasing, the old version was functional, but let's use the documented value. --- (And of course I forgot to add your tested-by...)
Thanks!
Graeme _______________________________________________ Linaro-uefi mailing list Linaro-uefi@lists.linaro.org https://lists.linaro.org/mailman/listinfo/linaro-uefi
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