A couple of fixes I applied to get Cello in a slightly better shape (although the observed SATA timeout issue requires a change in the core code)
v2: - added patch to disable second SATA controller on Overdrive - use correct port mode mask for overdrive (#3) - update binary AmdModulePkg modules to latest version - add UEFI shell app to reflash to EFI code partition in the NOR - add SMMU enable switch to Cello and Overdrive 1000
Ard Biesheuvel (10): Platforms/AMD/Styx: remove incorrect timer frequency Platforms/AMD/Overdrive: disable second SATA port Platforms/AMD/Styx: set SATA port mode to Gen3 on all ports Platforms/AMD/StyxDtbLoaderLib: disable SMMUs for absent hardware Platform/AMD/Styx: add SMMU override to Cello and Overdrive1000 Platforms/AMD/Cello: add device tree support Platforms/AMD/Cello: reduce core count to 4 Platforms/AMD/Cello: set firmware vendor field to 'LeMaker Cello' Platforms/AMD/Styx/Binary: update binary modules to latest version Platforms/AMD/Styx: add command line flash tool
Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.efi | Bin 43296 -> 36768 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.inf | 14 ++- Platforms/AMD/Styx/Binary/AmdModulePkg/Iscp/IscpDxe.efi | Bin 262144 -> 262144 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/Iscp/IscpPei.efi | Bin 10336 -> 6976 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/SnpDxe/SnpDxePort0.efi | Bin 30272 -> 24992 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/SnpDxe/SnpDxePort1.efi | Bin 30272 -> 24992 bytes Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 39 ++++++-- Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 9 ++ Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 9 +- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 19 ++-- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 20 ++-- 15 files changed, 338 insertions(+), 32 deletions(-) create mode 100644 Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds create mode 100644 Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S create mode 100644 Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c create mode 100644 Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf
The ARM generic timer needs to be programmed with the actual frequency of the input clock, but this can only be done from the most privileged execution mode implemented by the hardware. UEFI on AArch64 usually executes in EL2, which is not the most privileged execution mode in most cases, and so the timer driver is set up to deal with this: no attempt is made to program the PCD value PcdArmArchTimerFreqInHz into the frequency register. However, a non-zero PCD value is still treated as an override for the register value, in case the programmed value is known to be incorrect.
However, on the various Styx based platforms, the PCD value is set to an incorrect non-zero value, and so the routines that convert time delays into cycle counts are off by 33% (187.5 MHz vs 250 MHz). This may affect timeouts related to SATA link training, and other low level routines that rely on accurate timekeeping.
So remove the explicit PCD settings, so they default to 0, letting the driver use the programmed value instead.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 5 ----- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 5 ----- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 5 ----- 3 files changed, 15 deletions(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index f068713bf0b8..ddb944d0beb4 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -400,11 +400,6 @@ DEFINE DO_KCS = 0 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xE112F000
# - # ARM Architectual Timer Frequency - # - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|187500000 - - # # Cello has 2 SATA ports on the first controller. # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index b1a7cfd4c4a8..f6d2d37014dd 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -402,11 +402,6 @@ DEFINE DO_KCS = 1 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xE112F000
# - # ARM Architectual Timer Frequency - # - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|187500000 - - # # 2 ports active on Overdrive 1000 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 98f5c9452dcd..7ac3ce3760fa 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -409,11 +409,6 @@ DEFINE DO_KCS = 1 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xE112F000
# - # ARM Architectual Timer Frequency - # - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|187500000 - - # # Overdrive B1 has 14 SATA ports across 2 controllers. # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8
The second SATA port is only available on B1 silicon, but as it turns out, not on /all/ versions of it: the Overdrive 3000 is B1 based as well, but any attempts to use the second SATA controller cause the firmware to crash. So just disable it.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 7ac3ce3760fa..9d533149af07 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -409,10 +409,13 @@ DEFINE DO_KCS = 1 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xE112F000
# - # Overdrive B1 has 14 SATA ports across 2 controllers. + # AMD's B1 based Overdrive has 14 SATA ports across 2 controllers. However, + # it appears that Softiron's Overdrive 3000, which is also B1 based, does + # not have the second SATA controller enabled, and any attempts to use it + # will crash the firmware. So use the first controller only. # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8 - gAmdStyxTokenSpaceGuid.PcdSata1PortCount|6 + gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000
The SATA related PCDs consumed by AmdSataInitLib contain a PcdSataPortMode PCD that sets the port mode to all ports. This PCD defaults to zero, while the code in question has no default, i.e., the value 0 is not treated as either 1, 2 or 3, and so the init sequence is not carried out correctly.
While observed SATA link detection issues on CelloBoard appear to be unrelated to this (i.e., this change did not improve the situation), let's set the correct values nonetheless.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 1 + Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 2 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 2 +- 3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index ddb944d0beb4..d10c0901c811 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -404,6 +404,7 @@ DEFINE DO_KCS = 0 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000 diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index f6d2d37014dd..298cf3eb1c28 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -406,6 +406,8 @@ DEFINE DO_KCS = 1 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf +
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000 diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 9d533149af07..6c284fb3b7db 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -415,7 +415,7 @@ DEFINE DO_KCS = 1 # will crash the firmware. So use the first controller only. # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8 - gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xffff
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000
The logic regarding how the various SMMUs are exposed in the device tree is inverted, in the sense that they are present in the static DTB image, and are removed if no SMMU support is requested.
However, the logic is flawed in the sense that it did not remove SMMUs for hardware that is not there to begin with, i.e., the XGBE network ports on Cello/Softiron 1000 or the second SATA controller on B1 silicon.
So fix that.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c index 093db6517c1a..0da00655396e 100644 --- a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c +++ b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c @@ -261,11 +261,18 @@ SetSocIdStatus ( if (!PcdGetBool (PcdEnableSmmus)) { DisableSmmu (Fdt, "iommu-map", "/smb/smmu@e0a00000", "/smb/pcie@f0000000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0200000", "/smb/sata@e0300000"); + } + + if (!PcdGetBool (PcdEnableSmmus) || !IsRevB1 || FixedPcdGet8 (PcdSata1PortCount) == 0) { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0c00000", "/smb/sata@e0d00000"); + } + #if DO_XGBE + if (!PcdGetBool (PcdEnableSmmus)) +#endif + { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0600000", "/smb/xgmac@e0700000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0800000", "/smb/xgmac@e0900000"); -#endif } }
Add support for enabling the SMMU descriptions in the device tree and ACPI IORT, so that the OS can attach to them. Note that these platforms only have 2 usable SMMUs: one for the PCIe root complex, and one for the SATA controller.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 4 +++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index d10c0901c811..2eec9131a8a8 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -470,9 +470,11 @@ DEFINE DO_KCS = 0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0
-[PcdsDynamicExHii.common.DEFAULT] +[PcdsDynamicHii] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
+ gAmdStyxTokenSpaceGuid.PcdEnableSmmus|L"StyxEnableSmmus"|gAmdStyxVariableGuid|0x0|FALSE + ################################################################################ # # Components Section - list of all EDK II Modules needed by this Platform diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index 298cf3eb1c28..57d1425b2c8f 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -472,9 +472,11 @@ DEFINE DO_KCS = 1 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0
-[PcdsDynamicExHii.common.DEFAULT] +[PcdsDynamicHii] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
+ gAmdStyxTokenSpaceGuid.PcdEnableSmmus|L"StyxEnableSmmus"|gAmdStyxVariableGuid|0x0|FALSE + ################################################################################ # # Components Section - list of all EDK II Modules needed by this Platform
Now that we have the ability to switch between ACPI and DT support in the UEFI setup menu, let's add DT support to Cello as well. The change is trivial, and it improves the utility of this board for development.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 15 ++++++++++++++- Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 9 +++++++++ 2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 2eec9131a8a8..2b041192c887 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -558,6 +558,15 @@ DEFINE DO_KCS = 0 AmdModulePkg/Iscp/IscpDxe.inf
# + # FDT support + # + EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf { + <LibraryClasses> + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf + DtPlatformDtbLoaderLib|OpenPlatformPkg/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf + } + + # # PCI support # AmdModulePkg/Gionb/Gionb.inf @@ -610,7 +619,11 @@ DEFINE DO_KCS = 0 # # ACPI Support # - MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf { + <LibraryClasses> + NULL|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf + } + OpenPlatformPkg/Platforms/AMD/Styx/AcpiTables/AcpiAml.inf OpenPlatformPkg/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf index 29103531a224..6f7428f0c4ca 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf @@ -139,6 +139,15 @@ READ_LOCK_STATUS = TRUE INF AmdModulePkg/Iscp/IscpDxe.inf
# + # FDT support + # + INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf + + FILE FREEFORM = 25462CDA-221F-47DF-AC1D-259CFAA4E326 { + SECTION RAW = OpenPlatformPkg/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb + } + + # # PCI support # INF AmdModulePkg/Gionb/Gionb.inf
Update the NUM_CORES define to accurately reflect the core count of the SoC part used on the CelloBoard.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 2b041192c887..f7d29a49a2dc 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -17,7 +17,7 @@ ################################################################################ [Defines]
-DEFINE NUM_CORES = 8 +DEFINE NUM_CORES = 4 DEFINE DO_KCS = 0
PLATFORM_NAME = Cello
Set the user visible 'firmware vendor' string to 'LeMaker Cello', which is more accurate, and could be helpful when dealing with bug reports, given that it is reported in the Linux kernel log as well.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index f7d29a49a2dc..091914c047a3 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -357,7 +357,7 @@ DEFINE DO_KCS = 0 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
- gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"AMD Seattle" + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"LeMaker Cello"
# Number of configured cores gArmPlatformTokenSpaceGuid.PcdCoreCount|$(NUM_CORES)
Update binary AmdModulePkg component to new versions built using the GCC5 toolchain profile using GCC 6.2.0.
The following source code changes are incorporated into this build as well
e8d5cf37d2cd AmdModulePkg: bring .DSC up to date with recent EDK2 changes bdfcb308553b AmdModulePkg/Gionb: avoid hang in reconfigure routine
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.efi | Bin 43296 -> 36768 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.inf | 14 ++++++-------- Platforms/AMD/Styx/Binary/AmdModulePkg/Iscp/IscpDxe.efi | Bin 262144 -> 262144 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/Iscp/IscpPei.efi | Bin 10336 -> 6976 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/SnpDxe/SnpDxePort0.efi | Bin 30272 -> 24992 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/SnpDxe/SnpDxePort1.efi | Bin 30272 -> 24992 bytes 6 files changed, 6 insertions(+), 8 deletions(-)
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diff --git a/Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.inf b/Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.inf index 9b06cf6393c6..867fd513ff9b 100644 --- a/Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.inf +++ b/Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.inf @@ -41,11 +41,9 @@ ENTRY_POINT = PeiInitGionb AmdModulePkg/AmdModulePkg.dec
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This implements a UEFI Shell application that updates the EFI NOR partition with the contents of STYX_EFI.Fv. Note that this means that a) EFI variables are preserved, and b) this updater can only be used on systems that have already been flashed with a firmware build based on this open source branch (and not on systems still running AMI firmware)
In order for the flasher to have access to the various PCDs that describe where STYX_EFI.Fv lives in the NOR, it needs to be built as part of the platform, but after STYX_EFI.Fv has been generated, which results in a chicken-and-egg situation. Therefore, the recommended way of generating the flasher is
1) delete the Build/<platform> directory entirely 2) build the platform 3) build the platform again, but with -D DO_FLASHER=TRUE appended
The flasher application is called 'StyxFlashUefi'
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 12 ++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 8 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 8 ++ 7 files changed, 286 insertions(+), 2 deletions(-)
diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds b/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds new file mode 100644 index 000000000000..7a0c87c6e32b --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds @@ -0,0 +1,86 @@ +/** @file + + Unified linker script for GCC based builds + + Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR> + Copyright (c) 2015 - 2017, Linaro Ltd. All rights reserved.<BR> + (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR> + + This program and the accompanying materials are licensed and made available under + the terms and conditions of the BSD License that accompanies this distribution. + The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +SECTIONS { + + /* + * The PE/COFF binary consists of DOS and PE/COFF headers, and a sequence of + * section headers adding up to PECOFF_HEADER_SIZE bytes (which differs + * between 32-bit and 64-bit builds). The actual start of the .text section + * will be rounded up based on its actual alignment. + */ + . = PECOFF_HEADER_SIZE; + + .text : ALIGN(CONSTANT(COMMONPAGESIZE)) { + *(.text .text.* .stub .gnu.linkonce.t.*) + *(.rodata .rodata.* .gnu.linkonce.r.*) + *(.got .got.*) + + /* + * The contents of AutoGen.c files are mostly constant from the POV of the + * program, but most of it ends up in .data or .bss by default since few of + * the variable definitions that get emitted are declared as CONST. + * Unfortunately, we cannot pull it into the .text section entirely, since + * patchable PCDs are also emitted here, but we can at least move all of the + * emitted GUIDs here. + */ + *:AutoGen.obj(.data.g*Guid) + } + + /* + * The alignment of the .data section should be less than or equal to the + * alignment of the .text section. This ensures that the relative offset + * between these sections is the same in the ELF and the PE/COFF versions of + * this binary. + */ + .data ALIGN(ALIGNOF(.text)) : ALIGN(CONSTANT(COMMONPAGESIZE)) { + *(.data .data.* .gnu.linkonce.d.*) + *(.bss .bss.*) + *(.payload) + } + + .eh_frame ALIGN(CONSTANT(COMMONPAGESIZE)) : { + KEEP (*(.eh_frame)) + } + + .rela (INFO) : { + *(.rela .rela.*) + } + + .hii : ALIGN(CONSTANT(COMMONPAGESIZE)) { + KEEP (*(.hii)) + } + + /* + * Retain the GNU build id but in a non-allocatable section so GenFw + * does not copy it into the PE/COFF image. + */ + .build-id (INFO) : { *(.note.gnu.build-id) } + + /DISCARD/ : { + *(.note.GNU-stack) + *(.gnu_debuglink) + *(.interp) + *(.dynsym) + *(.dynstr) + *(.dynamic) + *(.hash .gnu.hash) + *(.comment) + *(COMMON) + } +} diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S new file mode 100644 index 000000000000..041339ee9b47 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S @@ -0,0 +1,25 @@ +/** @file + + Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR> + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + .section ".payload" + .align 12 + +ASM_GLOBAL ASM_PFX(StyxFlashImageStart) +ASM_PFX(StyxFlashImageStart): + .incbin "STYX_EFI.Fv" + + .align 2 +ASM_GLOBAL ASM_PFX(StyxFlashImageSize) +ASM_PFX(StyxFlashImageSize): + .long . - ASM_PFX(StyxFlashImageStart) diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c new file mode 100644 index 000000000000..a7bdbffab891 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c @@ -0,0 +1,96 @@ +/** @file + + Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR> + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include <Uefi.h> +#include <Library/BaseMemoryLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiLib.h> +#include <Library/ShellCEntryLib.h> + +#include <Protocol/AmdIscpDxeProtocol.h> + +#define UEFI_IMAGE_OFFSET FixedPcdGet64 (PcdFvBaseAddress) - FixedPcdGet64 (PcdFdBaseAddress) +#define BLOCK_SIZE SIZE_64KB + +STATIC AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; +STATIC UINT8 Buffer[BLOCK_SIZE]; + +extern CONST UINT8 StyxFlashImageStart[]; +extern CONST UINT32 StyxFlashImageSize; + +/*** + Main entrypoint + + Establishes the main structure of the application. + + @retval 0 The application exited normally. + @retval Other An error occurred. +***/ +INTN +EFIAPI +ShellAppMain ( + IN UINTN Argc, + IN CHAR16 **Argv + ) +{ + EFI_STATUS Status; + UINTN Index; + INTN Remaining; + + Print(L"StyxFlashUefi: firmware updater for AMD Seattle based boards.\n"); + + Status = gBS->LocateProtocol (&gAmdIscpDxeProtocolGuid, NULL, + (VOID **)&mIscpDxeProtocol); + if (EFI_ERROR (Status)) { + Print(L"Failed to locate ISCP communication protocol, terminating...\n"); + return (INTN)Status; + } + + Index = 0; + Remaining = StyxFlashImageSize; + do { + Status = mIscpDxeProtocol->AmdExecuteEraseFvBlockDxe ( + mIscpDxeProtocol, + UEFI_IMAGE_OFFSET + Index * BLOCK_SIZE, + BLOCK_SIZE); + if (EFI_ERROR (Status)) { + Print(L"Erase failed!\n"); + return (INTN)Status; + } + + CopyMem (Buffer, StyxFlashImageStart + Index * BLOCK_SIZE, + MIN (Remaining, BLOCK_SIZE)); + + Status = mIscpDxeProtocol->AmdExecuteUpdateFvBlockDxe ( + mIscpDxeProtocol, + UEFI_IMAGE_OFFSET + Index * BLOCK_SIZE, + Buffer, + MIN (Remaining, BLOCK_SIZE)); + + if (EFI_ERROR (Status)) { + Print(L"Update failed!\n"); + return (INTN)Status; + } + + Remaining -= BLOCK_SIZE; + Index++; + + Print(L"Block %d of %d updated\n", Index, StyxFlashImageSize / BLOCK_SIZE); + + } while (Remaining > 0); + + Print(L"\nDone!\n"); + + return 0; +} diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf new file mode 100644 index 000000000000..2ad7c1b98ef1 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf @@ -0,0 +1,53 @@ +#/** @file +# +# Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR> +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010006 + BASE_NAME = StyxFlashUefi + FILE_GUID = 07b65d9d-b1a2-416e-bd04-0b61b775f924 + MODULE_TYPE = UEFI_APPLICATION + VERSION_STRING = 0.1 + ENTRY_POINT = ShellCEntryLib + +# +# VALID_ARCHITECTURES = AARCH64 +# + +[Sources] + StyxFlashImage.S + StyxFlashUefi.c + +[Packages] + AmdModulePkg/AmdModulePkg.dec + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + ShellPkg/ShellPkg.dec + +[LibraryClasses] + BaseMemoryLib + UefiBootServicesTableLib + UefiLib + ShellCEntryLib + +[Protocols] + gAmdIscpDxeProtocolGuid + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + gArmTokenSpaceGuid.PcdFvBaseAddress + +[BuildOptions] + *_*_*_CC_FLAGS = -mcmodel=small + *_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -Wl,-T,$(MODULE_DIR)/Scripts/GccBase.lds + *_*_*_PLATFORM_FLAGS = -I$(BIN_DIR)/../FV diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 091914c047a3..90cda24ae49d 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -17,8 +17,9 @@ ################################################################################ [Defines]
-DEFINE NUM_CORES = 4 -DEFINE DO_KCS = 0 +DEFINE NUM_CORES = 4 +DEFINE DO_KCS = 0 +DEFINE DO_FLASHER = FALSE
PLATFORM_NAME = Cello PLATFORM_GUID = 77861b3e-74b0-4ff3-8d18-c5ba5803e1bf @@ -690,3 +691,10 @@ DEFINE DO_KCS = 0 !ifdef $(RENESAS_XHCI_FW_DIR) OpenPlatformPkg/Drivers/Xhci/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf !endif + +!if $(DO_FLASHER) == TRUE + OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf { + <LibraryClasses> + ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf + } +!endif diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index 57d1425b2c8f..5b7d7f4a7b4a 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -21,6 +21,7 @@ DEFINE NUM_CORES = 4 DEFINE DO_PSCI = 1 DEFINE DO_ISCP = 1 DEFINE DO_KCS = 1 +DEFINE DO_FLASHER = FALSE
PLATFORM_NAME = Overdrive1000 PLATFORM_GUID = 36774DD7-20DE-4C5B-8722-f8861DFF1F16 @@ -701,3 +702,10 @@ DEFINE DO_KCS = 1 gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 } + +!if $(DO_FLASHER) == TRUE + OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf { + <LibraryClasses> + ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf + } +!endif diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 6c284fb3b7db..662a15a9ccea 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -22,6 +22,7 @@ DEFINE NUM_CORES = 8 DEFINE DO_PSCI = 1 DEFINE DO_ISCP = 1 DEFINE DO_KCS = 1 +DEFINE DO_FLASHER = FALSE
PLATFORM_NAME = Overdrive PLATFORM_GUID = B2296C02-9DA1-4CD1-BD48-4D4F0F1276EB @@ -752,3 +753,10 @@ DEFINE DO_KCS = 1 gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 } + +!if $(DO_FLASHER) == TRUE + OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf { + <LibraryClasses> + ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf + } +!endif
On Tue, Jun 27, 2017 at 01:21:38PM +0000, Ard Biesheuvel wrote:
The SATA related PCDs consumed by AmdSataInitLib contain a PcdSataPortMode PCD that sets the port mode to all ports. This PCD defaults to zero, while the code in question has no default, i.e., the value 0 is not treated as either 1, 2 or 3, and so the init sequence is not carried out correctly.
Could you slip a "Gen" in there somewhere before pushing? (I know it is in subject line as well.)
While observed SATA link detection issues on CelloBoard appear to be unrelated to this (i.e., this change did not improve the situation), let's set the correct values nonetheless.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 1 + Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 2 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 2 +- 3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index ddb944d0beb4..d10c0901c811 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -404,6 +404,7 @@ DEFINE DO_KCS = 0 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0
- gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000 diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index f6d2d37014dd..298cf3eb1c28 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -406,6 +406,8 @@ DEFINE DO_KCS = 1 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0
- gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000 diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 9d533149af07..6c284fb3b7db 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -415,7 +415,7 @@ DEFINE DO_KCS = 1 # will crash the firmware. So use the first controller only. # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8
- gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0
- gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xffff
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000 -- 2.9.3
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
On 27 June 2017 at 16:03, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:38PM +0000, Ard Biesheuvel wrote:
The SATA related PCDs consumed by AmdSataInitLib contain a PcdSataPortMode PCD that sets the port mode to all ports. This PCD defaults to zero, while the code in question has no default, i.e., the value 0 is not treated as either 1, 2 or 3, and so the init sequence is not carried out correctly.
Could you slip a "Gen" in there somewhere before pushing? (I know it is in subject line as well.)
Sure.
While observed SATA link detection issues on CelloBoard appear to be unrelated to this (i.e., this change did not improve the situation), let's set the correct values nonetheless.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 1 + Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 2 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 2 +- 3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index ddb944d0beb4..d10c0901c811 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -404,6 +404,7 @@ DEFINE DO_KCS = 0 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0
gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000
diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index f6d2d37014dd..298cf3eb1c28 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -406,6 +406,8 @@ DEFINE DO_KCS = 1 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0
gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 9d533149af07..6c284fb3b7db 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -415,7 +415,7 @@ DEFINE DO_KCS = 1 # will crash the firmware. So use the first controller only. # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8
- gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0
gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xffff
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000
-- 2.9.3
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
On Tue, Jun 27, 2017 at 01:21:39PM +0000, Ard Biesheuvel wrote:
The logic regarding how the various SMMUs are exposed in the device tree is inverted, in the sense that they are present in the static DTB image, and are removed if no SMMU support is requested.
However, the logic is flawed in the sense that it did not remove SMMUs for hardware that is not there to begin with, i.e., the XGBE network ports on Cello/Softiron 1000 or the second SATA controller on B1 silicon.
So fix that.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c index 093db6517c1a..0da00655396e 100644 --- a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c +++ b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c @@ -261,11 +261,18 @@ SetSocIdStatus ( if (!PcdGetBool (PcdEnableSmmus)) { DisableSmmu (Fdt, "iommu-map", "/smb/smmu@e0a00000", "/smb/pcie@f0000000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0200000", "/smb/sata@e0300000");
- }
- if (!PcdGetBool (PcdEnableSmmus) || !IsRevB1 || FixedPcdGet8 (PcdSata1PortCount) == 0) { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0c00000", "/smb/sata@e0d00000");
- }
#if DO_XGBE
- if (!PcdGetBool (PcdEnableSmmus))
+#endif
- { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0600000", "/smb/xgmac@e0700000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0800000", "/smb/xgmac@e0900000");
-#endif }
That's a little bit filthy. Could you do
#if !DO_XBGE
Around the whole new if-statement instead?
/ Leif
} -- 2.9.3
On Tue, Jun 27, 2017 at 01:21:40PM +0000, Ard Biesheuvel wrote:
Add support for enabling the SMMU descriptions in the device tree and ACPI IORT, so that the OS can attach to them. Note that these platforms only have 2 usable SMMUs: one for the PCIe root complex, and one for the SATA controller.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
With Platform->Platforms in subject: Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 4 +++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index d10c0901c811..2eec9131a8a8 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -470,9 +470,11 @@ DEFINE DO_KCS = 0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0 -[PcdsDynamicExHii.common.DEFAULT] +[PcdsDynamicHii] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
- gAmdStyxTokenSpaceGuid.PcdEnableSmmus|L"StyxEnableSmmus"|gAmdStyxVariableGuid|0x0|FALSE
################################################################################ # # Components Section - list of all EDK II Modules needed by this Platform diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index 298cf3eb1c28..57d1425b2c8f 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -472,9 +472,11 @@ DEFINE DO_KCS = 1 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x0 -[PcdsDynamicExHii.common.DEFAULT] +[PcdsDynamicHii] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
- gAmdStyxTokenSpaceGuid.PcdEnableSmmus|L"StyxEnableSmmus"|gAmdStyxVariableGuid|0x0|FALSE
################################################################################ #
# Components Section - list of all EDK II Modules needed by this Platform
2.9.3
On 27 June 2017 at 16:08, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:39PM +0000, Ard Biesheuvel wrote:
The logic regarding how the various SMMUs are exposed in the device tree is inverted, in the sense that they are present in the static DTB image, and are removed if no SMMU support is requested.
However, the logic is flawed in the sense that it did not remove SMMUs for hardware that is not there to begin with, i.e., the XGBE network ports on Cello/Softiron 1000 or the second SATA controller on B1 silicon.
So fix that.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c index 093db6517c1a..0da00655396e 100644 --- a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c +++ b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c @@ -261,11 +261,18 @@ SetSocIdStatus ( if (!PcdGetBool (PcdEnableSmmus)) { DisableSmmu (Fdt, "iommu-map", "/smb/smmu@e0a00000", "/smb/pcie@f0000000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0200000", "/smb/sata@e0300000");
- }
- if (!PcdGetBool (PcdEnableSmmus) || !IsRevB1 || FixedPcdGet8 (PcdSata1PortCount) == 0) { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0c00000", "/smb/sata@e0d00000");
- }
#if DO_XGBE
- if (!PcdGetBool (PcdEnableSmmus))
+#endif
- { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0600000", "/smb/xgmac@e0700000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0800000", "/smb/xgmac@e0900000");
-#endif }
That's a little bit filthy. Could you do
#if !DO_XBGE
Around the whole new if-statement instead?
Not really. What I actually need is
if (!PcdGetBool (PcdEnableSmmus) || !DO_XGBE)
which is not equivalent. However, this breaks due to the fact the DO_XGBE is not defined to 0 but simply not defined at all.
On Tue, Jun 27, 2017 at 01:21:41PM +0000, Ard Biesheuvel wrote:
Now that we have the ability to switch between ACPI and DT support in the UEFI setup menu, let's add DT support to Cello as well. The change is trivial, and it improves the utility of this board for development.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Yeah, fair enough. It feels a little weird to include the Overdrive .dtb directly, but there's also a limit to how much re-engineering a limited-run board should be given.
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 15 ++++++++++++++- Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 9 +++++++++ 2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 2eec9131a8a8..2b041192c887 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -558,6 +558,15 @@ DEFINE DO_KCS = 0 AmdModulePkg/Iscp/IscpDxe.inf #
- # FDT support
- #
- EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf {
<LibraryClasses>
FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.infDtPlatformDtbLoaderLib|OpenPlatformPkg/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.inf- }
- # # PCI support # AmdModulePkg/Gionb/Gionb.inf
@@ -610,7 +619,11 @@ DEFINE DO_KCS = 0 # # ACPI Support #
- MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
<LibraryClasses>
NULL|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf- }
- OpenPlatformPkg/Platforms/AMD/Styx/AcpiTables/AcpiAml.inf OpenPlatformPkg/Platforms/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf index 29103531a224..6f7428f0c4ca 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf @@ -139,6 +139,15 @@ READ_LOCK_STATUS = TRUE INF AmdModulePkg/Iscp/IscpDxe.inf #
- # FDT support
- #
- INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
- FILE FREEFORM = 25462CDA-221F-47DF-AC1D-259CFAA4E326 {
- SECTION RAW = OpenPlatformPkg/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb
- }
- # # PCI support # INF AmdModulePkg/Gionb/Gionb.inf
-- 2.9.3
On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote:
This implements a UEFI Shell application that updates the EFI NOR
standalone UEFI Shell application
partition with the contents of STYX_EFI.Fv. Note that this means that a) EFI variables are preserved, and b) this updater can only be used on systems that have already been flashed with a firmware build based on this open source branch (and not on systems still running AMI firmware)
In order for the flasher to have access to the various PCDs that describe where STYX_EFI.Fv lives in the NOR, it needs to be built as part of the platform, but after STYX_EFI.Fv has been generated, which results in a chicken-and-egg situation. Therefore, the recommended way of generating the flasher is
- delete the Build/<platform> directory entirely
- build the platform
- build the platform again, but with -D DO_FLASHER=TRUE appended
Build with -m .../StyxFlashUefi.inf instead of rebuilding the whole platform?
The flasher application is called 'StyxFlashUefi'
Only style comments below, but one silly question before that: Is there some particular reason why the application embeds the FV instead of reading it from a filesystem? Or just that you figured it's small enough that it doesn't matter?
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 12 ++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 8 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 8 ++ 7 files changed, 286 insertions(+), 2 deletions(-)
diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds b/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds new file mode 100644 index 000000000000..7a0c87c6e32b --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds @@ -0,0 +1,86 @@ +/** @file
- Unified linker script for GCC based builds
- Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
- Copyright (c) 2015 - 2017, Linaro Ltd. All rights reserved.<BR>
- (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
- This program and the accompanying materials are licensed and made available under
- the terms and conditions of the BSD License that accompanies this distribution.
- The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+SECTIONS {
- /*
- The PE/COFF binary consists of DOS and PE/COFF headers, and a sequence of
- section headers adding up to PECOFF_HEADER_SIZE bytes (which differs
- between 32-bit and 64-bit builds). The actual start of the .text section
- will be rounded up based on its actual alignment.
- */
- . = PECOFF_HEADER_SIZE;
- .text : ALIGN(CONSTANT(COMMONPAGESIZE)) {
- *(.text .text.* .stub .gnu.linkonce.t.*)
- *(.rodata .rodata.* .gnu.linkonce.r.*)
- *(.got .got.*)
- /*
* The contents of AutoGen.c files are mostly constant from the POV of the* program, but most of it ends up in .data or .bss by default since few of* the variable definitions that get emitted are declared as CONST.* Unfortunately, we cannot pull it into the .text section entirely, since* patchable PCDs are also emitted here, but we can at least move all of the* emitted GUIDs here.*/- *:AutoGen.obj(.data.g*Guid)
- }
- /*
- The alignment of the .data section should be less than or equal to the
- alignment of the .text section. This ensures that the relative offset
- between these sections is the same in the ELF and the PE/COFF versions of
- this binary.
- */
- .data ALIGN(ALIGNOF(.text)) : ALIGN(CONSTANT(COMMONPAGESIZE)) {
- *(.data .data.* .gnu.linkonce.d.*)
- *(.bss .bss.*)
- *(.payload)
- }
- .eh_frame ALIGN(CONSTANT(COMMONPAGESIZE)) : {
- KEEP (*(.eh_frame))
- }
- .rela (INFO) : {
- *(.rela .rela.*)
- }
- .hii : ALIGN(CONSTANT(COMMONPAGESIZE)) {
- KEEP (*(.hii))
- }
- /*
- Retain the GNU build id but in a non-allocatable section so GenFw
- does not copy it into the PE/COFF image.
- */
- .build-id (INFO) : { *(.note.gnu.build-id) }
- /DISCARD/ : {
- *(.note.GNU-stack)
- *(.gnu_debuglink)
- *(.interp)
- *(.dynsym)
- *(.dynstr)
- *(.dynamic)
- *(.hash .gnu.hash)
- *(.comment)
- *(COMMON)
- }
+} diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S new file mode 100644 index 000000000000..041339ee9b47 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S @@ -0,0 +1,25 @@ +/** @file
- Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
- .section ".payload"
- .align 12
+ASM_GLOBAL ASM_PFX(StyxFlashImageStart) +ASM_PFX(StyxFlashImageStart):
- .incbin "STYX_EFI.Fv"
- .align 2
+ASM_GLOBAL ASM_PFX(StyxFlashImageSize) +ASM_PFX(StyxFlashImageSize):
- .long . - ASM_PFX(StyxFlashImageStart)
diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c new file mode 100644 index 000000000000..a7bdbffab891 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c @@ -0,0 +1,96 @@ +/** @file
- Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+#include <Uefi.h> +#include <Library/BaseMemoryLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiLib.h> +#include <Library/ShellCEntryLib.h>
Inconsistent whitespace. Not sorted.
+#include <Protocol/AmdIscpDxeProtocol.h>
+#define UEFI_IMAGE_OFFSET FixedPcdGet64 (PcdFvBaseAddress) - FixedPcdGet64 (PcdFdBaseAddress) +#define BLOCK_SIZE SIZE_64KB
+STATIC AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; +STATIC UINT8 Buffer[BLOCK_SIZE];
+extern CONST UINT8 StyxFlashImageStart[]; +extern CONST UINT32 StyxFlashImageSize;
+/***
- Main entrypoint
- Establishes the main structure of the application.
- @retval 0 The application exited normally.
- @retval Other An error occurred.
+***/ +INTN +EFIAPI +ShellAppMain (
- IN UINTN Argc,
- IN CHAR16 **Argv
- )
+{
- EFI_STATUS Status;
- UINTN Index;
- INTN Remaining;
- Print(L"StyxFlashUefi: firmware updater for AMD Seattle based boards.\n");
Space after "Print". (Actually, this seems consistent on all Print statement in this function, and nothing else.)
- Status = gBS->LocateProtocol (&gAmdIscpDxeProtocolGuid, NULL,
(VOID **)&mIscpDxeProtocol);- if (EFI_ERROR (Status)) {
- Print(L"Failed to locate ISCP communication protocol, terminating...\n");
- return (INTN)Status;
- }
- Index = 0;
- Remaining = StyxFlashImageSize;
- do {
- Status = mIscpDxeProtocol->AmdExecuteEraseFvBlockDxe (
mIscpDxeProtocol,UEFI_IMAGE_OFFSET + Index * BLOCK_SIZE,BLOCK_SIZE);- if (EFI_ERROR (Status)) {
Print(L"Erase failed!\n");return (INTN)Status;- }
- CopyMem (Buffer, StyxFlashImageStart + Index * BLOCK_SIZE,
MIN (Remaining, BLOCK_SIZE));- Status = mIscpDxeProtocol->AmdExecuteUpdateFvBlockDxe (
mIscpDxeProtocol,UEFI_IMAGE_OFFSET + Index * BLOCK_SIZE,Buffer,MIN (Remaining, BLOCK_SIZE));- if (EFI_ERROR (Status)) {
Print(L"Update failed!\n");return (INTN)Status;- }
- Remaining -= BLOCK_SIZE;
- Index++;
- Print(L"Block %d of %d updated\n", Index, StyxFlashImageSize / BLOCK_SIZE);
- } while (Remaining > 0);
- Print(L"\nDone!\n");
- return 0;
+} diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf new file mode 100644 index 000000000000..2ad7c1b98ef1 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf @@ -0,0 +1,53 @@ +#/** @file +# +# Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR> +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/
+[Defines]
- INF_VERSION = 0x00010006
Not 1.25?
- BASE_NAME = StyxFlashUefi
- FILE_GUID = 07b65d9d-b1a2-416e-bd04-0b61b775f924
- MODULE_TYPE = UEFI_APPLICATION
- VERSION_STRING = 0.1
- ENTRY_POINT = ShellCEntryLib
+# +# VALID_ARCHITECTURES = AARCH64 +#
+[Sources]
- StyxFlashImage.S
- StyxFlashUefi.c
+[Packages]
- AmdModulePkg/AmdModulePkg.dec
- ArmPkg/ArmPkg.dec
- MdePkg/MdePkg.dec
- ShellPkg/ShellPkg.dec
+[LibraryClasses]
- BaseMemoryLib
- UefiBootServicesTableLib
- UefiLib
- ShellCEntryLib
+[Protocols]
- gAmdIscpDxeProtocolGuid
+[FixedPcd]
- gArmTokenSpaceGuid.PcdFdBaseAddress
- gArmTokenSpaceGuid.PcdFvBaseAddress
+[BuildOptions]
- *_*_*_CC_FLAGS = -mcmodel=small
- *_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -Wl,-T,$(MODULE_DIR)/Scripts/GccBase.lds
- *_*_*_PLATFORM_FLAGS = -I$(BIN_DIR)/../FV
Ah, _that's_ how you find STYX_EFI.Fv? :)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 091914c047a3..90cda24ae49d 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -17,8 +17,9 @@ ################################################################################ [Defines] -DEFINE NUM_CORES = 4 -DEFINE DO_KCS = 0 +DEFINE NUM_CORES = 4 +DEFINE DO_KCS = 0 +DEFINE DO_FLASHER = FALSE PLATFORM_NAME = Cello PLATFORM_GUID = 77861b3e-74b0-4ff3-8d18-c5ba5803e1bf @@ -690,3 +691,10 @@ DEFINE DO_KCS = 0 !ifdef $(RENESAS_XHCI_FW_DIR) OpenPlatformPkg/Drivers/Xhci/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf !endif
+!if $(DO_FLASHER) == TRUE
- OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf {
<LibraryClasses>
ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf- }
+!endif diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index 57d1425b2c8f..5b7d7f4a7b4a 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -21,6 +21,7 @@ DEFINE NUM_CORES = 4 DEFINE DO_PSCI = 1 DEFINE DO_ISCP = 1 DEFINE DO_KCS = 1 +DEFINE DO_FLASHER = FALSE PLATFORM_NAME = Overdrive1000 PLATFORM_GUID = 36774DD7-20DE-4C5B-8722-f8861DFF1F16 @@ -701,3 +702,10 @@ DEFINE DO_KCS = 1 gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 }
+!if $(DO_FLASHER) == TRUE
- OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf {
<LibraryClasses>
ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf- }
+!endif diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 6c284fb3b7db..662a15a9ccea 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -22,6 +22,7 @@ DEFINE NUM_CORES = 8 DEFINE DO_PSCI = 1 DEFINE DO_ISCP = 1 DEFINE DO_KCS = 1 +DEFINE DO_FLASHER = FALSE PLATFORM_NAME = Overdrive PLATFORM_GUID = B2296C02-9DA1-4CD1-BD48-4D4F0F1276EB @@ -752,3 +753,10 @@ DEFINE DO_KCS = 1 gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 }
+!if $(DO_FLASHER) == TRUE
- OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf {
<LibraryClasses>
ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf- }
+!endif
2.9.3
On 27 June 2017 at 16:33, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote:
This implements a UEFI Shell application that updates the EFI NOR
standalone UEFI Shell application
partition with the contents of STYX_EFI.Fv. Note that this means that a) EFI variables are preserved, and b) this updater can only be used on systems that have already been flashed with a firmware build based on this open source branch (and not on systems still running AMI firmware)
In order for the flasher to have access to the various PCDs that describe where STYX_EFI.Fv lives in the NOR, it needs to be built as part of the platform, but after STYX_EFI.Fv has been generated, which results in a chicken-and-egg situation. Therefore, the recommended way of generating the flasher is
- delete the Build/<platform> directory entirely
- build the platform
- build the platform again, but with -D DO_FLASHER=TRUE appended
Build with -m .../StyxFlashUefi.inf instead of rebuilding the whole platform?
Yes, that should be sufficient. I will add that.
The flasher application is called 'StyxFlashUefi'
Only style comments below, but one silly question before that: Is there some particular reason why the application embeds the FV instead of reading it from a filesystem? Or just that you figured it's small enough that it doesn't matter?
Two reasons: - simplicity; the actual code is *very* simply due to the fact that it can refer to the payload directly, and I am not a seasoned shell application hacker that has a clue how one would go about implementing it using file I/O etc - a generic flasher needs metadata that describes where the payload needs to go, and the .Fv file does not contain that, so it would involve a file format or a command line option with all the associated failure modes.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 12 ++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 8 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 8 ++ 7 files changed, 286 insertions(+), 2 deletions(-)
diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds b/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds new file mode 100644 index 000000000000..7a0c87c6e32b --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds @@ -0,0 +1,86 @@ +/** @file
- Unified linker script for GCC based builds
- Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
- Copyright (c) 2015 - 2017, Linaro Ltd. All rights reserved.<BR>
- (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
- This program and the accompanying materials are licensed and made available under
- the terms and conditions of the BSD License that accompanies this distribution.
- The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+SECTIONS {
- /*
- The PE/COFF binary consists of DOS and PE/COFF headers, and a sequence of
- section headers adding up to PECOFF_HEADER_SIZE bytes (which differs
- between 32-bit and 64-bit builds). The actual start of the .text section
- will be rounded up based on its actual alignment.
- */
- . = PECOFF_HEADER_SIZE;
- .text : ALIGN(CONSTANT(COMMONPAGESIZE)) {
- *(.text .text.* .stub .gnu.linkonce.t.*)
- *(.rodata .rodata.* .gnu.linkonce.r.*)
- *(.got .got.*)
- /*
* The contents of AutoGen.c files are mostly constant from the POV of the* program, but most of it ends up in .data or .bss by default since few of* the variable definitions that get emitted are declared as CONST.* Unfortunately, we cannot pull it into the .text section entirely, since* patchable PCDs are also emitted here, but we can at least move all of the* emitted GUIDs here.*/- *:AutoGen.obj(.data.g*Guid)
- }
- /*
- The alignment of the .data section should be less than or equal to the
- alignment of the .text section. This ensures that the relative offset
- between these sections is the same in the ELF and the PE/COFF versions of
- this binary.
- */
- .data ALIGN(ALIGNOF(.text)) : ALIGN(CONSTANT(COMMONPAGESIZE)) {
- *(.data .data.* .gnu.linkonce.d.*)
- *(.bss .bss.*)
- *(.payload)
- }
- .eh_frame ALIGN(CONSTANT(COMMONPAGESIZE)) : {
- KEEP (*(.eh_frame))
- }
- .rela (INFO) : {
- *(.rela .rela.*)
- }
- .hii : ALIGN(CONSTANT(COMMONPAGESIZE)) {
- KEEP (*(.hii))
- }
- /*
- Retain the GNU build id but in a non-allocatable section so GenFw
- does not copy it into the PE/COFF image.
- */
- .build-id (INFO) : { *(.note.gnu.build-id) }
- /DISCARD/ : {
- *(.note.GNU-stack)
- *(.gnu_debuglink)
- *(.interp)
- *(.dynsym)
- *(.dynstr)
- *(.dynamic)
- *(.hash .gnu.hash)
- *(.comment)
- *(COMMON)
- }
+} diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S new file mode 100644 index 000000000000..041339ee9b47 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S @@ -0,0 +1,25 @@ +/** @file
- Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
- .section ".payload"
- .align 12
+ASM_GLOBAL ASM_PFX(StyxFlashImageStart) +ASM_PFX(StyxFlashImageStart):
- .incbin "STYX_EFI.Fv"
- .align 2
+ASM_GLOBAL ASM_PFX(StyxFlashImageSize) +ASM_PFX(StyxFlashImageSize):
- .long . - ASM_PFX(StyxFlashImageStart)
diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c new file mode 100644 index 000000000000..a7bdbffab891 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c @@ -0,0 +1,96 @@ +/** @file
- Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+#include <Uefi.h> +#include <Library/BaseMemoryLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiLib.h> +#include <Library/ShellCEntryLib.h>
Inconsistent whitespace. Not sorted.
Will fix
+#include <Protocol/AmdIscpDxeProtocol.h>
+#define UEFI_IMAGE_OFFSET FixedPcdGet64 (PcdFvBaseAddress) - FixedPcdGet64 (PcdFdBaseAddress) +#define BLOCK_SIZE SIZE_64KB
+STATIC AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; +STATIC UINT8 Buffer[BLOCK_SIZE];
+extern CONST UINT8 StyxFlashImageStart[]; +extern CONST UINT32 StyxFlashImageSize;
+/***
- Main entrypoint
- Establishes the main structure of the application.
- @retval 0 The application exited normally.
- @retval Other An error occurred.
+***/ +INTN +EFIAPI +ShellAppMain (
- IN UINTN Argc,
- IN CHAR16 **Argv
- )
+{
- EFI_STATUS Status;
- UINTN Index;
- INTN Remaining;
- Print(L"StyxFlashUefi: firmware updater for AMD Seattle based boards.\n");
Space after "Print". (Actually, this seems consistent on all Print statement in this function, and nothing else.)
Not sure how that happened :-) Will fix.
- Status = gBS->LocateProtocol (&gAmdIscpDxeProtocolGuid, NULL,
(VOID **)&mIscpDxeProtocol);- if (EFI_ERROR (Status)) {
- Print(L"Failed to locate ISCP communication protocol, terminating...\n");
- return (INTN)Status;
- }
- Index = 0;
- Remaining = StyxFlashImageSize;
- do {
- Status = mIscpDxeProtocol->AmdExecuteEraseFvBlockDxe (
mIscpDxeProtocol,UEFI_IMAGE_OFFSET + Index * BLOCK_SIZE,BLOCK_SIZE);- if (EFI_ERROR (Status)) {
Print(L"Erase failed!\n");return (INTN)Status;- }
- CopyMem (Buffer, StyxFlashImageStart + Index * BLOCK_SIZE,
MIN (Remaining, BLOCK_SIZE));- Status = mIscpDxeProtocol->AmdExecuteUpdateFvBlockDxe (
mIscpDxeProtocol,UEFI_IMAGE_OFFSET + Index * BLOCK_SIZE,Buffer,MIN (Remaining, BLOCK_SIZE));- if (EFI_ERROR (Status)) {
Print(L"Update failed!\n");return (INTN)Status;- }
- Remaining -= BLOCK_SIZE;
- Index++;
- Print(L"Block %d of %d updated\n", Index, StyxFlashImageSize / BLOCK_SIZE);
- } while (Remaining > 0);
- Print(L"\nDone!\n");
- return 0;
+} diff --git a/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf new file mode 100644 index 000000000000..2ad7c1b98ef1 --- /dev/null +++ b/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf @@ -0,0 +1,53 @@ +#/** @file +# +# Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR> +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/
+[Defines]
- INF_VERSION = 0x00010006
Not 1.25?
Copy/paste from HelloWorld or some other example app I used. Will fix.
- BASE_NAME = StyxFlashUefi
- FILE_GUID = 07b65d9d-b1a2-416e-bd04-0b61b775f924
- MODULE_TYPE = UEFI_APPLICATION
- VERSION_STRING = 0.1
- ENTRY_POINT = ShellCEntryLib
+# +# VALID_ARCHITECTURES = AARCH64 +#
+[Sources]
- StyxFlashImage.S
- StyxFlashUefi.c
+[Packages]
- AmdModulePkg/AmdModulePkg.dec
- ArmPkg/ArmPkg.dec
- MdePkg/MdePkg.dec
- ShellPkg/ShellPkg.dec
+[LibraryClasses]
- BaseMemoryLib
- UefiBootServicesTableLib
- UefiLib
- ShellCEntryLib
+[Protocols]
- gAmdIscpDxeProtocolGuid
+[FixedPcd]
- gArmTokenSpaceGuid.PcdFdBaseAddress
- gArmTokenSpaceGuid.PcdFvBaseAddress
+[BuildOptions]
- *_*_*_CC_FLAGS = -mcmodel=small
- *_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -Wl,-T,$(MODULE_DIR)/Scripts/GccBase.lds
- *_*_*_PLATFORM_FLAGS = -I$(BIN_DIR)/../FV
Ah, _that's_ how you find STYX_EFI.Fv? :)
Yes. Keepin' it simple ...
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index 091914c047a3..90cda24ae49d 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -17,8 +17,9 @@ ################################################################################ [Defines]
-DEFINE NUM_CORES = 4 -DEFINE DO_KCS = 0 +DEFINE NUM_CORES = 4 +DEFINE DO_KCS = 0 +DEFINE DO_FLASHER = FALSE
PLATFORM_NAME = Cello PLATFORM_GUID = 77861b3e-74b0-4ff3-8d18-c5ba5803e1bf @@ -690,3 +691,10 @@ DEFINE DO_KCS = 0 !ifdef $(RENESAS_XHCI_FW_DIR) OpenPlatformPkg/Drivers/Xhci/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf !endif
+!if $(DO_FLASHER) == TRUE
- OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf {
<LibraryClasses>
ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf- }
+!endif diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index 57d1425b2c8f..5b7d7f4a7b4a 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -21,6 +21,7 @@ DEFINE NUM_CORES = 4 DEFINE DO_PSCI = 1 DEFINE DO_ISCP = 1 DEFINE DO_KCS = 1 +DEFINE DO_FLASHER = FALSE
PLATFORM_NAME = Overdrive1000 PLATFORM_GUID = 36774DD7-20DE-4C5B-8722-f8861DFF1F16 @@ -701,3 +702,10 @@ DEFINE DO_KCS = 1 gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 }
+!if $(DO_FLASHER) == TRUE
- OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf {
<LibraryClasses>
ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf- }
+!endif diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 6c284fb3b7db..662a15a9ccea 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -22,6 +22,7 @@ DEFINE NUM_CORES = 8 DEFINE DO_PSCI = 1 DEFINE DO_ISCP = 1 DEFINE DO_KCS = 1 +DEFINE DO_FLASHER = FALSE
PLATFORM_NAME = Overdrive PLATFORM_GUID = B2296C02-9DA1-4CD1-BD48-4D4F0F1276EB @@ -752,3 +753,10 @@ DEFINE DO_KCS = 1 gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 }
+!if $(DO_FLASHER) == TRUE
- OpenPlatformPkg/Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf {
<LibraryClasses>
ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf- }
+!endif
2.9.3
On Tue, Jun 27, 2017 at 01:21:35PM +0000, Ard Biesheuvel wrote:
A couple of fixes I applied to get Cello in a slightly better shape (although the observed SATA timeout issue requires a change in the core code)
v2:
- added patch to disable second SATA controller on Overdrive
- use correct port mode mask for overdrive (#3)
- update binary AmdModulePkg modules to latest version
- add UEFI shell app to reflash to EFI code partition in the NOR
- add SMMU enable switch to Cello and Overdrive 1000
For 1-2,7-8 Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
Ard Biesheuvel (10): Platforms/AMD/Styx: remove incorrect timer frequency Platforms/AMD/Overdrive: disable second SATA port Platforms/AMD/Styx: set SATA port mode to Gen3 on all ports Platforms/AMD/StyxDtbLoaderLib: disable SMMUs for absent hardware Platform/AMD/Styx: add SMMU override to Cello and Overdrive1000 Platforms/AMD/Cello: add device tree support Platforms/AMD/Cello: reduce core count to 4 Platforms/AMD/Cello: set firmware vendor field to 'LeMaker Cello' Platforms/AMD/Styx/Binary: update binary modules to latest version Platforms/AMD/Styx: add command line flash tool
Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.efi | Bin 43296 -> 36768 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.inf | 14 ++- Platforms/AMD/Styx/Binary/AmdModulePkg/Iscp/IscpDxe.efi | Bin 262144 -> 262144 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/Iscp/IscpPei.efi | Bin 10336 -> 6976 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/SnpDxe/SnpDxePort0.efi | Bin 30272 -> 24992 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/SnpDxe/SnpDxePort1.efi | Bin 30272 -> 24992 bytes Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 39 ++++++-- Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 9 ++ Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 9 +- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 19 ++-- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 20 ++-- 15 files changed, 338 insertions(+), 32 deletions(-) create mode 100644 Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds create mode 100644 Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S create mode 100644 Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c create mode 100644 Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf
-- 2.9.3
On Tue, Jun 27, 2017 at 01:21:44PM +0000, Ard Biesheuvel wrote:
Update binary AmdModulePkg component to new versions built using the GCC5 toolchain profile using GCC 6.2.0.
The following source code changes are incorporated into this build as well
e8d5cf37d2cd AmdModulePkg: bring .DSC up to date with recent EDK2 changes bdfcb308553b AmdModulePkg/Gionb: avoid hang in reconfigure routine
Source changes reviewed as well.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.efi | Bin 43296 -> 36768 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/Gionb/Gionb.inf | 14 ++++++-------- Platforms/AMD/Styx/Binary/AmdModulePkg/Iscp/IscpDxe.efi | Bin 262144 -> 262144 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/Iscp/IscpPei.efi | Bin 10336 -> 6976 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/SnpDxe/SnpDxePort0.efi | Bin 30272 -> 24992 bytes Platforms/AMD/Styx/Binary/AmdModulePkg/SnpDxe/SnpDxePort1.efi | Bin 30272 -> 24992 bytes 6 files changed, 6 insertions(+), 8 deletions(-)
On 27 June 2017 at 16:11, Ard Biesheuvel ard.biesheuvel@linaro.org wrote:
On 27 June 2017 at 16:08, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:39PM +0000, Ard Biesheuvel wrote:
The logic regarding how the various SMMUs are exposed in the device tree is inverted, in the sense that they are present in the static DTB image, and are removed if no SMMU support is requested.
However, the logic is flawed in the sense that it did not remove SMMUs for hardware that is not there to begin with, i.e., the XGBE network ports on Cello/Softiron 1000 or the second SATA controller on B1 silicon.
So fix that.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c index 093db6517c1a..0da00655396e 100644 --- a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c +++ b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c @@ -261,11 +261,18 @@ SetSocIdStatus ( if (!PcdGetBool (PcdEnableSmmus)) { DisableSmmu (Fdt, "iommu-map", "/smb/smmu@e0a00000", "/smb/pcie@f0000000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0200000", "/smb/sata@e0300000");
- }
- if (!PcdGetBool (PcdEnableSmmus) || !IsRevB1 || FixedPcdGet8 (PcdSata1PortCount) == 0) { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0c00000", "/smb/sata@e0d00000");
- }
#if DO_XGBE
- if (!PcdGetBool (PcdEnableSmmus))
+#endif
- { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0600000", "/smb/xgmac@e0700000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0800000", "/smb/xgmac@e0900000");
-#endif }
That's a little bit filthy. Could you do
#if !DO_XBGE
Around the whole new if-statement instead?
Not really. What I actually need is
if (!PcdGetBool (PcdEnableSmmus) || !DO_XGBE)
which is not equivalent. However, this breaks due to the fact the DO_XGBE is not defined to 0 but simply not defined at all.
How about
#if DO_XGBE DisableXgbeSmmus = !PcdGetBool (PcdEnableSmmus); #else DisableXgbeSmmus = TRUE; #endif
if (DisableXgbeSmmus) { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0600000", "/smb/xgmac@e0700000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0800000", "/smb/xgmac@e0900000"); }
?
On Tue, Jun 27, 2017 at 04:39:47PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 16:33, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote:
This implements a UEFI Shell application that updates the EFI NOR
standalone UEFI Shell application
partition with the contents of STYX_EFI.Fv. Note that this means that a) EFI variables are preserved, and b) this updater can only be used on systems that have already been flashed with a firmware build based on this open source branch (and not on systems still running AMI firmware)
Request for clarification based on your explanation below: Presumably b) is for one or both of these reasons: 1) AMI firmware will not produce all protocols needed for this application to run (just like this firmware will not produce all protocols the AMI updater needs)? 2) This application does not zero out the variable area?
In order for the flasher to have access to the various PCDs that describe where STYX_EFI.Fv lives in the NOR, it needs to be built as part of the platform, but after STYX_EFI.Fv has been generated, which results in a chicken-and-egg situation. Therefore, the recommended way of generating the flasher is
- delete the Build/<platform> directory entirely
- build the platform
- build the platform again, but with -D DO_FLASHER=TRUE appended
Build with -m .../StyxFlashUefi.inf instead of rebuilding the whole platform?
Yes, that should be sufficient. I will add that.
The flasher application is called 'StyxFlashUefi'
Only style comments below, but one silly question before that: Is there some particular reason why the application embeds the FV instead of reading it from a filesystem? Or just that you figured it's small enough that it doesn't matter?
Two reasons:
- simplicity; the actual code is *very* simply due to the fact that it
can refer to the payload directly, and I am not a seasoned shell application hacker that has a clue how one would go about implementing it using file I/O etc
- a generic flasher needs metadata that describes where the payload
needs to go, and the .Fv file does not contain that, so it would involve a file format or a command line option with all the associated failure modes.
Right, so basically because PcdFvBaseAddress and PcdFdBaseAddress could change? But would such a change not mean that variables would not be preserved after all?
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 12 ++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 8 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 8 ++ 7 files changed, 286 insertions(+), 2 deletions(-)
On Tue, Jun 27, 2017 at 05:00:12PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 16:11, Ard Biesheuvel ard.biesheuvel@linaro.org wrote:
On 27 June 2017 at 16:08, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:39PM +0000, Ard Biesheuvel wrote:
The logic regarding how the various SMMUs are exposed in the device tree is inverted, in the sense that they are present in the static DTB image, and are removed if no SMMU support is requested.
However, the logic is flawed in the sense that it did not remove SMMUs for hardware that is not there to begin with, i.e., the XGBE network ports on Cello/Softiron 1000 or the second SATA controller on B1 silicon.
So fix that.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c index 093db6517c1a..0da00655396e 100644 --- a/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c +++ b/Platforms/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c @@ -261,11 +261,18 @@ SetSocIdStatus ( if (!PcdGetBool (PcdEnableSmmus)) { DisableSmmu (Fdt, "iommu-map", "/smb/smmu@e0a00000", "/smb/pcie@f0000000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0200000", "/smb/sata@e0300000");
- }
- if (!PcdGetBool (PcdEnableSmmus) || !IsRevB1 || FixedPcdGet8 (PcdSata1PortCount) == 0) { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0c00000", "/smb/sata@e0d00000");
- }
#if DO_XGBE
- if (!PcdGetBool (PcdEnableSmmus))
+#endif
- { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0600000", "/smb/xgmac@e0700000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0800000", "/smb/xgmac@e0900000");
-#endif }
That's a little bit filthy. Could you do
#if !DO_XBGE
Around the whole new if-statement instead?
Not really. What I actually need is
if (!PcdGetBool (PcdEnableSmmus) || !DO_XGBE)
which is not equivalent. However, this breaks due to the fact the DO_XGBE is not defined to 0 but simply not defined at all.
How about
#if DO_XGBE DisableXgbeSmmus = !PcdGetBool (PcdEnableSmmus); #else DisableXgbeSmmus = TRUE; #endif
if (DisableXgbeSmmus) { DisableSmmu (Fdt, "iommus", "/smb/smmu@e0600000", "/smb/xgmac@e0700000"); DisableSmmu (Fdt, "iommus", "/smb/smmu@e0800000", "/smb/xgmac@e0900000"); }
?
That looks optimal. With that: Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
On 27 June 2017 at 17:00, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 04:39:47PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 16:33, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote:
This implements a UEFI Shell application that updates the EFI NOR
standalone UEFI Shell application
partition with the contents of STYX_EFI.Fv. Note that this means that a) EFI variables are preserved, and b) this updater can only be used on systems that have already been flashed with a firmware build based on this open source branch (and not on systems still running AMI firmware)
Request for clarification based on your explanation below: Presumably b) is for one or both of these reasons:
- AMI firmware will not produce all protocols needed for this application to run (just like this firmware will not produce all protocols the AMI updater needs)?
- This application does not zero out the variable area?
The AMI firmware is also based on SeattleFDK, so it does produce the ISCP protocol that exposes the NOR read/write/erase methods. This is what makes it dangerous, given that the flasher will most likely run happily, but will not leave the NOR in a state where a varstore FV header appears in the expected place. This is what will make the firmware crash.
Note that none of these issues are particularly difficult to deal with, but it increases the complexity of this tools, which is not intended as a production quality firmware update distribution method but simply to allow me to distribute firmware updates to people like Lorenzo and Marc, and now some Cello users as well which shouldn't have been shipped boards to begin with.
In order for the flasher to have access to the various PCDs that describe where STYX_EFI.Fv lives in the NOR, it needs to be built as part of the platform, but after STYX_EFI.Fv has been generated, which results in a chicken-and-egg situation. Therefore, the recommended way of generating the flasher is
- delete the Build/<platform> directory entirely
- build the platform
- build the platform again, but with -D DO_FLASHER=TRUE appended
Build with -m .../StyxFlashUefi.inf instead of rebuilding the whole platform?
Yes, that should be sufficient. I will add that.
The flasher application is called 'StyxFlashUefi'
Only style comments below, but one silly question before that: Is there some particular reason why the application embeds the FV instead of reading it from a filesystem? Or just that you figured it's small enough that it doesn't matter?
Two reasons:
- simplicity; the actual code is *very* simply due to the fact that it
can refer to the payload directly, and I am not a seasoned shell application hacker that has a clue how one would go about implementing it using file I/O etc
- a generic flasher needs metadata that describes where the payload
needs to go, and the .Fv file does not contain that, so it would involve a file format or a command line option with all the associated failure modes.
Right, so basically because PcdFvBaseAddress and PcdFdBaseAddress could change? But would such a change not mean that variables would not be preserved after all?
Not just because they could change, but because their value is set in the .FDF, and so any attempt to obtain the values elsewhere would involve adding a redundant definition, which I would like to avoid.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 12 ++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 8 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 8 ++ 7 files changed, 286 insertions(+), 2 deletions(-)
On Tue, Jun 27, 2017 at 05:24:30PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 17:00, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 04:39:47PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 16:33, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote:
This implements a UEFI Shell application that updates the EFI NOR
standalone UEFI Shell application
partition with the contents of STYX_EFI.Fv. Note that this means that a) EFI variables are preserved, and b) this updater can only be used on systems that have already been flashed with a firmware build based on this open source branch (and not on systems still running AMI firmware)
Request for clarification based on your explanation below: Presumably b) is for one or both of these reasons:
- AMI firmware will not produce all protocols needed for this application to run (just like this firmware will not produce all protocols the AMI updater needs)?
- This application does not zero out the variable area?
The AMI firmware is also based on SeattleFDK, so it does produce the ISCP protocol that exposes the NOR read/write/erase methods. This is what makes it dangerous, given that the flasher will most likely run happily, but will not leave the NOR in a state where a varstore FV header appears in the expected place. This is what will make the firmware crash.
Note that none of these issues are particularly difficult to deal with, but it increases the complexity of this tools, which is not intended as a production quality firmware update distribution method but simply to allow me to distribute firmware updates to people like Lorenzo and Marc, and now some Cello users as well which shouldn't have been shipped boards to begin with.
All I'm really getting at with these questions around a very much welcome new tool is that I have a feeling it isn't necessarily end-user proof at this stage, so I think I would like to see either a few warnings in this commit message (which currently reads more like it's saying more along the lines of "it will only work if" than "you will become a customer of Dediprog if you try") or some attempt to determine whether we are on a platform where it is safe to attempt an upgrade.
In order for the flasher to have access to the various PCDs that describe where STYX_EFI.Fv lives in the NOR, it needs to be built as part of the platform, but after STYX_EFI.Fv has been generated, which results in a chicken-and-egg situation. Therefore, the recommended way of generating the flasher is
- delete the Build/<platform> directory entirely
- build the platform
- build the platform again, but with -D DO_FLASHER=TRUE appended
Build with -m .../StyxFlashUefi.inf instead of rebuilding the whole platform?
Yes, that should be sufficient. I will add that.
The flasher application is called 'StyxFlashUefi'
Only style comments below, but one silly question before that: Is there some particular reason why the application embeds the FV instead of reading it from a filesystem? Or just that you figured it's small enough that it doesn't matter?
Two reasons:
- simplicity; the actual code is *very* simply due to the fact that it
can refer to the payload directly, and I am not a seasoned shell application hacker that has a clue how one would go about implementing it using file I/O etc
- a generic flasher needs metadata that describes where the payload
needs to go, and the .Fv file does not contain that, so it would involve a file format or a command line option with all the associated failure modes.
Right, so basically because PcdFvBaseAddress and PcdFdBaseAddress could change? But would such a change not mean that variables would not be preserved after all?
Not just because they could change, but because their value is set in the .FDF, and so any attempt to obtain the values elsewhere would involve adding a redundant definition, which I would like to avoid.
Oh, indeed.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 12 ++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 8 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 8 ++ 7 files changed, 286 insertions(+), 2 deletions(-)
On 27 June 2017 at 17:48, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 05:24:30PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 17:00, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 04:39:47PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 16:33, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote:
This implements a UEFI Shell application that updates the EFI NOR
standalone UEFI Shell application
partition with the contents of STYX_EFI.Fv. Note that this means that a) EFI variables are preserved, and b) this updater can only be used on systems that have already been flashed with a firmware build based on this open source branch (and not on systems still running AMI firmware)
Request for clarification based on your explanation below: Presumably b) is for one or both of these reasons:
- AMI firmware will not produce all protocols needed for this application to run (just like this firmware will not produce all protocols the AMI updater needs)?
- This application does not zero out the variable area?
The AMI firmware is also based on SeattleFDK, so it does produce the ISCP protocol that exposes the NOR read/write/erase methods. This is what makes it dangerous, given that the flasher will most likely run happily, but will not leave the NOR in a state where a varstore FV header appears in the expected place. This is what will make the firmware crash.
Note that none of these issues are particularly difficult to deal with, but it increases the complexity of this tools, which is not intended as a production quality firmware update distribution method but simply to allow me to distribute firmware updates to people like Lorenzo and Marc, and now some Cello users as well which shouldn't have been shipped boards to begin with.
All I'm really getting at with these questions around a very much welcome new tool is that I have a feeling it isn't necessarily end-user proof at this stage, so I think I would like to see either a few warnings in this commit message (which currently reads more like it's saying more along the lines of "it will only work if" than "you will become a customer of Dediprog if you try") or some attempt to determine whether we are on a platform where it is safe to attempt an upgrade.
Oh, this is absolutely unsuitable for general use. For instance, it does not distinguish between Cello, Overdrive and Overdrive1000, nor does it perform any kind of verification after the flash, all of which are not that difficult to implement, but simply not things that I can be bothered to care about at the moment, given the sorry state of Cello, and the fact that the only three users of this firmware for Overdrive are one floor down from where your desk is.
So for now, it is either merging this code, with perhaps some discouraging capitalized scary words added to the commit message, or just disregarding the patch for now, in the hope that someone else (Alan perhaps?) can be bothered to pick it up later and polish it up a bit. I honestly don't care either way.
In order for the flasher to have access to the various PCDs that describe where STYX_EFI.Fv lives in the NOR, it needs to be built as part of the platform, but after STYX_EFI.Fv has been generated, which results in a chicken-and-egg situation. Therefore, the recommended way of generating the flasher is
- delete the Build/<platform> directory entirely
- build the platform
- build the platform again, but with -D DO_FLASHER=TRUE appended
Build with -m .../StyxFlashUefi.inf instead of rebuilding the whole platform?
Yes, that should be sufficient. I will add that.
The flasher application is called 'StyxFlashUefi'
Only style comments below, but one silly question before that: Is there some particular reason why the application embeds the FV instead of reading it from a filesystem? Or just that you figured it's small enough that it doesn't matter?
Two reasons:
- simplicity; the actual code is *very* simply due to the fact that it
can refer to the payload directly, and I am not a seasoned shell application hacker that has a clue how one would go about implementing it using file I/O etc
- a generic flasher needs metadata that describes where the payload
needs to go, and the .Fv file does not contain that, so it would involve a file format or a command line option with all the associated failure modes.
Right, so basically because PcdFvBaseAddress and PcdFdBaseAddress could change? But would such a change not mean that variables would not be preserved after all?
Not just because they could change, but because their value is set in the .FDF, and so any attempt to obtain the values elsewhere would involve adding a redundant definition, which I would like to avoid.
Oh, indeed.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 12 ++- Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 8 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 8 ++ 7 files changed, 286 insertions(+), 2 deletions(-)
On Tue, Jun 27, 2017 at 10:56 AM, Ard Biesheuvel ard.biesheuvel@linaro.org wrote:
On 27 June 2017 at 17:48, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 05:24:30PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 17:00, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 04:39:47PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 16:33, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote: > This implements a UEFI Shell application that updates the EFI NOR
standalone UEFI Shell application
> partition with the contents of STYX_EFI.Fv. Note that this means that > a) EFI variables are preserved, and > b) this updater can only be used on systems that have already been flashed > with a firmware build based on this open source branch (and not on systems > still running AMI firmware)
Request for clarification based on your explanation below: Presumably b) is for one or both of these reasons:
- AMI firmware will not produce all protocols needed for this application to run (just like this firmware will not produce all protocols the AMI updater needs)?
- This application does not zero out the variable area?
The AMI firmware is also based on SeattleFDK, so it does produce the ISCP protocol that exposes the NOR read/write/erase methods. This is what makes it dangerous, given that the flasher will most likely run happily, but will not leave the NOR in a state where a varstore FV header appears in the expected place. This is what will make the firmware crash.
Note that none of these issues are particularly difficult to deal with, but it increases the complexity of this tools, which is not intended as a production quality firmware update distribution method but simply to allow me to distribute firmware updates to people like Lorenzo and Marc, and now some Cello users as well which shouldn't have been shipped boards to begin with.
All I'm really getting at with these questions around a very much welcome new tool is that I have a feeling it isn't necessarily end-user proof at this stage, so I think I would like to see either a few warnings in this commit message (which currently reads more like it's saying more along the lines of "it will only work if" than "you will become a customer of Dediprog if you try") or some attempt to determine whether we are on a platform where it is safe to attempt an upgrade.
Oh, this is absolutely unsuitable for general use. For instance, it does not distinguish between Cello, Overdrive and Overdrive1000, nor does it perform any kind of verification after the flash, all of which are not that difficult to implement, but simply not things that I can be bothered to care about at the moment, given the sorry state of Cello, and the fact that the only three users of this firmware for Overdrive are one floor down from where your desk is.
So for now, it is either merging this code, with perhaps some discouraging capitalized scary words added to the commit message, or just disregarding the patch for now, in the hope that someone else (Alan perhaps?) can be bothered to pick it up later and polish it up a bit. I honestly don't care either way.
I'll give this a try. I can use a Bus Pirate to program the flash, but it's slow and I don't have a proper cable, so I have to connect the wires individually. I'd think merging with warnings would be useful. It won't be built by default, so users would have to deliberately use this.
Roy
> In order for the flasher to have access to the various PCDs that describe > where STYX_EFI.Fv lives in the NOR, it needs to be built as part of the > platform, but after STYX_EFI.Fv has been generated, which results in a > chicken-and-egg situation. Therefore, the recommended way of generating > the flasher is > > 1) delete the Build/<platform> directory entirely > 2) build the platform > 3) build the platform again, but with -D DO_FLASHER=TRUE appended
Build with -m .../StyxFlashUefi.inf instead of rebuilding the whole platform?
Yes, that should be sufficient. I will add that.
> The flasher application is called 'StyxFlashUefi'
Only style comments below, but one silly question before that: Is there some particular reason why the application embeds the FV instead of reading it from a filesystem? Or just that you figured it's small enough that it doesn't matter?
Two reasons:
- simplicity; the actual code is *very* simply due to the fact that it
can refer to the payload directly, and I am not a seasoned shell application hacker that has a clue how one would go about implementing it using file I/O etc
- a generic flasher needs metadata that describes where the payload
needs to go, and the .Fv file does not contain that, so it would involve a file format or a command line option with all the associated failure modes.
Right, so basically because PcdFvBaseAddress and PcdFdBaseAddress could change? But would such a change not mean that variables would not be preserved after all?
Not just because they could change, but because their value is set in the .FDF, and so any attempt to obtain the values elsewhere would involve adding a redundant definition, which I would like to avoid.
Oh, indeed.
> Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org > --- > Platforms/AMD/Styx/Applications/StyxFlashUefi/Scripts/GccBase.lds | 86 ++++++++++++++++++ > Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashImage.S | 25 +++++ > Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.c | 96 ++++++++++++++++++++ > Platforms/AMD/Styx/Applications/StyxFlashUefi/StyxFlashUefi.inf | 53 +++++++++++ > Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 12 ++- > Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 8 ++ > Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 8 ++ > 7 files changed, 286 insertions(+), 2 deletions(-)
On Tue, Jun 27, 2017 at 05:56:35PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 17:48, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 05:24:30PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 17:00, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 04:39:47PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 16:33, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote: > This implements a UEFI Shell application that updates the EFI NOR
standalone UEFI Shell application
> partition with the contents of STYX_EFI.Fv. Note that this means that > a) EFI variables are preserved, and > b) this updater can only be used on systems that have already been flashed > with a firmware build based on this open source branch (and not on systems > still running AMI firmware)
Request for clarification based on your explanation below: Presumably b) is for one or both of these reasons:
- AMI firmware will not produce all protocols needed for this application to run (just like this firmware will not produce all protocols the AMI updater needs)?
- This application does not zero out the variable area?
The AMI firmware is also based on SeattleFDK, so it does produce the ISCP protocol that exposes the NOR read/write/erase methods. This is what makes it dangerous, given that the flasher will most likely run happily, but will not leave the NOR in a state where a varstore FV header appears in the expected place. This is what will make the firmware crash.
Note that none of these issues are particularly difficult to deal with, but it increases the complexity of this tools, which is not intended as a production quality firmware update distribution method but simply to allow me to distribute firmware updates to people like Lorenzo and Marc, and now some Cello users as well which shouldn't have been shipped boards to begin with.
All I'm really getting at with these questions around a very much welcome new tool is that I have a feeling it isn't necessarily end-user proof at this stage, so I think I would like to see either a few warnings in this commit message (which currently reads more like it's saying more along the lines of "it will only work if" than "you will become a customer of Dediprog if you try") or some attempt to determine whether we are on a platform where it is safe to attempt an upgrade.
Oh, this is absolutely unsuitable for general use. For instance, it does not distinguish between Cello, Overdrive and Overdrive1000, nor does it perform any kind of verification after the flash, all of which are not that difficult to implement, but simply not things that I can be bothered to care about at the moment, given the sorry state of Cello, and the fact that the only three users of this firmware for Overdrive are one floor down from where your desk is.
Yeah, I get it.
So for now, it is either merging this code, with perhaps some discouraging capitalized scary words added to the commit message, or just disregarding the patch for now, in the hope that someone else (Alan perhaps?) can be bothered to pick it up later and polish it up a bit. I honestly don't care either way.
I'm good with some capitalized scary words.
/ Leif
On Tue, Jun 27, 2017 at 11:53 AM, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 05:56:35PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 17:48, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 05:24:30PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 17:00, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 04:39:47PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 16:33, Leif Lindholm leif.lindholm@linaro.org wrote: > On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote: >> This implements a UEFI Shell application that updates the EFI NOR > > standalone UEFI Shell application > >> partition with the contents of STYX_EFI.Fv. Note that this means that >> a) EFI variables are preserved, and >> b) this updater can only be used on systems that have already been flashed >> with a firmware build based on this open source branch (and not on systems >> still running AMI firmware)
Request for clarification based on your explanation below: Presumably b) is for one or both of these reasons:
- AMI firmware will not produce all protocols needed for this application to run (just like this firmware will not produce all protocols the AMI updater needs)?
- This application does not zero out the variable area?
The AMI firmware is also based on SeattleFDK, so it does produce the ISCP protocol that exposes the NOR read/write/erase methods. This is what makes it dangerous, given that the flasher will most likely run happily, but will not leave the NOR in a state where a varstore FV header appears in the expected place. This is what will make the firmware crash.
Note that none of these issues are particularly difficult to deal with, but it increases the complexity of this tools, which is not intended as a production quality firmware update distribution method but simply to allow me to distribute firmware updates to people like Lorenzo and Marc, and now some Cello users as well which shouldn't have been shipped boards to begin with.
All I'm really getting at with these questions around a very much welcome new tool is that I have a feeling it isn't necessarily end-user proof at this stage, so I think I would like to see either a few warnings in this commit message (which currently reads more like it's saying more along the lines of "it will only work if" than "you will become a customer of Dediprog if you try") or some attempt to determine whether we are on a platform where it is safe to attempt an upgrade.
Oh, this is absolutely unsuitable for general use. For instance, it does not distinguish between Cello, Overdrive and Overdrive1000, nor does it perform any kind of verification after the flash, all of which are not that difficult to implement, but simply not things that I can be bothered to care about at the moment, given the sorry state of Cello, and the fact that the only three users of this firmware for Overdrive are one floor down from where your desk is.
Yeah, I get it.
So for now, it is either merging this code, with perhaps some discouraging capitalized scary words added to the commit message, or just disregarding the patch for now, in the hope that someone else (Alan perhaps?) can be bothered to pick it up later and polish it up a bit. I honestly don't care either way.
I'm good with some capitalized scary words.
/ Leif
You can add: Tested-by: Roy Franz roy.franz@cavium.com
I did see some unexpected output in the early Linux boot, but that is unrelated to this patch, as I didn't apply other patches from this series, as some of them were already on the master branch. I built against edk2 51bf49ee53a289 (Current UDK2017 branch) and OpenPlatformPkg 8a854db1f5, and I'm seeing the following:
EFI stub: Booting Linux Kernel... EFI stub: Using DTB from configuration table EFI stub: Exiting boot services and installing virtual address map... [ 0.403578] ssp-pl022 e1020000.ssp: probe: no chip select defined [ 0.409716] ssp-pl022 e1030000.ssp: Failed to work in dma mode, work without!
The boot continues, and seems to work fine, however the two ssp-pl022 messages are not there on the firmware build that I got from Ard with the SATA detection timeout fix.
Roy
On 27 June 2017 at 21:29, Roy Franz rfranz@cavium.com wrote:
On Tue, Jun 27, 2017 at 11:53 AM, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 05:56:35PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 17:48, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 05:24:30PM +0000, Ard Biesheuvel wrote:
On 27 June 2017 at 17:00, Leif Lindholm leif.lindholm@linaro.org wrote:
On Tue, Jun 27, 2017 at 04:39:47PM +0000, Ard Biesheuvel wrote: > On 27 June 2017 at 16:33, Leif Lindholm leif.lindholm@linaro.org wrote: > > On Tue, Jun 27, 2017 at 01:21:45PM +0000, Ard Biesheuvel wrote: > >> This implements a UEFI Shell application that updates the EFI NOR > > > > standalone UEFI Shell application > > > >> partition with the contents of STYX_EFI.Fv. Note that this means that > >> a) EFI variables are preserved, and > >> b) this updater can only be used on systems that have already been flashed > >> with a firmware build based on this open source branch (and not on systems > >> still running AMI firmware)
Request for clarification based on your explanation below: Presumably b) is for one or both of these reasons:
- AMI firmware will not produce all protocols needed for this application to run (just like this firmware will not produce all protocols the AMI updater needs)?
- This application does not zero out the variable area?
The AMI firmware is also based on SeattleFDK, so it does produce the ISCP protocol that exposes the NOR read/write/erase methods. This is what makes it dangerous, given that the flasher will most likely run happily, but will not leave the NOR in a state where a varstore FV header appears in the expected place. This is what will make the firmware crash.
Note that none of these issues are particularly difficult to deal with, but it increases the complexity of this tools, which is not intended as a production quality firmware update distribution method but simply to allow me to distribute firmware updates to people like Lorenzo and Marc, and now some Cello users as well which shouldn't have been shipped boards to begin with.
All I'm really getting at with these questions around a very much welcome new tool is that I have a feeling it isn't necessarily end-user proof at this stage, so I think I would like to see either a few warnings in this commit message (which currently reads more like it's saying more along the lines of "it will only work if" than "you will become a customer of Dediprog if you try") or some attempt to determine whether we are on a platform where it is safe to attempt an upgrade.
Oh, this is absolutely unsuitable for general use. For instance, it does not distinguish between Cello, Overdrive and Overdrive1000, nor does it perform any kind of verification after the flash, all of which are not that difficult to implement, but simply not things that I can be bothered to care about at the moment, given the sorry state of Cello, and the fact that the only three users of this firmware for Overdrive are one floor down from where your desk is.
Yeah, I get it.
So for now, it is either merging this code, with perhaps some discouraging capitalized scary words added to the commit message, or just disregarding the patch for now, in the hope that someone else (Alan perhaps?) can be bothered to pick it up later and polish it up a bit. I honestly don't care either way.
I'm good with some capitalized scary words.
/ Leif
You can add: Tested-by: Roy Franz roy.franz@cavium.com
Thanks!
I did see some unexpected output in the early Linux boot, but that is unrelated to this patch, as I didn't apply other patches from this series, as some of them were already on the master branch. I built against edk2 51bf49ee53a289 (Current UDK2017 branch) and OpenPlatformPkg 8a854db1f5, and I'm seeing the following:
EFI stub: Booting Linux Kernel... EFI stub: Using DTB from configuration table EFI stub: Exiting boot services and installing virtual address map... [ 0.403578] ssp-pl022 e1020000.ssp: probe: no chip select defined [ 0.409716] ssp-pl022 e1030000.ssp: Failed to work in dma mode, work without!
The boot continues, and seems to work fine, however the two ssp-pl022 messages are not there on the firmware build that I got from Ard with the SATA detection timeout fix.
This is because you are now booting in DT mode. The messages themselves are harmless afaict.
You can switch back to ACPI in the UEFI setup menu (under Device Manager) and it will stick
Sorry I'm really late to this thread.
On 06/27/2017 09:21 AM, Ard Biesheuvel wrote:
The second SATA port is only available on B1 silicon, but as it turns out, not on /all/ versions of it: the Overdrive 3000 is B1 based as well, but any attempts to use the second SATA controller cause the firmware to crash. So just disable it.
This is not true. The SoftIron OverDrive 3000 has 14 SATA ports that all work. Did someone at SoftIron tell you this?
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 7ac3ce3760fa..9d533149af07 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -409,10 +409,13 @@ DEFINE DO_KCS = 1 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xE112F000 #
- # Overdrive B1 has 14 SATA ports across 2 controllers.
- # AMD's B1 based Overdrive has 14 SATA ports across 2 controllers. However,
- # it appears that Softiron's Overdrive 3000, which is also B1 based, does
- # not have the second SATA controller enabled, and any attempts to use it
- # will crash the firmware. So use the first controller only. # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8
- gAmdStyxTokenSpaceGuid.PcdSata1PortCount|6
- gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0
# PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000
On 29 July 2017 at 02:17, Alan Ott alan@softiron.com wrote:
Sorry I'm really late to this thread.
On 06/27/2017 09:21 AM, Ard Biesheuvel wrote:
The second SATA port is only available on B1 silicon, but as it turns out, not on /all/ versions of it: the Overdrive 3000 is B1 based as well, but any attempts to use the second SATA controller cause the firmware to crash. So just disable it.
This is not true. The SoftIron OverDrive 3000 has 14 SATA ports that all work. Did someone at SoftIron tell you this?
Interesting. Do they all work in UEFI as well?
I programmed the open source Overdrive firmware on a SoftIron box at the ARM office (Punit's), and it crashed in UEFI when trying to initialize the second SATA controller. The same code works fine on my non-SoftIron B1 Overdrive, so I wonder what the difference is.
On 07/29/2017 06:23 AM, Ard Biesheuvel wrote:
On 29 July 2017 at 02:17, Alan Ott alan@softiron.com wrote:
Sorry I'm really late to this thread.
On 06/27/2017 09:21 AM, Ard Biesheuvel wrote:
The second SATA port is only available on B1 silicon, but as it turns out, not on /all/ versions of it: the Overdrive 3000 is B1 based as well, but any attempts to use the second SATA controller cause the firmware to crash. So just disable it.
This is not true. The SoftIron OverDrive 3000 has 14 SATA ports that all work. Did someone at SoftIron tell you this?
Interesting. Do they all work in UEFI as well?
Hi Ard,
We use the 2nd controller from Linux extensively.
Regarding use from within UEFI, this obviously doesn't get as much use by us as does using the drives from Linux (since as you might expect we typically boot from the first port), but I just now booted successfully from all 6 drives on the second controller using debug and release builds.
I programmed the open source Overdrive firmware on a SoftIron box at the ARM office (Punit's), and it crashed in UEFI when trying to initialize the second SATA controller. The same code works fine on my non-SoftIron B1 Overdrive, so I wonder what the difference is.
I can't say for sure. If you have a bad unit, we'd be happy to help you with that.
Alan.
On 31 July 2017 at 18:39, Alan Ott alan@softiron.com wrote:
On 07/29/2017 06:23 AM, Ard Biesheuvel wrote:
On 29 July 2017 at 02:17, Alan Ott alan@softiron.com wrote:
Sorry I'm really late to this thread.
On 06/27/2017 09:21 AM, Ard Biesheuvel wrote:
The second SATA port is only available on B1 silicon, but as it turns out, not on /all/ versions of it: the Overdrive 3000 is B1 based as well, but any attempts to use the second SATA controller cause the firmware to crash. So just disable it.
This is not true. The SoftIron OverDrive 3000 has 14 SATA ports that all work. Did someone at SoftIron tell you this?
Interesting. Do they all work in UEFI as well?
Hi Ard,
We use the 2nd controller from Linux extensively.
Regarding use from within UEFI, this obviously doesn't get as much use by us as does using the drives from Linux (since as you might expect we typically boot from the first port), but I just now booted successfully from all 6 drives on the second controller using debug and release builds.
OK, interesting. I had the same experience on my B1, but flashing this one SoftIron 3000 to the open source firmware resulted in the crash I mentioned.
What I don't remember exactly is whether I updated the secure part as well, or only the EDK2 code and var partitions on the SPI flash.
I programmed the open source Overdrive firmware on a SoftIron box at the ARM office (Punit's), and it crashed in UEFI when trying to initialize the second SATA controller. The same code works fine on my non-SoftIron B1 Overdrive, so I wonder what the difference is.
I can't say for sure. If you have a bad unit, we'd be happy to help you with that.
I must admit disabling the second port was also useful in fixing the Gen1/2/3 setting in AmdSataInitLib, given that the PCD in question is 32-bits and so can only describe 8 ports. I suppose it makes sense to get to the bottom of that one first, though. Did you simply revert that change? Or switch to Gen2 or Gen1?
On 07/31/2017 03:30 PM, Ard Biesheuvel wrote:
On 31 July 2017 at 18:39, Alan Ott alan@softiron.com wrote:
On 07/29/2017 06:23 AM, Ard Biesheuvel wrote:
On 29 July 2017 at 02:17, Alan Ott alan@softiron.com wrote:
Sorry I'm really late to this thread.
On 06/27/2017 09:21 AM, Ard Biesheuvel wrote:
The second SATA port is only available on B1 silicon, but as it turns out, not on /all/ versions of it: the Overdrive 3000 is B1 based as well, but any attempts to use the second SATA controller cause the firmware to crash. So just disable it.
This is not true. The SoftIron OverDrive 3000 has 14 SATA ports that all work. Did someone at SoftIron tell you this?
Interesting. Do they all work in UEFI as well?
Hi Ard,
We use the 2nd controller from Linux extensively.
Regarding use from within UEFI, this obviously doesn't get as much use by us as does using the drives from Linux (since as you might expect we typically boot from the first port), but I just now booted successfully from all 6 drives on the second controller using debug and release builds.
OK, interesting. I had the same experience on my B1, but flashing this one SoftIron 3000 to the open source firmware resulted in the crash I mentioned.
What I don't remember exactly is whether I updated the secure part as well, or only the EDK2 code and var partitions on the SPI flash.
I'm building OverdriveBoard.dsc configuration in OpenPlatformPkg and flashing Build/.../STYX_ROM.fd directly onto the SPI flash. I'm not rebuilding the secure part for any of this.
I programmed the open source Overdrive firmware on a SoftIron box at the ARM office (Punit's), and it crashed in UEFI when trying to initialize the second SATA controller. The same code works fine on my non-SoftIron B1 Overdrive, so I wonder what the difference is.
I can't say for sure. If you have a bad unit, we'd be happy to help you with that.
I must admit disabling the second port was also useful in fixing the Gen1/2/3 setting in AmdSataInitLib, given that the PCD in question is 32-bits and so can only describe 8 ports. I suppose it makes sense to get to the bottom of that one first, though.
Are you talking about PcdSataPortMode? That's 16 bits wide, which I think is what you meant (8 ports * 2 bits is 16). We should increase the size to 32.
Did you simply revert that change? Or switch to Gen2 or Gen1?
I didn't change it. It works fine with that change, but only because 0xffff >> n is still 0xffff.
Alan.
On 31 July 2017 at 20:59, Alan Ott alan@softiron.com wrote:
On 07/31/2017 03:30 PM, Ard Biesheuvel wrote:
On 31 July 2017 at 18:39, Alan Ott alan@softiron.com wrote:
On 07/29/2017 06:23 AM, Ard Biesheuvel wrote:
On 29 July 2017 at 02:17, Alan Ott alan@softiron.com wrote:
Sorry I'm really late to this thread.
On 06/27/2017 09:21 AM, Ard Biesheuvel wrote:
The second SATA port is only available on B1 silicon, but as it turns out, not on /all/ versions of it: the Overdrive 3000 is B1 based as well, but any attempts to use the second SATA controller cause the firmware to crash. So just disable it.
This is not true. The SoftIron OverDrive 3000 has 14 SATA ports that all work. Did someone at SoftIron tell you this?
Interesting. Do they all work in UEFI as well?
Hi Ard,
We use the 2nd controller from Linux extensively.
Regarding use from within UEFI, this obviously doesn't get as much use by us as does using the drives from Linux (since as you might expect we typically boot from the first port), but I just now booted successfully from all 6 drives on the second controller using debug and release builds.
OK, interesting. I had the same experience on my B1, but flashing this one SoftIron 3000 to the open source firmware resulted in the crash I mentioned.
What I don't remember exactly is whether I updated the secure part as well, or only the EDK2 code and var partitions on the SPI flash.
I'm building OverdriveBoard.dsc configuration in OpenPlatformPkg and flashing Build/.../STYX_ROM.fd directly onto the SPI flash. I'm not rebuilding the secure part for any of this.
OK. But in my case, I may have flashed the 3000 board with the open source UEFI only, and kept whatever was in the secure partition.
I programmed the open source Overdrive firmware on a SoftIron box at the ARM office (Punit's), and it crashed in UEFI when trying to initialize the second SATA controller. The same code works fine on my non-SoftIron B1 Overdrive, so I wonder what the difference is.
I can't say for sure. If you have a bad unit, we'd be happy to help you with that.
I must admit disabling the second port was also useful in fixing the Gen1/2/3 setting in AmdSataInitLib, given that the PCD in question is 32-bits and so can only describe 8 ports. I suppose it makes sense to get to the bottom of that one first, though.
Are you talking about PcdSataPortMode? That's 16 bits wide, which I think is what you meant (8 ports * 2 bits is 16). We should increase the size to 32.
Indeed.
Did you simply revert that change? Or switch to Gen2 or Gen1?
I didn't change it. It works fine with that change, but only because 0xffff
n is still 0xffff.
Ah ok. But I thought you had identified that change as the source of a problem?
On 07/31/2017 04:01 PM, Ard Biesheuvel wrote:
On 31 July 2017 at 20:59, Alan Ott alan@softiron.com wrote:
On 07/31/2017 03:30 PM, Ard Biesheuvel wrote:
On 31 July 2017 at 18:39, Alan Ott alan@softiron.com wrote:
On 07/29/2017 06:23 AM, Ard Biesheuvel wrote:
On 29 July 2017 at 02:17, Alan Ott alan@softiron.com wrote:
Sorry I'm really late to this thread.
On 06/27/2017 09:21 AM, Ard Biesheuvel wrote: > The second SATA port is only available on B1 silicon, but as it turns > out, not on /all/ versions of it: the Overdrive 3000 is B1 based as > well, > but any attempts to use the second SATA controller cause the firmware > to > crash. So just disable it.
This is not true. The SoftIron OverDrive 3000 has 14 SATA ports that all work. Did someone at SoftIron tell you this?
Interesting. Do they all work in UEFI as well?
Hi Ard,
We use the 2nd controller from Linux extensively.
Regarding use from within UEFI, this obviously doesn't get as much use by us as does using the drives from Linux (since as you might expect we typically boot from the first port), but I just now booted successfully from all 6 drives on the second controller using debug and release builds.
OK, interesting. I had the same experience on my B1, but flashing this one SoftIron 3000 to the open source firmware resulted in the crash I mentioned.
What I don't remember exactly is whether I updated the secure part as well, or only the EDK2 code and var partitions on the SPI flash.
I'm building OverdriveBoard.dsc configuration in OpenPlatformPkg and flashing Build/.../STYX_ROM.fd directly onto the SPI flash. I'm not rebuilding the secure part for any of this.
OK. But in my case, I may have flashed the 3000 board with the open source UEFI only, and kept whatever was in the secure partition.
Ah, I see. I've never done that.
I programmed the open source Overdrive firmware on a SoftIron box at the ARM office (Punit's), and it crashed in UEFI when trying to initialize the second SATA controller. The same code works fine on my non-SoftIron B1 Overdrive, so I wonder what the difference is.
I can't say for sure. If you have a bad unit, we'd be happy to help you with that.
I must admit disabling the second port was also useful in fixing the Gen1/2/3 setting in AmdSataInitLib, given that the PCD in question is 32-bits and so can only describe 8 ports. I suppose it makes sense to get to the bottom of that one first, though.
Are you talking about PcdSataPortMode? That's 16 bits wide, which I think is what you meant (8 ports * 2 bits is 16). We should increase the size to 32.
Indeed.
Did you simply revert that change? Or switch to Gen2 or Gen1?
I didn't change it. It works fine with that change, but only because 0xffff
n is still 0xffff.
Ah ok. But I thought you had identified that change as the source of a problem?
If you're referring to a comment I left on IRC, I reverted dc07fa34c77cdd and 79aafbadadffb6 (effectively) and my boot stopped hanging. I hadn't worked out what the issue was at the time.
What I've determined now is that gAmdStyxTokenSpaceGuid.PcdSata1PortCount must be specified in the .DSC. It can be zero, but if it's not present it appears to default to 8, and the initialization hangs. This causes HEAD to not boot for me. Does HEAD boot for you?
Alan.
On 31 July 2017 at 21:27, Alan Ott alan@softiron.com wrote:
On 07/31/2017 04:01 PM, Ard Biesheuvel wrote:
On 31 July 2017 at 20:59, Alan Ott alan@softiron.com wrote:
On 07/31/2017 03:30 PM, Ard Biesheuvel wrote:
On 31 July 2017 at 18:39, Alan Ott alan@softiron.com wrote:
On 07/29/2017 06:23 AM, Ard Biesheuvel wrote:
On 29 July 2017 at 02:17, Alan Ott alan@softiron.com wrote: > > Sorry I'm really late to this thread. > > On 06/27/2017 09:21 AM, Ard Biesheuvel wrote: >> >> The second SATA port is only available on B1 silicon, but as it >> turns >> out, not on /all/ versions of it: the Overdrive 3000 is B1 based as >> well, >> but any attempts to use the second SATA controller cause the >> firmware >> to >> crash. So just disable it. > > > This is not true. The SoftIron OverDrive 3000 has 14 SATA ports that > all > work. Did someone at SoftIron tell you this? > Interesting. Do they all work in UEFI as well?
Hi Ard,
We use the 2nd controller from Linux extensively.
Regarding use from within UEFI, this obviously doesn't get as much use by us as does using the drives from Linux (since as you might expect we typically boot from the first port), but I just now booted successfully from all 6 drives on the second controller using debug and release builds.
OK, interesting. I had the same experience on my B1, but flashing this one SoftIron 3000 to the open source firmware resulted in the crash I mentioned.
What I don't remember exactly is whether I updated the secure part as well, or only the EDK2 code and var partitions on the SPI flash.
I'm building OverdriveBoard.dsc configuration in OpenPlatformPkg and flashing Build/.../STYX_ROM.fd directly onto the SPI flash. I'm not rebuilding the secure part for any of this.
OK. But in my case, I may have flashed the 3000 board with the open source UEFI only, and kept whatever was in the secure partition.
Ah, I see. I've never done that.
I programmed the open source Overdrive firmware on a SoftIron box at the ARM office (Punit's), and it crashed in UEFI when trying to initialize the second SATA controller. The same code works fine on my non-SoftIron B1 Overdrive, so I wonder what the difference is.
I can't say for sure. If you have a bad unit, we'd be happy to help you with that.
I must admit disabling the second port was also useful in fixing the Gen1/2/3 setting in AmdSataInitLib, given that the PCD in question is 32-bits and so can only describe 8 ports. I suppose it makes sense to get to the bottom of that one first, though.
Are you talking about PcdSataPortMode? That's 16 bits wide, which I think is what you meant (8 ports * 2 bits is 16). We should increase the size to 32.
Indeed.
Did you simply revert that change? Or switch to Gen2 or Gen1?
I didn't change it. It works fine with that change, but only because 0xffff
n is still 0xffff.
Ah ok. But I thought you had identified that change as the source of a problem?
If you're referring to a comment I left on IRC, I reverted dc07fa34c77cdd and 79aafbadadffb6 (effectively) and my boot stopped hanging. I hadn't worked out what the issue was at the time.
What I've determined now is that gAmdStyxTokenSpaceGuid.PcdSata1PortCount must be specified in the .DSC. It can be zero, but if it's not present it appears to default to 8, and the initialization hangs. This causes HEAD to not boot for me. Does HEAD boot for you?
I am currently running OPP 3c4fa409b6b0ba729161fd4ce4d2ab0dfa036422 but against UDK2017 branch (plus a couple of patches) rather than EDK2 HEAD.
-
Alan Ott -
Ard Biesheuvel -
Leif Lindholm -
Roy Franz