v3-v4: Rebase/Split patch for newer edk2/OpenPlatformPkg v2-v3: Add JunoR2 support, replace CPU MIDR code with board revision detection v1->v2: General cleanups, move juno revision macro info platform.h
SMBIOS data is consumed by a wide range of enterprise applications.
Fill in the basic requirements of the SMBIOS specification by hardcoding the minimum required structures and data using Juno information. With this change both the EFI shell, BDS and linux dmidecode commands return useful information.
This patch set is actually against both edk2 and OpenPlatformPkg. The first three patches apply against edk2, the last three against OpenPlatformPkg.
Jeremy Linton (3): ArmPlatformPkg: Add A72 CPU type Code to detect what juno revision we are running on. Convert ArmJunoDxe to use common juno revision code
Jeremy Linton (3): Platforms/ARM/Juno: Create SMBIOS/DMI data for Juno Platforms/ARM/Juno: Add the module build information Platforms/ARM/Juno: Add the SMBIOS/DMI module to the Juno Platform
ArmPkg/Include/Chipset/AArch64.h | 1 + .../ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c | 62 +++++++--------------- ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h | 30 ++++++++++- 3 files changed, 48 insertions(+), 45 deletions(-)
Platforms/ARM/Juno/ArmJuno.dsc | 12 + Platforms/ARM/Juno/ArmJuno.fdf | 6 + .../ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c | 864 +++++++++++++++++++++ .../Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 68 ++ 4 files changed, 950 insertions(+) create mode 100644 Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c create mode 100644 Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
Add the A72 CPU type which is used in JunoR2.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com --- ArmPkg/Include/Chipset/AArch64.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h index aa6a7e0..e94c929 100644 --- a/ArmPkg/Include/Chipset/AArch64.h +++ b/ArmPkg/Include/Chipset/AArch64.h @@ -49,6 +49,7 @@ #define ARM_CPU_TYPE_AEMv8 0xD0F #define ARM_CPU_TYPE_A53 0xD03 #define ARM_CPU_TYPE_A57 0xD07 +#define ARM_CPU_TYPE_A72 0xD08 #define ARM_CPU_TYPE_A15 0xC0F #define ARM_CPU_TYPE_A9 0xC09 #define ARM_CPU_TYPE_A7 0xC07
The code to detect what juno revision we are running on is fairly small put it in a common header where it may be used in a couple places.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com --- ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h | 30 +++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h b/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h index d01d136..d39193d 100644 --- a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h +++ b/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h @@ -17,12 +17,18 @@
#include <VExpressMotherBoard.h>
+#define EXTRACT_FIELD(word,offset,len) ((word>>offset)&((1<<(len+1))-1)) /*********************************************************************************** // Platform Memory Map ************************************************************************************/
// Motherboard Peripheral and On-chip peripheral #define ARM_VE_BOARD_PERIPH_BASE 0x1C010000 +#define ARM_VE_BOARD_SYS_ID 0x0000 +#define ARM_VE_BOARD_SYS_PCIE_GBE_L 0x0074 +#define ARM_VE_BOARD_SYS_PCIE_GBE_H 0x0078 + +#define ARM_VE_BOARD_SYS_ID_REV(word) EXTRACT_FIELD(word,28,4)
// NOR Flash 0 #define ARM_VE_SMB_NOR0_BASE 0x08000000 @@ -83,6 +89,26 @@ EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ }
+// +// Hardware platform identifiers +// +#define JUNO_REVISION_PROTOTYPE 0 +#define JUNO_REVISION_R0 1 +#define JUNO_REVISION_R1 2 +#define JUNO_REVISION_R2 3 +#define JUNO_REVISION_UKNOWN 0xFF + +// +// We detect whether we are running on a Juno r0, r1 or r2 +// board at runtime by checking the value of board SYS_ID +// +#define GetJunoRevision(JunoRevision) \ +{ \ + UINT32 SysId; \ + SysId = MmioRead32 (ARM_VE_BOARD_PERIPH_BASE+ARM_VE_BOARD_SYS_ID); \ + JunoRevision = ARM_VE_BOARD_SYS_ID_REV( SysId ); \ +} + #define JUNO_WATCHDOG_COUNT 2
// Define if the exported ACPI Tables are based on ACPI 5.0 spec or latest @@ -93,7 +119,7 @@ // assigned to the PCI Gigabyte Ethernet device. //
-#define ARM_JUNO_SYS_PCIGBE_L (ARM_VE_BOARD_PERIPH_BASE + 0x74) -#define ARM_JUNO_SYS_PCIGBE_H (ARM_VE_BOARD_PERIPH_BASE + 0x78) +#define ARM_JUNO_SYS_PCIGBE_L (ARM_VE_BOARD_PERIPH_BASE + ARM_VE_BOARD_SYS_PCIE_GBE_L) +#define ARM_JUNO_SYS_PCIGBE_H (ARM_VE_BOARD_PERIPH_BASE + ARM_VE_BOARD_SYS_PCIE_GBE_H)
#endif
On Wed, Jul 27, 2016 at 02:24:35PM -0500, Jeremy Linton wrote:
The code to detect what juno revision we are running on is fairly small put it in a common header where it may be used in a couple places.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com
ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h | 30 +++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h b/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h index d01d136..d39193d 100644 --- a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h +++ b/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h @@ -17,12 +17,18 @@ #include <VExpressMotherBoard.h> +#define EXTRACT_FIELD(word,offset,len) ((word>>offset)&((1<<(len+1))-1))
So ... I would prefer to not have this new macro here. On the one hand, because its completely generic, and as such shouldn't live in platform specific code. But also because the only user in this file could be implemented with a >> 28.
Am I OK to drop it on commit?
/ Leif
/*********************************************************************************** // Platform Memory Map ************************************************************************************/ // Motherboard Peripheral and On-chip peripheral #define ARM_VE_BOARD_PERIPH_BASE 0x1C010000 +#define ARM_VE_BOARD_SYS_ID 0x0000 +#define ARM_VE_BOARD_SYS_PCIE_GBE_L 0x0074 +#define ARM_VE_BOARD_SYS_PCIE_GBE_H 0x0078
+#define ARM_VE_BOARD_SYS_ID_REV(word) EXTRACT_FIELD(word,28,4) // NOR Flash 0 #define ARM_VE_SMB_NOR0_BASE 0x08000000 @@ -83,6 +89,26 @@ EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ } +// +// Hardware platform identifiers +// +#define JUNO_REVISION_PROTOTYPE 0 +#define JUNO_REVISION_R0 1 +#define JUNO_REVISION_R1 2 +#define JUNO_REVISION_R2 3 +#define JUNO_REVISION_UKNOWN 0xFF
+// +// We detect whether we are running on a Juno r0, r1 or r2 +// board at runtime by checking the value of board SYS_ID +// +#define GetJunoRevision(JunoRevision) \ +{ \
- UINT32 SysId; \
- SysId = MmioRead32 (ARM_VE_BOARD_PERIPH_BASE+ARM_VE_BOARD_SYS_ID); \
- JunoRevision = ARM_VE_BOARD_SYS_ID_REV( SysId ); \
+}
#define JUNO_WATCHDOG_COUNT 2 // Define if the exported ACPI Tables are based on ACPI 5.0 spec or latest @@ -93,7 +119,7 @@ // assigned to the PCI Gigabyte Ethernet device. // -#define ARM_JUNO_SYS_PCIGBE_L (ARM_VE_BOARD_PERIPH_BASE + 0x74) -#define ARM_JUNO_SYS_PCIGBE_H (ARM_VE_BOARD_PERIPH_BASE + 0x78) +#define ARM_JUNO_SYS_PCIGBE_L (ARM_VE_BOARD_PERIPH_BASE + ARM_VE_BOARD_SYS_PCIE_GBE_L) +#define ARM_JUNO_SYS_PCIGBE_H (ARM_VE_BOARD_PERIPH_BASE + ARM_VE_BOARD_SYS_PCIE_GBE_H)
#endif
2.5.5
On 07/28/2016 06:23 AM, Leif Lindholm wrote:
On Wed, Jul 27, 2016 at 02:24:35PM -0500, Jeremy Linton wrote:
The code to detect what juno revision we are running on is fairly small put it in a common header where it may be used in a couple places.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com
ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h | 30 +++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h b/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h index d01d136..d39193d 100644 --- a/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h +++ b/ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h @@ -17,12 +17,18 @@
#include <VExpressMotherBoard.h>
+#define EXTRACT_FIELD(word,offset,len) ((word>>offset)&((1<<(len+1))-1))
So ... I would prefer to not have this new macro here. On the one hand, because its completely generic, and as such shouldn't live in platform specific code. But also because the only user in this file could be implemented with a >> 28.
Am I OK to drop it on commit?
Sure, feel free to tweak away..
Thanks,
Now that the code to detect the Juno revision is in the header go ahead and covert the ArmJunoDxe to use it.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com --- .../ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c | 62 +++++++--------------- 1 file changed, 19 insertions(+), 43 deletions(-)
diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c index dba1fcd..b97f044 100644 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c +++ b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c @@ -30,14 +30,6 @@ #include <Library/IoLib.h> #include <Library/PrintLib.h>
-// -// Hardware platform identifiers -// -typedef enum { - UNKNOWN, - JUNO_R0, - JUNO_R1 -} JUNO_REVISION;
// This GUID must match the FILE_GUID in ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf STATIC CONST EFI_GUID mJunoAcpiTableFile = { 0xa1dd808e, 0x1e95, 0x4399, { 0xab, 0xc0, 0x65, 0x3c, 0x82, 0xe8, 0x53, 0x0c } }; @@ -134,6 +126,16 @@ AcpiTableJunoR1Check ( return TRUE; }
+STATIC +BOOLEAN +AcpiTableJunoR2Check ( + IN EFI_ACPI_DESCRIPTION_HEADER *AcpiHeader + ) +{ + return TRUE; +} + + EFI_STATUS EFIAPI ArmJunoEntryPoint ( @@ -146,13 +148,9 @@ ArmJunoEntryPoint ( CHAR16 *TextDevicePath; UINTN TextDevicePathSize; VOID *Buffer; - UINT32 Midr; - UINT32 CpuType; - UINT32 CpuRev; - JUNO_REVISION JunoRevision; + UINT32 JunoRevision; EFI_EVENT EndOfDxeEvent;
- JunoRevision = UNKNOWN; Status = PciEmulationEntryPoint (); if (EFI_ERROR (Status)) { return Status; @@ -217,47 +215,25 @@ ArmJunoEntryPoint ( DEBUG ((EFI_D_ERROR, "ArmJunoDxe: Failed to install ShellDynCmdRunAxf\n")); }
- // - // We detect whether we are running on a Juno r0 or Juno r1 board at - // runtime by checking the value of the MIDR register. - // - - Midr = ArmReadMidr (); - CpuType = (Midr >> ARM_CPU_TYPE_SHIFT) & ARM_CPU_TYPE_MASK; - CpuRev = Midr & ARM_CPU_REV_MASK; - - switch (CpuType) { - case ARM_CPU_TYPE_A53: - if (CpuRev == ARM_CPU_REV (0, 0)) { - JunoRevision = JUNO_R0; - } else if (CpuRev == ARM_CPU_REV (0, 3)) { - JunoRevision = JUNO_R1; - } - break; - - case ARM_CPU_TYPE_A57: - if (CpuRev == ARM_CPU_REV (0, 0)) { - JunoRevision = JUNO_R0; - } else if (CpuRev == ARM_CPU_REV (1, 1)) { - JunoRevision = JUNO_R1; - } - } + GetJunoRevision(JunoRevision);
// // Try to install the ACPI Tables // - if (JunoRevision == JUNO_R0) { + if (JunoRevision == JUNO_REVISION_R0) { Status = LocateAndInstallAcpiFromFvConditional (&mJunoAcpiTableFile, AcpiTableJunoR0Check); - } else if (JunoRevision == JUNO_R1) { + } else if (JunoRevision == JUNO_REVISION_R1) { Status = LocateAndInstallAcpiFromFvConditional (&mJunoAcpiTableFile, AcpiTableJunoR1Check); + } else if (JunoRevision == JUNO_REVISION_R2) { + Status = LocateAndInstallAcpiFromFvConditional (&mJunoAcpiTableFile, AcpiTableJunoR2Check); } - ASSERT_EFI_ERROR (Status);
+ ASSERT_EFI_ERROR (Status);
// - // Set the R1 two boot options if not already done. + // Setup R1/R2 options if not already done. // - if (JunoRevision == JUNO_R1) { + if (JunoRevision != JUNO_REVISION_R0) { // Enable PCI enumeration PcdSetBool (PcdPciDisableBusEnumeration, FALSE);
Fill in the basic requirements of the SMBIOS specification by hardcoding the minimum required structures and data using Juno information. Only the juno revision, memory ranges and CPU types are dynamic.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com --- .../ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c | 864 +++++++++++++++++++++ 1 file changed, 864 insertions(+) create mode 100644 Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c
diff --git a/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c new file mode 100644 index 0000000..b15891f --- /dev/null +++ b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c @@ -0,0 +1,864 @@ +/** @file + This driver installs SMBIOS information for ARM Juno platforms + + Copyright (c) 2015, ARM Limited. All rights reserved. + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ +#include <ArmPlatform.h> +#include <IndustryStandard/SmBios.h> +#include <Library/ArmLib.h> +#include <Library/BaseLib.h> +#include <Library/BaseMemoryLib.h> +#include <Library/DebugLib.h> +#include <Library/IoLib.h> +#include <Library/MemoryAllocationLib.h> +#include <Library/PcdLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiRuntimeServicesTableLib.h> +#include <PiDxe.h> +#include <Protocol/Smbios.h> + +#define TYPE0_STRINGS \ + "EFI Development Kit II / ARM LTD\0" /* Vendor */ \ + "EDK II\0" /* BiosVersion */ \ + __DATE__"\0" /* BiosReleaseDate */ + +#define TYPE1_STRINGS \ + "ARM LTD\0" /* Manufacturer */ \ + "ARM Juno Development Platform\0" /* Product Name */ \ + "None\0" /* Version */ \ + " \0" /* 20 character buffer */ + +#define TYPE2_STRINGS \ + "ARM LTD\0" /* Manufacturer */ \ + "ARM Juno Development Platform\0" /* Product Name */ \ + "R0\0" /* Version */ \ + "Serial Not Set\0" /* Serial */ \ + "Base of Chassis\0" /* board location */ \ + "R1\0" /* Version */ \ + "R2\0" /* Version */ + +#define TYPE3_STRINGS \ + "ARM LTD\0" /* Manufacturer */ \ + "None\0" /* Version */ \ + "Serial Not Set\0" /* Serial */ + +#define TYPE4_STRINGS \ + "BGA-1156\0" /* socket type */ \ + "ARM LTD\0" /* manufactuer */ \ + "Cortex-A57\0" /* processor 1 description */ \ + "Cortex-A53\0" /* processor 2 description */ \ + "Cortex-A72\0" /* processor 2 description */ \ + "0xd03\0" /* A53 part number */ \ + "0xd07\0" /* A57 part number */ \ + "0xd08\0" /* A72 part number */ + +#define TYPE7_STRINGS \ + "L1 Instruction\0" /* L1I */ \ + "L1 Data\0" /* L1D */ \ + "L2\0" /* L2 */ + +#define TYPE9_STRINGS \ + "PCIE_SLOT0\0" /* Slot0 */ \ + "PCIE_SLOT1\0" /* Slot1 */ \ + "PCIE_SLOT2\0" /* Slot2 */ \ + "PCIE_SLOT3\0" /* Slot3 */ + +#define TYPE16_STRINGS \ + "\0" /* nothing */ + +#define TYPE17_STRINGS \ + "RIGHT SIDE\0" /* location */ \ + "BANK 0\0" /* bank description */ + +#define TYPE19_STRINGS \ + "\0" /* nothing */ + +#define TYPE32_STRINGS \ + "\0" /* nothing */ + + +// +// Type definition and contents of the default SMBIOS table. +// This table covers only the minimum structures required by +// the SMBIOS specification (section 6.2, version 3.0) +// +#pragma pack(1) +typedef struct { + SMBIOS_TABLE_TYPE0 Base; + INT8 Strings[sizeof(TYPE0_STRINGS)]; +} ARM_TYPE0; + +typedef struct { + SMBIOS_TABLE_TYPE1 Base; + UINT8 Strings[sizeof(TYPE1_STRINGS)]; +} ARM_TYPE1; + +typedef struct { + SMBIOS_TABLE_TYPE2 Base; + UINT8 Strings[sizeof(TYPE2_STRINGS)]; +} ARM_TYPE2; + +typedef struct { + SMBIOS_TABLE_TYPE3 Base; + UINT8 Strings[sizeof(TYPE3_STRINGS)]; +} ARM_TYPE3; + +typedef struct { + SMBIOS_TABLE_TYPE4 Base; + UINT8 Strings[sizeof(TYPE4_STRINGS)]; +} ARM_TYPE4; + +typedef struct { + SMBIOS_TABLE_TYPE7 Base; + UINT8 Strings[sizeof(TYPE7_STRINGS)]; +} ARM_TYPE7; + +typedef struct { + SMBIOS_TABLE_TYPE9 Base; + UINT8 Strings[sizeof(TYPE9_STRINGS)]; +} ARM_TYPE9; + +typedef struct { + SMBIOS_TABLE_TYPE16 Base; + UINT8 Strings[sizeof(TYPE16_STRINGS)]; +} ARM_TYPE16; + +typedef struct { + SMBIOS_TABLE_TYPE17 Base; + UINT8 Strings[sizeof(TYPE17_STRINGS)]; +} ARM_TYPE17; + +typedef struct { + SMBIOS_TABLE_TYPE19 Base; + UINT8 Strings[sizeof(TYPE19_STRINGS)]; +} ARM_TYPE19; + +typedef struct { + SMBIOS_TABLE_TYPE32 Base; + UINT8 Strings[sizeof(TYPE32_STRINGS)]; +} ARM_TYPE32; + +// SMBIOS tables often refrence each other using +// fixed constants, define a list of these contants +// for our hardcoded tables +enum SMBIOS_REFRENCE_HANDLES { + SMBIOS_HANDLE_A57_L1I = 0x1000, + SMBIOS_HANDLE_A57_L1D, + SMBIOS_HANDLE_A57_L2, + SMBIOS_HANDLE_A53_L1I, + SMBIOS_HANDLE_A53_L1D, + SMBIOS_HANDLE_A53_L2, + SMBIOS_HANDLE_MOTHERBOARD, + SMBIOS_HANDLE_CHASSIS, + SMBIOS_HANDLE_A72_CLUSTER, + SMBIOS_HANDLE_A57_CLUSTER, + SMBIOS_HANDLE_A53_CLUSTER, + SMBIOS_HANDLE_MEMORY, + SMBIOS_HANDLE_DIMM +}; + +#define SERIAL_LEN 10 //this must be less than the buffer len allocated in the type1 structure + +#pragma pack() + +// BIOS information (section 7.1) +STATIC ARM_TYPE0 mArmDefaultType0 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_BIOS_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE0), // UINT8 Length + SMBIOS_HANDLE_PI_RESERVED, + }, + 1, // SMBIOS_TABLE_STRING Vendor + 2, // SMBIOS_TABLE_STRING BiosVersion + 0xE800,// UINT16 BiosSegment + 3, // SMBIOS_TABLE_STRING BiosReleaseDate + 0, // UINT8 BiosSize + { + 0,0,0,0,0,0, + 1, //PCI supported + 0, + 1, //PNP supported + 0, + 1, //BIOS upgradable + 0, 0, 0, + 1, //Boot from CD + 1, //selectable boot + }, // MISC_BIOS_CHARACTERISTICS BiosCharacteristics + { // BIOSCharacteristicsExtensionBytes[2] + 0x3, + 0xC, + }, + 0, // UINT8 SystemBiosMajorRelease + 0, // UINT8 SystemBiosMinorRelease + 0xFF, // UINT8 EmbeddedControllerFirmwareMajorRelease + 0xFF // UINT8 EmbeddedControllerFirmwareMinorRelease + }, + // Text strings (unformatted area) + TYPE0_STRINGS +}; + +// System information (section 7.2) +STATIC CONST ARM_TYPE1 mArmDefaultType1 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, + sizeof(SMBIOS_TABLE_TYPE1), + SMBIOS_HANDLE_PI_RESERVED, + }, + 1, //Manufacturer + 2, //Product Name + 3, //Version + 4, //Serial + { 0x8a95d198, 0x7f46, 0x11e5, { 0xbf,0x8b,0x08,0x00,0x27,0x04,0xd4,0x8e }}, //UUID + 6, //Wakeup type + 0, //SKU + 0, //Family + }, + // Text strings (unformatted) + TYPE1_STRINGS +}; + +// Baseboard (section 7.3) +STATIC ARM_TYPE2 mArmDefaultType2 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE2), // UINT8 Length + SMBIOS_HANDLE_MOTHERBOARD, + }, + 1, //Manufacturer + 2, //Product Name + 3, //Version + 4, //Serial + 0, //Asset tag + {1}, //motherboard, not replaceable + 5, //location of board + SMBIOS_HANDLE_CHASSIS, + BaseBoardTypeMotherBoard, + 1, + {SMBIOS_HANDLE_A53_CLUSTER}, //,SMBIOS_HANDLE_A53_CLUSTER,SMBIOS_HANDLE_MEMORY}, + }, + TYPE2_STRINGS +}; + +// Enclosure +STATIC CONST ARM_TYPE3 mArmDefaultType3 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE3), // UINT8 Length + SMBIOS_HANDLE_CHASSIS, + }, + 1, //Manufacturer + 4, //enclosure type (low profile desktop) + 2, //version + 3, //serial + 0, //asset tag + ChassisStateUnknown, //boot chassis state + ChassisStateSafe, //power supply state + ChassisStateSafe, //thermal state + ChassisSecurityStatusNone, //security state + {0,0,0,0,}, //OEM defined + 1, //1U height + 1, //number of power cords + 0, //no contained elements + }, + TYPE3_STRINGS +}; + +// Processor +STATIC CONST ARM_TYPE4 mArmDefaultType4_a72 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE4), // UINT8 Length + SMBIOS_HANDLE_A72_CLUSTER, + }, + 1, //socket type + 3, //processor type CPU + ProcessorFamilyIndicatorFamily2, //processor family, acquire from field2 + 2, //manufactuer + {{0,},{0.}}, //processor id + 5, //version + {0,0,0,0,0,1}, //voltage + 0, //external clock + 1200, //max speed + 1200, //current speed + 0x41, //status + ProcessorUpgradeOther, + SMBIOS_HANDLE_A57_L1I, //l1 cache handle + SMBIOS_HANDLE_A57_L2, //l2 cache handle + 0xFFFF, //l3 cache handle + 0, //serial not set + 0, //asset not set + 8, //part number + 2, //core count in socket + 2, //enabled core count in socket + 0, //threads per socket + 0xEC, // processor characteristics + ProcessorFamilyARM, //ARM core + }, + TYPE4_STRINGS +}; + +STATIC CONST ARM_TYPE4 mArmDefaultType4_a57 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE4), // UINT8 Length + SMBIOS_HANDLE_A57_CLUSTER, + }, + 1, //socket type + 3, //processor type CPU + ProcessorFamilyIndicatorFamily2, //processor family, acquire from field2 + 2, //manufactuer + {{0,},{0.}}, //processor id + 3, //version + {0,0,0,0,0,1}, //voltage + 0, //external clock + 1200, //max speed + 1200, //current speed + 0x41, //status + ProcessorUpgradeOther, + SMBIOS_HANDLE_A57_L1I, //l1 cache handle + SMBIOS_HANDLE_A57_L2, //l2 cache handle + 0xFFFF, //l3 cache handle + 0, //serial not set + 0, //asset not set + 7, //part number + 2, //core count in socket + 2, //enabled core count in socket + 0, //threads per socket + 0xEC, // processor characteristics + ProcessorFamilyARM, //ARM core + }, + TYPE4_STRINGS +}; + +STATIC CONST ARM_TYPE4 mArmDefaultType4_a53 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE4), // UINT8 Length + SMBIOS_HANDLE_A53_CLUSTER, + }, + 1, //socket type + 3, //processor type CPU + ProcessorFamilyIndicatorFamily2, //processor family, acquire from field2 + 2, //manufactuer + {{0,},{0.}}, //processor id + 4, //version + {0,0,0,0,0,1}, //voltage + 0, //external clock + 650, //max speed + 650, //current speed + 0x41, //status + ProcessorUpgradeOther, + SMBIOS_HANDLE_A53_L1I, //l1 cache handle + SMBIOS_HANDLE_A53_L2, //l2 cache handle + 0xFFFF, //l3 cache handle + 0, //serial not set + 0, //asset not set + 6, //part number + 4, //core count in socket + 4, //enabled core count in socket + 0, //threads per socket + 0xEC, // processor characteristics + ProcessorFamilyARM, //ARM core + }, + TYPE4_STRINGS +}; + +// Cache +STATIC CONST ARM_TYPE7 mArmDefaultType7_a57_l1i = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length + SMBIOS_HANDLE_A57_L1I, + }, + 1, + 0x380, //L1 enabled, unknown WB + 48, //48k i cache max + 48, //48k installed + {0,1}, //SRAM type + {0,1}, //SRAM type + 0, //unkown speed + CacheErrorParity, //parity checking + CacheTypeInstruction, //instruction cache + CacheAssociativityOther, //three way + }, + TYPE7_STRINGS +}; + +STATIC CONST ARM_TYPE7 mArmDefaultType7_a53_l1i = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length + SMBIOS_HANDLE_A53_L1I, + }, + 1, + 0x380, //L1 enabled, unknown WB + 32, //32k i cache max + 32, //32k installed + {0,1}, //SRAM type + {0,1}, //SRAM type + 0, //unkown speed + CacheErrorParity, //parity checking + CacheTypeInstruction, //instruction cache + CacheAssociativity2Way, //two way + }, + TYPE7_STRINGS +}; + +STATIC CONST ARM_TYPE7 mArmDefaultType7_a57_l1d = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length + SMBIOS_HANDLE_A57_L1D, + }, + 2, + 0x180, //L1 enabled, WB + 32, //32k d cache max + 32, //32k installed + {0,1}, //SRAM type + {0,1}, //SRAM type + 0, //unkown speed + CacheErrorSingleBit, //ECC checking + CacheTypeData, //instruction cache + CacheAssociativity2Way, //two way associative + }, + TYPE7_STRINGS +}; + +STATIC CONST ARM_TYPE7 mArmDefaultType7_a53_l1d = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length + SMBIOS_HANDLE_A53_L1D, + }, + 2, + 0x180, //L1 enabled, WB + 32, //32k d cache max + 32, //32k installed + {0,1}, //SRAM type + {0,1}, //SRAM type + 0, //unkown speed + CacheErrorSingleBit, //ECC checking + CacheTypeData, //instruction cache + CacheAssociativity4Way, //four way associative + }, + TYPE7_STRINGS +}; + +STATIC CONST ARM_TYPE7 mArmDefaultType7_a57_l2 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length + SMBIOS_HANDLE_A57_L2, + }, + 3, + 0x181, //L2 enabled, WB + 2048, //2M d cache max + 2048, //2M installed + {0,1}, //SRAM type + {0,1}, //SRAM type + 0, //unkown speed + CacheErrorSingleBit, //ECC checking + CacheTypeUnified, //instruction cache + CacheAssociativity16Way, //16 way associative + }, + TYPE7_STRINGS +}; + +STATIC CONST ARM_TYPE7 mArmDefaultType7_a53_l2 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length + SMBIOS_HANDLE_A53_L2, + }, + 3, + 0x181, //L2 enabled, WB + 1024, //1M D cache max + 1024, //1M installed + {0,1}, //SRAM type + {0,1}, //SRAM type + 0, //unkown speed + CacheErrorSingleBit, //ECC checking + CacheTypeUnified, //instruction cache + CacheAssociativity16Way, //16 way associative + }, + TYPE7_STRINGS +}; + +// Slots +STATIC CONST ARM_TYPE9 mArmDefaultType9_0 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length + SMBIOS_HANDLE_PI_RESERVED, + }, + 1, //slot 0 + SlotTypePciExpressGen2X4, + SlotDataBusWidth1X, + SlotUsageUnknown, + SlotLengthShort, + 0, + {1}, //unknown + {1,0,1}, //PME and SMBUS + 0, + 2, + 1, + }, + TYPE9_STRINGS +}; + +STATIC CONST ARM_TYPE9 mArmDefaultType9_1 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length + SMBIOS_HANDLE_PI_RESERVED, + }, + 1, //slot 0 + SlotTypePciExpressGen2X4, + SlotDataBusWidth1X, + SlotUsageUnknown, + SlotLengthShort, + 0, + {1}, + {1,0,1}, //PME and SMBUS + 0, + 2, + 2, + }, + TYPE9_STRINGS +}; + +STATIC CONST ARM_TYPE9 mArmDefaultType9_2 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length + SMBIOS_HANDLE_PI_RESERVED, + }, + 1, //slot 0 + SlotTypePciExpressGen2X8, + SlotDataBusWidth4X, + SlotUsageUnknown, + SlotLengthShort, + 0, + {1}, + {1,0,1}, //PME and SMBUS + 0, + 2, + 3, + }, + TYPE9_STRINGS +}; + +STATIC CONST ARM_TYPE9 mArmDefaultType9_3 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length + SMBIOS_HANDLE_PI_RESERVED, + }, + 1, //slot 0 + SlotTypePciExpressGen2X16, + SlotDataBusWidth4X, + SlotUsageUnknown, + SlotLengthShort, + 0, + {1}, + {1,0,1}, //PME and SMBUS + 0, + 2, + 0xc, + }, + TYPE9_STRINGS +}; + +// Memory array +STATIC CONST ARM_TYPE16 mArmDefaultType16 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE16), // UINT8 Length + SMBIOS_HANDLE_MEMORY, + }, + MemoryArrayLocationSystemBoard, //on motherboard + MemoryArrayUseSystemMemory, //system RAM + MemoryErrorCorrectionNone, //Juno doesn't have ECC RAM + 0x800000, //8GB + 0xFFFE, //No error information structure + 0x1, //soldered memory + }, + TYPE16_STRINGS +}; + +// Memory device +STATIC CONST ARM_TYPE17 mArmDefaultType17 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_MEMORY_DEVICE, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE17), // UINT8 Length + SMBIOS_HANDLE_DIMM, + }, + SMBIOS_HANDLE_MEMORY, //array to which this module belongs + 0xFFFE, //no errors + 64, //single DIMM, no ECC is 64bits (for ecc this would be 72) + 64, //data width of this device (64-bits) + 0x2000, //8GB + 0x0B, //row of chips + 0, //not part of a set + 1, //right side of board + 2, //bank 0 +// MemoryTypeLpddr3, //LP DDR3, isn't defined yet + MemoryTypeDdr3, //LP DDR3 + {0,0,0,0,0,0,0,0,0,0,0,0,0,0,1}, //unbuffered + 1600, //1600Mhz DDR + 0, //varies between diffrent production runs + 0, //serial + 0, //asset tag + 0, //part number + 0, //rank + }, + TYPE17_STRINGS +}; + +// Memory array mapped addr, this structure overriden by InstallMemoryStructure +STATIC CONST ARM_TYPE19 mArmDefaultType19 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE19), // UINT8 Length + SMBIOS_HANDLE_PI_RESERVED, + }, + 0xFFFFFFFF, //invalid, look at extended addr field + 0xFFFFFFFF, + SMBIOS_HANDLE_DIMM, //handle + 1, + 0x080000000, //starting addr of first 2GB + 0x100000000, //ending addr of first 2GB + }, + TYPE19_STRINGS +}; + +// System boot info +STATIC CONST ARM_TYPE32 mArmDefaultType32 = { + { + { // SMBIOS_STRUCTURE Hdr + EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, // UINT8 Type + sizeof (SMBIOS_TABLE_TYPE32), // UINT8 Length + SMBIOS_HANDLE_PI_RESERVED, + }, + {0,0,0,0,0,0}, //reserved + BootInformationStatusNoError, + }, + TYPE32_STRINGS +}; + +STATIC CONST VOID *DefaultCommonTables[]= +{ + &mArmDefaultType0, + &mArmDefaultType1, + &mArmDefaultType2, + &mArmDefaultType3, + &mArmDefaultType7_a53_l1i, + &mArmDefaultType7_a53_l1d, + &mArmDefaultType7_a53_l2, + &mArmDefaultType4_a53, + &mArmDefaultType9_0, + &mArmDefaultType9_1, + &mArmDefaultType9_2, + &mArmDefaultType9_3, + &mArmDefaultType16, + &mArmDefaultType17, +// &mArmDefaultType19, //memory range type 19 dynamically generated + &mArmDefaultType32, + NULL +}; + +STATIC CONST VOID *DefaultTablesR0R1[]= +{ + &mArmDefaultType7_a57_l1i, + &mArmDefaultType7_a57_l1d, + &mArmDefaultType7_a57_l2, + &mArmDefaultType4_a57, + NULL +}; + +STATIC CONST VOID *DefaultTablesR2[]= +{ + &mArmDefaultType7_a57_l1i, // Cache layout is the same on the 72 vs 57 + &mArmDefaultType7_a57_l1d, + &mArmDefaultType7_a57_l2, + &mArmDefaultType4_a72, + NULL +}; + + +/** + Installs a memory descriptor (type19) for the given address range + + @param Smbios SMBIOS protocol + +**/ +EFI_STATUS +InstallMemoryStructure ( + IN EFI_SMBIOS_PROTOCOL *Smbios, + IN UINT64 StartingAddress, + IN UINT64 RegionLength + ) +{ + EFI_SMBIOS_HANDLE SmbiosHandle; + ARM_TYPE19 MemoryDescriptor; + EFI_STATUS Status = EFI_SUCCESS; + + CopyMem( &MemoryDescriptor, &mArmDefaultType19, sizeof(ARM_TYPE19)); + + MemoryDescriptor.Base.ExtendedStartingAddress = StartingAddress; + MemoryDescriptor.Base.ExtendedEndingAddress = StartingAddress+RegionLength; + SmbiosHandle = MemoryDescriptor.Base.Hdr.Handle; + + Status = Smbios->Add ( + Smbios, + NULL, + &SmbiosHandle, + (EFI_SMBIOS_TABLE_HEADER*) &MemoryDescriptor + ); + return Status; +} + +/** + Install a whole table worth of structructures + + @parm +**/ +EFI_STATUS +InstallStructures ( + IN EFI_SMBIOS_PROTOCOL *Smbios, + IN CONST VOID *DefaultTables[] + ) +{ + EFI_STATUS Status = EFI_SUCCESS; + EFI_SMBIOS_HANDLE SmbiosHandle; + + int TableEntry; + for ( TableEntry=0; DefaultTables[TableEntry] != NULL; TableEntry++) + { + SmbiosHandle = ((EFI_SMBIOS_TABLE_HEADER*)DefaultTables[TableEntry])->Handle; + Status = Smbios->Add ( + Smbios, + NULL, + &SmbiosHandle, + (EFI_SMBIOS_TABLE_HEADER*) DefaultTables[TableEntry] + ); + if (EFI_ERROR(Status)) + break; + } + return Status; +} + + +/** + Install all structures from the DefaultTables structure + + @param Smbios SMBIOS protocol + +**/ +EFI_STATUS +InstallAllStructures ( + IN EFI_SMBIOS_PROTOCOL *Smbios + ) +{ + EFI_STATUS Status = EFI_SUCCESS; + UINT32 JunoRevision; + VOID *ExtraTables = DefaultTablesR0R1; + + GetJunoRevision(JunoRevision); + + // Fixup some table values + mArmDefaultType0.Base.SystemBiosMajorRelease = (PcdGet32 ( PcdFirmwareRevision ) >> 16) & 0xFF; + mArmDefaultType0.Base.SystemBiosMinorRelease = PcdGet32 ( PcdFirmwareRevision ) & 0xFF; + if ( JunoRevision == JUNO_REVISION_R1 ) + { + mArmDefaultType2.Base.Version = 6; + } + else if ( JunoRevision == JUNO_REVISION_R2 ) + { + mArmDefaultType2.Base.Version = 7; + ExtraTables=DefaultTablesR2; + } + + // + // Add all Juno table entries + // + Status=InstallStructures (Smbios,DefaultCommonTables); + ASSERT_EFI_ERROR (Status); + + Status=InstallStructures (Smbios,ExtraTables); + ASSERT_EFI_ERROR (Status); + + // Generate two memory descriptors for the memory ranges we know about + Status = InstallMemoryStructure ( Smbios, PcdGet64 (PcdSystemMemoryBase), PcdGet64 (PcdSystemMemorySize)); + ASSERT_EFI_ERROR (Status); + Status = InstallMemoryStructure ( Smbios, ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE, ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ); + ASSERT_EFI_ERROR (Status); + + return Status; +} + +/** + Installs SMBIOS information for ARM platforms + + @param ImageHandle Module's image handle + @param SystemTable Pointer of EFI_SYSTEM_TABLE + + @retval EFI_SUCCESS Smbios data successfully installed + @retval Other Smbios data was not installed + +**/ +EFI_STATUS +EFIAPI +SmbiosTablePublishEntry ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_SMBIOS_PROTOCOL *Smbios; + + // + // Find the SMBIOS protocol + // + Status = gBS->LocateProtocol ( + &gEfiSmbiosProtocolGuid, + NULL, + (VOID**)&Smbios + ); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = InstallAllStructures (Smbios); + + return Status; +}
Create the edk2 INF/metadata required to build the SmbiosPlatformDxe.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com --- .../Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
diff --git a/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf new file mode 100644 index 0000000..ea2e999 --- /dev/null +++ b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf @@ -0,0 +1,68 @@ +## @file +# This driver installs SMBIOS information for ArmJuno +# +# Copyright (c) 2011, Bei Guan gbtju85@gmail.com +# Copyright (c) 2011, Intel Corporation. All rights reserved. +# Copyright (c) 2015, ARM Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = SmbiosPlatformDxe + FILE_GUID = 4110465d-5ff3-4f4b-b580-24ed0d06747a + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + + ENTRY_POINT = SmbiosTablePublishEntry + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = AARCH64 +# + +[Sources] + SmbiosPlatformDxe.c + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + ArmLib + BaseMemoryLib + BaseLib + DebugLib + HobLib + IoLib + MemoryAllocationLib + PcdLib + UefiBootServicesTableLib + UefiDriverEntryPoint + +[Guids] + gEfiGlobalVariableGuid + +[FixedPcd] + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision + +[Protocols] + gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED + +[Guids] + +[Depex] + gEfiSmbiosProtocolGuid \ No newline at end of file
On Wed, Jul 27, 2016 at 02:24:38PM -0500, Jeremy Linton wrote:
Create the edk2 INF/metadata required to build the SmbiosPlatformDxe.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com
.../Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
diff --git a/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf new file mode 100644 index 0000000..ea2e999 --- /dev/null +++ b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf @@ -0,0 +1,68 @@ +## @file +# This driver installs SMBIOS information for ArmJuno +# +# Copyright (c) 2011, Bei Guan gbtju85@gmail.com +# Copyright (c) 2011, Intel Corporation. All rights reserved. +# Copyright (c) 2015, ARM Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +##
+[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SmbiosPlatformDxe
- FILE_GUID = 4110465d-5ff3-4f4b-b580-24ed0d06747a
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- ENTRY_POINT = SmbiosTablePublishEntry
+# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = AARCH64 +#
+[Sources]
- SmbiosPlatformDxe.c
+[Packages]
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec
- MdeModulePkg/MdeModulePkg.dec
- MdePkg/MdePkg.dec
+[LibraryClasses]
- ArmLib
- BaseMemoryLib
- BaseLib
- DebugLib
- HobLib
- IoLib
- MemoryAllocationLib
- PcdLib
- UefiBootServicesTableLib
- UefiDriverEntryPoint
+[Guids]
- gEfiGlobalVariableGuid
+[FixedPcd]
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
- gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
+[Protocols]
- gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+[Guids]
+[Depex]
- gEfiSmbiosProtocolGuid
\ No newline at end of file
Could we have a newline at end of file, please? :)
/ Leif
-- 2.5.5
Now that we have a module that provides SMBIOS data for juno, lets add it and MdeModule/SmbiosDxe to the Juno platform.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton jeremy.linton@arm.com --- Platforms/ARM/Juno/ArmJuno.dsc | 12 ++++++++++++ Platforms/ARM/Juno/ArmJuno.fdf | 6 ++++++ 2 files changed, 18 insertions(+)
diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index 84c2441..c51d8f2 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -178,6 +178,12 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
+ # + # SMBIOS entry point version + # + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0300 + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0 + [PcdsPatchableInModule] # Console Resolution (Full HD) gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1920 @@ -312,6 +318,12 @@ }
# + # SMBIOS/DMI + # + MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + OpenPlatformPkg/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf + + # # Bds # MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf diff --git a/Platforms/ARM/Juno/ArmJuno.fdf b/Platforms/ARM/Juno/ArmJuno.fdf index a01db20..04d9a3c 100644 --- a/Platforms/ARM/Juno/ArmJuno.fdf +++ b/Platforms/ARM/Juno/ArmJuno.fdf @@ -202,6 +202,12 @@ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092 INF SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf
# + # SMBIOS/DMI + # + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + INF OpenPlatformPkg/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf + + # # Bds # INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
Thanks Jeremy, this looks good to me.
I have one comment on (EDK2) 2/3 and a minor one on (OpenPlatformPkg) 2/3. As I said in the comment, I would be happy to fix the EDK2 one on commit if you're happy with the proposed change?
For OpenPlatformPkg, I think these three patches can be folded into one (since the library is restricted to Juno anyway). Could you do this, to make sure the commit message is coherent?
Regards,
Leif
On Wed, Jul 27, 2016 at 02:24:33PM -0500, Jeremy Linton wrote:
v3-v4: Rebase/Split patch for newer edk2/OpenPlatformPkg v2-v3: Add JunoR2 support, replace CPU MIDR code with board revision detection v1->v2: General cleanups, move juno revision macro info platform.h
SMBIOS data is consumed by a wide range of enterprise applications.
Fill in the basic requirements of the SMBIOS specification by hardcoding the minimum required structures and data using Juno information. With this change both the EFI shell, BDS and linux dmidecode commands return useful information.
This patch set is actually against both edk2 and OpenPlatformPkg. The first three patches apply against edk2, the last three against OpenPlatformPkg.
Jeremy Linton (3): ArmPlatformPkg: Add A72 CPU type Code to detect what juno revision we are running on. Convert ArmJunoDxe to use common juno revision code Jeremy Linton (3): Platforms/ARM/Juno: Create SMBIOS/DMI data for Juno Platforms/ARM/Juno: Add the module build information Platforms/ARM/Juno: Add the SMBIOS/DMI module to the Juno Platform
ArmPkg/Include/Chipset/AArch64.h | 1 + .../ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c | 62 +++++++--------------- ArmPlatformPkg/ArmJunoPkg/Include/ArmPlatform.h | 30 ++++++++++- 3 files changed, 48 insertions(+), 45 deletions(-) Platforms/ARM/Juno/ArmJuno.dsc | 12 + Platforms/ARM/Juno/ArmJuno.fdf | 6 + .../ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c | 864 +++++++++++++++++++++ .../Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 68 ++ 4 files changed, 950 insertions(+) create mode 100644 Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c create mode 100644 Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
-- 2.5.5
On 07/28/2016 06:35 AM, Leif Lindholm wrote:
Thanks Jeremy, this looks good to me.
I have one comment on (EDK2) 2/3 and a minor one on (OpenPlatformPkg) 2/3. As I said in the comment, I would be happy to fix the EDK2 one on commit if you're happy with the proposed change?
Sure, tweak away..
For OpenPlatformPkg, I think these three patches can be folded into one (since the library is restricted to Juno anyway). Could you do this, to make sure the commit message is coherent?
Ok, that means I will just resubmit the OpenPlatformPkg portion.
Thanks,
On Thu, Jul 28, 2016 at 09:10:10AM -0500, Jeremy Linton wrote:
On 07/28/2016 06:35 AM, Leif Lindholm wrote:
Thanks Jeremy, this looks good to me.
I have one comment on (EDK2) 2/3 and a minor one on (OpenPlatformPkg) 2/3. As I said in the comment, I would be happy to fix the EDK2 one on commit if you're happy with the proposed change?
Sure, tweak away..
For OpenPlatformPkg, I think these three patches can be folded into one (since the library is restricted to Juno anyway). Could you do this, to make sure the commit message is coherent?
Ok, that means I will just resubmit the OpenPlatformPkg portion.
Yes please. I'll push the EDK2 set.
/ Leif