Leo Duran (4): Support only ACPI+PSCI on HuskyBoard Override to invoke BdsLibConnectAll() no longer necesasary Move FdtBlob and FdtDxe under OverdriveBoard Override PrePeiCoreMPCore to allow 64-bit mailbox pointers
.../Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoader.c | 122 ---- .../Drivers/FdtDxe/AArch64/BdsLinuxLoaderHelper.S | 87 --- Platforms/AMD/Styx/Drivers/FdtDxe/BdsLinuxFdt.c | 754 --------------------- Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.c | 279 -------- Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.h | 55 -- Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf | 90 --- Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoader.h | 166 ----- .../AMD/Styx/Drivers/FdtDxe/LinuxLoaderHelper.c | 192 ------ Platforms/AMD/Styx/FdtBlob/styx-husky.dtb | Bin 8093 -> 0 bytes Platforms/AMD/Styx/FdtBlob/styx-husky.dts | 435 ------------ Platforms/AMD/Styx/FdtBlob/styx-overdrive.dtb | Bin 8089 -> 0 bytes Platforms/AMD/Styx/FdtBlob/styx-overdrive.dts | 435 ------------ Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc | 12 +- Platforms/AMD/Styx/HuskyBoard/HuskyBoard.fdf | 13 - .../AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dtb | Bin 0 -> 8093 bytes .../AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dts | 435 ++++++++++++ .../Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb | Bin 0 -> 8089 bytes .../Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts | 435 ++++++++++++ .../OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c | 122 ++++ .../FdtDxe/AArch64/BdsLinuxLoaderHelper.S | 87 +++ .../AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c | 754 +++++++++++++++++++++ Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c | 279 ++++++++ Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.h | 55 ++ .../AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf | 90 +++ .../AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoader.h | 166 +++++ .../Styx/OverdriveBoard/FdtDxe/LinuxLoaderHelper.c | 192 ++++++ .../AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 6 +- .../AMD/Styx/OverdriveBoard/OverdriveBoard.fdf | 6 +- .../PrePeiCore/AArch64/ArchPrePeiCore.c | 58 ++ .../ArmPlatformPkg/PrePeiCore/AArch64/Exception.S | 126 ++++ .../ArmPlatformPkg/PrePeiCore/AArch64/Helper.S | 54 ++ .../PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 112 +++ .../PrePeiCore/AArch64/SwitchStack.S | 49 ++ .../ArmPlatformPkg/PrePeiCore/MainMPCore.c | 168 +++++ .../ArmPlatformPkg/PrePeiCore/PrePeiCore.c | 149 ++++ .../ArmPlatformPkg/PrePeiCore/PrePeiCore.h | 85 +++ .../ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf | 76 +++ .../Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 377 ----------- .../Library/PlatformIntelBdsLib/IntelBdsPlatform.h | 35 - .../PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 62 -- 40 files changed, 3499 insertions(+), 3119 deletions(-) delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoader.c delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoaderHelper.S delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/BdsLinuxFdt.c delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.c delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.h delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoader.h delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoaderHelper.c delete mode 100644 Platforms/AMD/Styx/FdtBlob/styx-husky.dtb delete mode 100644 Platforms/AMD/Styx/FdtBlob/styx-husky.dts delete mode 100644 Platforms/AMD/Styx/FdtBlob/styx-overdrive.dtb delete mode 100644 Platforms/AMD/Styx/FdtBlob/styx-overdrive.dts create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dtb create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dts create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.h create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoader.h create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoaderHelper.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/ArchPrePeiCore.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/MainMPCore.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.h create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf delete mode 100644 Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.c delete mode 100644 Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.h delete mode 100644 Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran leo.duran@amd.com --- Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc | 10 ---------- Platforms/AMD/Styx/HuskyBoard/HuskyBoard.fdf | 13 ------------- 2 files changed, 23 deletions(-)
diff --git a/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc b/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc index 251c3a7..6a20166 100644 --- a/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc +++ b/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc @@ -152,7 +152,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
# BDS Libraries BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf - FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
[LibraryClasses.common.SEC] HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf @@ -547,11 +546,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) # # PEI Phase modules # -!if $(DO_PSCI) ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf -!else - ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf -!endif MdeModulePkg/Core/Pei/PeiMain.inf MdeModulePkg/Universal/PCD/Pei/Pcd.inf { <LibraryClasses> @@ -618,11 +613,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) AmdModulePkg/Iscp/IscpDxe.inf
# - # FDT support - # - OpenPlatformPkg/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf - - # # PCI support # AmdModulePkg/Gionb/Gionb.inf diff --git a/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.fdf b/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.fdf index c5a9065..262d313 100644 --- a/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.fdf +++ b/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.fdf @@ -132,15 +132,6 @@ READ_LOCK_STATUS = TRUE INF AmdModulePkg/Iscp/IscpDxe.inf
# - # FDT support - # - INF OpenPlatformPkg/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf - - FILE FREEFORM = PCD(gAmdStyxTokenSpaceGuid.PcdStyxFdt) { - SECTION RAW = OpenPlatformPkg/Platforms/AMD/Styx/FdtBlob/styx-husky.dtb - } - - # # PCI support # INF AmdModulePkg/Gionb/Gionb.inf @@ -248,11 +239,7 @@ READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE
-!if $(DO_PSCI) INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf -!else - INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf -!endif INF MdeModulePkg/Core/Pei/PeiMain.inf INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf INF AmdModulePkg/Iscp/IscpPei.inf
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran leo.duran@amd.com --- Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc | 2 +- .../AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 2 +- .../Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 377 --------------------- .../Library/PlatformIntelBdsLib/IntelBdsPlatform.h | 35 -- .../PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 62 ---- 5 files changed, 2 insertions(+), 476 deletions(-) delete mode 100644 Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.c delete mode 100644 Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.h delete mode 100644 Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
diff --git a/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc b/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc index 6a20166..ce72a79 100644 --- a/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc +++ b/Platforms/AMD/Styx/HuskyBoard/HuskyBoard.dsc @@ -134,7 +134,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf - PlatformBdsLib|OpenPlatformPkg/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf + PlatformBdsLib|ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
# diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index e4ece5e..6bb40a0 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -136,7 +136,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf - PlatformBdsLib|OpenPlatformPkg/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf + PlatformBdsLib|ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
# diff --git a/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.c b/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.c deleted file mode 100644 index 8b518ce..0000000 --- a/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.c +++ /dev/null @@ -1,377 +0,0 @@ -/** @file - -Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR> -Copyright (c) 2014, ARM Ltd. All rights reserved.<BR> - -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "IntelBdsPlatform.h" - -/// -/// Predefined platform default time out value -/// -UINT16 gPlatformBootTimeOutDefault; - -EFI_STATUS -EFIAPI -PlatformIntelBdsConstructor ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - gPlatformBootTimeOutDefault = (UINT16)PcdGet16 (PcdPlatformBootTimeOut); - return EFI_SUCCESS; -} - -// -// BDS Platform Functions -// -/** - Platform Bds init. Include the platform firmware vendor, revision - and so crc check. - -**/ -VOID -EFIAPI -PlatformBdsInit ( - VOID - ) -{ -} - -STATIC -EFI_STATUS -GetConsoleDevicePathFromVariable ( - IN CHAR16* ConsoleVarName, - IN CHAR16* DefaultConsolePaths, - OUT EFI_DEVICE_PATH** DevicePaths - ) -{ - EFI_STATUS Status; - UINTN Size; - EFI_DEVICE_PATH_PROTOCOL* DevicePathInstances; - EFI_DEVICE_PATH_PROTOCOL* DevicePathInstance; - CHAR16* DevicePathStr; - CHAR16* NextDevicePathStr; - EFI_DEVICE_PATH_FROM_TEXT_PROTOCOL *EfiDevicePathFromTextProtocol; - - Status = GetGlobalEnvironmentVariable (ConsoleVarName, NULL, NULL, (VOID**)&DevicePathInstances); - if (EFI_ERROR(Status)) { - // In case no default console device path has been defined we assume a driver handles the console (eg: SimpleTextInOutSerial) - if ((DefaultConsolePaths == NULL) || (DefaultConsolePaths[0] == L'\0')) { - *DevicePaths = NULL; - return EFI_SUCCESS; - } - - Status = gBS->LocateProtocol (&gEfiDevicePathFromTextProtocolGuid, NULL, (VOID **)&EfiDevicePathFromTextProtocol); - ASSERT_EFI_ERROR(Status); - - DevicePathInstances = NULL; - - // Extract the Device Path instances from the multi-device path string - while ((DefaultConsolePaths != NULL) && (DefaultConsolePaths[0] != L'\0')) { - NextDevicePathStr = StrStr (DefaultConsolePaths, L";"); - if (NextDevicePathStr == NULL) { - DevicePathStr = DefaultConsolePaths; - DefaultConsolePaths = NULL; - } else { - DevicePathStr = (CHAR16*)AllocateCopyPool ((NextDevicePathStr - DefaultConsolePaths + 1) * sizeof(CHAR16), DefaultConsolePaths); - *(DevicePathStr + (NextDevicePathStr - DefaultConsolePaths)) = L'\0'; - DefaultConsolePaths = NextDevicePathStr; - if (DefaultConsolePaths[0] == L';') { - DefaultConsolePaths++; - } - } - - DevicePathInstance = EfiDevicePathFromTextProtocol->ConvertTextToDevicePath (DevicePathStr); - ASSERT(DevicePathInstance != NULL); - DevicePathInstances = AppendDevicePathInstance (DevicePathInstances, DevicePathInstance); - - if (NextDevicePathStr != NULL) { - FreePool (DevicePathStr); - } - FreePool (DevicePathInstance); - } - - // Set the environment variable with this device path multi-instances - Size = GetDevicePathSize (DevicePathInstances); - if (Size > 0) { - gRT->SetVariable ( - ConsoleVarName, - &gEfiGlobalVariableGuid, - EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, - Size, - DevicePathInstances - ); - } else { - Status = EFI_INVALID_PARAMETER; - } - } - - if (!EFI_ERROR(Status)) { - *DevicePaths = DevicePathInstances; - } - return Status; -} - -STATIC -EFI_STATUS -InitializeConsolePipe ( - IN EFI_DEVICE_PATH *ConsoleDevicePaths, - IN EFI_GUID *Protocol, - OUT EFI_HANDLE *Handle, - OUT VOID* *Interface - ) -{ - EFI_STATUS Status; - UINTN Size; - UINTN NoHandles; - EFI_HANDLE *Buffer; - EFI_DEVICE_PATH_PROTOCOL* DevicePath; - - // Connect all the Device Path Consoles - while (ConsoleDevicePaths != NULL) { - DevicePath = GetNextDevicePathInstance (&ConsoleDevicePaths, &Size); - - Status = BdsConnectDevicePath (DevicePath, Handle, NULL); - DEBUG_CODE_BEGIN(); - if (EFI_ERROR(Status)) { - // We convert back to the text representation of the device Path - EFI_DEVICE_PATH_TO_TEXT_PROTOCOL* DevicePathToTextProtocol; - CHAR16* DevicePathTxt; - EFI_STATUS Status; - - Status = gBS->LocateProtocol(&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **)&DevicePathToTextProtocol); - if (!EFI_ERROR(Status)) { - DevicePathTxt = DevicePathToTextProtocol->ConvertDevicePathToText (DevicePath, TRUE, TRUE); - - DEBUG((EFI_D_ERROR,"Fail to start the console with the Device Path '%s'. (Error '%r')\n", DevicePathTxt, Status)); - - FreePool (DevicePathTxt); - } - } - DEBUG_CODE_END(); - - // If the console splitter driver is not supported by the platform then use the first Device Path - // instance for the console interface. - if (!EFI_ERROR(Status) && (*Interface == NULL)) { - Status = gBS->HandleProtocol (*Handle, Protocol, Interface); - } - } - - // No Device Path has been defined for this console interface. We take the first protocol implementation - if (*Interface == NULL) { - Status = gBS->LocateHandleBuffer (ByProtocol, Protocol, NULL, &NoHandles, &Buffer); - if (EFI_ERROR (Status)) { - BdsConnectAllDrivers (); - Status = gBS->LocateHandleBuffer (ByProtocol, Protocol, NULL, &NoHandles, &Buffer); - } - - if (!EFI_ERROR(Status)) { - *Handle = Buffer[0]; - Status = gBS->HandleProtocol (*Handle, Protocol, Interface); - ASSERT_EFI_ERROR (Status); - FreePool (Buffer); - } - } else { - Status = EFI_SUCCESS; - } - - return Status; -} - -/** - Connect the predefined platform default console device. Always try to find - and enable the vga device if have. - - @param PlatformConsole Predefined platform default console device array. - - @retval EFI_SUCCESS Success connect at least one ConIn and ConOut - device, there must have one ConOut device is - active vga device. - @return Return the status of BdsLibConnectAllDefaultConsoles () - -**/ -EFI_STATUS -PlatformBdsConnectConsole ( - VOID - ) -{ - EFI_STATUS Status; - EFI_DEVICE_PATH* ConOutDevicePaths; - EFI_DEVICE_PATH* ConInDevicePaths; - EFI_DEVICE_PATH* ConErrDevicePaths; - - // By getting the Console Device Paths from the environment variables before initializing the console pipe, we - // create the 3 environment variables (ConIn, ConOut, ConErr) that allows to initialize all the console interface - // of newly installed console drivers - Status = GetConsoleDevicePathFromVariable (L"ConOut", (CHAR16*)PcdGetPtr(PcdDefaultConOutPaths), &ConOutDevicePaths); - ASSERT_EFI_ERROR (Status); - Status = GetConsoleDevicePathFromVariable (L"ConIn", (CHAR16*)PcdGetPtr(PcdDefaultConInPaths), &ConInDevicePaths); - ASSERT_EFI_ERROR (Status); - Status = GetConsoleDevicePathFromVariable (L"ErrOut", (CHAR16*)PcdGetPtr(PcdDefaultConOutPaths), &ConErrDevicePaths); - ASSERT_EFI_ERROR (Status); - - // Initialize the Consoles - Status = InitializeConsolePipe (ConOutDevicePaths, &gEfiSimpleTextOutProtocolGuid, &gST->ConsoleOutHandle, (VOID **)&gST->ConOut); - ASSERT_EFI_ERROR (Status); - Status = InitializeConsolePipe (ConInDevicePaths, &gEfiSimpleTextInProtocolGuid, &gST->ConsoleInHandle, (VOID **)&gST->ConIn); - ASSERT_EFI_ERROR (Status); - Status = InitializeConsolePipe (ConErrDevicePaths, &gEfiSimpleTextOutProtocolGuid, &gST->StandardErrorHandle, (VOID **)&gST->StdErr); - if (EFI_ERROR(Status)) { - // In case of error, we reuse the console output for the error output - gST->StandardErrorHandle = gST->ConsoleOutHandle; - gST->StdErr = gST->ConOut; - } - - return Status; -} - -/** - Connect with predefined platform connect sequence, - the OEM/IBV can customize with their own connect sequence. -**/ -VOID -PlatformBdsConnectSequence ( - VOID - ) -{ -} - -/** - Load the predefined driver option, OEM/IBV can customize this - to load their own drivers - - @param BdsDriverLists - The header of the driver option link list. - -**/ -VOID -PlatformBdsGetDriverOption ( - IN OUT LIST_ENTRY *BdsDriverLists - ) -{ -} - -/** - Perform the platform diagnostic, such like test memory. OEM/IBV also - can customize this function to support specific platform diagnostic. - - @param MemoryTestLevel The memory test intensive level - @param QuietBoot Indicate if need to enable the quiet boot - @param BaseMemoryTest A pointer to BdsMemoryTest() - -**/ -VOID -PlatformBdsDiagnostics ( - IN EXTENDMEM_COVERAGE_LEVEL MemoryTestLevel, - IN BOOLEAN QuietBoot, - IN BASEM_MEMORY_TEST BaseMemoryTest - ) -{ -} - -/** - The function will execute with as the platform policy, current policy - is driven by boot mode. IBV/OEM can customize this code for their specific - policy action. - - @param DriverOptionList The header of the driver option link list - @param BootOptionList The header of the boot option link list - @param ProcessCapsules A pointer to ProcessCapsules() - @param BaseMemoryTest A pointer to BaseMemoryTest() - -**/ -VOID -EFIAPI -PlatformBdsPolicyBehavior ( - IN LIST_ENTRY *DriverOptionList, - IN LIST_ENTRY *BootOptionList, - IN PROCESS_CAPSULES ProcessCapsules, - IN BASEM_MEMORY_TEST BaseMemoryTest - ) -{ - EFI_STATUS Status; - - Status = PlatformBdsConnectConsole (); - ASSERT_EFI_ERROR (Status); - BdsLibConnectAll (); -} - -/** - Hook point after a boot attempt succeeds. We don't expect a boot option to - return, so the UEFI 2.0 specification defines that you will default to an - interactive mode and stop processing the BootOrder list in this case. This - is also a platform implementation and can be customized by IBV/OEM. - - @param Option Pointer to Boot Option that succeeded to boot. - -**/ -VOID -EFIAPI -PlatformBdsBootSuccess ( - IN BDS_COMMON_OPTION *Option - ) -{ -} - -/** - Hook point after a boot attempt fails. - - @param Option Pointer to Boot Option that failed to boot. - @param Status Status returned from failed boot. - @param ExitData Exit data returned from failed boot. - @param ExitDataSize Exit data size returned from failed boot. - -**/ -VOID -EFIAPI -PlatformBdsBootFail ( - IN BDS_COMMON_OPTION *Option, - IN EFI_STATUS Status, - IN CHAR16 *ExitData, - IN UINTN ExitDataSize - ) -{ -} - -/** - This function locks platform flash that is not allowed to be updated during normal boot path. - The flash layout is platform specific. -**/ -VOID -EFIAPI -PlatformBdsLockNonUpdatableFlash ( - VOID - ) -{ - return; -} - - -/** - Lock the ConsoleIn device in system table. All key - presses will be ignored until the Password is typed in. The only way to - disable the password is to type it in to a ConIn device. - - @param Password Password used to lock ConIn device. - - @retval EFI_SUCCESS lock the Console In Spliter virtual handle successfully. - @retval EFI_UNSUPPORTED Password not found - -**/ -EFI_STATUS -EFIAPI -LockKeyboards ( - IN CHAR16 *Password - ) -{ - return EFI_UNSUPPORTED; -} diff --git a/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.h b/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.h deleted file mode 100644 index a244ac9..0000000 --- a/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/IntelBdsPlatform.h +++ /dev/null @@ -1,35 +0,0 @@ -/** @file - Head file for BDS Platform specific code - -Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR> -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef _INTEL_BDS_PLATFORM_H_ -#define _INTEL_BDS_PLATFORM_H_ - -#include <Protocol/DevicePathFromText.h> -#include <Protocol/DevicePathToText.h> - -#include <Library/BaseMemoryLib.h> -#include <Library/BdsLib.h> -#include <Library/DebugLib.h> -#include <Library/DevicePathLib.h> -#include <Library/UefiBootServicesTableLib.h> -#include <Library/UefiRuntimeServicesTableLib.h> -#include <Library/MemoryAllocationLib.h> -#include <Library/BaseLib.h> -#include <Library/PcdLib.h> -#include <Library/GenericBdsLib.h> -#include <Library/PlatformBdsLib.h> - -#include <Guid/GlobalVariable.h> - -#endif // _INTEL_BDS_PLATFORM_H diff --git a/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf b/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf deleted file mode 100644 index de9f1c2..0000000 --- a/Platforms/AMD/Styx/Override/ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf +++ /dev/null @@ -1,62 +0,0 @@ -## @file -# Implementation for PlatformBdsLib library class interfaces. -# using ARM Platform framework. -# -# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR> -# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR> -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -## - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = PlatformIntelBdsLib - FILE_GUID = 67780d14-60eb-4894-ab7c-eed6af427f9f - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - LIBRARY_CLASS = PlatformBdsLib|DXE_DRIVER - CONSTRUCTOR = PlatformIntelBdsConstructor - -# -# The following information is for reference only and not required by the build tools. -# -# VALID_ARCHITECTURES = ARM AARCH64 -# - -[Sources] - IntelBdsPlatform.c - IntelBdsPlatform.h - -[Packages] - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec - -[LibraryClasses] - BaseLib - BaseMemoryLib - BdsLib - DebugLib - DevicePathLib - MemoryAllocationLib - UefiBootServicesTableLib - PcdLib - GenericBdsLib - -[Pcd] - gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths - gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths - gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut - -[Protocols] - gEfiDevicePathFromTextProtocolGuid - gEfiDevicePathToTextProtocolGuid
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran leo.duran@amd.com --- .../Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoader.c | 122 ---- .../Drivers/FdtDxe/AArch64/BdsLinuxLoaderHelper.S | 87 --- Platforms/AMD/Styx/Drivers/FdtDxe/BdsLinuxFdt.c | 754 --------------------- Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.c | 279 -------- Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.h | 55 -- Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf | 90 --- Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoader.h | 166 ----- .../AMD/Styx/Drivers/FdtDxe/LinuxLoaderHelper.c | 192 ------ Platforms/AMD/Styx/FdtBlob/styx-husky.dtb | Bin 8093 -> 0 bytes Platforms/AMD/Styx/FdtBlob/styx-husky.dts | 435 ------------ Platforms/AMD/Styx/FdtBlob/styx-overdrive.dtb | Bin 8089 -> 0 bytes Platforms/AMD/Styx/FdtBlob/styx-overdrive.dts | 435 ------------ .../AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dtb | Bin 0 -> 8093 bytes .../AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dts | 435 ++++++++++++ .../Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb | Bin 0 -> 8089 bytes .../Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts | 435 ++++++++++++ .../OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c | 122 ++++ .../FdtDxe/AArch64/BdsLinuxLoaderHelper.S | 87 +++ .../AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c | 754 +++++++++++++++++++++ Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c | 279 ++++++++ Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.h | 55 ++ .../AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf | 90 +++ .../AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoader.h | 166 +++++ .../Styx/OverdriveBoard/FdtDxe/LinuxLoaderHelper.c | 192 ++++++ .../AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 2 +- .../AMD/Styx/OverdriveBoard/OverdriveBoard.fdf | 4 +- 26 files changed, 2618 insertions(+), 2618 deletions(-) delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoader.c delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoaderHelper.S delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/BdsLinuxFdt.c delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.c delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.h delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoader.h delete mode 100644 Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoaderHelper.c delete mode 100644 Platforms/AMD/Styx/FdtBlob/styx-husky.dtb delete mode 100644 Platforms/AMD/Styx/FdtBlob/styx-husky.dts delete mode 100644 Platforms/AMD/Styx/FdtBlob/styx-overdrive.dtb delete mode 100644 Platforms/AMD/Styx/FdtBlob/styx-overdrive.dts create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dtb create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dts create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.h create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoader.h create mode 100644 Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoaderHelper.c
diff --git a/Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoader.c b/Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoader.c deleted file mode 100644 index 8e6fbfc..0000000 --- a/Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoader.c +++ /dev/null @@ -1,122 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2014, ARM Limited. All rights reserved.<BR> -* Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ -/** - Derived from: - ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoader.c - -**/ - -#include <Library/PcdLib.h> -#include <Base.h> -#include <BdsLib/BdsInternal.h> -#include <Library/ArmGicLib.h> -#include <Library/IoLib.h> - -#include <AmdStyxHelperLib.h> - -/* These externs are used to relocate some ASM code into Linux memory. */ -extern VOID *SecondariesPenStart; -extern VOID *SecondariesPenEnd; -extern UINTN *AsmParkingBase; -extern UINTN *AsmMailboxBase; - -extern EFI_BOOT_SERVICES *gBS; - -VOID -EFIAPI -AmdStyxMoveParkedCores( - VOID - ) -{ - EFI_STATUS Status; - EFI_PHYSICAL_ADDRESS MpParkingBase; - UINTN MpParkingSize; - EFI_PHYSICAL_ADDRESS PenBase; - UINTN PenSize; - UINTN MailboxBase; - ARM_PROCESSOR_TABLE *ArmProcessorTable; - ARM_CORE_INFO *ArmCoreInfoTable; - UINTN ArmCoreCount; - UINTN CoreNum; - UINTN CoreMailbox; - UINTN CoreParking; - - // Get core information - ArmProcessorTable = AmdStyxGetArmProcessorTable(); - ASSERT_EFI_ERROR (ArmProcessorTable == NULL); - ArmCoreInfoTable = ArmProcessorTable->ArmCpus; - ArmCoreCount = ArmProcessorTable->NumberOfEntries; - - // Get Parking area (4KB-aligned, 4KB per core) - MpParkingBase = FixedPcdGet64 (PcdParkingProtocolBase); - ASSERT_EFI_ERROR (MpParkingBase & (SIZE_4KB - 1)); - MpParkingSize = ArmCoreCount * SIZE_4KB; - ASSERT_EFI_ERROR (MpParkingSize > FixedPcdGet64 (PcdParkingProtocolSize)); - - // - // Set Pen at the 2K-offset of the Parking area, skipping an 8-byte slot for the Core#. - // For details, refer to the "Multi-processor Startup for ARM Platforms" document: - // https://acpica.org/sites/acpica/files/MP%20Startup%20for%20ARM%20platforms.d... - // - PenBase = (EFI_PHYSICAL_ADDRESS)((UINTN)MpParkingBase + SIZE_2KB + sizeof(UINT64)); - PenSize = (UINTN)&SecondariesPenEnd - (UINTN)&SecondariesPenStart; - - // Reserve the memory as RuntimeServices - Status = gBS->AllocatePages (AllocateAddress, EfiRuntimeServicesCode, - EFI_SIZE_TO_PAGES (MpParkingSize ), &MpParkingBase ); - if (EFI_ERROR (Status)) { - Print (L"Warning: Failed to reserve memory for MP-Parking protocol at 0x%lX, Status = %r\n", - MpParkingBase, Status); - // Even if there is a risk of memory corruption we carry on - } - - // Relocate the Pen code - CopyMem ((VOID*)(PenBase), (VOID*)&SecondariesPenStart, PenSize); - - // Put spin-table mailboxes below the pen code so we know where they are relative to code. - // Make sure this is 8 byte aligned. - MailboxBase = (UINTN)PenBase + ((UINTN)&SecondariesPenEnd - (UINTN)&SecondariesPenStart); - if (MailboxBase % sizeof(UINT64) != 0) { - MailboxBase += sizeof(UINT64) - MailboxBase % sizeof(UINT64); - } - - // Update variables used in the Pen code - *(UINTN*)(PenBase + ((UINTN)&AsmMailboxBase - (UINTN)&SecondariesPenStart)) = MailboxBase; - *(UINTN*)(PenBase + ((UINTN)&AsmParkingBase - (UINTN)&SecondariesPenStart)) = (UINTN)MpParkingBase; - - for (CoreNum = 0; CoreNum < ArmCoreCount; CoreNum++) { - // Clear the jump address at spin-table slot - CoreMailbox = MailboxBase + CoreNum * sizeof (UINT64); - *((UINTN*)(CoreMailbox)) = 0x0; - - // Clear the jump address and set Core# at mp-parking slot - CoreParking = (UINTN)MpParkingBase + CoreNum * SIZE_4KB; - *((UINTN*)(CoreParking + sizeof (UINT64))) = 0x0; - *((UINTN*)(CoreParking + SIZE_2KB)) = CoreNum; - - // Move secondary core to our new Pen - MmioWrite64(ArmCoreInfoTable[CoreNum].MailboxSetAddress, (UINTN)PenBase); - - // Update table entry to be consumed by FDT parser. - ArmCoreInfoTable[CoreNum].MailboxSetAddress = CoreMailbox; - } - - // Flush caches to make sure our pen gets to memory before we release secondary cores. - ArmCleanDataCache(); - - // Send msg to secondary cores to jump to our new Pen. - ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId)); -} - diff --git a/Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoaderHelper.S b/Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoaderHelper.S deleted file mode 100644 index d400a9c..0000000 --- a/Platforms/AMD/Styx/Drivers/FdtDxe/AArch64/BdsLinuxLoaderHelper.S +++ /dev/null @@ -1,87 +0,0 @@ -// -// Copyright (c) 2011-2013, ARM Limited. All rights reserved. -// Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> -// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -//** -// Derived from: -// ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoaderHelper.S -// -//** - -/* Secondary core pens for AArch64 Linux booting. - - This code is placed in Linux kernel memory and marked reserved. UEFI ensures - that the secondary cores get to this pen and the kernel can then start the - cores from here. - NOTE: This code must be self-contained. -*/ - -#include <Library/ArmLib.h> - -.text -.align 3 - -GCC_ASM_EXPORT(SecondariesPenStart) -ASM_GLOBAL SecondariesPenEnd - -ASM_PFX(SecondariesPenStart): - // Registers x0-x3 are reserved for future use and should be set to zero. - mov x0, xzr - mov x1, xzr - mov x2, xzr - mov x3, xzr - - mrs x4, mpidr_el1 // Get MPCore register - and x5, x4, #ARM_CORE_MASK // Get core number - and x4, x4, #ARM_CLUSTER_MASK // Get cluster number - - add x4, x5, x4, LSR #7 // Add scaled cluster number to core number - mov x6, x4 // Save a copy to compute mp-parking offset - - ldr x5, AsmMailboxBase // Get mailbox addr relative to PC - lsl x4, x4, 3 // Add 8-byte offset for this core - add x4, x4, x5 // - - ldr x5, AsmParkingBase // Get mp-parking addr relative to PC - lsl x6, x6, 12 // Add 4K-byte offset for this core - add x6, x6, x5 // - - mov x5, 1 // Get mp-parking id# at 2K offset - lsl x5, x5, 11 // - add x5, x5, x6 // - ldr x10, [x5] // - -1: ldr x5, [x4] // Load jump-addr from spin-table mailbox - cmp xzr, x5 // Has the value been set? - b.ne 4f // If so, break out of loop - - ldr x5, [x6] // Load mp-parking id# - cmp w10, w5 // Is it my id? - b.ne 2f // If not, continue polling - - ldr x5, [x6, 8] // Load jump-addr from mp-parking - cmp xzr, x5 // Has the value been set? - b.ne 3f // If so, break out of loop - -2: wfe // Wait a bit - b 1b // Wait over, check again - -3: str xzr, [x6, 8] // Clear to acknowledge - mov x0, x6 // Return mp-parking address -4: br x5 // Jump to new addr - -.align 3 // Make sure the variable below is 8 byte aligned. - .global AsmParkingBase -AsmParkingBase: .xword 0xdeaddeadbeefbeef - .global AsmMailboxBase -AsmMailboxBase: .xword 0xdeaddeadbeefbeef - -SecondariesPenEnd: diff --git a/Platforms/AMD/Styx/Drivers/FdtDxe/BdsLinuxFdt.c b/Platforms/AMD/Styx/Drivers/FdtDxe/BdsLinuxFdt.c deleted file mode 100644 index 0d03bd7..0000000 --- a/Platforms/AMD/Styx/Drivers/FdtDxe/BdsLinuxFdt.c +++ /dev/null @@ -1,754 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2014, ARM Limited. All rights reserved.<BR> -* Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ -/** - Derived from: - ArmPkg/Library/BdsLib/BdsLinuxFdt.c - -**/ - -#include <Library/PcdLib.h> -#include <libfdt.h> - -#include <BdsLib/BdsInternal.h> - -#include <AmdStyxHelperLib.h> - -//#define LINUX_FDT_MAX_OFFSET (PcdGet64 (PcdUefiEntryAddress) + PcdGet32(PcdArmLinuxFdtMaxOffset)) -#define LINUX_FDT_MAX_OFFSET (PcdGet64 (PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxFdtMaxOffset)) - - -// Additional size that could be used for FDT entries added by the UEFI OS Loader -// Estimation based on: EDID (300bytes) + bootargs (200bytes) + initrd region (20bytes) -// + system memory region (20bytes) + mp_core entries (200 bytes) -#define FDT_ADDITIONAL_ENTRIES_SIZE 0x300 - - -EFI_STATUS -GetSystemMemoryResources ( - IN LIST_ENTRY *ResourceList - ); - -VOID -DebugDumpFdt ( - IN VOID* FdtBlob - ); - -#define ALIGN(x, a) (((x) + ((a) - 1)) & ~((a) - 1)) -#define PALIGN(p, a) ((void *)(ALIGN((unsigned long)(p), (a)))) -#define GET_CELL(p) (p += 4, *((const UINT32 *)(p-4))) - -// -// PMU interrupts per core -// -#pragma pack(push, 1) -typedef struct { - UINT32 Flag; // 0 == SPI - UINT32 IntId; // GSIV == IntId+32 - UINT32 Type; // 4 == Level-Sensitive, Active-High -} PMU_INTERRUPT; -#pragma pack(pop) - -#define PMU_INT_FLAG_SPI 0 -#define PMU_INT_TYPE_HIGH_LEVEL 4 - - -typedef struct { - UINTN Base; - UINTN Size; -} FdtRegion; - - -STATIC -UINTN -cpu_to_fdtn (UINTN x) { - if (sizeof (UINTN) == sizeof (UINT32)) { - return cpu_to_fdt32 (x); - } else { - return cpu_to_fdt64 (x); - } -} - - -STATIC -BOOLEAN -ClusterInRange( - IN ARM_CORE_INFO *ArmCoreInfoTable, - IN UINTN ClusterId, - IN UINTN LowIndex, - IN UINTN HighIndex - ) -{ - do { - if (ClusterId == ArmCoreInfoTable[LowIndex].ClusterId) - return TRUE; - } while (++LowIndex <= HighIndex); - - return FALSE; -} - - -STATIC -UINTN -NumberOfCoresInCluster( - IN ARM_CORE_INFO *ArmCoreInfoTable, - IN UINTN NumberOfEntries, - IN UINTN ClusterId - ) -{ - UINTN Index, Cores; - - Cores = 0; - for (Index = 0; Index < NumberOfEntries; ++Index) { - if (ClusterId == ArmCoreInfoTable[Index].ClusterId) - ++Cores; - } - - return Cores; -} - - -STATIC -UINTN -NumberOfClustersInTable( - IN ARM_CORE_INFO *ArmCoreInfoTable, - IN UINTN NumberOfEntries - ) -{ - UINTN Index, Cores, Clusters, ClusterId; - - Index = 0; - Clusters = 0; - Cores = NumberOfEntries; - while (Cores) { - ++Clusters; - ClusterId = ArmCoreInfoTable[Index].ClusterId; - Cores -= NumberOfCoresInCluster (ArmCoreInfoTable, - NumberOfEntries, - ClusterId); - if (Cores) { - do { - ++Index; - } while (ClusterInRange (ArmCoreInfoTable, - ArmCoreInfoTable[Index].ClusterId, - 0, Index-1)); - } - } - - return Clusters; -} - - -STATIC -int -fdt_alloc_phandle( - IN VOID *blob - ) -{ - - int offset, phandle = 0; - - for (offset = fdt_next_node(blob, -1, NULL); offset >= 0; - offset = fdt_next_node(blob, offset, NULL)) { - phandle = MAX(phandle, fdt_get_phandle(blob, offset)); - } - - return phandle + 1; -} - - -STATIC -BOOLEAN -IsLinuxReservedRegion ( - IN EFI_MEMORY_TYPE MemoryType - ) -{ - switch(MemoryType) { - case EfiRuntimeServicesCode: - case EfiRuntimeServicesData: - case EfiUnusableMemory: - case EfiACPIReclaimMemory: - case EfiACPIMemoryNVS: - case EfiReservedMemoryType: - return TRUE; - default: - return FALSE; - } -} - -STATIC -VOID -SetDeviceStatus ( - IN VOID *fdt, - IN CHAR8 *device, - IN BOOLEAN enable - ) -{ - int node, subnode, rc; - - node = fdt_subnode_offset (fdt, 0, "smb"); - if (node >= 0) { - subnode = fdt_subnode_offset (fdt, node, device); - if (subnode >= 0) { - rc = fdt_setprop_string(fdt, subnode, "status", enable ? "ok" : "disabled"); - if (rc) { - DEBUG((EFI_D_ERROR,"%a: Could not set 'status' property for '%a' node\n", - __FUNCTION__, device)); - } - } - } -} - -#if DO_XGBE -STATIC -VOID -SetMacAddress ( - IN VOID *fdt, - IN CHAR8 *device, - IN UINT64 mac_addr - ) -{ - int node, subnode, rc; - - node = fdt_subnode_offset (fdt, 0, "smb"); - if (node >= 0) { - subnode = fdt_subnode_offset (fdt, node, device); - if (subnode >= 0) { - rc = fdt_setprop(fdt, subnode, "mac-address", (void *)&mac_addr, 6); - if (rc) { - DEBUG((EFI_D_ERROR,"%a: Could not set 'mac-address' property for '%a' node\n", - __FUNCTION__, device)); - } - } - } -} -#endif - -VOID -SetSocIdStatus ( - IN VOID *fdt - ) -{ - UINT32 SocId; - BOOLEAN IsRevB1; - - SocId = PcdGet32 (PcdSocCpuId); - IsRevB1 = (SocId & 0xFF0) && (SocId & 0x00F); - - SetDeviceStatus (fdt, "sata@e0d00000", IsRevB1); - SetDeviceStatus (fdt, "gpio@e0020000", IsRevB1); - SetDeviceStatus (fdt, "gpio@e0030000", IsRevB1); - SetDeviceStatus (fdt, "gwdt@e0bb0000", IsRevB1); -#if DO_KCS - SetDeviceStatus (fdt, "kcs@e0010000", IsRevB1); -#else - SetDeviceStatus (fdt, "kcs@e0010000", FALSE); -#endif -} - -VOID -SetXgbeStatus ( - IN VOID *fdt - ) -{ -#if DO_XGBE - SetDeviceStatus (fdt, "xgmac@e0700000", TRUE); - SetDeviceStatus (fdt, "phy@e1240800", TRUE); - SetDeviceStatus (fdt, "xgmac@e0900000", TRUE); - SetDeviceStatus (fdt, "phy@e1240c00", TRUE); - - SetMacAddress (fdt, "xgmac@e0700000", PcdGet64 (PcdEthMacA)); - SetMacAddress (fdt, "xgmac@e0900000", PcdGet64 (PcdEthMacB)); -#else - SetDeviceStatus (fdt, "xgmac@e0700000", FALSE); - SetDeviceStatus (fdt, "phy@e1240800", FALSE); - SetDeviceStatus (fdt, "xgmac@e0900000", FALSE); - SetDeviceStatus (fdt, "phy@e1240c00", FALSE); -#endif -} - - -/** -** Relocate the FDT blob to a more appropriate location for the Linux kernel. -** This function will allocate memory for the relocated FDT blob. -** -** @retval EFI_SUCCESS on success. -** @retval EFI_OUT_OF_RESOURCES or EFI_INVALID_PARAMETER on failure. -*/ -STATIC -EFI_STATUS -RelocateFdt ( - EFI_PHYSICAL_ADDRESS OriginalFdt, - UINTN OriginalFdtSize, - EFI_PHYSICAL_ADDRESS *RelocatedFdt, - UINTN *RelocatedFdtSize, - EFI_PHYSICAL_ADDRESS *RelocatedFdtAlloc - ) -{ - EFI_STATUS Status; - INTN Error; - UINT64 FdtAlignment; - - *RelocatedFdtSize = OriginalFdtSize + FDT_ADDITIONAL_ENTRIES_SIZE; - - // If FDT load address needs to be aligned, allocate more space. - FdtAlignment = PcdGet32 (PcdArmLinuxFdtAlignment); - if (FdtAlignment != 0) { - *RelocatedFdtSize += FdtAlignment; - } - - // Try below a watermark address. - Status = EFI_NOT_FOUND; - if (PcdGet32 (PcdArmLinuxFdtMaxOffset) != 0) { - *RelocatedFdt = LINUX_FDT_MAX_OFFSET; - Status = gBS->AllocatePages (AllocateMaxAddress, EfiBootServicesData, - EFI_SIZE_TO_PAGES (*RelocatedFdtSize), RelocatedFdt); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_WARN, "Warning: Failed to load FDT below address 0x%lX (%r). Will try again at a random address anywhere.\n", *RelocatedFdt, Status)); - } - } - - // Try anywhere there is available space. - if (EFI_ERROR (Status)) { - Status = gBS->AllocatePages (AllocateAnyPages, EfiBootServicesData, - EFI_SIZE_TO_PAGES (*RelocatedFdtSize), RelocatedFdt); - if (EFI_ERROR (Status)) { - ASSERT_EFI_ERROR (Status); - return EFI_OUT_OF_RESOURCES; - } else { - DEBUG ((EFI_D_WARN, "WARNING: Loaded FDT at random address 0x%lX.\nWARNING: There is a risk of accidental overwriting by other code/data.\n", *RelocatedFdt)); - } - } - - *RelocatedFdtAlloc = *RelocatedFdt; - if (FdtAlignment != 0) { - *RelocatedFdt = ALIGN (*RelocatedFdt, FdtAlignment); - } - - // Load the Original FDT tree into the new region - Error = fdt_open_into ((VOID*)(UINTN) OriginalFdt, - (VOID*)(UINTN)(*RelocatedFdt), *RelocatedFdtSize); - if (Error) { - DEBUG ((EFI_D_ERROR, "fdt_open_into(): %a\n", fdt_strerror (Error))); - gBS->FreePages (*RelocatedFdtAlloc, EFI_SIZE_TO_PAGES (*RelocatedFdtSize)); - return EFI_INVALID_PARAMETER; - } - - DEBUG_CODE_BEGIN(); - // DebugDumpFdt ((VOID*)(UINTN)(*RelocatedFdt)); - DEBUG_CODE_END(); - - return EFI_SUCCESS; -} - - -EFI_STATUS -AmdStyxPrepareFdt ( - IN CONST CHAR8* CommandLineArguments, - IN EFI_PHYSICAL_ADDRESS InitrdImage, - IN UINTN InitrdImageSize, - IN OUT EFI_PHYSICAL_ADDRESS *FdtBlobBase, - IN OUT UINTN *FdtBlobSize - ) -{ - EFI_STATUS Status; - EFI_PHYSICAL_ADDRESS NewFdtBlobBase; - EFI_PHYSICAL_ADDRESS NewFdtBlobAllocation; - UINTN NewFdtBlobSize; - VOID *fdt; - int err; - int node; - int cpu_node; - int lenp; - CONST VOID *BootArg; - EFI_PHYSICAL_ADDRESS InitrdImageStart; - EFI_PHYSICAL_ADDRESS InitrdImageEnd; - FdtRegion Region; - UINTN Index; - CHAR8 Name[10]; - LIST_ENTRY ResourceList; - BDS_SYSTEM_MEMORY_RESOURCE *Resource; - ARM_PROCESSOR_TABLE *ArmProcessorTable; - ARM_CORE_INFO *ArmCoreInfoTable; - UINTN ArmCoreCount; - UINT32 PrimaryClusterId; - UINT32 PrimaryCoreId; - UINTN MemoryMapSize; - EFI_MEMORY_DESCRIPTOR *MemoryMap; - EFI_MEMORY_DESCRIPTOR *MemoryMapPtr; - UINTN MapKey; - UINTN DescriptorSize; - UINT32 DescriptorVersion; - UINTN Pages; - UINTN OriginalFdtSize; - int map_node; - int cluster_node; - int pmu_node; - PMU_INTERRUPT PmuInt; - int phandle[NUM_CORES]; - UINT32 ClusterIndex, CoreIndex; - UINT32 ClusterCount, CoresInCluster; - UINT32 ClusterId; - UINTN MpId, MbAddr; - - // - // Sanity checks on the original FDT blob. - // - err = fdt_check_header ((VOID*)(UINTN)(*FdtBlobBase)); - if (err != 0) { - Print (L"ERROR: Device Tree header not valid (err:%d)\n", err); - return EFI_INVALID_PARAMETER; - } - - // The original FDT blob might have been loaded partially. - // Check that it is not the case. - OriginalFdtSize = (UINTN)fdt_totalsize ((VOID*)(UINTN)(*FdtBlobBase)); - if (OriginalFdtSize > *FdtBlobSize) { - Print (L"ERROR: Incomplete FDT. Only %d/%d bytes have been loaded.\n", - *FdtBlobSize, OriginalFdtSize); - return EFI_INVALID_PARAMETER; - } - - // - // Relocate the FDT to its final location. - // - NewFdtBlobAllocation = 0; - Status = RelocateFdt (*FdtBlobBase, OriginalFdtSize, - &NewFdtBlobBase, &NewFdtBlobSize, &NewFdtBlobAllocation); - if (EFI_ERROR (Status)) { - goto FAIL_RELOCATE_FDT; - } - fdt = (VOID*)(UINTN)NewFdtBlobBase; - - node = fdt_subnode_offset (fdt, 0, "chosen"); - if (node < 0) { - // The 'chosen' node does not exist, create it - node = fdt_add_subnode(fdt, 0, "chosen"); - if (node < 0) { - DEBUG((EFI_D_ERROR,"Error on finding 'chosen' node\n")); - Status = EFI_INVALID_PARAMETER; - goto FAIL_COMPLETE_FDT; - } - } - - DEBUG_CODE_BEGIN(); - BootArg = fdt_getprop(fdt, node, "bootargs", &lenp); - if (BootArg != NULL) { - DEBUG((EFI_D_ERROR,"BootArg: %a\n",BootArg)); - } - DEBUG_CODE_END(); - - // - // Set Linux CmdLine - // - if ((CommandLineArguments != NULL) && (AsciiStrLen (CommandLineArguments) > 0)) { - err = fdt_setprop(fdt, node, "bootargs", CommandLineArguments, AsciiStrSize(CommandLineArguments)); - if (err) { - DEBUG((EFI_D_ERROR,"Fail to set new 'bootarg' (err:%d)\n",err)); - } - } - - // - // Set Linux Initrd - // - if (InitrdImageSize != 0) { - InitrdImageStart = cpu_to_fdt64 (InitrdImage); - err = fdt_setprop(fdt, node, "linux,initrd-start", &InitrdImageStart, sizeof(EFI_PHYSICAL_ADDRESS)); - if (err) { - DEBUG((EFI_D_ERROR,"Fail to set new 'linux,initrd-start' (err:%d)\n",err)); - } - InitrdImageEnd = cpu_to_fdt64 (InitrdImage + InitrdImageSize); - err = fdt_setprop(fdt, node, "linux,initrd-end", &InitrdImageEnd, sizeof(EFI_PHYSICAL_ADDRESS)); - if (err) { - DEBUG((EFI_D_ERROR,"Fail to set new 'linux,initrd-start' (err:%d)\n",err)); - } - } - - // - // Set Physical memory setup if does not exist - // - node = fdt_subnode_offset(fdt, 0, "memory"); - if (node < 0) { - // The 'memory' node does not exist, create it - node = fdt_add_subnode(fdt, 0, "memory"); - if (node >= 0) { - fdt_setprop_string(fdt, node, "name", "memory"); - fdt_setprop_string(fdt, node, "device_type", "memory"); - - GetSystemMemoryResources (&ResourceList); - Resource = (BDS_SYSTEM_MEMORY_RESOURCE*)ResourceList.ForwardLink; - - Region.Base = cpu_to_fdtn ((UINTN)Resource->PhysicalStart); - Region.Size = cpu_to_fdtn ((UINTN)Resource->ResourceLength); - - err = fdt_setprop(fdt, node, "reg", &Region, sizeof(Region)); - if (err) { - DEBUG((EFI_D_ERROR,"Fail to set new 'memory region' (err:%d)\n",err)); - } - } - } - - // - // Add the memory regions reserved by the UEFI Firmware - // - - // Retrieve the UEFI Memory Map - MemoryMap = NULL; - MemoryMapSize = 0; - Status = gBS->GetMemoryMap (&MemoryMapSize, MemoryMap, &MapKey, &DescriptorSize, &DescriptorVersion); - if (Status == EFI_BUFFER_TOO_SMALL) { - // The UEFI specification advises to allocate more memory for the MemoryMap buffer between successive - // calls to GetMemoryMap(), since allocation of the new buffer may potentially increase memory map size. - Pages = EFI_SIZE_TO_PAGES (MemoryMapSize) + 1; - MemoryMap = AllocatePages (Pages); - if (MemoryMap == NULL) { - Status = EFI_OUT_OF_RESOURCES; - goto FAIL_COMPLETE_FDT; - } - Status = gBS->GetMemoryMap (&MemoryMapSize, MemoryMap, &MapKey, &DescriptorSize, &DescriptorVersion); - } - - // Go through the list and add the reserved region to the Device Tree - if (!EFI_ERROR(Status)) { - MemoryMapPtr = MemoryMap; - for (Index = 0; Index < (MemoryMapSize / DescriptorSize); Index++) { - if (IsLinuxReservedRegion ((EFI_MEMORY_TYPE)MemoryMapPtr->Type)) { - DEBUG((DEBUG_VERBOSE, "Reserved region of type %d [0x%lX, 0x%lX]\n", - MemoryMapPtr->Type, - (UINTN)MemoryMapPtr->PhysicalStart, - (UINTN)(MemoryMapPtr->PhysicalStart + MemoryMapPtr->NumberOfPages * EFI_PAGE_SIZE))); - err = fdt_add_mem_rsv(fdt, MemoryMapPtr->PhysicalStart, MemoryMapPtr->NumberOfPages * EFI_PAGE_SIZE); - if (err != 0) { - Print(L"Warning: Fail to add 'memreserve' (err:%d)\n", err); - } - } - MemoryMapPtr = (EFI_MEMORY_DESCRIPTOR*)((UINTN)MemoryMapPtr + DescriptorSize); - } - } - - // - // Setup Arm Mpcore Info if it is a multi-core or multi-cluster platforms. - // - // For 'cpus' and 'cpu' device tree nodes bindings, refer to this file - // in the kernel documentation: - // Documentation/devicetree/bindings/arm/cpus.txt - // - ArmProcessorTable = AmdStyxGetArmProcessorTable(); - ASSERT_EFI_ERROR (ArmProcessorTable == NULL); - ArmCoreInfoTable = ArmProcessorTable->ArmCpus; - - // Make sure SoC's core count does not exceed what we want to build - ArmCoreCount = ArmProcessorTable->NumberOfEntries; - ASSERT_EFI_ERROR (ArmCoreCount > NUM_CORES); - - // Get Id from primary CPU - MpId = (UINTN) ArmReadMpidr (); - PrimaryClusterId = GET_CLUSTER_ID((UINT32) MpId); - PrimaryCoreId = GET_CORE_ID((UINT32) MpId); - - // Remove existing 'pmu' node and create a new one - pmu_node = fdt_subnode_offset (fdt, 0, "pmu"); - if (pmu_node >= 0) { - fdt_del_node (fdt, pmu_node); - } - pmu_node = fdt_add_subnode(fdt, 0, "pmu"); - if (pmu_node >= 0) { - // append PMU interrupts - for (Index = 0; Index < ArmCoreCount; Index++) { - MpId = (UINTN) GET_MPID (ArmCoreInfoTable[Index].ClusterId, - ArmCoreInfoTable[Index].CoreId); - - Status = AmdStyxGetPmuSpiFromMpId (MpId, &PmuInt.IntId); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "FDT: Error getting PMU interrupt for MpId '0x%x'\n", MpId)); - goto FAIL_COMPLETE_FDT; - } - - PmuInt.Flag = cpu_to_fdt32(PMU_INT_FLAG_SPI); - PmuInt.IntId = cpu_to_fdt32(PmuInt.IntId); - PmuInt.Type = cpu_to_fdt32(PMU_INT_TYPE_HIGH_LEVEL); - fdt_appendprop(fdt, pmu_node, "interrupts", &PmuInt, sizeof(PmuInt)); - } - fdt_setprop_string(fdt, pmu_node, "compatible", "arm,armv8-pmuv3"); - } else { - DEBUG((EFI_D_ERROR,"FDT: Error creating 'pmu' node\n")); - Status = EFI_INVALID_PARAMETER; - goto FAIL_COMPLETE_FDT; - } - - // Remove existing 'psci' node if feature not supported - node = fdt_subnode_offset (fdt, 0, "psci"); - if (node >= 0) { - if (!FixedPcdGetBool (PcdPsciOsSupport)) { - fdt_del_node (fdt, node); - } - } else if (FixedPcdGetBool (PcdPsciOsSupport) && - FixedPcdGetBool (PcdTrustedFWSupport)) { - // Add 'psci' node if not present - node = fdt_add_subnode(fdt, 0, "psci"); - if (node >= 0) { - fdt_setprop_string(fdt, node, "compatible", "arm,psci-0.2"); - fdt_appendprop_string(fdt, node, "compatible", "arm,psci"); - fdt_setprop_string(fdt, node, "method", "smc"); - } else { - DEBUG((EFI_D_ERROR,"FDT: Error creating 'psci' node\n")); - Status = EFI_INVALID_PARAMETER; - goto FAIL_COMPLETE_FDT; - } - } - - // Remove existing 'cpus' node and create a new one - node = fdt_subnode_offset (fdt, 0, "cpus"); - if (node >= 0) { - fdt_del_node (fdt, node); - } - node = fdt_add_subnode(fdt, 0, "cpus"); - if (node >= 0) { - // Configure the 'cpus' node - fdt_setprop_string(fdt, node, "name", "cpus"); - fdt_setprop_cell (fdt, node, "#address-cells", sizeof (UINTN) / 4); - fdt_setprop_cell(fdt, node, "#size-cells", 0); - } else { - DEBUG((EFI_D_ERROR,"FDT: Error creating 'cpus' node\n")); - Status = EFI_INVALID_PARAMETER; - goto FAIL_COMPLETE_FDT; - } - - // - // Walk the processor table in reverse order for proper listing in FDT - // - Index = ArmCoreCount; - while (Index--) { - // Create 'cpu' node - AsciiSPrint (Name, sizeof(Name), "CPU%d", Index); - cpu_node = fdt_add_subnode (fdt, node, Name); - if (cpu_node < 0) { - DEBUG ((EFI_D_ERROR, "FDT: Error on creating '%a' node\n", Name)); - Status = EFI_INVALID_PARAMETER; - goto FAIL_COMPLETE_FDT; - } - phandle[Index] = fdt_alloc_phandle(fdt); - fdt_setprop_cell (fdt, cpu_node, "phandle", phandle[Index]); - fdt_setprop_cell (fdt, cpu_node, "linux,phandle", phandle[Index]); - - if (FixedPcdGetBool (PcdPsciOsSupport) && - FixedPcdGetBool (PcdTrustedFWSupport)) { - fdt_setprop_string(fdt, cpu_node, "enable-method", "psci"); - } else { - fdt_setprop_string(fdt, cpu_node, "enable-method", "spin-table"); - MbAddr = ArmCoreInfoTable[Index].MailboxSetAddress; - MbAddr = cpu_to_fdtn (MbAddr); - fdt_setprop (fdt, cpu_node, "cpu-release-addr", &MbAddr, sizeof (MbAddr)); - } - MpId = (UINTN) GET_MPID (ArmCoreInfoTable[Index].ClusterId, - ArmCoreInfoTable[Index].CoreId); - MpId = cpu_to_fdtn (MpId); - fdt_setprop (fdt, cpu_node, "reg", &MpId, sizeof (MpId)); - fdt_setprop_string(fdt, cpu_node, "compatible", "arm,armv8"); - fdt_setprop_string (fdt, cpu_node, "device_type", "cpu"); - - // If it is not the primary core than the cpu should be disabled - if (((ArmCoreInfoTable[Index].ClusterId != PrimaryClusterId) || - (ArmCoreInfoTable[Index].CoreId != PrimaryCoreId))) { - fdt_setprop_string(fdt, cpu_node, "status", "disabled"); - } - } - - // Remove existing 'cpu-map' node and create a new one - map_node = fdt_subnode_offset (fdt, node, "cpu-map"); - if (map_node >= 0) { - fdt_del_node (fdt, map_node); - } - map_node = fdt_add_subnode(fdt, node, "cpu-map"); - if (map_node >= 0) { - ClusterIndex = ArmCoreCount - 1; - ClusterCount = NumberOfClustersInTable (ArmCoreInfoTable, - ArmCoreCount); - while (ClusterCount--) { - // Create 'cluster' node - AsciiSPrint (Name, sizeof(Name), "cluster%d", ClusterCount); - cluster_node = fdt_add_subnode (fdt, map_node, Name); - if (cluster_node < 0) { - DEBUG ((EFI_D_ERROR, "FDT: Error creating '%a' node\n", Name)); - Status = EFI_INVALID_PARAMETER; - goto FAIL_COMPLETE_FDT; - } - - ClusterId = ArmCoreInfoTable[ClusterIndex].ClusterId; - CoreIndex = ClusterIndex; - CoresInCluster = NumberOfCoresInCluster (ArmCoreInfoTable, - ArmCoreCount, - ClusterId); - while (CoresInCluster--) { - // Create 'core' node - AsciiSPrint (Name, sizeof(Name), "core%d", CoresInCluster); - cpu_node = fdt_add_subnode (fdt, cluster_node, Name); - if (cpu_node < 0) { - DEBUG ((EFI_D_ERROR, "FDT: Error creating '%a' node\n", Name)); - Status = EFI_INVALID_PARAMETER; - goto FAIL_COMPLETE_FDT; - } - fdt_setprop_cell (fdt, cpu_node, "cpu", phandle[CoreIndex]); - - // iterate to next core in cluster - if (CoresInCluster) { - do { - --CoreIndex; - } while (ClusterId != ArmCoreInfoTable[CoreIndex].ClusterId); - } - } - - // iterate to next cluster - if (ClusterCount) { - do { - --ClusterIndex; - } while (ClusterInRange (ArmCoreInfoTable, - ArmCoreInfoTable[ClusterIndex].ClusterId, - ClusterIndex + 1, - ArmCoreCount - 1)); - } - } - } else { - DEBUG((EFI_D_ERROR,"FDT: Error creating 'cpu-map' node\n")); - Status = EFI_INVALID_PARAMETER; - goto FAIL_COMPLETE_FDT; - } - - SetSocIdStatus (fdt); - SetXgbeStatus (fdt); - - DEBUG_CODE_BEGIN(); - // DebugDumpFdt (fdt); - DEBUG_CODE_END(); - - // If we succeeded to generate the new Device Tree then free the old Device Tree - gBS->FreePages (*FdtBlobBase, EFI_SIZE_TO_PAGES (*FdtBlobSize)); - - // Update the real size of the Device Tree - fdt_pack ((VOID*)(UINTN)(NewFdtBlobBase)); - - *FdtBlobBase = NewFdtBlobBase; - *FdtBlobSize = (UINTN)fdt_totalsize ((VOID*)(UINTN)(NewFdtBlobBase)); - return EFI_SUCCESS; - -FAIL_COMPLETE_FDT: - gBS->FreePages (NewFdtBlobAllocation, EFI_SIZE_TO_PAGES (NewFdtBlobSize)); - -FAIL_RELOCATE_FDT: - *FdtBlobSize = (UINTN)fdt_totalsize ((VOID*)(UINTN)(*FdtBlobBase)); - // Return success even if we failed to update the FDT blob. - // The original one is still valid. - return EFI_SUCCESS; -} - diff --git a/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.c b/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.c deleted file mode 100644 index 2559762..0000000 --- a/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.c +++ /dev/null @@ -1,279 +0,0 @@ -/** @file - - Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "FdtDxe.h" - -extern EFI_BOOT_SERVICES *gBS; - -EFI_EVENT mFdtReadyToBootEvent; - -VOID -EFIAPI -FdtReadyToBoot ( - IN EFI_EVENT Event, - IN VOID *Context - ); - -EFI_STATUS -EFIAPI -FdtOverrideDevicePath( - IN CHAR16 *FdtFileName, - OUT EFI_DEVICE_PATH **FdtDevicePath - ); - - -/** - *--------------------------------------------------------------------------------------- - * - * FdtDxeEntryPoint - * - * Description: - * Entry point of the FDT Runtime Driver. - * - * Control flow: - * Configure reserved regions. - * - * Parameters: - * @param[in] ImageHandle The firmware allocate handle for the - * EFI image. - * @param[in] *SystemTable Pointer to the EFI System Table. - * - * @return EFI_STATUS - * - *------------------------------------------------------------------------------------ - **/ -EFI_STATUS -EFIAPI -FdtDxeEntryPoint ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - DEBUG ((EFI_D_ERROR, "FdtDxe Loaded\n")); - - // - // Ready-To-Boot callback - // - Status = EfiCreateEventReadyToBootEx( - TPL_CALLBACK, - FdtReadyToBoot, - NULL, - &mFdtReadyToBootEvent - ); - ASSERT_EFI_ERROR (Status); - - return Status; -} - -/** - *--------------------------------------------------------------------------------------- - * - * FdtReadyToBoot - * - * Description: - * Ready-2-Boot Event Callback for EFI_EVENT_SIGNAL_READY_TO_BOOT. - * - * Control flow: - * 1. Read FDT blob - * 2. Edit FDT table - * 3. Submit FDT to EFI system table - * - * Parameters: - * @param[in] Event EFI_EVENT notification. - * @param[in] *Context Pointer to the Event Context. - * - * @return VOID - * - *--------------------------------------------------------------------------------------- - **/ -VOID -EFIAPI -FdtReadyToBoot ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - EFI_FIRMWARE_VOLUME2_PROTOCOL *FvProtocol; - EFI_HANDLE *HandleBuffer; - UINTN HandleCount; - UINTN Index; - EFI_STATUS Status; - UINT32 AuthenticationStatus; - EFI_GUID *FdtGuid = FixedPcdGetPtr(PcdStyxFdt); - UINT8 *FdtBlobBase = NULL; - UINTN FdtBlobSize = 0; - EFI_DEVICE_PATH *FdtDevicePath; - - // Move secondary core to a Pen complaint with MP-Parking protocol - if (!FixedPcdGetBool (PcdPsciOsSupport)) { - AmdStyxMoveParkedCores(); - } - - // Search for FDT blob in EFI partition - Status = FdtOverrideDevicePath(L"fdt.dtb", &FdtDevicePath); - if (!EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "%a: Loading Override FDT blob...\n", __FUNCTION__)); - - FdtBlobBase = (UINT8 *)(UINTN)LINUX_FDT_MAX_OFFSET; - Status = BdsLoadImage (FdtDevicePath, - AllocateMaxAddress, - (EFI_PHYSICAL_ADDRESS *)&FdtBlobBase, - &FdtBlobSize); - if (!EFI_ERROR (Status) && FdtBlobBase && FdtBlobSize) - goto LOAD_FDT_BLOB; - else - goto LOAD_FDT_ERROR; - } - - DEBUG ((EFI_D_ERROR, "%a: Loading Embedded FDT blob...\n", __FUNCTION__)); - HandleBuffer = NULL; - Status = gBS->LocateHandleBuffer ( - ByProtocol, - &gEfiFirmwareVolume2ProtocolGuid, - NULL, - &HandleCount, - &HandleBuffer - ); - ASSERT_EFI_ERROR (Status); - - for (Index = 0; Index < HandleCount; Index++) { - Status = gBS->HandleProtocol ( - HandleBuffer[Index], - &gEfiFirmwareVolume2ProtocolGuid, - (VOID **) &FvProtocol - ); - if (!EFI_ERROR (Status)) { - Status = FvProtocol->ReadSection ( - FvProtocol, - FdtGuid, - EFI_SECTION_RAW, - 0, - (VOID **)&FdtBlobBase, - &FdtBlobSize, - &AuthenticationStatus - ); - if (!EFI_ERROR (Status) && FdtBlobBase && FdtBlobSize) - goto LOAD_FDT_BLOB; - } - } - -LOAD_FDT_ERROR: - DEBUG ((EFI_D_ERROR, "%a: Error loading FDT blob!\n", __FUNCTION__)); - goto LOAD_FDT_DONE; - -LOAD_FDT_BLOB: - Status = AmdStyxPrepareFdt(NULL, 0, 0, (EFI_PHYSICAL_ADDRESS *)&FdtBlobBase, &FdtBlobSize); - ASSERT_EFI_ERROR (Status); - - // Install the FDT blob into EFI system configuration table - Status = gBS->InstallConfigurationTable (&gFdtTableGuid, (VOID *)FdtBlobBase); - ASSERT_EFI_ERROR (Status); - DEBUG ((EFI_D_ERROR, "%a: FDT ready!\n", __FUNCTION__)); - -LOAD_FDT_DONE: - gBS->CloseEvent (mFdtReadyToBootEvent); - return; -} - -/** -*--------------------------------------------------------------------------------------- -* -* FdtOverrideDevicePath -* -* Description: -* Looks for a user-provided FDT blob to override the default file built with the UEFI image. -* -* Parameters: -* @param[in] FdtFileName Name of the FDT blob located in the EFI partition. -* @param[out] FdtDevicePath EFI Device Path of the FDT blob. -* -* @return EFI_SUCCESS The function completed successfully. -* @return EFI_NOT_FOUND The protocol could not be located. -* @return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol. -* -*--------------------------------------------------------------------------------------- -**/ -EFI_STATUS -EFIAPI -FdtOverrideDevicePath( - IN CHAR16 *FdtFileName, - OUT EFI_DEVICE_PATH **FdtDevicePath - ) -{ - EFI_DEVICE_PATH_PROTOCOL *DevPathProtocol; - EFI_HANDLE *HandleBuffer; - UINTN HandleCount; - UINTN Index; - EFI_STATUS Status; - CHAR16 *DevPathText; - EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *VolProtocol; - EFI_FILE_PROTOCOL *FileProtocol; - EFI_FILE_PROTOCOL *FileHandle; - CHAR16 FilePathText[120]; - - HandleBuffer = NULL; - Status = gBS->LocateHandleBuffer ( - ByProtocol, - &gEfiSimpleFileSystemProtocolGuid, - NULL, - &HandleCount, - &HandleBuffer); - if (EFI_ERROR (Status)) - return Status; - - for (Index = 0; Index < HandleCount; Index++) { - DevPathProtocol = NULL; - Status = gBS->HandleProtocol ( - HandleBuffer[Index], - &gEfiDevicePathProtocolGuid, - (VOID **) &DevPathProtocol); - - if (!EFI_ERROR (Status)) { - VolProtocol = NULL; - Status = gBS->HandleProtocol ( - HandleBuffer[Index], - &gEfiSimpleFileSystemProtocolGuid, - (VOID **) &VolProtocol); - - if (!EFI_ERROR (Status)) { - FileProtocol = NULL; - Status = VolProtocol->OpenVolume(VolProtocol, &FileProtocol); - - if (!EFI_ERROR (Status)) { - FileHandle = NULL; - Status = FileProtocol->Open(FileProtocol, - &FileHandle, - FdtFileName, - EFI_FILE_MODE_READ, - 0); - - if (!EFI_ERROR (Status)) { - FileProtocol->Close(FileHandle); - DevPathText = ConvertDevicePathToText(DevPathProtocol, TRUE, FALSE); - StrCpy(FilePathText, DevPathText); - StrCat(FilePathText, L"/"); - StrCat(FilePathText, FdtFileName); - *FdtDevicePath = ConvertTextToDevicePath (FilePathText); - return EFI_SUCCESS; - } - } - } - } - } - - return Status; -} - diff --git a/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.h b/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.h deleted file mode 100644 index 7d17206..0000000 --- a/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.h +++ /dev/null @@ -1,55 +0,0 @@ -/** @file - - Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __FDT_DXE__H_ -#define __FDT_DXE__H_ - -#include <Uefi.h> -#include <Library/UefiLib.h> -#include <Library/UefiDriverEntryPoint.h> - -#include <Library/BaseLib.h> -#include <Library/BdsLib.h> -#include <Library/PcdLib.h> -#include <Library/DebugLib.h> -#include <Library/DevicePathLib.h> -#include <Guid/DxeServices.h> -#include <Library/DxeServicesTableLib.h> - -#include <Protocol/FirmwareVolume2.h> -#include <Protocol/SimpleFileSystem.h> -#include <Protocol/LoadFile.h> -#include <Protocol/DevicePath.h> -#include <Protocol/DevicePathFromText.h> - -//#define LINUX_FDT_MAX_OFFSET (PcdGet64 (PcdUefiEntryAddress) + PcdGet32(PcdArmLinuxFdtMaxOffset)) -#define LINUX_FDT_MAX_OFFSET (PcdGet64 (PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxFdtMaxOffset)) - -VOID -EFIAPI -AmdStyxMoveParkedCores( - VOID - ); - -EFI_STATUS -AmdStyxPrepareFdt ( - IN CONST CHAR8* CommandLineArguments, - IN EFI_PHYSICAL_ADDRESS InitrdImage, - IN UINTN InitrdImageSize, - IN OUT EFI_PHYSICAL_ADDRESS *FdtBlobBase, - IN OUT UINTN *FdtBlobSize - ); - - -#endif // __FDT_DXE__H_ diff --git a/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf b/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf deleted file mode 100644 index 5ac210b..0000000 --- a/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf +++ /dev/null @@ -1,90 +0,0 @@ -#/* @file -# -# Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = FdtDxe - FILE_GUID = 17f50855-6484-4b56-814b-1a88702d88e1 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - ENTRY_POINT = FdtDxeEntryPoint - -# -# The following information is for reference only and not required by the build tools. -# -# VALID_ARCHITECTURES = AARCH64 -# -# - -[Sources.common] - FdtDxe.c - BdsLinuxFdt.c - LinuxLoaderHelper.c - -[Sources.AARCH64] - AArch64/BdsLinuxLoader.c - AArch64/BdsLinuxLoaderHelper.S | GCC - -[Packages] - ArmPkg/ArmPkg.dec - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - AmdModulePkg/AmdModulePkg.dec - OpenPlatformPkg/Platforms/AMD/Styx/AmdStyx.dec - -[LibraryClasses] - UefiDriverEntryPoint - DxeServicesTableLib - BdsLib - FdtLib - DevicePathLib - AmdStyxHelperLib - -[LibraryClasses.AARCH64] - ArmGicLib - PcdLib - -[Guids] - gEfiEventReadyToBootGuid ##CONSUMED - gEfiDxeServicesTableGuid ##CONSUMED - gArmMpCoreInfoGuid ##CONSUMED - gFdtTableGuid ##CONSUMED - -[Protocols] - gEfiFirmwareVolume2ProtocolGuid ##CONSUMED - -[Pcd] - gAmdStyxTokenSpaceGuid.PcdStyxFdt - gAmdStyxTokenSpaceGuid.PcdSocCpuId - gAmdModulePkgTokenSpaceGuid.PcdEthMacA - gAmdModulePkgTokenSpaceGuid.PcdEthMacB - gAmdModulePkgTokenSpaceGuid.PcdEthMacB - gArmTokenSpaceGuid.PcdSystemMemoryBase - -[FixedPcd] - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment - gAmdStyxTokenSpaceGuid.PcdUefiEntryAddress - gAmdStyxTokenSpaceGuid.PcdPsciOsSupport - gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport - gAmdStyxTokenSpaceGuid.PcdParkingProtocolBase - gAmdStyxTokenSpaceGuid.PcdParkingProtocolSize - -[Pcd.AARCH64] - gArmTokenSpaceGuid.PcdGicDistributorBase - gArmTokenSpaceGuid.PcdGicSgiIntId - -[Depex] - TRUE - diff --git a/Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoader.h b/Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoader.h deleted file mode 100644 index 8a23d7f..0000000 --- a/Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoader.h +++ /dev/null @@ -1,166 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2015, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __LINUX_LOADER_H__ -#define __LINUX_LOADER_H__ - -#include <Library/BdsLib.h> -#include <Library/DebugLib.h> -#include <Library/HiiLib.h> -#include <Library/MemoryAllocationLib.h> -#include <Library/PerformanceLib.h> -#include <Library/PrintLib.h> -#include <Library/ShellLib.h> -#include <Library/UefiBootServicesTableLib.h> -#include <Library/UefiLib.h> - -#include <Protocol/EfiShellParameters.h> -#include <Protocol/EfiShell.h> - -#include <libfdt.h> - -// -// Definitions -// - -#define MAX_MSG_LEN 80 - -#define LINUX_UIMAGE_SIGNATURE 0x56190527 -#define LINUX_KERNEL_MAX_OFFSET (SystemMemoryBase + PcdGet32(PcdArmLinuxKernelMaxOffset)) -#define LINUX_ATAG_MAX_OFFSET (SystemMemoryBase + PcdGet32(PcdArmLinuxAtagMaxOffset)) -#define LINUX_FDT_MAX_OFFSET (SystemMemoryBase + PcdGet32(PcdArmLinuxFdtMaxOffset)) - -#define ARM_FDT_MACHINE_TYPE 0xFFFFFFFF - -// Additional size that could be used for FDT entries added by the UEFI OS Loader -// Estimation based on: EDID (300bytes) + bootargs (200bytes) + initrd region (20bytes) -// + system memory region (20bytes) + mp_core entries (200 bytes) -#define FDT_ADDITIONAL_ENTRIES_SIZE 0x300 - -// -// Global variables -// -extern CONST EFI_GUID mLinuxLoaderHiiGuid; -extern EFI_HANDLE mLinuxLoaderHiiHandle; - -// -// Local Types -// -typedef struct _SYSTEM_MEMORY_RESOURCE { - LIST_ENTRY Link; // This attribute must be the first entry of this structure (to avoid pointer computation) - EFI_PHYSICAL_ADDRESS PhysicalStart; - UINT64 ResourceLength; -} SYSTEM_MEMORY_RESOURCE; - -typedef VOID (*LINUX_KERNEL)(UINT32 Zero, UINT32 Arch, UINTN ParametersBase); - -// -// Functions -// -EFI_STATUS -PrintHii ( - IN CONST CHAR8 *Language OPTIONAL, - IN CONST EFI_STRING_ID HiiFormatStringId, - ... - ); - -VOID -PrintHelp ( - IN CONST CHAR8 *Language OPTIONAL - ); - -EFI_STATUS -ProcessShellParameters ( - OUT CHAR16 **KernelPath, - OUT CHAR16 **FdtPath, - OUT CHAR16 **InitrdPath, - OUT CHAR16 **LinuxCommandLine, - OUT UINTN *AtagMachineType - ); - -EFI_STATUS -ProcessAppCommandLine ( - OUT CHAR16 **KernelTextDevicePath, - OUT CHAR16 **FdtTextDevicePath, - OUT CHAR16 **InitrdTextDevicePath, - OUT CHAR16 **LinuxCommandLine, - OUT UINTN *AtagMachineType - ); - -VOID -PrintPerformance ( - VOID - ); - -EFI_STATUS -GetSystemMemoryResources ( - IN LIST_ENTRY *ResourceList - ); - -EFI_STATUS -PrepareFdt ( - IN EFI_PHYSICAL_ADDRESS SystemMemoryBase, - IN CONST CHAR8* CommandLineArguments, - IN EFI_PHYSICAL_ADDRESS InitrdImage, - IN UINTN InitrdImageSize, - IN OUT EFI_PHYSICAL_ADDRESS *FdtBlobBase, - IN OUT UINTN *FdtBlobSize - ); - -/** - Start a Linux kernel from a Device Path - - @param SystemMemoryBase Base of the system memory - @param LinuxKernel Device Path to the Linux Kernel - @param Parameters Linux kernel arguments - @param Fdt Device Path to the Flat Device Tree - @param MachineType ARM machine type value - - @retval EFI_SUCCESS All drivers have been connected - @retval EFI_NOT_FOUND The Linux kernel Device Path has not been found - @retval EFI_OUT_OF_RESOURCES There is not enough resource memory to store the matching results. - @retval RETURN_UNSUPPORTED ATAG is not support by this architecture - -**/ -EFI_STATUS -BootLinuxAtag ( - IN EFI_PHYSICAL_ADDRESS SystemMemoryBase, - IN EFI_DEVICE_PATH_PROTOCOL* LinuxKernelDevicePath, - IN EFI_DEVICE_PATH_PROTOCOL* InitrdDevicePath, - IN CONST CHAR8* CommandLineArguments, - IN UINTN MachineType - ); - -/** - Start a Linux kernel from a Device Path - - @param[in] LinuxKernelDevicePath Device Path to the Linux Kernel - @param[in] InitrdDevicePath Device Path to the Initrd - @param[in] Arguments Linux kernel arguments - - @retval EFI_SUCCESS All drivers have been connected - @retval EFI_NOT_FOUND The Linux kernel Device Path has not been found - @retval EFI_OUT_OF_RESOURCES There is not enough resource memory to store the matching results. - -**/ -EFI_STATUS -BootLinuxFdt ( - IN EFI_PHYSICAL_ADDRESS SystemMemoryBase, - IN EFI_DEVICE_PATH_PROTOCOL* LinuxKernelDevicePath, - IN EFI_DEVICE_PATH_PROTOCOL* InitrdDevicePath, - IN EFI_DEVICE_PATH_PROTOCOL* FdtDevicePath, - IN CONST CHAR8* Arguments - ); - -#endif /* __LINUX_LOADER_H__ */ diff --git a/Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoaderHelper.c b/Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoaderHelper.c deleted file mode 100644 index 4d7a844..0000000 --- a/Platforms/AMD/Styx/Drivers/FdtDxe/LinuxLoaderHelper.c +++ /dev/null @@ -1,192 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2015, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include <PiDxe.h> -#include <Library/HobLib.h> -#include <Library/TimerLib.h> -#include <Library/SerialPortLib.h> - -#include "LinuxLoader.h" - -STATIC CONST CHAR8 *mTokenList[] = { - /*"SEC",*/ - "PEI", - "DXE", - "BDS", - NULL -}; - -VOID -PrintPerformance ( - VOID - ) -{ - UINTN Key; - CONST VOID *Handle; - CONST CHAR8 *Token, *Module; - UINT64 Start, Stop, TimeStamp; - UINT64 Delta, TicksPerSecond, Milliseconds; - UINTN Index; - CHAR8 Buffer[100]; - UINTN CharCount; - BOOLEAN CountUp; - - TicksPerSecond = GetPerformanceCounterProperties (&Start, &Stop); - if (Start < Stop) { - CountUp = TRUE; - } else { - CountUp = FALSE; - } - - TimeStamp = 0; - Key = 0; - do { - Key = GetPerformanceMeasurement (Key, (CONST VOID **)&Handle, &Token, &Module, &Start, &Stop); - if (Key != 0) { - for (Index = 0; mTokenList[Index] != NULL; Index++) { - if (AsciiStriCmp (mTokenList[Index], Token) == 0) { - Delta = CountUp ? (Stop - Start) : (Start - Stop); - TimeStamp += Delta; - Milliseconds = DivU64x64Remainder (MultU64x32 (Delta, 1000), TicksPerSecond, NULL); - CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "%6a %6ld ms\n", Token, Milliseconds); - SerialPortWrite ((UINT8 *) Buffer, CharCount); - break; - } - } - } - } while (Key != 0); - - CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "Total Time = %ld ms\n\n", - DivU64x64Remainder (MultU64x32 (TimeStamp, 1000), TicksPerSecond, NULL)); - SerialPortWrite ((UINT8 *) Buffer, CharCount); -} - -STATIC -EFI_STATUS -InsertSystemMemoryResources ( - LIST_ENTRY *ResourceList, - EFI_HOB_RESOURCE_DESCRIPTOR *ResHob - ) -{ - SYSTEM_MEMORY_RESOURCE *NewResource; - LIST_ENTRY *Link; - LIST_ENTRY *NextLink; - LIST_ENTRY AttachedResources; - SYSTEM_MEMORY_RESOURCE *Resource; - EFI_PHYSICAL_ADDRESS NewResourceEnd; - - if (IsListEmpty (ResourceList)) { - NewResource = AllocateZeroPool (sizeof (SYSTEM_MEMORY_RESOURCE)); - NewResource->PhysicalStart = ResHob->PhysicalStart; - NewResource->ResourceLength = ResHob->ResourceLength; - InsertTailList (ResourceList, &NewResource->Link); - return EFI_SUCCESS; - } - - InitializeListHead (&AttachedResources); - - Link = ResourceList->ForwardLink; - ASSERT (Link != NULL); - while (Link != ResourceList) { - Resource = (SYSTEM_MEMORY_RESOURCE*)Link; - - // Sanity Check. The resources should not overlapped. - ASSERT (!((ResHob->PhysicalStart >= Resource->PhysicalStart) && (ResHob->PhysicalStart < (Resource->PhysicalStart + Resource->ResourceLength)))); - ASSERT (!((ResHob->PhysicalStart + ResHob->ResourceLength - 1 >= Resource->PhysicalStart) && - ((ResHob->PhysicalStart + ResHob->ResourceLength - 1) < (Resource->PhysicalStart + Resource->ResourceLength)))); - - // The new resource is attached after this resource descriptor - if (ResHob->PhysicalStart == Resource->PhysicalStart + Resource->ResourceLength) { - Resource->ResourceLength = Resource->ResourceLength + ResHob->ResourceLength; - - NextLink = RemoveEntryList (&Resource->Link); - InsertTailList (&AttachedResources, &Resource->Link); - Link = NextLink; - } - // The new resource is attached before this resource descriptor - else if (ResHob->PhysicalStart + ResHob->ResourceLength == Resource->PhysicalStart) { - Resource->PhysicalStart = ResHob->PhysicalStart; - Resource->ResourceLength = Resource->ResourceLength + ResHob->ResourceLength; - - NextLink = RemoveEntryList (&Resource->Link); - InsertTailList (&AttachedResources, &Resource->Link); - Link = NextLink; - } else { - Link = Link->ForwardLink; - } - } - - if (!IsListEmpty (&AttachedResources)) { - // See if we can merge the attached resource with other resources - - NewResource = (SYSTEM_MEMORY_RESOURCE*)GetFirstNode (&AttachedResources); - Link = RemoveEntryList (&NewResource->Link); - while (!IsListEmpty (&AttachedResources)) { - // Merge resources - Resource = (SYSTEM_MEMORY_RESOURCE*)Link; - - // Ensure they overlap each other - ASSERT ( - ((NewResource->PhysicalStart >= Resource->PhysicalStart) && (NewResource->PhysicalStart < (Resource->PhysicalStart + Resource->ResourceLength))) || - (((NewResource->PhysicalStart + NewResource->ResourceLength) >= Resource->PhysicalStart) && ((NewResource->PhysicalStart + NewResource->ResourceLength) < (Resource->PhysicalStart + Resource->ResourceLength))) - ); - - NewResourceEnd = MAX (NewResource->PhysicalStart + NewResource->ResourceLength, Resource->PhysicalStart + Resource->ResourceLength); - NewResource->PhysicalStart = MIN (NewResource->PhysicalStart, Resource->PhysicalStart); - NewResource->ResourceLength = NewResourceEnd - NewResource->PhysicalStart; - - Link = RemoveEntryList (Link); - } - } else { - // None of the Resource of the list is attached to this ResHob. Create a new entry for it - NewResource = AllocateZeroPool (sizeof (SYSTEM_MEMORY_RESOURCE)); - NewResource->PhysicalStart = ResHob->PhysicalStart; - NewResource->ResourceLength = ResHob->ResourceLength; - } - InsertTailList (ResourceList, &NewResource->Link); - return EFI_SUCCESS; -} - -EFI_STATUS -GetSystemMemoryResources ( - IN LIST_ENTRY *ResourceList - ) -{ - EFI_HOB_RESOURCE_DESCRIPTOR *ResHob; - - InitializeListHead (ResourceList); - - // Find the first System Memory Resource Descriptor - ResHob = (EFI_HOB_RESOURCE_DESCRIPTOR *)GetFirstHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR); - while ((ResHob != NULL) && (ResHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY)) { - ResHob = (EFI_HOB_RESOURCE_DESCRIPTOR *)GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, (VOID *)((UINTN)ResHob + ResHob->Header.HobLength)); - } - - // Did not find any - if (ResHob == NULL) { - return EFI_NOT_FOUND; - } else { - InsertSystemMemoryResources (ResourceList, ResHob); - } - - ResHob = (EFI_HOB_RESOURCE_DESCRIPTOR *)GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, (VOID *)((UINTN)ResHob + ResHob->Header.HobLength)); - while (ResHob != NULL) { - if (ResHob->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) { - InsertSystemMemoryResources (ResourceList, ResHob); - } - ResHob = (EFI_HOB_RESOURCE_DESCRIPTOR *)GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, (VOID *)((UINTN)ResHob + ResHob->Header.HobLength)); - } - - return EFI_SUCCESS; -} diff --git a/Platforms/AMD/Styx/FdtBlob/styx-husky.dtb b/Platforms/AMD/Styx/FdtBlob/styx-husky.dtb deleted file mode 100644 index 3427c5aa66fff6e4916044203acb4fdc876d76c3..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001
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diff --git a/Platforms/AMD/Styx/FdtBlob/styx-husky.dts b/Platforms/AMD/Styx/FdtBlob/styx-husky.dts deleted file mode 100644 index a2af73f..0000000 --- a/Platforms/AMD/Styx/FdtBlob/styx-husky.dts +++ /dev/null @@ -1,435 +0,0 @@ -/* - * DTS file for AMD/Linaro 96Boards Enterprise Edition Server (Husky) Board - * Note: Based-on AMD Seattle Rev.B - * - * Copyright (C) 2015 Advanced Micro Devices, Inc. - */ - -/dts-v1/; - -/ { - model = "Linaro 96Boards Enterprise Edition Server (Husky) Board"; - compatible = "amd,seattle-overdrive", "amd,seattle"; - interrupt-parent = <0x1>; - #address-cells = <0x2>; - #size-cells = <0x2>; - - interrupt-controller@e1101000 { - compatible = "arm,gic-400", "arm,cortex-a15-gic"; - interrupt-controller; - #interrupt-cells = <0x3>; - #address-cells = <0x2>; - #size-cells = <0x2>; - reg = <0x0 0xe1110000 0x0 0x1000>, - <0x0 0xe112f000 0x0 0x2000>, - <0x0 0xe1140000 0x0 0x10000>, - <0x0 0xe1160000 0x0 0x10000>; - interrupts = <0x1 0x9 0xf04>; - ranges = <0x0 0x0 0x0 0xe1100000 0x0 0x100000>; - linux,phandle = <0x1>; - phandle = <0x1>; - - v2m@e0080000 { - compatible = "arm,gic-v2m-frame"; - msi-controller; - reg = <0x0 0x80000 0x0 0x1000>; - linux,phandle = <0x4>; - phandle = <0x4>; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x1 0xd 0xff04>, - <0x1 0xe 0xff04>, - <0x1 0xb 0xff04>, - <0x1 0xa 0xff04>; - }; - - pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <0x0 0x7 0x4>, - <0x0 0x8 0x4>, - <0x0 0x9 0x4>, - <0x0 0xa 0x4>, - <0x0 0xb 0x4>, - <0x0 0xc 0x4>, - <0x0 0xd 0x4>, - <0x0 0xe 0x4>; - }; - - smb { - compatible = "simple-bus"; - #address-cells = <0x2>; - #size-cells = <0x2>; - ranges; - /* - * dma-ranges is 40-bit address space containing: - * - GICv2m MSI register is at 0xe0080000 - * - DRAM range [0x8000000000 to 0xffffffffff] - */ - dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; - - clk100mhz_0 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <100000000>; - clock-output-names = "adl3clk_100mhz"; - }; - - clk375mhz { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <375000000>; - clock-output-names = "ccpclk_375mhz"; - }; - - clk333mhz { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <333000000>; - clock-output-names = "sataclk_333mhz"; - linux,phandle = <0x2>; - phandle = <0x2>; - }; - - clk500mhz_0 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <500000000>; - clock-output-names = "pcieclk_500mhz"; - }; - - clk500mhz_1 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <500000000>; - clock-output-names = "dmaclk_500mhz"; - }; - - clk250mhz_4 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "miscclk_250mhz"; - }; - - clk100mhz_1 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <100000000>; - clock-output-names = "uartspiclk_100mhz"; - linux,phandle = <0x3>; - phandle = <0x3>; - }; - - sata@e0300000 { - compatible = "snps,dwc-ahci"; - reg = <0x0 0xe0300000 0x0 0xf0000>; - interrupts = <0x0 0x163 0x4>; - clocks = <0x2>; - dma-coherent; - }; - - sata@e0d00000 { - status = "disabled"; - compatible = "snps,dwc-ahci"; - reg = <0x0 0xe0d00000 0x0 0xf0000>; - interrupts = <0x0 0x162 0x4>; - clocks = <0x2>; - dma-coherent; - }; - - i2c@e1000000 { - compatible = "snps,designware-i2c"; - reg = <0x0 0xe1000000 0x0 0x1000>; - interrupts = <0x0 0x165 0x4>; - clocks = <0x3>; - }; - - i2c@e0050000 { - compatible = "snps,designware-i2c"; - reg = <0x0 0xe0050000 0x0 0x1000>; - interrupts = <0x0 0x154 0x4>; - clocks = <0x3>; - }; - - serial@e1010000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0 0xe1010000 0x0 0x1000>; - interrupts = <0x0 0x148 0x4>; - clocks = <0x3 0x3>; - clock-names = "uartclk", "apb_pclk"; - }; - - ssp@e1020000 { - compatible = "arm,pl022", "arm,primecell"; - reg = <0x0 0xe1020000 0x0 0x1000>; - spi-controller; - interrupts = <0x0 0x14a 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - ssp@e1030000 { - compatible = "arm,pl022", "arm,primecell"; - reg = <0x0 0xe1030000 0x0 0x1000>; - spi-controller; - interrupts = <0x0 0x149 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - num-cs = <0x1>; - #address-cells = <0x1>; - #size-cells = <0x0>; - - sdcard@0 { - compatible = "mmc-spi-slot"; - reg = <0x0>; - spi-max-frequency = <20000000>; - voltage-ranges = <3200 3400>; - pl022,hierarchy = <0x0>; - pl022,interface = <0x0>; - pl022,com-mode = <0x0>; - pl022,rx-level-trig = <0x0>; - pl022,tx-level-trig = <0x0>; - }; - }; - - gpio@e1050000 { /* [0 : 7] */ - compatible = "arm,pl061", "arm,primecell"; - #gpio-cells = <0x2>; - reg = <0x0 0xe1050000 0x0 0x1000>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <0x2>; - interrupts = <0x0 0x166 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - gpio@e0020000 { /* [8 : 15] */ - status = "disabled"; - compatible = "arm,pl061", "arm,primecell"; - #gpio-cells = <0x2>; - reg = <0x0 0xe0020000 0x0 0x1000>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <0x2>; - interrupts = <0x0 0x16e 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - gpio@e0030000 { /* [16 : 23] */ - status = "disabled"; - compatible = "arm,pl061", "arm,primecell"; - #gpio-cells = <0x2>; - reg = <0x0 0xe0030000 0x0 0x1000>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <0x2>; - interrupts = <0x0 0x16d 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - gpio@e0080000 { /* [24] */ - compatible = "arm,pl061", "arm,primecell"; - #gpio-cells = <0x2>; - reg = <0x0 0xe0080000 0x0 0x1000>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <0x2>; - interrupts = <0x0 0x169 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - ccp: ccp@e0100000 { - compatible = "amd,ccp-seattle-v1a"; - reg = <0x0 0xe0100000 0x0 0x10000>; - interrupts = <0x0 0x3 0x4>; - dma-coherent; - amd,zlib-support = <0x1>; - }; - - pcie: pcie@f0000000 { - compatible = "pci-host-ecam-generic"; - #address-cells = <0x3>; - #size-cells = <0x2>; - #interrupt-cells = <0x1>; - device_type = "pci"; - bus-range = <0x0 0x7f>; - msi-parent = <0x4>; - reg = <0x0 0xf0000000 0x0 0x10000000>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = <0x1000 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x120 0x1>, - <0x1000 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x121 0x1>, - <0x1000 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x122 0x1>, - <0x1000 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x123 0x1>; - dma-coherent; - dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>; - ranges = <0x1000000 0x0 0x00000000 0x0 0xefff0000 0x00 0x00010000>, /* I/O Memory (size=64K) */ - <0x2000000 0x0 0x40000000 0x0 0x40000000 0x00 0x80000000>, /* 32-bit MMIO (size=2G) */ - <0x3000000 0x1 0x00000000 0x1 0x00000000 0x7f 0x00000000>; /* 64-bit MMIO (size= 124G) */ - }; - - ccn@0xe8000000 { - compatible = "arm,ccn-504"; - reg = <0x0 0xe8000000 0x0 0x1000000>; - interrupts = <0x0 0x17c 0x4>; - }; - - gwdt@e0bb0000 { - status = "disabled"; - compatible = "arm,sbsa-gwdt"; - reg = <0x0 0xe0bb0000 0x0 0x10000 - 0x0 0xe0bc0000 0x0 0x10000>; - reg-names = "refresh", "control"; - interrupts = <0x0 0x151 0x4>; - interrupt-names = "ws0"; - }; - - kcs@e0010000 { - status = "disabled"; - compatible = "ipmi-kcs"; - device_type = "ipmi"; - reg = <0x0 0xe0010000 0 0x8>; - interrupts = <0 389 4>; - interrupt-names = "ipmi_kcs"; - reg-size = <1>; - reg-spacing = <4>; - }; - - clk250mhz_0 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "xgmacclk0_dma_250mhz"; - linux,phandle = <0x5>; - phandle = <0x5>; - }; - - clk250mhz_1 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "xgmacclk0_ptp_250mhz"; - linux,phandle = <0x6>; - phandle = <0x6>; - }; - - clk250mhz_2 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "xgmacclk1_dma_250mhz"; - linux,phandle = <0x7>; - phandle = <0x7>; - }; - - clk250mhz_3 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "xgmacclk1_ptp_250mhz"; - linux,phandle = <0x8>; - phandle = <0x8>; - }; - - phy@e1240800 { - status = "disabled"; - compatible = "amd,xgbe-phy-seattle-v1a"; - reg = <0x0 0xe1240800 0x0 0x0400>, /* SERDES RX/TX0 */ - <0x0 0xe1250000 0x0 0x0060>, /* SERDES IR 1/2 */ - <0x0 0xe12500f8 0x0 0x0004>; /* SERDES IR 2/2 */ - interrupts = <0x0 0x143 0x4>; - amd,speed-set = <0x0>; - amd,serdes-blwc = <0x1 0x1 0x0>; - amd,serdes-cdr-rate = <0x2 0x2 0x7>; - amd,serdes-pq-skew = <0xa 0xa 0x12>; - amd,serdes-tx-amp = <0xf 0xf 0xa>; - amd,serdes-dfe-tap-config = <0x3 0x3 0x1>; - amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>; - linux,phandle = <0x9>; - phandle = <0x9>; - }; - - phy@e1240c00 { - status = "disabled"; - compatible = "amd,xgbe-phy-seattle-v1a"; - reg = <0x0 0xe1240c00 0x0 0x0400>, /* SERDES RX/TX0 */ - <0x0 0xe1250080 0x0 0x0060>, /* SERDES IR 1/2 */ - <0x0 0xe12500fc 0x0 0x0004>; /* SERDES IR 2/2 */ - interrupts = <0x0 0x142 0x4>; - amd,speed-set = <0x0>; - amd,serdes-blwc = <0x1 0x1 0x0>; - amd,serdes-cdr-rate = <0x2 0x2 0x7>; - amd,serdes-pq-skew = <0xa 0xa 0x12>; - amd,serdes-tx-amp = <0xf 0xf 0xa>; - amd,serdes-dfe-tap-config = <0x3 0x3 0x1>; - amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>; - linux,phandle = <0xa>; - phandle = <0xa>; - }; - - xgmac@e0700000 { - status = "disabled"; - compatible = "amd,xgbe-seattle-v1a"; - reg = <0x0 0xe0700000 0x0 0x80000 0x0 0xe0780000 0x0 0x80000>; - interrupts = <0x0 0x145 0x4>, - <0x0 0x15a 0x1>, - <0x0 0x15b 0x1>, - <0x0 0x15c 0x1>, - <0x0 0x15d 0x1>; - amd,per-channel-interrupt; - mac-address = [02 a1 a2 a3 a4 a5]; - clocks = <0x5 0x6>; - clock-names = "dma_clk", "ptp_clk"; - phy-handle = <0x9>; - phy-mode = "xgmii"; - #stream-id-cells = <0x18>; - dma-coherent; - linux,phandle = <0xb>; - phandle = <0xb>; - }; - - xgmac@e0900000 { - status = "disabled"; - compatible = "amd,xgbe-seattle-v1a"; - reg = <0x0 0xe0900000 0x0 0x80000 0x0 0xe0980000 0x0 0x80000>; - interrupts = <0x0 0x144 0x4>, - <0x0 0x155 0x1>, - <0x0 0x156 0x1>, - <0x0 0x157 0x1>, - <0x0 0x158 0x1>; - amd,per-channel-interrupt; - mac-address = [02 b1 b2 b3 b4 b5]; - clocks = <0x7 0x8>; - clock-names = "dma_clk", "ptp_clk"; - phy-handle = <0xa>; - phy-mode = "xgmii"; - #stream-id-cells = <0x18>; - dma-coherent; - linux,phandle = <0xc>; - phandle = <0xc>; - }; - }; - - chosen { - stdout-path = "/smb/serial@e1010000"; - /* Note: - * Linux support for pci-probe-only DT is not - * stable. Disable this for now and let Linux - * take care of the resource assignment. - */ - // linux,pci-probe-only; - }; - - psci { - compatible = "arm,psci-0.2", "arm,psci"; - method = "smc"; - }; -}; - - diff --git a/Platforms/AMD/Styx/FdtBlob/styx-overdrive.dtb b/Platforms/AMD/Styx/FdtBlob/styx-overdrive.dtb deleted file mode 100644 index 0c0468d89d60faf6c461b0e2e1c67098b063c7a9..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001
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diff --git a/Platforms/AMD/Styx/FdtBlob/styx-overdrive.dts b/Platforms/AMD/Styx/FdtBlob/styx-overdrive.dts deleted file mode 100644 index e1a3a98..0000000 --- a/Platforms/AMD/Styx/FdtBlob/styx-overdrive.dts +++ /dev/null @@ -1,435 +0,0 @@ -/* - * DTS file for AMD Seattle (RevB) Overdrive Development Board - * Note: Based-on AMD Seattle Rev.B - * - * Copyright (C) 2015 Advanced Micro Devices, Inc. - */ - -/dts-v1/; - -/ { - model = "AMD Seattle (Rev.B) Development Board (Overdrive)"; - compatible = "amd,seattle-overdrive", "amd,seattle"; - interrupt-parent = <0x1>; - #address-cells = <0x2>; - #size-cells = <0x2>; - - interrupt-controller@e1101000 { - compatible = "arm,gic-400", "arm,cortex-a15-gic"; - interrupt-controller; - #interrupt-cells = <0x3>; - #address-cells = <0x2>; - #size-cells = <0x2>; - reg = <0x0 0xe1110000 0x0 0x1000>, - <0x0 0xe112f000 0x0 0x2000>, - <0x0 0xe1140000 0x0 0x10000>, - <0x0 0xe1160000 0x0 0x10000>; - interrupts = <0x1 0x9 0xf04>; - ranges = <0x0 0x0 0x0 0xe1100000 0x0 0x100000>; - linux,phandle = <0x1>; - phandle = <0x1>; - - v2m@e0080000 { - compatible = "arm,gic-v2m-frame"; - msi-controller; - reg = <0x0 0x80000 0x0 0x1000>; - linux,phandle = <0x4>; - phandle = <0x4>; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x1 0xd 0xff04>, - <0x1 0xe 0xff04>, - <0x1 0xb 0xff04>, - <0x1 0xa 0xff04>; - }; - - pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <0x0 0x7 0x4>, - <0x0 0x8 0x4>, - <0x0 0x9 0x4>, - <0x0 0xa 0x4>, - <0x0 0xb 0x4>, - <0x0 0xc 0x4>, - <0x0 0xd 0x4>, - <0x0 0xe 0x4>; - }; - - smb { - compatible = "simple-bus"; - #address-cells = <0x2>; - #size-cells = <0x2>; - ranges; - /* - * dma-ranges is 40-bit address space containing: - * - GICv2m MSI register is at 0xe0080000 - * - DRAM range [0x8000000000 to 0xffffffffff] - */ - dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; - - clk100mhz_0 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <100000000>; - clock-output-names = "adl3clk_100mhz"; - }; - - clk375mhz { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <375000000>; - clock-output-names = "ccpclk_375mhz"; - }; - - clk333mhz { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <333000000>; - clock-output-names = "sataclk_333mhz"; - linux,phandle = <0x2>; - phandle = <0x2>; - }; - - clk500mhz_0 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <500000000>; - clock-output-names = "pcieclk_500mhz"; - }; - - clk500mhz_1 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <500000000>; - clock-output-names = "dmaclk_500mhz"; - }; - - clk250mhz_4 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "miscclk_250mhz"; - }; - - clk100mhz_1 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <100000000>; - clock-output-names = "uartspiclk_100mhz"; - linux,phandle = <0x3>; - phandle = <0x3>; - }; - - sata@e0300000 { - compatible = "snps,dwc-ahci"; - reg = <0x0 0xe0300000 0x0 0xf0000>; - interrupts = <0x0 0x163 0x4>; - clocks = <0x2>; - dma-coherent; - }; - - sata@e0d00000 { - status = "disabled"; - compatible = "snps,dwc-ahci"; - reg = <0x0 0xe0d00000 0x0 0xf0000>; - interrupts = <0x0 0x162 0x4>; - clocks = <0x2>; - dma-coherent; - }; - - i2c@e1000000 { - compatible = "snps,designware-i2c"; - reg = <0x0 0xe1000000 0x0 0x1000>; - interrupts = <0x0 0x165 0x4>; - clocks = <0x3>; - }; - - i2c@e0050000 { - compatible = "snps,designware-i2c"; - reg = <0x0 0xe0050000 0x0 0x1000>; - interrupts = <0x0 0x154 0x4>; - clocks = <0x3>; - }; - - serial@e1010000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0 0xe1010000 0x0 0x1000>; - interrupts = <0x0 0x148 0x4>; - clocks = <0x3 0x3>; - clock-names = "uartclk", "apb_pclk"; - }; - - ssp@e1020000 { - compatible = "arm,pl022", "arm,primecell"; - reg = <0x0 0xe1020000 0x0 0x1000>; - spi-controller; - interrupts = <0x0 0x14a 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - ssp@e1030000 { - compatible = "arm,pl022", "arm,primecell"; - reg = <0x0 0xe1030000 0x0 0x1000>; - spi-controller; - interrupts = <0x0 0x149 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - num-cs = <0x1>; - #address-cells = <0x1>; - #size-cells = <0x0>; - - sdcard@0 { - compatible = "mmc-spi-slot"; - reg = <0x0>; - spi-max-frequency = <20000000>; - voltage-ranges = <3200 3400>; - pl022,hierarchy = <0x0>; - pl022,interface = <0x0>; - pl022,com-mode = <0x0>; - pl022,rx-level-trig = <0x0>; - pl022,tx-level-trig = <0x0>; - }; - }; - - gpio@e1050000 { /* [0 : 7] */ - compatible = "arm,pl061", "arm,primecell"; - #gpio-cells = <0x2>; - reg = <0x0 0xe1050000 0x0 0x1000>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <0x2>; - interrupts = <0x0 0x166 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - gpio@e0020000 { /* [8 : 15] */ - status = "disabled"; - compatible = "arm,pl061", "arm,primecell"; - #gpio-cells = <0x2>; - reg = <0x0 0xe0020000 0x0 0x1000>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <0x2>; - interrupts = <0x0 0x16e 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - gpio@e0030000 { /* [16 : 23] */ - status = "disabled"; - compatible = "arm,pl061", "arm,primecell"; - #gpio-cells = <0x2>; - reg = <0x0 0xe0030000 0x0 0x1000>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <0x2>; - interrupts = <0x0 0x16d 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - gpio@e0080000 { /* [24] */ - compatible = "arm,pl061", "arm,primecell"; - #gpio-cells = <0x2>; - reg = <0x0 0xe0080000 0x0 0x1000>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <0x2>; - interrupts = <0x0 0x169 0x4>; - clocks = <0x3>; - clock-names = "apb_pclk"; - }; - - ccp: ccp@e0100000 { - compatible = "amd,ccp-seattle-v1a"; - reg = <0x0 0xe0100000 0x0 0x10000>; - interrupts = <0x0 0x3 0x4>; - dma-coherent; - amd,zlib-support = <0x1>; - }; - - pcie: pcie@f0000000 { - compatible = "pci-host-ecam-generic"; - #address-cells = <0x3>; - #size-cells = <0x2>; - #interrupt-cells = <0x1>; - device_type = "pci"; - bus-range = <0x0 0x7f>; - msi-parent = <0x4>; - reg = <0x0 0xf0000000 0x0 0x10000000>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = <0x1000 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x120 0x1>, - <0x1000 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x121 0x1>, - <0x1000 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x122 0x1>, - <0x1000 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x123 0x1>; - dma-coherent; - dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>; - ranges = <0x1000000 0x0 0x00000000 0x0 0xefff0000 0x00 0x00010000>, /* I/O Memory (size=64K) */ - <0x2000000 0x0 0x40000000 0x0 0x40000000 0x00 0x80000000>, /* 32-bit MMIO (size=2G) */ - <0x3000000 0x1 0x00000000 0x1 0x00000000 0x7f 0x00000000>; /* 64-bit MMIO (size= 124G) */ - }; - - ccn@0xe8000000 { - compatible = "arm,ccn-504"; - reg = <0x0 0xe8000000 0x0 0x1000000>; - interrupts = <0x0 0x17c 0x4>; - }; - - gwdt@e0bb0000 { - status = "disabled"; - compatible = "arm,sbsa-gwdt"; - reg = <0x0 0xe0bb0000 0x0 0x10000 - 0x0 0xe0bc0000 0x0 0x10000>; - reg-names = "refresh", "control"; - interrupts = <0x0 0x151 0x4>; - interrupt-names = "ws0"; - }; - - kcs@e0010000 { - status = "disabled"; - compatible = "ipmi-kcs"; - device_type = "ipmi"; - reg = <0x0 0xe0010000 0 0x8>; - interrupts = <0 389 4>; - interrupt-names = "ipmi_kcs"; - reg-size = <1>; - reg-spacing = <4>; - }; - - clk250mhz_0 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "xgmacclk0_dma_250mhz"; - linux,phandle = <0x5>; - phandle = <0x5>; - }; - - clk250mhz_1 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "xgmacclk0_ptp_250mhz"; - linux,phandle = <0x6>; - phandle = <0x6>; - }; - - clk250mhz_2 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "xgmacclk1_dma_250mhz"; - linux,phandle = <0x7>; - phandle = <0x7>; - }; - - clk250mhz_3 { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <250000000>; - clock-output-names = "xgmacclk1_ptp_250mhz"; - linux,phandle = <0x8>; - phandle = <0x8>; - }; - - phy@e1240800 { - status = "disabled"; - compatible = "amd,xgbe-phy-seattle-v1a"; - reg = <0x0 0xe1240800 0x0 0x0400>, /* SERDES RX/TX0 */ - <0x0 0xe1250000 0x0 0x0060>, /* SERDES IR 1/2 */ - <0x0 0xe12500f8 0x0 0x0004>; /* SERDES IR 2/2 */ - interrupts = <0x0 0x143 0x4>; - amd,speed-set = <0x0>; - amd,serdes-blwc = <0x1 0x1 0x0>; - amd,serdes-cdr-rate = <0x2 0x2 0x7>; - amd,serdes-pq-skew = <0xa 0xa 0x12>; - amd,serdes-tx-amp = <0xf 0xf 0xa>; - amd,serdes-dfe-tap-config = <0x3 0x3 0x1>; - amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>; - linux,phandle = <0x9>; - phandle = <0x9>; - }; - - phy@e1240c00 { - status = "disabled"; - compatible = "amd,xgbe-phy-seattle-v1a"; - reg = <0x0 0xe1240c00 0x0 0x0400>, /* SERDES RX/TX0 */ - <0x0 0xe1250080 0x0 0x0060>, /* SERDES IR 1/2 */ - <0x0 0xe12500fc 0x0 0x0004>; /* SERDES IR 2/2 */ - interrupts = <0x0 0x142 0x4>; - amd,speed-set = <0x0>; - amd,serdes-blwc = <0x1 0x1 0x0>; - amd,serdes-cdr-rate = <0x2 0x2 0x7>; - amd,serdes-pq-skew = <0xa 0xa 0x12>; - amd,serdes-tx-amp = <0xf 0xf 0xa>; - amd,serdes-dfe-tap-config = <0x3 0x3 0x1>; - amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>; - linux,phandle = <0xa>; - phandle = <0xa>; - }; - - xgmac@e0700000 { - status = "disabled"; - compatible = "amd,xgbe-seattle-v1a"; - reg = <0x0 0xe0700000 0x0 0x80000 0x0 0xe0780000 0x0 0x80000>; - interrupts = <0x0 0x145 0x4>, - <0x0 0x15a 0x1>, - <0x0 0x15b 0x1>, - <0x0 0x15c 0x1>, - <0x0 0x15d 0x1>; - amd,per-channel-interrupt; - mac-address = [02 a1 a2 a3 a4 a5]; - clocks = <0x5 0x6>; - clock-names = "dma_clk", "ptp_clk"; - phy-handle = <0x9>; - phy-mode = "xgmii"; - #stream-id-cells = <0x18>; - dma-coherent; - linux,phandle = <0xb>; - phandle = <0xb>; - }; - - xgmac@e0900000 { - status = "disabled"; - compatible = "amd,xgbe-seattle-v1a"; - reg = <0x0 0xe0900000 0x0 0x80000 0x0 0xe0980000 0x0 0x80000>; - interrupts = <0x0 0x144 0x4>, - <0x0 0x155 0x1>, - <0x0 0x156 0x1>, - <0x0 0x157 0x1>, - <0x0 0x158 0x1>; - amd,per-channel-interrupt; - mac-address = [02 b1 b2 b3 b4 b5]; - clocks = <0x7 0x8>; - clock-names = "dma_clk", "ptp_clk"; - phy-handle = <0xa>; - phy-mode = "xgmii"; - #stream-id-cells = <0x18>; - dma-coherent; - linux,phandle = <0xc>; - phandle = <0xc>; - }; - }; - - chosen { - stdout-path = "/smb/serial@e1010000"; - /* Note: - * Linux support for pci-probe-only DT is not - * stable. Disable this for now and let Linux - * take care of the resource assignment. - */ - // linux,pci-probe-only; - }; - - psci { - compatible = "arm,psci-0.2", "arm,psci"; - method = "smc"; - }; -}; - - diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dtb b/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dtb new file mode 100644 index 0000000000000000000000000000000000000000..3427c5aa66fff6e4916044203acb4fdc876d76c3 GIT binary patch literal 8093 zcmdT}U5F(|74DujqcLWatQr&|x$Z=WFzw!%*-18_I3zAa5yTiZ#Gl!|)iw7vbNk*- zSKs+r1@}dL4T8ZJ!9;yk%<7Y}`kIG80t)eM=D|N$F)x82;`)83s`}RS?(EJ__Q3<y zea@*<=bSoq>Zhw;yZgWYjG_mB97WN&D0<*|ydOrn59MAIz=^xTf5zf_p0T4&;ElFX z^!a?0R^!fNk32q3tITxHk7`|&Rc>_We3sYwc+~llt~PYldHBhRS>OJ6M+DiFI!>d^ zrbRYybXwO#os1!xRr!XF0xqSk{JZd`pY((6NmIv6Krc8t&gn}vDeFXyM|CwG4t2Gn z7Z$n;-EJ2`0P1)UWj3vf`F^gFv#24i##ODil5}A?0h^*C%lD@oPTNm8{8qlOeg#D| z?Xm{~Hr%_X-gI<F-n$=gq>J|M{d;KYdLK$3g%Wp0(LMBq{12g2C=Kko5p^R=8Om;> zgfaY%qvMUmVnuhm=MW(mBGG#a^-YW*ldM%~p}_=DC*k`j#A#8XMA3WXiHA55+V=kP zP1}5P3|ZnjFSP4~*C)0yE*s~Prj~W|(Z>NfdyRV7uag0OSAf6Q;bNyOCJ=3W4s4)i zW69TD074stccah-fxYuM#-PDrqrqXj!8vAL9=<j>d=*@LGDQ!h_{6reCND}%i{8YL zEqv-YjY4@JQ=jvs2@D@`=EDmpEpUm2SgGMUW<xQ!xGKZVHuQ6LE#J~vqK0F&&bHpp zizEP^{>2?{?RxqiAXn0CxCEW6Rw=9On1Z+T=rZgGOWGgG&i&8c^#?SiUB>H*QYFoV zIwgLzv$S+{JMaH<vf}JWe@t4ZVrZ(=_nmVn90TStY46AKapL-sS7mn5miSSsT+<J$ z6x{3VFa-`D*T9a%H7lgMftjX1i_4NHXOCp(<X>OD<ouKV6uD9Ck5x*QjUAVdN9#|J zk6g2^Owy`0WlmE;N;dh+F=UMWm~sq>%NTO(u^29KEtJ_|>lmk5Gb+t|wyBbIpmHz( zY{!L8k=St!Wb|yEU$apgQ-<@HZTNm2#pe>x=nY55&WEh!1J|3sWVuOuL!Ge!fVvLm z+iN0kGwXWadZ;~+Z~3Cab}F9v-qHu|UM@b`<o(fRTImF`G|KuWMzV5{JKZ0`7;yr$ z{a||;8?oK(B2WF$i0%X1-noNz33Nx=hPIyuZ(rL+S9v;Q*QN8mJ=a><L&{-yVL?t2 zI0zM5>EY1JO#9v}!8f%3WMH5B4D*A1_vJp|SDD*L>?kdJt6UAiBiP(EB^_LB#V7P} zaq(6@Qj<XABdNDh=tmf@&w;*CyeP+9y?PTLWqv`1K>5S@$QA;(^zpM0JB*Li4EdOQ zK1a*ZviF9xEL4;+nZg-(r3;)udG7PGMWGU`L5UfTYgPcfE@eqi$0y^3#Mfio;|{`n z32K-Ru1$OfIKk7Owq!$pp+$eQMZ2Sw<cZ`;zs$!>mS8ebcQ_7@?32%o&-WlpJ#524 zP$<#v_45nd_y>4Uj?g|wdmUk3twHWEV;1zM8zw((?zd(htDifxC=lk~q5C<4iX-<k zm_WC$pMKP)>m^)1bU%yZ^fUM<p*P1HH?FDz#~QaBDh@qvN?~obdq=od$lk@TUeqW4 zdw63ZrI+k)Gq-lcWpL~s!n$D2_;sL}XK%RnoU1RnRx(d`rd(OG`?qt1y7;v@i@Ibm zHg%#^S|oiv!k(v40iX=~eA?lj<~m5do_-2=uujI8p%W~r=i2sr5&(bZqJOV|_VH}` z`=*H5005<a)Wv_aTal}@-)5})3F`jVNZV@qVWVYfk{v!;auOHt1BgEgqAf=|ZGDVK zTaJBc%gs3+brAgcJOKQKCxq30G%DDJXOpVoIMIJya|kNf3Brmzr|(Okol)Q1zc~g3 z>AzB=mF||7>E=#XY{ndu^9|~g<?dO^li!Tf-^l?urM`{(c8<S|D#k->^f$8_lc3j| z9#AO1-x@9FTHec;o=FonhA@C_Iw%Sy+W9S?0O!EY?=0zP$}(@>s`Of=%^-5OLKI?M zFo)tVg7$fccYJNrbSWpkuPehllIHLSKHKl-JNdJDS>y>C0w+)&J7j#BeBoGL6U!Yx zGWMRK?caCN#`_2T@ippM-K!t<GyK+~CblQdHIwb^I1ks|H=Xp&+c@yIfACHBLFl}) z)yKyp&Y|5^d_{&|c8z_xcjC#w`6F|mbju$(QoV!zly$kkKeH`=NVoi11WSCDIdIUs zk^SPcaP#=^ycx!abjzRSZt5NK=ce)DP8s?`TKp*o+c-8Zp5<*Jcm&GrHxE9HI=SoJ z>i2Yl#_dhcwWltH674=jQv{|g=#R;Zj|+T&ew%Lq1!y~*!%qZ!=Ke#V2~KW?gUY$# zXPW0f4j%i*;>QAdXTAcOcY7?SP`o_nFXtHx>pcHk4kzvBAoctZw1;5tlexjzQJ(!_ z9qGNXR<|qG3>|@{CAOCYiJ}X9Bi8?MGzDBA{k>?+n0Y?l{}-|LV@1CiYtj;HS;w%# zKPpEfaBYA0%WJNE)4XmS++5oZ-U=n!DftAr)ZW>$q@x+vPonre^E`0+2Z*2LL(nMx zT7Z8&z`x;e>H*CB5)a~7(`H_odGV#6{_N-E3y&VWj>7fVuYvahzsl8{*9lw|+_eIA za9sa{x6e`P+(E4J987?h`3G?BGtP(Re8Yb5zK!?VPFCVhdQaRRyB%?V9##lG?mx2R zK5_pHYJJ?l4BW?^Yk<eU8sN`3-1WH?_g}qy`PaXJ#NN1bZJ{@8bC9_Ed_8L1Il;rY zlV;o{_6mo6&96`^gPflE_Zj?*ICF!`F5jj!$_>5fmG1_g(a2A_pK#YpjgYf_V%8Lj zcD(I7i*crhIE@u$TIaaXjHW;CO57ce>S!*_G91}V!n-sR&6)h7cKB3w`jao33%Jsv z(*3Dc6IJP`uT3<}N0Y7ja*&QPSS?H*{3wht3lb+cC;vg5L5t%A`P@X0)OKX)@uV&% zbuz+VF=JUqG^p`FOBYO?*7%8IrL7q6gaW5WlOn+Zk=!EP!XGwoVPib3)4ulJ;CgX! zaek2NDy`IDJF>L&cr8`h(FkY4z&f(pN``tv50kpe`;J%d;mz?H$o0{p%}-PL7khD- z_YyNHOZ*v)GQE*2y;^UVI>Nsx>zYK+jo5SminK(3%=$F`Aj=3N;-WPbwP9fm2UtW* znW}u$w||36jek-`*Y4kNm1&dohMOv+RaU{9+W$Wmnew^Btn1BC41G_FGUQ}yI;r6+ zMq~{kvcI3Dxv$Y9Ubjn4sjEaGZ$^k{<9~$XZ{jjF;`zoU7Eu|BIa5~}pVK-1tVvp$ SIz!?l$ooN5=z1{DqW=NKelU9g
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diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dts b/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dts new file mode 100644 index 0000000..a2af73f --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-husky.dts @@ -0,0 +1,435 @@ +/* + * DTS file for AMD/Linaro 96Boards Enterprise Edition Server (Husky) Board + * Note: Based-on AMD Seattle Rev.B + * + * Copyright (C) 2015 Advanced Micro Devices, Inc. + */ + +/dts-v1/; + +/ { + model = "Linaro 96Boards Enterprise Edition Server (Husky) Board"; + compatible = "amd,seattle-overdrive", "amd,seattle"; + interrupt-parent = <0x1>; + #address-cells = <0x2>; + #size-cells = <0x2>; + + interrupt-controller@e1101000 { + compatible = "arm,gic-400", "arm,cortex-a15-gic"; + interrupt-controller; + #interrupt-cells = <0x3>; + #address-cells = <0x2>; + #size-cells = <0x2>; + reg = <0x0 0xe1110000 0x0 0x1000>, + <0x0 0xe112f000 0x0 0x2000>, + <0x0 0xe1140000 0x0 0x10000>, + <0x0 0xe1160000 0x0 0x10000>; + interrupts = <0x1 0x9 0xf04>; + ranges = <0x0 0x0 0x0 0xe1100000 0x0 0x100000>; + linux,phandle = <0x1>; + phandle = <0x1>; + + v2m@e0080000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x80000 0x0 0x1000>; + linux,phandle = <0x4>; + phandle = <0x4>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <0x1 0xd 0xff04>, + <0x1 0xe 0xff04>, + <0x1 0xb 0xff04>, + <0x1 0xa 0xff04>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0x0 0x7 0x4>, + <0x0 0x8 0x4>, + <0x0 0x9 0x4>, + <0x0 0xa 0x4>, + <0x0 0xb 0x4>, + <0x0 0xc 0x4>, + <0x0 0xd 0x4>, + <0x0 0xe 0x4>; + }; + + smb { + compatible = "simple-bus"; + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + /* + * dma-ranges is 40-bit address space containing: + * - GICv2m MSI register is at 0xe0080000 + * - DRAM range [0x8000000000 to 0xffffffffff] + */ + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; + + clk100mhz_0 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <100000000>; + clock-output-names = "adl3clk_100mhz"; + }; + + clk375mhz { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <375000000>; + clock-output-names = "ccpclk_375mhz"; + }; + + clk333mhz { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <333000000>; + clock-output-names = "sataclk_333mhz"; + linux,phandle = <0x2>; + phandle = <0x2>; + }; + + clk500mhz_0 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <500000000>; + clock-output-names = "pcieclk_500mhz"; + }; + + clk500mhz_1 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <500000000>; + clock-output-names = "dmaclk_500mhz"; + }; + + clk250mhz_4 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "miscclk_250mhz"; + }; + + clk100mhz_1 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <100000000>; + clock-output-names = "uartspiclk_100mhz"; + linux,phandle = <0x3>; + phandle = <0x3>; + }; + + sata@e0300000 { + compatible = "snps,dwc-ahci"; + reg = <0x0 0xe0300000 0x0 0xf0000>; + interrupts = <0x0 0x163 0x4>; + clocks = <0x2>; + dma-coherent; + }; + + sata@e0d00000 { + status = "disabled"; + compatible = "snps,dwc-ahci"; + reg = <0x0 0xe0d00000 0x0 0xf0000>; + interrupts = <0x0 0x162 0x4>; + clocks = <0x2>; + dma-coherent; + }; + + i2c@e1000000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xe1000000 0x0 0x1000>; + interrupts = <0x0 0x165 0x4>; + clocks = <0x3>; + }; + + i2c@e0050000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xe0050000 0x0 0x1000>; + interrupts = <0x0 0x154 0x4>; + clocks = <0x3>; + }; + + serial@e1010000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xe1010000 0x0 0x1000>; + interrupts = <0x0 0x148 0x4>; + clocks = <0x3 0x3>; + clock-names = "uartclk", "apb_pclk"; + }; + + ssp@e1020000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x0 0xe1020000 0x0 0x1000>; + spi-controller; + interrupts = <0x0 0x14a 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + ssp@e1030000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x0 0xe1030000 0x0 0x1000>; + spi-controller; + interrupts = <0x0 0x149 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + num-cs = <0x1>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + sdcard@0 { + compatible = "mmc-spi-slot"; + reg = <0x0>; + spi-max-frequency = <20000000>; + voltage-ranges = <3200 3400>; + pl022,hierarchy = <0x0>; + pl022,interface = <0x0>; + pl022,com-mode = <0x0>; + pl022,rx-level-trig = <0x0>; + pl022,tx-level-trig = <0x0>; + }; + }; + + gpio@e1050000 { /* [0 : 7] */ + compatible = "arm,pl061", "arm,primecell"; + #gpio-cells = <0x2>; + reg = <0x0 0xe1050000 0x0 0x1000>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <0x2>; + interrupts = <0x0 0x166 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + gpio@e0020000 { /* [8 : 15] */ + status = "disabled"; + compatible = "arm,pl061", "arm,primecell"; + #gpio-cells = <0x2>; + reg = <0x0 0xe0020000 0x0 0x1000>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <0x2>; + interrupts = <0x0 0x16e 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + gpio@e0030000 { /* [16 : 23] */ + status = "disabled"; + compatible = "arm,pl061", "arm,primecell"; + #gpio-cells = <0x2>; + reg = <0x0 0xe0030000 0x0 0x1000>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <0x2>; + interrupts = <0x0 0x16d 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + gpio@e0080000 { /* [24] */ + compatible = "arm,pl061", "arm,primecell"; + #gpio-cells = <0x2>; + reg = <0x0 0xe0080000 0x0 0x1000>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <0x2>; + interrupts = <0x0 0x169 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + ccp: ccp@e0100000 { + compatible = "amd,ccp-seattle-v1a"; + reg = <0x0 0xe0100000 0x0 0x10000>; + interrupts = <0x0 0x3 0x4>; + dma-coherent; + amd,zlib-support = <0x1>; + }; + + pcie: pcie@f0000000 { + compatible = "pci-host-ecam-generic"; + #address-cells = <0x3>; + #size-cells = <0x2>; + #interrupt-cells = <0x1>; + device_type = "pci"; + bus-range = <0x0 0x7f>; + msi-parent = <0x4>; + reg = <0x0 0xf0000000 0x0 0x10000000>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = <0x1000 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x120 0x1>, + <0x1000 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x121 0x1>, + <0x1000 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x122 0x1>, + <0x1000 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x123 0x1>; + dma-coherent; + dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>; + ranges = <0x1000000 0x0 0x00000000 0x0 0xefff0000 0x00 0x00010000>, /* I/O Memory (size=64K) */ + <0x2000000 0x0 0x40000000 0x0 0x40000000 0x00 0x80000000>, /* 32-bit MMIO (size=2G) */ + <0x3000000 0x1 0x00000000 0x1 0x00000000 0x7f 0x00000000>; /* 64-bit MMIO (size= 124G) */ + }; + + ccn@0xe8000000 { + compatible = "arm,ccn-504"; + reg = <0x0 0xe8000000 0x0 0x1000000>; + interrupts = <0x0 0x17c 0x4>; + }; + + gwdt@e0bb0000 { + status = "disabled"; + compatible = "arm,sbsa-gwdt"; + reg = <0x0 0xe0bb0000 0x0 0x10000 + 0x0 0xe0bc0000 0x0 0x10000>; + reg-names = "refresh", "control"; + interrupts = <0x0 0x151 0x4>; + interrupt-names = "ws0"; + }; + + kcs@e0010000 { + status = "disabled"; + compatible = "ipmi-kcs"; + device_type = "ipmi"; + reg = <0x0 0xe0010000 0 0x8>; + interrupts = <0 389 4>; + interrupt-names = "ipmi_kcs"; + reg-size = <1>; + reg-spacing = <4>; + }; + + clk250mhz_0 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk0_dma_250mhz"; + linux,phandle = <0x5>; + phandle = <0x5>; + }; + + clk250mhz_1 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk0_ptp_250mhz"; + linux,phandle = <0x6>; + phandle = <0x6>; + }; + + clk250mhz_2 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk1_dma_250mhz"; + linux,phandle = <0x7>; + phandle = <0x7>; + }; + + clk250mhz_3 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk1_ptp_250mhz"; + linux,phandle = <0x8>; + phandle = <0x8>; + }; + + phy@e1240800 { + status = "disabled"; + compatible = "amd,xgbe-phy-seattle-v1a"; + reg = <0x0 0xe1240800 0x0 0x0400>, /* SERDES RX/TX0 */ + <0x0 0xe1250000 0x0 0x0060>, /* SERDES IR 1/2 */ + <0x0 0xe12500f8 0x0 0x0004>; /* SERDES IR 2/2 */ + interrupts = <0x0 0x143 0x4>; + amd,speed-set = <0x0>; + amd,serdes-blwc = <0x1 0x1 0x0>; + amd,serdes-cdr-rate = <0x2 0x2 0x7>; + amd,serdes-pq-skew = <0xa 0xa 0x12>; + amd,serdes-tx-amp = <0xf 0xf 0xa>; + amd,serdes-dfe-tap-config = <0x3 0x3 0x1>; + amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>; + linux,phandle = <0x9>; + phandle = <0x9>; + }; + + phy@e1240c00 { + status = "disabled"; + compatible = "amd,xgbe-phy-seattle-v1a"; + reg = <0x0 0xe1240c00 0x0 0x0400>, /* SERDES RX/TX0 */ + <0x0 0xe1250080 0x0 0x0060>, /* SERDES IR 1/2 */ + <0x0 0xe12500fc 0x0 0x0004>; /* SERDES IR 2/2 */ + interrupts = <0x0 0x142 0x4>; + amd,speed-set = <0x0>; + amd,serdes-blwc = <0x1 0x1 0x0>; + amd,serdes-cdr-rate = <0x2 0x2 0x7>; + amd,serdes-pq-skew = <0xa 0xa 0x12>; + amd,serdes-tx-amp = <0xf 0xf 0xa>; + amd,serdes-dfe-tap-config = <0x3 0x3 0x1>; + amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>; + linux,phandle = <0xa>; + phandle = <0xa>; + }; + + xgmac@e0700000 { + status = "disabled"; + compatible = "amd,xgbe-seattle-v1a"; + reg = <0x0 0xe0700000 0x0 0x80000 0x0 0xe0780000 0x0 0x80000>; + interrupts = <0x0 0x145 0x4>, + <0x0 0x15a 0x1>, + <0x0 0x15b 0x1>, + <0x0 0x15c 0x1>, + <0x0 0x15d 0x1>; + amd,per-channel-interrupt; + mac-address = [02 a1 a2 a3 a4 a5]; + clocks = <0x5 0x6>; + clock-names = "dma_clk", "ptp_clk"; + phy-handle = <0x9>; + phy-mode = "xgmii"; + #stream-id-cells = <0x18>; + dma-coherent; + linux,phandle = <0xb>; + phandle = <0xb>; + }; + + xgmac@e0900000 { + status = "disabled"; + compatible = "amd,xgbe-seattle-v1a"; + reg = <0x0 0xe0900000 0x0 0x80000 0x0 0xe0980000 0x0 0x80000>; + interrupts = <0x0 0x144 0x4>, + <0x0 0x155 0x1>, + <0x0 0x156 0x1>, + <0x0 0x157 0x1>, + <0x0 0x158 0x1>; + amd,per-channel-interrupt; + mac-address = [02 b1 b2 b3 b4 b5]; + clocks = <0x7 0x8>; + clock-names = "dma_clk", "ptp_clk"; + phy-handle = <0xa>; + phy-mode = "xgmii"; + #stream-id-cells = <0x18>; + dma-coherent; + linux,phandle = <0xc>; + phandle = <0xc>; + }; + }; + + chosen { + stdout-path = "/smb/serial@e1010000"; + /* Note: + * Linux support for pci-probe-only DT is not + * stable. Disable this for now and let Linux + * take care of the resource assignment. + */ + // linux,pci-probe-only; + }; + + psci { + compatible = "arm,psci-0.2", "arm,psci"; + method = "smc"; + }; +}; + + diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb b/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb new file mode 100644 index 0000000000000000000000000000000000000000..0c0468d89d60faf6c461b0e2e1c67098b063c7a9 GIT binary patch literal 8089 zcmdT}O^h8!5uRC-g%IK-1|pDx^6&=9k#^$u-g=3VKrD`t00~7n;YZ<TJ+G(tz0uCR zH<_9JGf4OXTsR;kBDj$NR}gVHfgG+mASDt=;kJ9=PckBxND)Gq@2l>f*E{yw`x751 zsb{LHtE;N3tAD2F)qDT@&megCCqWRL4T6WhkM}8*2T<-u0UWy*{HG1R>ls?=7~Xy2 zpZfgy&Qm(B>r8h}UC`@~oqM!%Ua#wHQsjDEcg{`XGU=Rpa$T26nXc<cjRLkmi834K z$$VwnM-wL$c-*P{JAl$h`oQ+2sbj{YdzKE<ajna8t*9e48Q0|`%XGP<d%bS2+wDRK zKphXG%*JItKTK701~tUhq^$L36!#V*uqi6Ce1F2?w0*(ixATSdODLjghdmH5q24+1 zhNV05-g%!TZKQV|+(lE@dr*cbl(;(x?xQc{e*mRKX<)~WrX5wvP<9K&kKwm19j^ED zCEe|wMTBgKMDGdIH!*@tv{J^o1`|M?gzupcr$vPl1n-h39^!;=+xg2kZS&1BWC`mu z*R~T*pV-E@te=gVTGr7=7YF3)b?RZij(hk$9{z5Ni=850gJ|QkX9G3s3$E@W5ZWNT z6NNSi?483g1`Q4y4G!B4&M|ZH@U_9=tKi~Ol@CCQPi#9|rFoI*Xs}k1Eqv-Yi9&f7 zQ<w9k2@D@`=EHL+EwG7&SgC9kvmqZ{T9)Bv8~QoBl5XlGQrSeUvaPf8JPClKe|guN zJC42&$kjN>7NB$4C}ouyQ}7lZUxXcDN&5rYdGMKgevhWK%XnQ?s-PKPr^JtT78VX~ z=e>W9maHA=PZig(7@8_|ediqV$AEcE+WE0~l(>HA4>G%GOZ+HQs_BPO3hoVdm;win zt7k{zn&i@5&rH*w{-Wf`nM2t*{?`{TTmPg#d0Hv<$0()B#*WR$!}Z6@N3K~{*W$9S zij=0jlx*^sW5^i0G36K%moennV=-LdS}3!_)G<!8)wrnUlMNNcBb9;yU^^~!io~{U zAfspM+?tKrkTRUdY{U0!C@z<P2CrK>v_2#)AGqH9B}uDzkm-aC0MxZV-(D4YlUX<V zHbCvZd`tTZ+o^cwdP^U;d)fHtDjkkD;!;PDrBT*5F_M*o-0A+{$A}Z4?FZY-*of_J z7kTQ2Ms)An_V!)0OQ1W_*0=pMczfEebeYB(yDpt~?YY*<9#Ul8UQbRDMTxCU=`3?H z)4n%L@J;Q1#<S0ThWWw1yYc|=Ys_sVb`TeXWv+(c5lrq@1s&|S;^X_+@88ZxY7%IC zB=r^w{qW=UInXzY7v-3%*KXmX%rD3gD1R^?*+Ss9K7JNr2l0`bAs=$j=V)14_FkWs zg^Ds&qHxe%>H;TFp8Nc4o~sCJP*i1;niT-2OBvG9;qkB+xq6Iy*g=>tLk;u6wh2!I zCph|(hHU63Tl6<tv^`o$o=C0?i*&+d@g@^>`{VG@J@T3H`7UIshiy0r3MJUNaejdt z{tyq!5!&Zyr^C;y704ZA%)I_|{p6?3z1GYl^>dpR1^oOwa6iXTap-<}6X?$M(~a76 zy@bmL?q`0KetI7z^yX;e##L3|NaL15#ev67DXh(A@9@_O*}M4Fi~7iY53l!PdddDa zb8A~%2FL6ntn=oKTL+qX_PTA)x%z@_CG&)5%B2;ve_KbWi(i|wsEbCEs*bdZ^Ju8Y z*z*)B0F+^$Pg>m3TnDMw(HDSw>tuKZI>C~9u5B-q0Jt+3{d)zpi)Yi{H$=<?04VjN zF8rg}ifpC%He=mSQTMk-+EmjI6D>oN?C{Z&lemEILHJ=1Z8_R$>tj6Ha_mc6ZqD+k zgW$&JA>hwFA*}YJQNcDmo0JX5ivH`mMNq*`5SHXQeP0G`jk@OU%`qTI|CJgqbvLz4 zH+#BbGv=6_Z%`jCcF$0r{AQf~P7c5-b#3gobNDS(F&<)LxRKPD1cSl!fI|7b)@V7` z@?NGIRB^<{5C*VK2SuR-+rQ-#U>(^0ogpnvS?0}~rCup@H45yl5QSLh&7trMpj{r~ z9bVt4x|9>&S5?J3lIHLSKHKl*JNdI|k*5(F0w+)&J7jo;eBl^g6U%KkGUlG4?caCM z#`y>R;dSa+-mM??GyK+~CblQdHIwbkIA^Q&n@;-XZ0!5n-}|O}KXhK*9OB~<=g{sl zz9RiEyT-oUJMm;-{gJs(y5)}?soq9^in`d_pV^i_q+9;<!4jWk4(#`CWUu)2ZXF+< zH~sjKZu!&PO}$P2+%i7gDSdxPi$BF^3&+O(8QvCxN1)tZ^WcN1le^x{;Xp@d+}`AD zd+Jgs!OkNzMPSN;{)oKzxX1_SxA+E7fVTZP{DjA6?mq&WVC7~wsGJ*araAsO@Yp{V zHx|%4^Ci%{+haL_;^aAhInP*F=lI{WIB7Qrspm(a9e8`6%ninl^6U@mNbiodx>K=c z=m<0|vArxv5M1ONvHp*xDPa5P?nOh!%<=L5zlgOPEBeh?la^S^I))YgaXA`+Yx=ua zUUTi6=5_1fX4`h~Rw%)C!6(3`_V%VBEzP)o9L4RKp9W6<0O2!y2pWW6_3*EG_}48? zJ%E{C;Xxd0+RQ66&%f}qpZ|h<;n9QFP`LiOHSm7m*SLD~I)ST#y;h(Oj_aTBb~#F& z+lW<~f(dXk{{YT?#`@5lZ`cpsxA9)v%1Ycx?~41!?nK;w04oF+_a7T_kGP*lt&95? zfxEbK4RH9EJ^U*cw|#EK{nsyEdFeNh*d2GSE%b(M_7iuPuZN90C%7MX(u}*rUg5B> z`4wtpkkd2&K8>Fdr*CrE<=PaLvO_O=<-37rH1ebFWA=Kf5wf<A%~rXh9cTOQe3Ix4 zr?I?<>l7E7!Su&nfxE+T9n8f^f+JfM@h+_j=Bo6Pw)j+b`jao1^SIKY)WfOPDk$Ue zP**{gj@LHli%~pIU^TB&??+*PSrA#dIr$G_4H_IL$Y<B|SZxJ{o~+fyS{;q?SFAFu zN;Ig+NJ|&0I<D~($4DD7-U)e5kJs`D2Sjr7coTovoQ3sCR>wo_yutNizdt`pbs3jx zv=taydb|=VZE1uvVqh&<Zblh@$wqaV4lS?V#hc?bknN*Eo1dogFZNQF4x(zUDDY=A zNc4KD^m4sb=m7twjB64>J7UuT$m0V2saB`)2U!Fd5gV<ks0j;eIKU!O6|qXkL-RMd z(D)}+>DvAqE)!ivgKR_jv`R{NQ){1BJR4Q3dc$X-?{QxEoMc5uHGIX0tRO_@_p_LA zHG0hJcBv_J87bt=7!hs!4{-dAY^DZ0-`K<=Dnl_>)uqPgbc#P~l9pASAaNq({V2$F JJ(?uJ{{StXEo}e*
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diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts b/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts new file mode 100644 index 0000000..e1a3a98 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts @@ -0,0 +1,435 @@ +/* + * DTS file for AMD Seattle (RevB) Overdrive Development Board + * Note: Based-on AMD Seattle Rev.B + * + * Copyright (C) 2015 Advanced Micro Devices, Inc. + */ + +/dts-v1/; + +/ { + model = "AMD Seattle (Rev.B) Development Board (Overdrive)"; + compatible = "amd,seattle-overdrive", "amd,seattle"; + interrupt-parent = <0x1>; + #address-cells = <0x2>; + #size-cells = <0x2>; + + interrupt-controller@e1101000 { + compatible = "arm,gic-400", "arm,cortex-a15-gic"; + interrupt-controller; + #interrupt-cells = <0x3>; + #address-cells = <0x2>; + #size-cells = <0x2>; + reg = <0x0 0xe1110000 0x0 0x1000>, + <0x0 0xe112f000 0x0 0x2000>, + <0x0 0xe1140000 0x0 0x10000>, + <0x0 0xe1160000 0x0 0x10000>; + interrupts = <0x1 0x9 0xf04>; + ranges = <0x0 0x0 0x0 0xe1100000 0x0 0x100000>; + linux,phandle = <0x1>; + phandle = <0x1>; + + v2m@e0080000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x80000 0x0 0x1000>; + linux,phandle = <0x4>; + phandle = <0x4>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <0x1 0xd 0xff04>, + <0x1 0xe 0xff04>, + <0x1 0xb 0xff04>, + <0x1 0xa 0xff04>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0x0 0x7 0x4>, + <0x0 0x8 0x4>, + <0x0 0x9 0x4>, + <0x0 0xa 0x4>, + <0x0 0xb 0x4>, + <0x0 0xc 0x4>, + <0x0 0xd 0x4>, + <0x0 0xe 0x4>; + }; + + smb { + compatible = "simple-bus"; + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + /* + * dma-ranges is 40-bit address space containing: + * - GICv2m MSI register is at 0xe0080000 + * - DRAM range [0x8000000000 to 0xffffffffff] + */ + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; + + clk100mhz_0 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <100000000>; + clock-output-names = "adl3clk_100mhz"; + }; + + clk375mhz { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <375000000>; + clock-output-names = "ccpclk_375mhz"; + }; + + clk333mhz { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <333000000>; + clock-output-names = "sataclk_333mhz"; + linux,phandle = <0x2>; + phandle = <0x2>; + }; + + clk500mhz_0 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <500000000>; + clock-output-names = "pcieclk_500mhz"; + }; + + clk500mhz_1 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <500000000>; + clock-output-names = "dmaclk_500mhz"; + }; + + clk250mhz_4 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "miscclk_250mhz"; + }; + + clk100mhz_1 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <100000000>; + clock-output-names = "uartspiclk_100mhz"; + linux,phandle = <0x3>; + phandle = <0x3>; + }; + + sata@e0300000 { + compatible = "snps,dwc-ahci"; + reg = <0x0 0xe0300000 0x0 0xf0000>; + interrupts = <0x0 0x163 0x4>; + clocks = <0x2>; + dma-coherent; + }; + + sata@e0d00000 { + status = "disabled"; + compatible = "snps,dwc-ahci"; + reg = <0x0 0xe0d00000 0x0 0xf0000>; + interrupts = <0x0 0x162 0x4>; + clocks = <0x2>; + dma-coherent; + }; + + i2c@e1000000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xe1000000 0x0 0x1000>; + interrupts = <0x0 0x165 0x4>; + clocks = <0x3>; + }; + + i2c@e0050000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xe0050000 0x0 0x1000>; + interrupts = <0x0 0x154 0x4>; + clocks = <0x3>; + }; + + serial@e1010000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xe1010000 0x0 0x1000>; + interrupts = <0x0 0x148 0x4>; + clocks = <0x3 0x3>; + clock-names = "uartclk", "apb_pclk"; + }; + + ssp@e1020000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x0 0xe1020000 0x0 0x1000>; + spi-controller; + interrupts = <0x0 0x14a 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + ssp@e1030000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x0 0xe1030000 0x0 0x1000>; + spi-controller; + interrupts = <0x0 0x149 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + num-cs = <0x1>; + #address-cells = <0x1>; + #size-cells = <0x0>; + + sdcard@0 { + compatible = "mmc-spi-slot"; + reg = <0x0>; + spi-max-frequency = <20000000>; + voltage-ranges = <3200 3400>; + pl022,hierarchy = <0x0>; + pl022,interface = <0x0>; + pl022,com-mode = <0x0>; + pl022,rx-level-trig = <0x0>; + pl022,tx-level-trig = <0x0>; + }; + }; + + gpio@e1050000 { /* [0 : 7] */ + compatible = "arm,pl061", "arm,primecell"; + #gpio-cells = <0x2>; + reg = <0x0 0xe1050000 0x0 0x1000>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <0x2>; + interrupts = <0x0 0x166 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + gpio@e0020000 { /* [8 : 15] */ + status = "disabled"; + compatible = "arm,pl061", "arm,primecell"; + #gpio-cells = <0x2>; + reg = <0x0 0xe0020000 0x0 0x1000>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <0x2>; + interrupts = <0x0 0x16e 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + gpio@e0030000 { /* [16 : 23] */ + status = "disabled"; + compatible = "arm,pl061", "arm,primecell"; + #gpio-cells = <0x2>; + reg = <0x0 0xe0030000 0x0 0x1000>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <0x2>; + interrupts = <0x0 0x16d 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + gpio@e0080000 { /* [24] */ + compatible = "arm,pl061", "arm,primecell"; + #gpio-cells = <0x2>; + reg = <0x0 0xe0080000 0x0 0x1000>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <0x2>; + interrupts = <0x0 0x169 0x4>; + clocks = <0x3>; + clock-names = "apb_pclk"; + }; + + ccp: ccp@e0100000 { + compatible = "amd,ccp-seattle-v1a"; + reg = <0x0 0xe0100000 0x0 0x10000>; + interrupts = <0x0 0x3 0x4>; + dma-coherent; + amd,zlib-support = <0x1>; + }; + + pcie: pcie@f0000000 { + compatible = "pci-host-ecam-generic"; + #address-cells = <0x3>; + #size-cells = <0x2>; + #interrupt-cells = <0x1>; + device_type = "pci"; + bus-range = <0x0 0x7f>; + msi-parent = <0x4>; + reg = <0x0 0xf0000000 0x0 0x10000000>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = <0x1000 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x120 0x1>, + <0x1000 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x121 0x1>, + <0x1000 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x122 0x1>, + <0x1000 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x123 0x1>; + dma-coherent; + dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>; + ranges = <0x1000000 0x0 0x00000000 0x0 0xefff0000 0x00 0x00010000>, /* I/O Memory (size=64K) */ + <0x2000000 0x0 0x40000000 0x0 0x40000000 0x00 0x80000000>, /* 32-bit MMIO (size=2G) */ + <0x3000000 0x1 0x00000000 0x1 0x00000000 0x7f 0x00000000>; /* 64-bit MMIO (size= 124G) */ + }; + + ccn@0xe8000000 { + compatible = "arm,ccn-504"; + reg = <0x0 0xe8000000 0x0 0x1000000>; + interrupts = <0x0 0x17c 0x4>; + }; + + gwdt@e0bb0000 { + status = "disabled"; + compatible = "arm,sbsa-gwdt"; + reg = <0x0 0xe0bb0000 0x0 0x10000 + 0x0 0xe0bc0000 0x0 0x10000>; + reg-names = "refresh", "control"; + interrupts = <0x0 0x151 0x4>; + interrupt-names = "ws0"; + }; + + kcs@e0010000 { + status = "disabled"; + compatible = "ipmi-kcs"; + device_type = "ipmi"; + reg = <0x0 0xe0010000 0 0x8>; + interrupts = <0 389 4>; + interrupt-names = "ipmi_kcs"; + reg-size = <1>; + reg-spacing = <4>; + }; + + clk250mhz_0 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk0_dma_250mhz"; + linux,phandle = <0x5>; + phandle = <0x5>; + }; + + clk250mhz_1 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk0_ptp_250mhz"; + linux,phandle = <0x6>; + phandle = <0x6>; + }; + + clk250mhz_2 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk1_dma_250mhz"; + linux,phandle = <0x7>; + phandle = <0x7>; + }; + + clk250mhz_3 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <250000000>; + clock-output-names = "xgmacclk1_ptp_250mhz"; + linux,phandle = <0x8>; + phandle = <0x8>; + }; + + phy@e1240800 { + status = "disabled"; + compatible = "amd,xgbe-phy-seattle-v1a"; + reg = <0x0 0xe1240800 0x0 0x0400>, /* SERDES RX/TX0 */ + <0x0 0xe1250000 0x0 0x0060>, /* SERDES IR 1/2 */ + <0x0 0xe12500f8 0x0 0x0004>; /* SERDES IR 2/2 */ + interrupts = <0x0 0x143 0x4>; + amd,speed-set = <0x0>; + amd,serdes-blwc = <0x1 0x1 0x0>; + amd,serdes-cdr-rate = <0x2 0x2 0x7>; + amd,serdes-pq-skew = <0xa 0xa 0x12>; + amd,serdes-tx-amp = <0xf 0xf 0xa>; + amd,serdes-dfe-tap-config = <0x3 0x3 0x1>; + amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>; + linux,phandle = <0x9>; + phandle = <0x9>; + }; + + phy@e1240c00 { + status = "disabled"; + compatible = "amd,xgbe-phy-seattle-v1a"; + reg = <0x0 0xe1240c00 0x0 0x0400>, /* SERDES RX/TX0 */ + <0x0 0xe1250080 0x0 0x0060>, /* SERDES IR 1/2 */ + <0x0 0xe12500fc 0x0 0x0004>; /* SERDES IR 2/2 */ + interrupts = <0x0 0x142 0x4>; + amd,speed-set = <0x0>; + amd,serdes-blwc = <0x1 0x1 0x0>; + amd,serdes-cdr-rate = <0x2 0x2 0x7>; + amd,serdes-pq-skew = <0xa 0xa 0x12>; + amd,serdes-tx-amp = <0xf 0xf 0xa>; + amd,serdes-dfe-tap-config = <0x3 0x3 0x1>; + amd,serdes-dfe-tap-enable = <0x0 0x0 0x7f>; + linux,phandle = <0xa>; + phandle = <0xa>; + }; + + xgmac@e0700000 { + status = "disabled"; + compatible = "amd,xgbe-seattle-v1a"; + reg = <0x0 0xe0700000 0x0 0x80000 0x0 0xe0780000 0x0 0x80000>; + interrupts = <0x0 0x145 0x4>, + <0x0 0x15a 0x1>, + <0x0 0x15b 0x1>, + <0x0 0x15c 0x1>, + <0x0 0x15d 0x1>; + amd,per-channel-interrupt; + mac-address = [02 a1 a2 a3 a4 a5]; + clocks = <0x5 0x6>; + clock-names = "dma_clk", "ptp_clk"; + phy-handle = <0x9>; + phy-mode = "xgmii"; + #stream-id-cells = <0x18>; + dma-coherent; + linux,phandle = <0xb>; + phandle = <0xb>; + }; + + xgmac@e0900000 { + status = "disabled"; + compatible = "amd,xgbe-seattle-v1a"; + reg = <0x0 0xe0900000 0x0 0x80000 0x0 0xe0980000 0x0 0x80000>; + interrupts = <0x0 0x144 0x4>, + <0x0 0x155 0x1>, + <0x0 0x156 0x1>, + <0x0 0x157 0x1>, + <0x0 0x158 0x1>; + amd,per-channel-interrupt; + mac-address = [02 b1 b2 b3 b4 b5]; + clocks = <0x7 0x8>; + clock-names = "dma_clk", "ptp_clk"; + phy-handle = <0xa>; + phy-mode = "xgmii"; + #stream-id-cells = <0x18>; + dma-coherent; + linux,phandle = <0xc>; + phandle = <0xc>; + }; + }; + + chosen { + stdout-path = "/smb/serial@e1010000"; + /* Note: + * Linux support for pci-probe-only DT is not + * stable. Disable this for now and let Linux + * take care of the resource assignment. + */ + // linux,pci-probe-only; + }; + + psci { + compatible = "arm,psci-0.2", "arm,psci"; + method = "smc"; + }; +}; + + diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c new file mode 100644 index 0000000..8e6fbfc --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoader.c @@ -0,0 +1,122 @@ +/** @file +* +* Copyright (c) 2011-2014, ARM Limited. All rights reserved.<BR> +* Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ +/** + Derived from: + ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoader.c + +**/ + +#include <Library/PcdLib.h> +#include <Base.h> +#include <BdsLib/BdsInternal.h> +#include <Library/ArmGicLib.h> +#include <Library/IoLib.h> + +#include <AmdStyxHelperLib.h> + +/* These externs are used to relocate some ASM code into Linux memory. */ +extern VOID *SecondariesPenStart; +extern VOID *SecondariesPenEnd; +extern UINTN *AsmParkingBase; +extern UINTN *AsmMailboxBase; + +extern EFI_BOOT_SERVICES *gBS; + +VOID +EFIAPI +AmdStyxMoveParkedCores( + VOID + ) +{ + EFI_STATUS Status; + EFI_PHYSICAL_ADDRESS MpParkingBase; + UINTN MpParkingSize; + EFI_PHYSICAL_ADDRESS PenBase; + UINTN PenSize; + UINTN MailboxBase; + ARM_PROCESSOR_TABLE *ArmProcessorTable; + ARM_CORE_INFO *ArmCoreInfoTable; + UINTN ArmCoreCount; + UINTN CoreNum; + UINTN CoreMailbox; + UINTN CoreParking; + + // Get core information + ArmProcessorTable = AmdStyxGetArmProcessorTable(); + ASSERT_EFI_ERROR (ArmProcessorTable == NULL); + ArmCoreInfoTable = ArmProcessorTable->ArmCpus; + ArmCoreCount = ArmProcessorTable->NumberOfEntries; + + // Get Parking area (4KB-aligned, 4KB per core) + MpParkingBase = FixedPcdGet64 (PcdParkingProtocolBase); + ASSERT_EFI_ERROR (MpParkingBase & (SIZE_4KB - 1)); + MpParkingSize = ArmCoreCount * SIZE_4KB; + ASSERT_EFI_ERROR (MpParkingSize > FixedPcdGet64 (PcdParkingProtocolSize)); + + // + // Set Pen at the 2K-offset of the Parking area, skipping an 8-byte slot for the Core#. + // For details, refer to the "Multi-processor Startup for ARM Platforms" document: + // https://acpica.org/sites/acpica/files/MP%20Startup%20for%20ARM%20platforms.d... + // + PenBase = (EFI_PHYSICAL_ADDRESS)((UINTN)MpParkingBase + SIZE_2KB + sizeof(UINT64)); + PenSize = (UINTN)&SecondariesPenEnd - (UINTN)&SecondariesPenStart; + + // Reserve the memory as RuntimeServices + Status = gBS->AllocatePages (AllocateAddress, EfiRuntimeServicesCode, + EFI_SIZE_TO_PAGES (MpParkingSize ), &MpParkingBase ); + if (EFI_ERROR (Status)) { + Print (L"Warning: Failed to reserve memory for MP-Parking protocol at 0x%lX, Status = %r\n", + MpParkingBase, Status); + // Even if there is a risk of memory corruption we carry on + } + + // Relocate the Pen code + CopyMem ((VOID*)(PenBase), (VOID*)&SecondariesPenStart, PenSize); + + // Put spin-table mailboxes below the pen code so we know where they are relative to code. + // Make sure this is 8 byte aligned. + MailboxBase = (UINTN)PenBase + ((UINTN)&SecondariesPenEnd - (UINTN)&SecondariesPenStart); + if (MailboxBase % sizeof(UINT64) != 0) { + MailboxBase += sizeof(UINT64) - MailboxBase % sizeof(UINT64); + } + + // Update variables used in the Pen code + *(UINTN*)(PenBase + ((UINTN)&AsmMailboxBase - (UINTN)&SecondariesPenStart)) = MailboxBase; + *(UINTN*)(PenBase + ((UINTN)&AsmParkingBase - (UINTN)&SecondariesPenStart)) = (UINTN)MpParkingBase; + + for (CoreNum = 0; CoreNum < ArmCoreCount; CoreNum++) { + // Clear the jump address at spin-table slot + CoreMailbox = MailboxBase + CoreNum * sizeof (UINT64); + *((UINTN*)(CoreMailbox)) = 0x0; + + // Clear the jump address and set Core# at mp-parking slot + CoreParking = (UINTN)MpParkingBase + CoreNum * SIZE_4KB; + *((UINTN*)(CoreParking + sizeof (UINT64))) = 0x0; + *((UINTN*)(CoreParking + SIZE_2KB)) = CoreNum; + + // Move secondary core to our new Pen + MmioWrite64(ArmCoreInfoTable[CoreNum].MailboxSetAddress, (UINTN)PenBase); + + // Update table entry to be consumed by FDT parser. + ArmCoreInfoTable[CoreNum].MailboxSetAddress = CoreMailbox; + } + + // Flush caches to make sure our pen gets to memory before we release secondary cores. + ArmCleanDataCache(); + + // Send msg to secondary cores to jump to our new Pen. + ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId)); +} + diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S new file mode 100644 index 0000000..d400a9c --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/AArch64/BdsLinuxLoaderHelper.S @@ -0,0 +1,87 @@ +// +// Copyright (c) 2011-2013, ARM Limited. All rights reserved. +// Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +//** +// Derived from: +// ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoaderHelper.S +// +//** + +/* Secondary core pens for AArch64 Linux booting. + + This code is placed in Linux kernel memory and marked reserved. UEFI ensures + that the secondary cores get to this pen and the kernel can then start the + cores from here. + NOTE: This code must be self-contained. +*/ + +#include <Library/ArmLib.h> + +.text +.align 3 + +GCC_ASM_EXPORT(SecondariesPenStart) +ASM_GLOBAL SecondariesPenEnd + +ASM_PFX(SecondariesPenStart): + // Registers x0-x3 are reserved for future use and should be set to zero. + mov x0, xzr + mov x1, xzr + mov x2, xzr + mov x3, xzr + + mrs x4, mpidr_el1 // Get MPCore register + and x5, x4, #ARM_CORE_MASK // Get core number + and x4, x4, #ARM_CLUSTER_MASK // Get cluster number + + add x4, x5, x4, LSR #7 // Add scaled cluster number to core number + mov x6, x4 // Save a copy to compute mp-parking offset + + ldr x5, AsmMailboxBase // Get mailbox addr relative to PC + lsl x4, x4, 3 // Add 8-byte offset for this core + add x4, x4, x5 // + + ldr x5, AsmParkingBase // Get mp-parking addr relative to PC + lsl x6, x6, 12 // Add 4K-byte offset for this core + add x6, x6, x5 // + + mov x5, 1 // Get mp-parking id# at 2K offset + lsl x5, x5, 11 // + add x5, x5, x6 // + ldr x10, [x5] // + +1: ldr x5, [x4] // Load jump-addr from spin-table mailbox + cmp xzr, x5 // Has the value been set? + b.ne 4f // If so, break out of loop + + ldr x5, [x6] // Load mp-parking id# + cmp w10, w5 // Is it my id? + b.ne 2f // If not, continue polling + + ldr x5, [x6, 8] // Load jump-addr from mp-parking + cmp xzr, x5 // Has the value been set? + b.ne 3f // If so, break out of loop + +2: wfe // Wait a bit + b 1b // Wait over, check again + +3: str xzr, [x6, 8] // Clear to acknowledge + mov x0, x6 // Return mp-parking address +4: br x5 // Jump to new addr + +.align 3 // Make sure the variable below is 8 byte aligned. + .global AsmParkingBase +AsmParkingBase: .xword 0xdeaddeadbeefbeef + .global AsmMailboxBase +AsmMailboxBase: .xword 0xdeaddeadbeefbeef + +SecondariesPenEnd: diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c new file mode 100644 index 0000000..0d03bd7 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/BdsLinuxFdt.c @@ -0,0 +1,754 @@ +/** @file +* +* Copyright (c) 2011-2014, ARM Limited. All rights reserved.<BR> +* Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ +/** + Derived from: + ArmPkg/Library/BdsLib/BdsLinuxFdt.c + +**/ + +#include <Library/PcdLib.h> +#include <libfdt.h> + +#include <BdsLib/BdsInternal.h> + +#include <AmdStyxHelperLib.h> + +//#define LINUX_FDT_MAX_OFFSET (PcdGet64 (PcdUefiEntryAddress) + PcdGet32(PcdArmLinuxFdtMaxOffset)) +#define LINUX_FDT_MAX_OFFSET (PcdGet64 (PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxFdtMaxOffset)) + + +// Additional size that could be used for FDT entries added by the UEFI OS Loader +// Estimation based on: EDID (300bytes) + bootargs (200bytes) + initrd region (20bytes) +// + system memory region (20bytes) + mp_core entries (200 bytes) +#define FDT_ADDITIONAL_ENTRIES_SIZE 0x300 + + +EFI_STATUS +GetSystemMemoryResources ( + IN LIST_ENTRY *ResourceList + ); + +VOID +DebugDumpFdt ( + IN VOID* FdtBlob + ); + +#define ALIGN(x, a) (((x) + ((a) - 1)) & ~((a) - 1)) +#define PALIGN(p, a) ((void *)(ALIGN((unsigned long)(p), (a)))) +#define GET_CELL(p) (p += 4, *((const UINT32 *)(p-4))) + +// +// PMU interrupts per core +// +#pragma pack(push, 1) +typedef struct { + UINT32 Flag; // 0 == SPI + UINT32 IntId; // GSIV == IntId+32 + UINT32 Type; // 4 == Level-Sensitive, Active-High +} PMU_INTERRUPT; +#pragma pack(pop) + +#define PMU_INT_FLAG_SPI 0 +#define PMU_INT_TYPE_HIGH_LEVEL 4 + + +typedef struct { + UINTN Base; + UINTN Size; +} FdtRegion; + + +STATIC +UINTN +cpu_to_fdtn (UINTN x) { + if (sizeof (UINTN) == sizeof (UINT32)) { + return cpu_to_fdt32 (x); + } else { + return cpu_to_fdt64 (x); + } +} + + +STATIC +BOOLEAN +ClusterInRange( + IN ARM_CORE_INFO *ArmCoreInfoTable, + IN UINTN ClusterId, + IN UINTN LowIndex, + IN UINTN HighIndex + ) +{ + do { + if (ClusterId == ArmCoreInfoTable[LowIndex].ClusterId) + return TRUE; + } while (++LowIndex <= HighIndex); + + return FALSE; +} + + +STATIC +UINTN +NumberOfCoresInCluster( + IN ARM_CORE_INFO *ArmCoreInfoTable, + IN UINTN NumberOfEntries, + IN UINTN ClusterId + ) +{ + UINTN Index, Cores; + + Cores = 0; + for (Index = 0; Index < NumberOfEntries; ++Index) { + if (ClusterId == ArmCoreInfoTable[Index].ClusterId) + ++Cores; + } + + return Cores; +} + + +STATIC +UINTN +NumberOfClustersInTable( + IN ARM_CORE_INFO *ArmCoreInfoTable, + IN UINTN NumberOfEntries + ) +{ + UINTN Index, Cores, Clusters, ClusterId; + + Index = 0; + Clusters = 0; + Cores = NumberOfEntries; + while (Cores) { + ++Clusters; + ClusterId = ArmCoreInfoTable[Index].ClusterId; + Cores -= NumberOfCoresInCluster (ArmCoreInfoTable, + NumberOfEntries, + ClusterId); + if (Cores) { + do { + ++Index; + } while (ClusterInRange (ArmCoreInfoTable, + ArmCoreInfoTable[Index].ClusterId, + 0, Index-1)); + } + } + + return Clusters; +} + + +STATIC +int +fdt_alloc_phandle( + IN VOID *blob + ) +{ + + int offset, phandle = 0; + + for (offset = fdt_next_node(blob, -1, NULL); offset >= 0; + offset = fdt_next_node(blob, offset, NULL)) { + phandle = MAX(phandle, fdt_get_phandle(blob, offset)); + } + + return phandle + 1; +} + + +STATIC +BOOLEAN +IsLinuxReservedRegion ( + IN EFI_MEMORY_TYPE MemoryType + ) +{ + switch(MemoryType) { + case EfiRuntimeServicesCode: + case EfiRuntimeServicesData: + case EfiUnusableMemory: + case EfiACPIReclaimMemory: + case EfiACPIMemoryNVS: + case EfiReservedMemoryType: + return TRUE; + default: + return FALSE; + } +} + +STATIC +VOID +SetDeviceStatus ( + IN VOID *fdt, + IN CHAR8 *device, + IN BOOLEAN enable + ) +{ + int node, subnode, rc; + + node = fdt_subnode_offset (fdt, 0, "smb"); + if (node >= 0) { + subnode = fdt_subnode_offset (fdt, node, device); + if (subnode >= 0) { + rc = fdt_setprop_string(fdt, subnode, "status", enable ? "ok" : "disabled"); + if (rc) { + DEBUG((EFI_D_ERROR,"%a: Could not set 'status' property for '%a' node\n", + __FUNCTION__, device)); + } + } + } +} + +#if DO_XGBE +STATIC +VOID +SetMacAddress ( + IN VOID *fdt, + IN CHAR8 *device, + IN UINT64 mac_addr + ) +{ + int node, subnode, rc; + + node = fdt_subnode_offset (fdt, 0, "smb"); + if (node >= 0) { + subnode = fdt_subnode_offset (fdt, node, device); + if (subnode >= 0) { + rc = fdt_setprop(fdt, subnode, "mac-address", (void *)&mac_addr, 6); + if (rc) { + DEBUG((EFI_D_ERROR,"%a: Could not set 'mac-address' property for '%a' node\n", + __FUNCTION__, device)); + } + } + } +} +#endif + +VOID +SetSocIdStatus ( + IN VOID *fdt + ) +{ + UINT32 SocId; + BOOLEAN IsRevB1; + + SocId = PcdGet32 (PcdSocCpuId); + IsRevB1 = (SocId & 0xFF0) && (SocId & 0x00F); + + SetDeviceStatus (fdt, "sata@e0d00000", IsRevB1); + SetDeviceStatus (fdt, "gpio@e0020000", IsRevB1); + SetDeviceStatus (fdt, "gpio@e0030000", IsRevB1); + SetDeviceStatus (fdt, "gwdt@e0bb0000", IsRevB1); +#if DO_KCS + SetDeviceStatus (fdt, "kcs@e0010000", IsRevB1); +#else + SetDeviceStatus (fdt, "kcs@e0010000", FALSE); +#endif +} + +VOID +SetXgbeStatus ( + IN VOID *fdt + ) +{ +#if DO_XGBE + SetDeviceStatus (fdt, "xgmac@e0700000", TRUE); + SetDeviceStatus (fdt, "phy@e1240800", TRUE); + SetDeviceStatus (fdt, "xgmac@e0900000", TRUE); + SetDeviceStatus (fdt, "phy@e1240c00", TRUE); + + SetMacAddress (fdt, "xgmac@e0700000", PcdGet64 (PcdEthMacA)); + SetMacAddress (fdt, "xgmac@e0900000", PcdGet64 (PcdEthMacB)); +#else + SetDeviceStatus (fdt, "xgmac@e0700000", FALSE); + SetDeviceStatus (fdt, "phy@e1240800", FALSE); + SetDeviceStatus (fdt, "xgmac@e0900000", FALSE); + SetDeviceStatus (fdt, "phy@e1240c00", FALSE); +#endif +} + + +/** +** Relocate the FDT blob to a more appropriate location for the Linux kernel. +** This function will allocate memory for the relocated FDT blob. +** +** @retval EFI_SUCCESS on success. +** @retval EFI_OUT_OF_RESOURCES or EFI_INVALID_PARAMETER on failure. +*/ +STATIC +EFI_STATUS +RelocateFdt ( + EFI_PHYSICAL_ADDRESS OriginalFdt, + UINTN OriginalFdtSize, + EFI_PHYSICAL_ADDRESS *RelocatedFdt, + UINTN *RelocatedFdtSize, + EFI_PHYSICAL_ADDRESS *RelocatedFdtAlloc + ) +{ + EFI_STATUS Status; + INTN Error; + UINT64 FdtAlignment; + + *RelocatedFdtSize = OriginalFdtSize + FDT_ADDITIONAL_ENTRIES_SIZE; + + // If FDT load address needs to be aligned, allocate more space. + FdtAlignment = PcdGet32 (PcdArmLinuxFdtAlignment); + if (FdtAlignment != 0) { + *RelocatedFdtSize += FdtAlignment; + } + + // Try below a watermark address. + Status = EFI_NOT_FOUND; + if (PcdGet32 (PcdArmLinuxFdtMaxOffset) != 0) { + *RelocatedFdt = LINUX_FDT_MAX_OFFSET; + Status = gBS->AllocatePages (AllocateMaxAddress, EfiBootServicesData, + EFI_SIZE_TO_PAGES (*RelocatedFdtSize), RelocatedFdt); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_WARN, "Warning: Failed to load FDT below address 0x%lX (%r). Will try again at a random address anywhere.\n", *RelocatedFdt, Status)); + } + } + + // Try anywhere there is available space. + if (EFI_ERROR (Status)) { + Status = gBS->AllocatePages (AllocateAnyPages, EfiBootServicesData, + EFI_SIZE_TO_PAGES (*RelocatedFdtSize), RelocatedFdt); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + return EFI_OUT_OF_RESOURCES; + } else { + DEBUG ((EFI_D_WARN, "WARNING: Loaded FDT at random address 0x%lX.\nWARNING: There is a risk of accidental overwriting by other code/data.\n", *RelocatedFdt)); + } + } + + *RelocatedFdtAlloc = *RelocatedFdt; + if (FdtAlignment != 0) { + *RelocatedFdt = ALIGN (*RelocatedFdt, FdtAlignment); + } + + // Load the Original FDT tree into the new region + Error = fdt_open_into ((VOID*)(UINTN) OriginalFdt, + (VOID*)(UINTN)(*RelocatedFdt), *RelocatedFdtSize); + if (Error) { + DEBUG ((EFI_D_ERROR, "fdt_open_into(): %a\n", fdt_strerror (Error))); + gBS->FreePages (*RelocatedFdtAlloc, EFI_SIZE_TO_PAGES (*RelocatedFdtSize)); + return EFI_INVALID_PARAMETER; + } + + DEBUG_CODE_BEGIN(); + // DebugDumpFdt ((VOID*)(UINTN)(*RelocatedFdt)); + DEBUG_CODE_END(); + + return EFI_SUCCESS; +} + + +EFI_STATUS +AmdStyxPrepareFdt ( + IN CONST CHAR8* CommandLineArguments, + IN EFI_PHYSICAL_ADDRESS InitrdImage, + IN UINTN InitrdImageSize, + IN OUT EFI_PHYSICAL_ADDRESS *FdtBlobBase, + IN OUT UINTN *FdtBlobSize + ) +{ + EFI_STATUS Status; + EFI_PHYSICAL_ADDRESS NewFdtBlobBase; + EFI_PHYSICAL_ADDRESS NewFdtBlobAllocation; + UINTN NewFdtBlobSize; + VOID *fdt; + int err; + int node; + int cpu_node; + int lenp; + CONST VOID *BootArg; + EFI_PHYSICAL_ADDRESS InitrdImageStart; + EFI_PHYSICAL_ADDRESS InitrdImageEnd; + FdtRegion Region; + UINTN Index; + CHAR8 Name[10]; + LIST_ENTRY ResourceList; + BDS_SYSTEM_MEMORY_RESOURCE *Resource; + ARM_PROCESSOR_TABLE *ArmProcessorTable; + ARM_CORE_INFO *ArmCoreInfoTable; + UINTN ArmCoreCount; + UINT32 PrimaryClusterId; + UINT32 PrimaryCoreId; + UINTN MemoryMapSize; + EFI_MEMORY_DESCRIPTOR *MemoryMap; + EFI_MEMORY_DESCRIPTOR *MemoryMapPtr; + UINTN MapKey; + UINTN DescriptorSize; + UINT32 DescriptorVersion; + UINTN Pages; + UINTN OriginalFdtSize; + int map_node; + int cluster_node; + int pmu_node; + PMU_INTERRUPT PmuInt; + int phandle[NUM_CORES]; + UINT32 ClusterIndex, CoreIndex; + UINT32 ClusterCount, CoresInCluster; + UINT32 ClusterId; + UINTN MpId, MbAddr; + + // + // Sanity checks on the original FDT blob. + // + err = fdt_check_header ((VOID*)(UINTN)(*FdtBlobBase)); + if (err != 0) { + Print (L"ERROR: Device Tree header not valid (err:%d)\n", err); + return EFI_INVALID_PARAMETER; + } + + // The original FDT blob might have been loaded partially. + // Check that it is not the case. + OriginalFdtSize = (UINTN)fdt_totalsize ((VOID*)(UINTN)(*FdtBlobBase)); + if (OriginalFdtSize > *FdtBlobSize) { + Print (L"ERROR: Incomplete FDT. Only %d/%d bytes have been loaded.\n", + *FdtBlobSize, OriginalFdtSize); + return EFI_INVALID_PARAMETER; + } + + // + // Relocate the FDT to its final location. + // + NewFdtBlobAllocation = 0; + Status = RelocateFdt (*FdtBlobBase, OriginalFdtSize, + &NewFdtBlobBase, &NewFdtBlobSize, &NewFdtBlobAllocation); + if (EFI_ERROR (Status)) { + goto FAIL_RELOCATE_FDT; + } + fdt = (VOID*)(UINTN)NewFdtBlobBase; + + node = fdt_subnode_offset (fdt, 0, "chosen"); + if (node < 0) { + // The 'chosen' node does not exist, create it + node = fdt_add_subnode(fdt, 0, "chosen"); + if (node < 0) { + DEBUG((EFI_D_ERROR,"Error on finding 'chosen' node\n")); + Status = EFI_INVALID_PARAMETER; + goto FAIL_COMPLETE_FDT; + } + } + + DEBUG_CODE_BEGIN(); + BootArg = fdt_getprop(fdt, node, "bootargs", &lenp); + if (BootArg != NULL) { + DEBUG((EFI_D_ERROR,"BootArg: %a\n",BootArg)); + } + DEBUG_CODE_END(); + + // + // Set Linux CmdLine + // + if ((CommandLineArguments != NULL) && (AsciiStrLen (CommandLineArguments) > 0)) { + err = fdt_setprop(fdt, node, "bootargs", CommandLineArguments, AsciiStrSize(CommandLineArguments)); + if (err) { + DEBUG((EFI_D_ERROR,"Fail to set new 'bootarg' (err:%d)\n",err)); + } + } + + // + // Set Linux Initrd + // + if (InitrdImageSize != 0) { + InitrdImageStart = cpu_to_fdt64 (InitrdImage); + err = fdt_setprop(fdt, node, "linux,initrd-start", &InitrdImageStart, sizeof(EFI_PHYSICAL_ADDRESS)); + if (err) { + DEBUG((EFI_D_ERROR,"Fail to set new 'linux,initrd-start' (err:%d)\n",err)); + } + InitrdImageEnd = cpu_to_fdt64 (InitrdImage + InitrdImageSize); + err = fdt_setprop(fdt, node, "linux,initrd-end", &InitrdImageEnd, sizeof(EFI_PHYSICAL_ADDRESS)); + if (err) { + DEBUG((EFI_D_ERROR,"Fail to set new 'linux,initrd-start' (err:%d)\n",err)); + } + } + + // + // Set Physical memory setup if does not exist + // + node = fdt_subnode_offset(fdt, 0, "memory"); + if (node < 0) { + // The 'memory' node does not exist, create it + node = fdt_add_subnode(fdt, 0, "memory"); + if (node >= 0) { + fdt_setprop_string(fdt, node, "name", "memory"); + fdt_setprop_string(fdt, node, "device_type", "memory"); + + GetSystemMemoryResources (&ResourceList); + Resource = (BDS_SYSTEM_MEMORY_RESOURCE*)ResourceList.ForwardLink; + + Region.Base = cpu_to_fdtn ((UINTN)Resource->PhysicalStart); + Region.Size = cpu_to_fdtn ((UINTN)Resource->ResourceLength); + + err = fdt_setprop(fdt, node, "reg", &Region, sizeof(Region)); + if (err) { + DEBUG((EFI_D_ERROR,"Fail to set new 'memory region' (err:%d)\n",err)); + } + } + } + + // + // Add the memory regions reserved by the UEFI Firmware + // + + // Retrieve the UEFI Memory Map + MemoryMap = NULL; + MemoryMapSize = 0; + Status = gBS->GetMemoryMap (&MemoryMapSize, MemoryMap, &MapKey, &DescriptorSize, &DescriptorVersion); + if (Status == EFI_BUFFER_TOO_SMALL) { + // The UEFI specification advises to allocate more memory for the MemoryMap buffer between successive + // calls to GetMemoryMap(), since allocation of the new buffer may potentially increase memory map size. + Pages = EFI_SIZE_TO_PAGES (MemoryMapSize) + 1; + MemoryMap = AllocatePages (Pages); + if (MemoryMap == NULL) { + Status = EFI_OUT_OF_RESOURCES; + goto FAIL_COMPLETE_FDT; + } + Status = gBS->GetMemoryMap (&MemoryMapSize, MemoryMap, &MapKey, &DescriptorSize, &DescriptorVersion); + } + + // Go through the list and add the reserved region to the Device Tree + if (!EFI_ERROR(Status)) { + MemoryMapPtr = MemoryMap; + for (Index = 0; Index < (MemoryMapSize / DescriptorSize); Index++) { + if (IsLinuxReservedRegion ((EFI_MEMORY_TYPE)MemoryMapPtr->Type)) { + DEBUG((DEBUG_VERBOSE, "Reserved region of type %d [0x%lX, 0x%lX]\n", + MemoryMapPtr->Type, + (UINTN)MemoryMapPtr->PhysicalStart, + (UINTN)(MemoryMapPtr->PhysicalStart + MemoryMapPtr->NumberOfPages * EFI_PAGE_SIZE))); + err = fdt_add_mem_rsv(fdt, MemoryMapPtr->PhysicalStart, MemoryMapPtr->NumberOfPages * EFI_PAGE_SIZE); + if (err != 0) { + Print(L"Warning: Fail to add 'memreserve' (err:%d)\n", err); + } + } + MemoryMapPtr = (EFI_MEMORY_DESCRIPTOR*)((UINTN)MemoryMapPtr + DescriptorSize); + } + } + + // + // Setup Arm Mpcore Info if it is a multi-core or multi-cluster platforms. + // + // For 'cpus' and 'cpu' device tree nodes bindings, refer to this file + // in the kernel documentation: + // Documentation/devicetree/bindings/arm/cpus.txt + // + ArmProcessorTable = AmdStyxGetArmProcessorTable(); + ASSERT_EFI_ERROR (ArmProcessorTable == NULL); + ArmCoreInfoTable = ArmProcessorTable->ArmCpus; + + // Make sure SoC's core count does not exceed what we want to build + ArmCoreCount = ArmProcessorTable->NumberOfEntries; + ASSERT_EFI_ERROR (ArmCoreCount > NUM_CORES); + + // Get Id from primary CPU + MpId = (UINTN) ArmReadMpidr (); + PrimaryClusterId = GET_CLUSTER_ID((UINT32) MpId); + PrimaryCoreId = GET_CORE_ID((UINT32) MpId); + + // Remove existing 'pmu' node and create a new one + pmu_node = fdt_subnode_offset (fdt, 0, "pmu"); + if (pmu_node >= 0) { + fdt_del_node (fdt, pmu_node); + } + pmu_node = fdt_add_subnode(fdt, 0, "pmu"); + if (pmu_node >= 0) { + // append PMU interrupts + for (Index = 0; Index < ArmCoreCount; Index++) { + MpId = (UINTN) GET_MPID (ArmCoreInfoTable[Index].ClusterId, + ArmCoreInfoTable[Index].CoreId); + + Status = AmdStyxGetPmuSpiFromMpId (MpId, &PmuInt.IntId); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "FDT: Error getting PMU interrupt for MpId '0x%x'\n", MpId)); + goto FAIL_COMPLETE_FDT; + } + + PmuInt.Flag = cpu_to_fdt32(PMU_INT_FLAG_SPI); + PmuInt.IntId = cpu_to_fdt32(PmuInt.IntId); + PmuInt.Type = cpu_to_fdt32(PMU_INT_TYPE_HIGH_LEVEL); + fdt_appendprop(fdt, pmu_node, "interrupts", &PmuInt, sizeof(PmuInt)); + } + fdt_setprop_string(fdt, pmu_node, "compatible", "arm,armv8-pmuv3"); + } else { + DEBUG((EFI_D_ERROR,"FDT: Error creating 'pmu' node\n")); + Status = EFI_INVALID_PARAMETER; + goto FAIL_COMPLETE_FDT; + } + + // Remove existing 'psci' node if feature not supported + node = fdt_subnode_offset (fdt, 0, "psci"); + if (node >= 0) { + if (!FixedPcdGetBool (PcdPsciOsSupport)) { + fdt_del_node (fdt, node); + } + } else if (FixedPcdGetBool (PcdPsciOsSupport) && + FixedPcdGetBool (PcdTrustedFWSupport)) { + // Add 'psci' node if not present + node = fdt_add_subnode(fdt, 0, "psci"); + if (node >= 0) { + fdt_setprop_string(fdt, node, "compatible", "arm,psci-0.2"); + fdt_appendprop_string(fdt, node, "compatible", "arm,psci"); + fdt_setprop_string(fdt, node, "method", "smc"); + } else { + DEBUG((EFI_D_ERROR,"FDT: Error creating 'psci' node\n")); + Status = EFI_INVALID_PARAMETER; + goto FAIL_COMPLETE_FDT; + } + } + + // Remove existing 'cpus' node and create a new one + node = fdt_subnode_offset (fdt, 0, "cpus"); + if (node >= 0) { + fdt_del_node (fdt, node); + } + node = fdt_add_subnode(fdt, 0, "cpus"); + if (node >= 0) { + // Configure the 'cpus' node + fdt_setprop_string(fdt, node, "name", "cpus"); + fdt_setprop_cell (fdt, node, "#address-cells", sizeof (UINTN) / 4); + fdt_setprop_cell(fdt, node, "#size-cells", 0); + } else { + DEBUG((EFI_D_ERROR,"FDT: Error creating 'cpus' node\n")); + Status = EFI_INVALID_PARAMETER; + goto FAIL_COMPLETE_FDT; + } + + // + // Walk the processor table in reverse order for proper listing in FDT + // + Index = ArmCoreCount; + while (Index--) { + // Create 'cpu' node + AsciiSPrint (Name, sizeof(Name), "CPU%d", Index); + cpu_node = fdt_add_subnode (fdt, node, Name); + if (cpu_node < 0) { + DEBUG ((EFI_D_ERROR, "FDT: Error on creating '%a' node\n", Name)); + Status = EFI_INVALID_PARAMETER; + goto FAIL_COMPLETE_FDT; + } + phandle[Index] = fdt_alloc_phandle(fdt); + fdt_setprop_cell (fdt, cpu_node, "phandle", phandle[Index]); + fdt_setprop_cell (fdt, cpu_node, "linux,phandle", phandle[Index]); + + if (FixedPcdGetBool (PcdPsciOsSupport) && + FixedPcdGetBool (PcdTrustedFWSupport)) { + fdt_setprop_string(fdt, cpu_node, "enable-method", "psci"); + } else { + fdt_setprop_string(fdt, cpu_node, "enable-method", "spin-table"); + MbAddr = ArmCoreInfoTable[Index].MailboxSetAddress; + MbAddr = cpu_to_fdtn (MbAddr); + fdt_setprop (fdt, cpu_node, "cpu-release-addr", &MbAddr, sizeof (MbAddr)); + } + MpId = (UINTN) GET_MPID (ArmCoreInfoTable[Index].ClusterId, + ArmCoreInfoTable[Index].CoreId); + MpId = cpu_to_fdtn (MpId); + fdt_setprop (fdt, cpu_node, "reg", &MpId, sizeof (MpId)); + fdt_setprop_string(fdt, cpu_node, "compatible", "arm,armv8"); + fdt_setprop_string (fdt, cpu_node, "device_type", "cpu"); + + // If it is not the primary core than the cpu should be disabled + if (((ArmCoreInfoTable[Index].ClusterId != PrimaryClusterId) || + (ArmCoreInfoTable[Index].CoreId != PrimaryCoreId))) { + fdt_setprop_string(fdt, cpu_node, "status", "disabled"); + } + } + + // Remove existing 'cpu-map' node and create a new one + map_node = fdt_subnode_offset (fdt, node, "cpu-map"); + if (map_node >= 0) { + fdt_del_node (fdt, map_node); + } + map_node = fdt_add_subnode(fdt, node, "cpu-map"); + if (map_node >= 0) { + ClusterIndex = ArmCoreCount - 1; + ClusterCount = NumberOfClustersInTable (ArmCoreInfoTable, + ArmCoreCount); + while (ClusterCount--) { + // Create 'cluster' node + AsciiSPrint (Name, sizeof(Name), "cluster%d", ClusterCount); + cluster_node = fdt_add_subnode (fdt, map_node, Name); + if (cluster_node < 0) { + DEBUG ((EFI_D_ERROR, "FDT: Error creating '%a' node\n", Name)); + Status = EFI_INVALID_PARAMETER; + goto FAIL_COMPLETE_FDT; + } + + ClusterId = ArmCoreInfoTable[ClusterIndex].ClusterId; + CoreIndex = ClusterIndex; + CoresInCluster = NumberOfCoresInCluster (ArmCoreInfoTable, + ArmCoreCount, + ClusterId); + while (CoresInCluster--) { + // Create 'core' node + AsciiSPrint (Name, sizeof(Name), "core%d", CoresInCluster); + cpu_node = fdt_add_subnode (fdt, cluster_node, Name); + if (cpu_node < 0) { + DEBUG ((EFI_D_ERROR, "FDT: Error creating '%a' node\n", Name)); + Status = EFI_INVALID_PARAMETER; + goto FAIL_COMPLETE_FDT; + } + fdt_setprop_cell (fdt, cpu_node, "cpu", phandle[CoreIndex]); + + // iterate to next core in cluster + if (CoresInCluster) { + do { + --CoreIndex; + } while (ClusterId != ArmCoreInfoTable[CoreIndex].ClusterId); + } + } + + // iterate to next cluster + if (ClusterCount) { + do { + --ClusterIndex; + } while (ClusterInRange (ArmCoreInfoTable, + ArmCoreInfoTable[ClusterIndex].ClusterId, + ClusterIndex + 1, + ArmCoreCount - 1)); + } + } + } else { + DEBUG((EFI_D_ERROR,"FDT: Error creating 'cpu-map' node\n")); + Status = EFI_INVALID_PARAMETER; + goto FAIL_COMPLETE_FDT; + } + + SetSocIdStatus (fdt); + SetXgbeStatus (fdt); + + DEBUG_CODE_BEGIN(); + // DebugDumpFdt (fdt); + DEBUG_CODE_END(); + + // If we succeeded to generate the new Device Tree then free the old Device Tree + gBS->FreePages (*FdtBlobBase, EFI_SIZE_TO_PAGES (*FdtBlobSize)); + + // Update the real size of the Device Tree + fdt_pack ((VOID*)(UINTN)(NewFdtBlobBase)); + + *FdtBlobBase = NewFdtBlobBase; + *FdtBlobSize = (UINTN)fdt_totalsize ((VOID*)(UINTN)(NewFdtBlobBase)); + return EFI_SUCCESS; + +FAIL_COMPLETE_FDT: + gBS->FreePages (NewFdtBlobAllocation, EFI_SIZE_TO_PAGES (NewFdtBlobSize)); + +FAIL_RELOCATE_FDT: + *FdtBlobSize = (UINTN)fdt_totalsize ((VOID*)(UINTN)(*FdtBlobBase)); + // Return success even if we failed to update the FDT blob. + // The original one is still valid. + return EFI_SUCCESS; +} + diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c new file mode 100644 index 0000000..2559762 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.c @@ -0,0 +1,279 @@ +/** @file + + Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "FdtDxe.h" + +extern EFI_BOOT_SERVICES *gBS; + +EFI_EVENT mFdtReadyToBootEvent; + +VOID +EFIAPI +FdtReadyToBoot ( + IN EFI_EVENT Event, + IN VOID *Context + ); + +EFI_STATUS +EFIAPI +FdtOverrideDevicePath( + IN CHAR16 *FdtFileName, + OUT EFI_DEVICE_PATH **FdtDevicePath + ); + + +/** + *--------------------------------------------------------------------------------------- + * + * FdtDxeEntryPoint + * + * Description: + * Entry point of the FDT Runtime Driver. + * + * Control flow: + * Configure reserved regions. + * + * Parameters: + * @param[in] ImageHandle The firmware allocate handle for the + * EFI image. + * @param[in] *SystemTable Pointer to the EFI System Table. + * + * @return EFI_STATUS + * + *------------------------------------------------------------------------------------ + **/ +EFI_STATUS +EFIAPI +FdtDxeEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + DEBUG ((EFI_D_ERROR, "FdtDxe Loaded\n")); + + // + // Ready-To-Boot callback + // + Status = EfiCreateEventReadyToBootEx( + TPL_CALLBACK, + FdtReadyToBoot, + NULL, + &mFdtReadyToBootEvent + ); + ASSERT_EFI_ERROR (Status); + + return Status; +} + +/** + *--------------------------------------------------------------------------------------- + * + * FdtReadyToBoot + * + * Description: + * Ready-2-Boot Event Callback for EFI_EVENT_SIGNAL_READY_TO_BOOT. + * + * Control flow: + * 1. Read FDT blob + * 2. Edit FDT table + * 3. Submit FDT to EFI system table + * + * Parameters: + * @param[in] Event EFI_EVENT notification. + * @param[in] *Context Pointer to the Event Context. + * + * @return VOID + * + *--------------------------------------------------------------------------------------- + **/ +VOID +EFIAPI +FdtReadyToBoot ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EFI_FIRMWARE_VOLUME2_PROTOCOL *FvProtocol; + EFI_HANDLE *HandleBuffer; + UINTN HandleCount; + UINTN Index; + EFI_STATUS Status; + UINT32 AuthenticationStatus; + EFI_GUID *FdtGuid = FixedPcdGetPtr(PcdStyxFdt); + UINT8 *FdtBlobBase = NULL; + UINTN FdtBlobSize = 0; + EFI_DEVICE_PATH *FdtDevicePath; + + // Move secondary core to a Pen complaint with MP-Parking protocol + if (!FixedPcdGetBool (PcdPsciOsSupport)) { + AmdStyxMoveParkedCores(); + } + + // Search for FDT blob in EFI partition + Status = FdtOverrideDevicePath(L"fdt.dtb", &FdtDevicePath); + if (!EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a: Loading Override FDT blob...\n", __FUNCTION__)); + + FdtBlobBase = (UINT8 *)(UINTN)LINUX_FDT_MAX_OFFSET; + Status = BdsLoadImage (FdtDevicePath, + AllocateMaxAddress, + (EFI_PHYSICAL_ADDRESS *)&FdtBlobBase, + &FdtBlobSize); + if (!EFI_ERROR (Status) && FdtBlobBase && FdtBlobSize) + goto LOAD_FDT_BLOB; + else + goto LOAD_FDT_ERROR; + } + + DEBUG ((EFI_D_ERROR, "%a: Loading Embedded FDT blob...\n", __FUNCTION__)); + HandleBuffer = NULL; + Status = gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiFirmwareVolume2ProtocolGuid, + NULL, + &HandleCount, + &HandleBuffer + ); + ASSERT_EFI_ERROR (Status); + + for (Index = 0; Index < HandleCount; Index++) { + Status = gBS->HandleProtocol ( + HandleBuffer[Index], + &gEfiFirmwareVolume2ProtocolGuid, + (VOID **) &FvProtocol + ); + if (!EFI_ERROR (Status)) { + Status = FvProtocol->ReadSection ( + FvProtocol, + FdtGuid, + EFI_SECTION_RAW, + 0, + (VOID **)&FdtBlobBase, + &FdtBlobSize, + &AuthenticationStatus + ); + if (!EFI_ERROR (Status) && FdtBlobBase && FdtBlobSize) + goto LOAD_FDT_BLOB; + } + } + +LOAD_FDT_ERROR: + DEBUG ((EFI_D_ERROR, "%a: Error loading FDT blob!\n", __FUNCTION__)); + goto LOAD_FDT_DONE; + +LOAD_FDT_BLOB: + Status = AmdStyxPrepareFdt(NULL, 0, 0, (EFI_PHYSICAL_ADDRESS *)&FdtBlobBase, &FdtBlobSize); + ASSERT_EFI_ERROR (Status); + + // Install the FDT blob into EFI system configuration table + Status = gBS->InstallConfigurationTable (&gFdtTableGuid, (VOID *)FdtBlobBase); + ASSERT_EFI_ERROR (Status); + DEBUG ((EFI_D_ERROR, "%a: FDT ready!\n", __FUNCTION__)); + +LOAD_FDT_DONE: + gBS->CloseEvent (mFdtReadyToBootEvent); + return; +} + +/** +*--------------------------------------------------------------------------------------- +* +* FdtOverrideDevicePath +* +* Description: +* Looks for a user-provided FDT blob to override the default file built with the UEFI image. +* +* Parameters: +* @param[in] FdtFileName Name of the FDT blob located in the EFI partition. +* @param[out] FdtDevicePath EFI Device Path of the FDT blob. +* +* @return EFI_SUCCESS The function completed successfully. +* @return EFI_NOT_FOUND The protocol could not be located. +* @return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol. +* +*--------------------------------------------------------------------------------------- +**/ +EFI_STATUS +EFIAPI +FdtOverrideDevicePath( + IN CHAR16 *FdtFileName, + OUT EFI_DEVICE_PATH **FdtDevicePath + ) +{ + EFI_DEVICE_PATH_PROTOCOL *DevPathProtocol; + EFI_HANDLE *HandleBuffer; + UINTN HandleCount; + UINTN Index; + EFI_STATUS Status; + CHAR16 *DevPathText; + EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *VolProtocol; + EFI_FILE_PROTOCOL *FileProtocol; + EFI_FILE_PROTOCOL *FileHandle; + CHAR16 FilePathText[120]; + + HandleBuffer = NULL; + Status = gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiSimpleFileSystemProtocolGuid, + NULL, + &HandleCount, + &HandleBuffer); + if (EFI_ERROR (Status)) + return Status; + + for (Index = 0; Index < HandleCount; Index++) { + DevPathProtocol = NULL; + Status = gBS->HandleProtocol ( + HandleBuffer[Index], + &gEfiDevicePathProtocolGuid, + (VOID **) &DevPathProtocol); + + if (!EFI_ERROR (Status)) { + VolProtocol = NULL; + Status = gBS->HandleProtocol ( + HandleBuffer[Index], + &gEfiSimpleFileSystemProtocolGuid, + (VOID **) &VolProtocol); + + if (!EFI_ERROR (Status)) { + FileProtocol = NULL; + Status = VolProtocol->OpenVolume(VolProtocol, &FileProtocol); + + if (!EFI_ERROR (Status)) { + FileHandle = NULL; + Status = FileProtocol->Open(FileProtocol, + &FileHandle, + FdtFileName, + EFI_FILE_MODE_READ, + 0); + + if (!EFI_ERROR (Status)) { + FileProtocol->Close(FileHandle); + DevPathText = ConvertDevicePathToText(DevPathProtocol, TRUE, FALSE); + StrCpy(FilePathText, DevPathText); + StrCat(FilePathText, L"/"); + StrCat(FilePathText, FdtFileName); + *FdtDevicePath = ConvertTextToDevicePath (FilePathText); + return EFI_SUCCESS; + } + } + } + } + } + + return Status; +} + diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.h b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.h new file mode 100644 index 0000000..7d17206 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.h @@ -0,0 +1,55 @@ +/** @file + + Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __FDT_DXE__H_ +#define __FDT_DXE__H_ + +#include <Uefi.h> +#include <Library/UefiLib.h> +#include <Library/UefiDriverEntryPoint.h> + +#include <Library/BaseLib.h> +#include <Library/BdsLib.h> +#include <Library/PcdLib.h> +#include <Library/DebugLib.h> +#include <Library/DevicePathLib.h> +#include <Guid/DxeServices.h> +#include <Library/DxeServicesTableLib.h> + +#include <Protocol/FirmwareVolume2.h> +#include <Protocol/SimpleFileSystem.h> +#include <Protocol/LoadFile.h> +#include <Protocol/DevicePath.h> +#include <Protocol/DevicePathFromText.h> + +//#define LINUX_FDT_MAX_OFFSET (PcdGet64 (PcdUefiEntryAddress) + PcdGet32(PcdArmLinuxFdtMaxOffset)) +#define LINUX_FDT_MAX_OFFSET (PcdGet64 (PcdSystemMemoryBase) + PcdGet32(PcdArmLinuxFdtMaxOffset)) + +VOID +EFIAPI +AmdStyxMoveParkedCores( + VOID + ); + +EFI_STATUS +AmdStyxPrepareFdt ( + IN CONST CHAR8* CommandLineArguments, + IN EFI_PHYSICAL_ADDRESS InitrdImage, + IN UINTN InitrdImageSize, + IN OUT EFI_PHYSICAL_ADDRESS *FdtBlobBase, + IN OUT UINTN *FdtBlobSize + ); + + +#endif // __FDT_DXE__H_ diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf new file mode 100644 index 0000000..5ac210b --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf @@ -0,0 +1,90 @@ +#/* @file +# +# Copyright (c) 2014 - 2015, AMD Inc. All rights reserved.<BR> +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#*/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = FdtDxe + FILE_GUID = 17f50855-6484-4b56-814b-1a88702d88e1 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = FdtDxeEntryPoint + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = AARCH64 +# +# + +[Sources.common] + FdtDxe.c + BdsLinuxFdt.c + LinuxLoaderHelper.c + +[Sources.AARCH64] + AArch64/BdsLinuxLoader.c + AArch64/BdsLinuxLoaderHelper.S | GCC + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + AmdModulePkg/AmdModulePkg.dec + OpenPlatformPkg/Platforms/AMD/Styx/AmdStyx.dec + +[LibraryClasses] + UefiDriverEntryPoint + DxeServicesTableLib + BdsLib + FdtLib + DevicePathLib + AmdStyxHelperLib + +[LibraryClasses.AARCH64] + ArmGicLib + PcdLib + +[Guids] + gEfiEventReadyToBootGuid ##CONSUMED + gEfiDxeServicesTableGuid ##CONSUMED + gArmMpCoreInfoGuid ##CONSUMED + gFdtTableGuid ##CONSUMED + +[Protocols] + gEfiFirmwareVolume2ProtocolGuid ##CONSUMED + +[Pcd] + gAmdStyxTokenSpaceGuid.PcdStyxFdt + gAmdStyxTokenSpaceGuid.PcdSocCpuId + gAmdModulePkgTokenSpaceGuid.PcdEthMacA + gAmdModulePkgTokenSpaceGuid.PcdEthMacB + gAmdModulePkgTokenSpaceGuid.PcdEthMacB + gArmTokenSpaceGuid.PcdSystemMemoryBase + +[FixedPcd] + gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset + gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment + gAmdStyxTokenSpaceGuid.PcdUefiEntryAddress + gAmdStyxTokenSpaceGuid.PcdPsciOsSupport + gAmdStyxTokenSpaceGuid.PcdTrustedFWSupport + gAmdStyxTokenSpaceGuid.PcdParkingProtocolBase + gAmdStyxTokenSpaceGuid.PcdParkingProtocolSize + +[Pcd.AARCH64] + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicSgiIntId + +[Depex] + TRUE + diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoader.h b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoader.h new file mode 100644 index 0000000..8a23d7f --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoader.h @@ -0,0 +1,166 @@ +/** @file +* +* Copyright (c) 2011-2015, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __LINUX_LOADER_H__ +#define __LINUX_LOADER_H__ + +#include <Library/BdsLib.h> +#include <Library/DebugLib.h> +#include <Library/HiiLib.h> +#include <Library/MemoryAllocationLib.h> +#include <Library/PerformanceLib.h> +#include <Library/PrintLib.h> +#include <Library/ShellLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiLib.h> + +#include <Protocol/EfiShellParameters.h> +#include <Protocol/EfiShell.h> + +#include <libfdt.h> + +// +// Definitions +// + +#define MAX_MSG_LEN 80 + +#define LINUX_UIMAGE_SIGNATURE 0x56190527 +#define LINUX_KERNEL_MAX_OFFSET (SystemMemoryBase + PcdGet32(PcdArmLinuxKernelMaxOffset)) +#define LINUX_ATAG_MAX_OFFSET (SystemMemoryBase + PcdGet32(PcdArmLinuxAtagMaxOffset)) +#define LINUX_FDT_MAX_OFFSET (SystemMemoryBase + PcdGet32(PcdArmLinuxFdtMaxOffset)) + +#define ARM_FDT_MACHINE_TYPE 0xFFFFFFFF + +// Additional size that could be used for FDT entries added by the UEFI OS Loader +// Estimation based on: EDID (300bytes) + bootargs (200bytes) + initrd region (20bytes) +// + system memory region (20bytes) + mp_core entries (200 bytes) +#define FDT_ADDITIONAL_ENTRIES_SIZE 0x300 + +// +// Global variables +// +extern CONST EFI_GUID mLinuxLoaderHiiGuid; +extern EFI_HANDLE mLinuxLoaderHiiHandle; + +// +// Local Types +// +typedef struct _SYSTEM_MEMORY_RESOURCE { + LIST_ENTRY Link; // This attribute must be the first entry of this structure (to avoid pointer computation) + EFI_PHYSICAL_ADDRESS PhysicalStart; + UINT64 ResourceLength; +} SYSTEM_MEMORY_RESOURCE; + +typedef VOID (*LINUX_KERNEL)(UINT32 Zero, UINT32 Arch, UINTN ParametersBase); + +// +// Functions +// +EFI_STATUS +PrintHii ( + IN CONST CHAR8 *Language OPTIONAL, + IN CONST EFI_STRING_ID HiiFormatStringId, + ... + ); + +VOID +PrintHelp ( + IN CONST CHAR8 *Language OPTIONAL + ); + +EFI_STATUS +ProcessShellParameters ( + OUT CHAR16 **KernelPath, + OUT CHAR16 **FdtPath, + OUT CHAR16 **InitrdPath, + OUT CHAR16 **LinuxCommandLine, + OUT UINTN *AtagMachineType + ); + +EFI_STATUS +ProcessAppCommandLine ( + OUT CHAR16 **KernelTextDevicePath, + OUT CHAR16 **FdtTextDevicePath, + OUT CHAR16 **InitrdTextDevicePath, + OUT CHAR16 **LinuxCommandLine, + OUT UINTN *AtagMachineType + ); + +VOID +PrintPerformance ( + VOID + ); + +EFI_STATUS +GetSystemMemoryResources ( + IN LIST_ENTRY *ResourceList + ); + +EFI_STATUS +PrepareFdt ( + IN EFI_PHYSICAL_ADDRESS SystemMemoryBase, + IN CONST CHAR8* CommandLineArguments, + IN EFI_PHYSICAL_ADDRESS InitrdImage, + IN UINTN InitrdImageSize, + IN OUT EFI_PHYSICAL_ADDRESS *FdtBlobBase, + IN OUT UINTN *FdtBlobSize + ); + +/** + Start a Linux kernel from a Device Path + + @param SystemMemoryBase Base of the system memory + @param LinuxKernel Device Path to the Linux Kernel + @param Parameters Linux kernel arguments + @param Fdt Device Path to the Flat Device Tree + @param MachineType ARM machine type value + + @retval EFI_SUCCESS All drivers have been connected + @retval EFI_NOT_FOUND The Linux kernel Device Path has not been found + @retval EFI_OUT_OF_RESOURCES There is not enough resource memory to store the matching results. + @retval RETURN_UNSUPPORTED ATAG is not support by this architecture + +**/ +EFI_STATUS +BootLinuxAtag ( + IN EFI_PHYSICAL_ADDRESS SystemMemoryBase, + IN EFI_DEVICE_PATH_PROTOCOL* LinuxKernelDevicePath, + IN EFI_DEVICE_PATH_PROTOCOL* InitrdDevicePath, + IN CONST CHAR8* CommandLineArguments, + IN UINTN MachineType + ); + +/** + Start a Linux kernel from a Device Path + + @param[in] LinuxKernelDevicePath Device Path to the Linux Kernel + @param[in] InitrdDevicePath Device Path to the Initrd + @param[in] Arguments Linux kernel arguments + + @retval EFI_SUCCESS All drivers have been connected + @retval EFI_NOT_FOUND The Linux kernel Device Path has not been found + @retval EFI_OUT_OF_RESOURCES There is not enough resource memory to store the matching results. + +**/ +EFI_STATUS +BootLinuxFdt ( + IN EFI_PHYSICAL_ADDRESS SystemMemoryBase, + IN EFI_DEVICE_PATH_PROTOCOL* LinuxKernelDevicePath, + IN EFI_DEVICE_PATH_PROTOCOL* InitrdDevicePath, + IN EFI_DEVICE_PATH_PROTOCOL* FdtDevicePath, + IN CONST CHAR8* Arguments + ); + +#endif /* __LINUX_LOADER_H__ */ diff --git a/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoaderHelper.c b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoaderHelper.c new file mode 100644 index 0000000..4d7a844 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/LinuxLoaderHelper.c @@ -0,0 +1,192 @@ +/** @file +* +* Copyright (c) 2011-2015, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include <PiDxe.h> +#include <Library/HobLib.h> +#include <Library/TimerLib.h> +#include <Library/SerialPortLib.h> + +#include "LinuxLoader.h" + +STATIC CONST CHAR8 *mTokenList[] = { + /*"SEC",*/ + "PEI", + "DXE", + "BDS", + NULL +}; + +VOID +PrintPerformance ( + VOID + ) +{ + UINTN Key; + CONST VOID *Handle; + CONST CHAR8 *Token, *Module; + UINT64 Start, Stop, TimeStamp; + UINT64 Delta, TicksPerSecond, Milliseconds; + UINTN Index; + CHAR8 Buffer[100]; + UINTN CharCount; + BOOLEAN CountUp; + + TicksPerSecond = GetPerformanceCounterProperties (&Start, &Stop); + if (Start < Stop) { + CountUp = TRUE; + } else { + CountUp = FALSE; + } + + TimeStamp = 0; + Key = 0; + do { + Key = GetPerformanceMeasurement (Key, (CONST VOID **)&Handle, &Token, &Module, &Start, &Stop); + if (Key != 0) { + for (Index = 0; mTokenList[Index] != NULL; Index++) { + if (AsciiStriCmp (mTokenList[Index], Token) == 0) { + Delta = CountUp ? (Stop - Start) : (Start - Stop); + TimeStamp += Delta; + Milliseconds = DivU64x64Remainder (MultU64x32 (Delta, 1000), TicksPerSecond, NULL); + CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "%6a %6ld ms\n", Token, Milliseconds); + SerialPortWrite ((UINT8 *) Buffer, CharCount); + break; + } + } + } + } while (Key != 0); + + CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "Total Time = %ld ms\n\n", + DivU64x64Remainder (MultU64x32 (TimeStamp, 1000), TicksPerSecond, NULL)); + SerialPortWrite ((UINT8 *) Buffer, CharCount); +} + +STATIC +EFI_STATUS +InsertSystemMemoryResources ( + LIST_ENTRY *ResourceList, + EFI_HOB_RESOURCE_DESCRIPTOR *ResHob + ) +{ + SYSTEM_MEMORY_RESOURCE *NewResource; + LIST_ENTRY *Link; + LIST_ENTRY *NextLink; + LIST_ENTRY AttachedResources; + SYSTEM_MEMORY_RESOURCE *Resource; + EFI_PHYSICAL_ADDRESS NewResourceEnd; + + if (IsListEmpty (ResourceList)) { + NewResource = AllocateZeroPool (sizeof (SYSTEM_MEMORY_RESOURCE)); + NewResource->PhysicalStart = ResHob->PhysicalStart; + NewResource->ResourceLength = ResHob->ResourceLength; + InsertTailList (ResourceList, &NewResource->Link); + return EFI_SUCCESS; + } + + InitializeListHead (&AttachedResources); + + Link = ResourceList->ForwardLink; + ASSERT (Link != NULL); + while (Link != ResourceList) { + Resource = (SYSTEM_MEMORY_RESOURCE*)Link; + + // Sanity Check. The resources should not overlapped. + ASSERT (!((ResHob->PhysicalStart >= Resource->PhysicalStart) && (ResHob->PhysicalStart < (Resource->PhysicalStart + Resource->ResourceLength)))); + ASSERT (!((ResHob->PhysicalStart + ResHob->ResourceLength - 1 >= Resource->PhysicalStart) && + ((ResHob->PhysicalStart + ResHob->ResourceLength - 1) < (Resource->PhysicalStart + Resource->ResourceLength)))); + + // The new resource is attached after this resource descriptor + if (ResHob->PhysicalStart == Resource->PhysicalStart + Resource->ResourceLength) { + Resource->ResourceLength = Resource->ResourceLength + ResHob->ResourceLength; + + NextLink = RemoveEntryList (&Resource->Link); + InsertTailList (&AttachedResources, &Resource->Link); + Link = NextLink; + } + // The new resource is attached before this resource descriptor + else if (ResHob->PhysicalStart + ResHob->ResourceLength == Resource->PhysicalStart) { + Resource->PhysicalStart = ResHob->PhysicalStart; + Resource->ResourceLength = Resource->ResourceLength + ResHob->ResourceLength; + + NextLink = RemoveEntryList (&Resource->Link); + InsertTailList (&AttachedResources, &Resource->Link); + Link = NextLink; + } else { + Link = Link->ForwardLink; + } + } + + if (!IsListEmpty (&AttachedResources)) { + // See if we can merge the attached resource with other resources + + NewResource = (SYSTEM_MEMORY_RESOURCE*)GetFirstNode (&AttachedResources); + Link = RemoveEntryList (&NewResource->Link); + while (!IsListEmpty (&AttachedResources)) { + // Merge resources + Resource = (SYSTEM_MEMORY_RESOURCE*)Link; + + // Ensure they overlap each other + ASSERT ( + ((NewResource->PhysicalStart >= Resource->PhysicalStart) && (NewResource->PhysicalStart < (Resource->PhysicalStart + Resource->ResourceLength))) || + (((NewResource->PhysicalStart + NewResource->ResourceLength) >= Resource->PhysicalStart) && ((NewResource->PhysicalStart + NewResource->ResourceLength) < (Resource->PhysicalStart + Resource->ResourceLength))) + ); + + NewResourceEnd = MAX (NewResource->PhysicalStart + NewResource->ResourceLength, Resource->PhysicalStart + Resource->ResourceLength); + NewResource->PhysicalStart = MIN (NewResource->PhysicalStart, Resource->PhysicalStart); + NewResource->ResourceLength = NewResourceEnd - NewResource->PhysicalStart; + + Link = RemoveEntryList (Link); + } + } else { + // None of the Resource of the list is attached to this ResHob. Create a new entry for it + NewResource = AllocateZeroPool (sizeof (SYSTEM_MEMORY_RESOURCE)); + NewResource->PhysicalStart = ResHob->PhysicalStart; + NewResource->ResourceLength = ResHob->ResourceLength; + } + InsertTailList (ResourceList, &NewResource->Link); + return EFI_SUCCESS; +} + +EFI_STATUS +GetSystemMemoryResources ( + IN LIST_ENTRY *ResourceList + ) +{ + EFI_HOB_RESOURCE_DESCRIPTOR *ResHob; + + InitializeListHead (ResourceList); + + // Find the first System Memory Resource Descriptor + ResHob = (EFI_HOB_RESOURCE_DESCRIPTOR *)GetFirstHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR); + while ((ResHob != NULL) && (ResHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY)) { + ResHob = (EFI_HOB_RESOURCE_DESCRIPTOR *)GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, (VOID *)((UINTN)ResHob + ResHob->Header.HobLength)); + } + + // Did not find any + if (ResHob == NULL) { + return EFI_NOT_FOUND; + } else { + InsertSystemMemoryResources (ResourceList, ResHob); + } + + ResHob = (EFI_HOB_RESOURCE_DESCRIPTOR *)GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, (VOID *)((UINTN)ResHob + ResHob->Header.HobLength)); + while (ResHob != NULL) { + if (ResHob->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) { + InsertSystemMemoryResources (ResourceList, ResHob); + } + ResHob = (EFI_HOB_RESOURCE_DESCRIPTOR *)GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, (VOID *)((UINTN)ResHob + ResHob->Header.HobLength)); + } + + return EFI_SUCCESS; +} diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 6bb40a0..e83a8ef 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -631,7 +631,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) # # FDT support # - OpenPlatformPkg/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf + OpenPlatformPkg/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf
# # PCI support diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf index 263a267..cbfb6c3 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf @@ -134,10 +134,10 @@ READ_LOCK_STATUS = TRUE # # FDT support # - INF OpenPlatformPkg/Platforms/AMD/Styx/Drivers/FdtDxe/FdtDxe.inf + INF OpenPlatformPkg/Platforms/AMD/Styx/OverdriveBoard/FdtDxe/FdtDxe.inf
FILE FREEFORM = PCD(gAmdStyxTokenSpaceGuid.PcdStyxFdt) { - SECTION RAW = OpenPlatformPkg/Platforms/AMD/Styx/FdtBlob/styx-overdrive.dtb + SECTION RAW = OpenPlatformPkg/Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb }
#
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran leo.duran@amd.com --- .../AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 2 +- .../AMD/Styx/OverdriveBoard/OverdriveBoard.fdf | 2 +- .../PrePeiCore/AArch64/ArchPrePeiCore.c | 58 +++++++ .../ArmPlatformPkg/PrePeiCore/AArch64/Exception.S | 126 ++++++++++++++++ .../ArmPlatformPkg/PrePeiCore/AArch64/Helper.S | 54 +++++++ .../PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 112 ++++++++++++++ .../PrePeiCore/AArch64/SwitchStack.S | 49 ++++++ .../ArmPlatformPkg/PrePeiCore/MainMPCore.c | 168 +++++++++++++++++++++ .../ArmPlatformPkg/PrePeiCore/PrePeiCore.c | 149 ++++++++++++++++++ .../ArmPlatformPkg/PrePeiCore/PrePeiCore.h | 85 +++++++++++ .../ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf | 76 ++++++++++ 11 files changed, 879 insertions(+), 2 deletions(-) create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/ArchPrePeiCore.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/MainMPCore.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.c create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.h create mode 100644 Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index e83a8ef..65ec870 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -561,7 +561,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2) !if $(DO_PSCI) ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf !else - ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf + OpenPlatformPkg/Platforms/AMD/Styx/OverdriveBoard/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf !endif MdeModulePkg/Core/Pei/PeiMain.inf MdeModulePkg/Universal/PCD/Pei/Pcd.inf { diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf index cbfb6c3..a7be38f 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.fdf @@ -250,7 +250,7 @@ READ_LOCK_STATUS = TRUE !if $(DO_PSCI) INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf !else - INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf + INF OpenPlatformPkg/Platforms/AMD/Styx/OverdriveBoard/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf !endif INF MdeModulePkg/Core/Pei/PeiMain.inf INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf diff --git a/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/ArchPrePeiCore.c b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/ArchPrePeiCore.c new file mode 100644 index 0000000..9f86d3e --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/ArchPrePeiCore.c @@ -0,0 +1,58 @@ +/** @file +* Main file supporting the transition to PEI Core in Normal World for Versatile Express +* +* Copyright (c) 2012-2013, ARM Limited. All rights reserved. +* Copyright (c) 2016, AMD Inc. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ +/** + Unmodified from: + ArmPlatformPkg/PrePeiCore/AArch64/ArchPrePeiCore.c + +**/ + +#include <Library/PrintLib.h> +#include <Library/SerialPortLib.h> + +#include "PrePeiCore.h" + +VOID +PeiCommonExceptionEntry ( + IN UINT32 Entry, + IN UINTN LR + ) +{ + CHAR8 Buffer[100]; + UINTN CharCount; + + switch (Entry) { + case EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS: + CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Synchronous Exception at 0x%X\n\r", LR); + break; + case EXCEPT_AARCH64_IRQ: + CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r", LR); + break; + case EXCEPT_AARCH64_FIQ: + CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r", LR); + break; + case EXCEPT_AARCH64_SERROR: + CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SError/Abort Exception at 0x%X\n\r", LR); + break; + default: + CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r", LR); + break; + } + + SerialPortWrite ((UINT8 *) Buffer, CharCount); + + while(1); +} + diff --git a/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S new file mode 100644 index 0000000..38a4257 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S @@ -0,0 +1,126 @@ +# +# Copyright (c) 2011-2014, ARM Limited. All rights reserved. +# Copyright (c) 2016, AMD Inc. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# +#/** +# Unmodified from: +# ArmPlatformPkg/PrePeiCore/AArch64/Exception.S +# +#**/ + +#include <Chipset/AArch64.h> +#include <AsmMacroIoLibV8.h> +#include <Base.h> +#include <AutoGen.h> + +.text + +//============================================================ +//Default Exception Handlers +//============================================================ + +#define TO_HANDLER \ + EL1_OR_EL2(x1) \ +1: mrs x1, elr_el1 /* EL1 Exception Link Register */ ;\ + b 3f ;\ +2: mrs x1, elr_el2 /* EL2 Exception Link Register */ ;\ +3: bl ASM_PFX(PeiCommonExceptionEntry) ; + + +// +// Default Exception handlers: There is no plan to return from any of these exceptions. +// No context saving at all. +// + +VECTOR_BASE(PeiVectorTable) + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SYNC) +_DefaultSyncExceptHandler_t: + mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_IRQ) +_DefaultIrq_t: + mov x0, #EXCEPT_AARCH64_IRQ + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_FIQ) +_DefaultFiq_t: + mov x0, #EXCEPT_AARCH64_FIQ + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SERR) +_DefaultSError_t: + mov x0, #EXCEPT_AARCH64_SERROR + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SYNC) +_DefaultSyncExceptHandler_h: + mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_IRQ) +_DefaultIrq_h: + mov x0, #EXCEPT_AARCH64_IRQ + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_FIQ) +_DefaultFiq_h: + mov x0, #EXCEPT_AARCH64_FIQ + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SERR) +_DefaultSError_h: + mov x0, #EXCEPT_AARCH64_SERROR + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SYNC) +_DefaultSyncExceptHandler_LowerA64: + mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_IRQ) +_DefaultIrq_LowerA64: + mov x0, #EXCEPT_AARCH64_IRQ + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_FIQ) +_DefaultFiq_LowerA64: + mov x0, #EXCEPT_AARCH64_FIQ + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SERR) +_DefaultSError_LowerA64: + mov x0, #EXCEPT_AARCH64_SERROR + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SYNC) +_DefaultSyncExceptHandler_LowerA32: + mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_IRQ) +_DefaultIrq_LowerA32: + mov x0, #EXCEPT_AARCH64_IRQ + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_FIQ) +_DefaultFiq_LowerA32: + mov x0, #EXCEPT_AARCH64_FIQ + TO_HANDLER + +VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SERR) +_DefaultSError_LowerA32: + mov x0, #EXCEPT_AARCH64_SERROR + TO_HANDLER + +VECTOR_END(PeiVectorTable) diff --git a/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S new file mode 100644 index 0000000..b9a0049 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S @@ -0,0 +1,54 @@ +#======================================================================================== +# Copyright (c) 2011-2013, ARM Limited. All rights reserved. +# Copyright (c) 2016, AMD Inc. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http:#opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#======================================================================================= +#/** +# Unmodified from: +# ArmPlatformPkg/PrePeiCore/AArch64/Helper.S +# +#**/ + +#include <AsmMacroIoLibV8.h> +#include <Chipset/AArch64.h> + +#start of the code section +.text +.align 3 + +GCC_ASM_EXPORT(SetupExceptionLevel1) +GCC_ASM_EXPORT(SetupExceptionLevel2) + +// Setup EL1 while in EL1 +ASM_PFX(SetupExceptionLevel1): + mov x5, x30 // Save LR + + mov x0, #CPACR_CP_FULL_ACCESS + bl ASM_PFX(ArmWriteCpacr) // Disable copro traps to EL1 + + ret x5 + +// Setup EL2 while in EL2 +ASM_PFX(SetupExceptionLevel2): + msr sctlr_el2, xzr + mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register + + // Send all interrupts to their respective Exception levels for EL2 + orr x0, x0, #(1 << 3) // Enable EL2 FIQ + orr x0, x0, #(1 << 4) // Enable EL2 IRQ + orr x0, x0, #(1 << 5) // Enable EL2 SError and Abort + msr hcr_el2, x0 // Write back our settings + + msr cptr_el2, xzr // Disable copro traps to EL2 + + ret + +ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S new file mode 100644 index 0000000..2ddf4d4 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S @@ -0,0 +1,112 @@ +// +// Copyright (c) 2011-2014, ARM Limited. All rights reserved. +// Copyright (c) 2016, AMD Inc. All rights reserved. +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +// + +#/** +# Unmodified from: +# ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S +# +#**/ + +#include <AsmMacroIoLibV8.h> +#include <Base.h> +#include <Library/PcdLib.h> +#include <AutoGen.h> + +.text +.align 3 + +GCC_ASM_IMPORT(CEntryPoint) +GCC_ASM_IMPORT(ArmPlatformGetCorePosition) +GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore) +GCC_ASM_IMPORT(ArmReadMpidr) +GCC_ASM_IMPORT(ArmPlatformPeiBootAction) +GCC_ASM_EXPORT(_ModuleEntryPoint) + +StartupAddr: .8byte CEntryPoint + +ASM_PFX(_ModuleEntryPoint): + // Do early platform specific actions + bl ASM_PFX(ArmPlatformPeiBootAction) + +// NOTE: We could be booting from EL3, EL2 or EL1. Need to correctly detect +// and configure the system accordingly. EL2 is default if possible. +// If we started in EL3 we need to switch and run at EL2. +// If we are running at EL2 stay in EL2 +// If we are starting at EL1 stay in EL1. + +// If started at EL3 Sec is run and switches to EL2 before jumping to PEI. +// If started at EL1 or EL2 Sec jumps directly to PEI without making any +// changes. + +// Which EL are we running at? Every EL needs some level of setup... +// We should not run this code in EL3 + EL1_OR_EL2(x0) +1:bl ASM_PFX(SetupExceptionLevel1) + b ASM_PFX(MainEntryPoint) +2:bl ASM_PFX(SetupExceptionLevel2) + b ASM_PFX(MainEntryPoint) + +ASM_PFX(MainEntryPoint): + // Identify CPU ID + bl ASM_PFX(ArmReadMpidr) + // Keep a copy of the MpId register value + mov x5, x0 + + // Is it the Primary Core ? + bl ASM_PFX(ArmPlatformIsPrimaryCore) + + // Get the top of the primary stacks (and the base of the secondary stacks) + LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), x1) + LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2) + add x1, x1, x2 + + // x0 is equal to 1 if I am the primary core + cmp x0, #1 + b.eq _SetupPrimaryCoreStack + +_SetupSecondaryCoreStack: + // x1 contains the base of the secondary stacks + + // Get the Core Position + mov x6, x1 // Save base of the secondary stacks + mov x0, x5 + bl ASM_PFX(ArmPlatformGetCorePosition) + // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack + add x0, x0, #1 + + // StackOffset = CorePos * StackSize + LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x2) + mul x0, x0, x2 + // SP = StackBase + StackOffset + add sp, x6, x0 + +_PrepareArguments: + // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector + LoadConstantToReg (FixedPcdGet64(PcdFvBaseAddress), x2) + add x2, x2, #8 + ldr x1, [x2] + + // Move sec startup address into a data register + // Ensure we're jumping to FV version of the code (not boot remapped alias) + ldr x3, StartupAddr + + // Jump to PrePeiCore C code + // x0 = mp_id + // x1 = pei_core_address + mov x0, x5 + blr x3 + +_SetupPrimaryCoreStack: + mov sp, x1 + b _PrepareArguments diff --git a/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S new file mode 100644 index 0000000..8414d29 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S @@ -0,0 +1,49 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR> +# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> +# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR> +# Copyright (c) 2016, AMD Inc. All rights reserved.<BR> +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#------------------------------------------------------------------------------ +#/** +# Unmodified from: +# ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S +# +#**/ + +.text +.align 3 + +GCC_ASM_EXPORT(SecSwitchStack) + + + +#/** +# This allows the caller to switch the stack and return +# +# @param StackDelta Signed amount by which to modify the stack pointer +# +# @return Nothing. Goes to the Entry Point passing in the new parameters +# +#**/ +#VOID +#EFIAPI +#SecSwitchStack ( +# VOID *StackDelta +# )# +# +ASM_PFX(SecSwitchStack): + mov x1, sp + add x1, x0, x1 + mov sp, x1 + ret + diff --git a/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/MainMPCore.c b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/MainMPCore.c new file mode 100644 index 0000000..c708f84 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/MainMPCore.c @@ -0,0 +1,168 @@ +/** @file +* +* Copyright (c) 2011-2014, ARM Limited. All rights reserved. +* Copyright (c) 2016, AMD Inc. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ +/** + Derived from: + ArmPlatformPkg/PrePeiCore/MainMPCore.c + + Adds MmioWrite64() for 64-bit mailbox pointers. + +**/ + +#include <Library/ArmGicLib.h> + +#include <Ppi/ArmMpCoreInfo.h> + +#include "PrePeiCore.h" + +/* + * This is the main function for secondary cores. They loop around until a non Null value is written to + * SYS_FLAGS register.The SYS_FLAGS register is platform specific. + * Note:The secondary cores, while executing secondary_main, assumes that: + * : SGI 0 is configured as Non-secure interrupt + * : Priority Mask is configured to allow SGI 0 + * : Interrupt Distributor and CPU interfaces are enabled + * + */ +VOID +EFIAPI +SecondaryMain ( + IN UINTN MpId + ) +{ + EFI_STATUS Status; + UINTN PpiListSize; + UINTN PpiListCount; + EFI_PEI_PPI_DESCRIPTOR *PpiList; + ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi; + UINTN Index; + UINTN ArmCoreCount; + ARM_CORE_INFO *ArmCoreInfoTable; + UINT32 ClusterId; + UINT32 CoreId; + VOID (*SecondaryStart)(VOID); + UINTN SecondaryEntryAddr; + UINTN AcknowledgeInterrupt; + UINTN InterruptId; + + ClusterId = GET_CLUSTER_ID(MpId); + CoreId = GET_CORE_ID(MpId); + + // Get the gArmMpCoreInfoPpiGuid + PpiListSize = 0; + ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList); + PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR); + for (Index = 0; Index < PpiListCount; Index++, PpiList++) { + if (CompareGuid (PpiList->Guid, &gArmMpCoreInfoPpiGuid) == TRUE) { + break; + } + } + + // On MP Core Platform we must implement the ARM MP Core Info PPI + ASSERT (Index != PpiListCount); + + ArmMpCoreInfoPpi = PpiList->Ppi; + ArmCoreCount = 0; + Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable); + ASSERT_EFI_ERROR (Status); + + // Find the core in the ArmCoreTable + for (Index = 0; Index < ArmCoreCount; Index++) { + if ((ArmCoreInfoTable[Index].ClusterId == ClusterId) && (ArmCoreInfoTable[Index].CoreId == CoreId)) { + break; + } + } + + // The ARM Core Info Table must define every core + ASSERT (Index != ArmCoreCount); + + // Clear Secondary cores MailBox + if (sizeof(UINTN) == sizeof(UINT64)) + MmioWrite64 (ArmCoreInfoTable[Index].MailboxClearAddress, ArmCoreInfoTable[Index].MailboxClearValue); + else + MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress, ArmCoreInfoTable[Index].MailboxClearValue); + + do { + ArmCallWFI (); + + // Read the Mailbox + if (sizeof(UINTN) == sizeof(UINT64)) + SecondaryEntryAddr = MmioRead64 (ArmCoreInfoTable[Index].MailboxGetAddress); + else + SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress); + + // Acknowledge the interrupt and send End of Interrupt signal. + AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId); + // Check if it is a valid interrupt ID + if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) { + // Got a valid SGI number hence signal End of Interrupt + ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt); + } + } while (SecondaryEntryAddr == 0); + + // Jump to secondary core entry point. + SecondaryStart = (VOID (*)())SecondaryEntryAddr; + SecondaryStart(); + + // The secondaries shouldn't reach here + ASSERT(FALSE); +} + +VOID +EFIAPI +PrimaryMain ( + IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint + ) +{ + EFI_SEC_PEI_HAND_OFF SecCoreData; + UINTN PpiListSize; + EFI_PEI_PPI_DESCRIPTOR *PpiList; + UINTN TemporaryRamBase; + UINTN TemporaryRamSize; + + CreatePpiList (&PpiListSize, &PpiList); + + // Enable the GIC Distributor + ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase)); + + // If ArmVe has not been built as Standalone then we need to wake up the secondary cores + if (FeaturePcdGet (PcdSendSgiToBringUpSecondaryCores)) { + // Sending SGI to all the Secondary CPU interfaces + ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId)); + } + + // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at + // the base of the primary core stack + PpiListSize = ALIGN_VALUE(PpiListSize, CPU_STACK_ALIGNMENT); + TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize; + TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize; + + // + // Bind this information into the SEC hand-off state + // Note: this must be in sync with the stuff in the asm file + // Note also: HOBs (pei temp ram) MUST be above stack + // + SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF); + SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress); + SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize); + SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack) + SecCoreData.TemporaryRamSize = TemporaryRamSize; + SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase; + SecCoreData.PeiTemporaryRamSize = ALIGN_VALUE (SecCoreData.TemporaryRamSize / 2, CPU_STACK_ALIGNMENT); + SecCoreData.StackBase = (VOID *)((UINTN)SecCoreData.TemporaryRamBase + SecCoreData.PeiTemporaryRamSize); + SecCoreData.StackSize = (TemporaryRamBase + TemporaryRamSize) - (UINTN)SecCoreData.StackBase; + + // Jump to PEI core entry point + PeiCoreEntryPoint (&SecCoreData, PpiList); +} diff --git a/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.c new file mode 100644 index 0000000..7b45c00 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.c @@ -0,0 +1,149 @@ +/** @file +* Main file supporting the transition to PEI Core in Normal World for Versatile Express +* +* Copyright (c) 2011-2014, ARM Limited. All rights reserved. +* Copyright (c) 2016, AMD Inc. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ +/** + Unmodified from: + ArmPlatformPkg/PrePeiCore/PrePeiCore.c + +**/ + +#include <Library/BaseLib.h> +#include <Library/DebugAgentLib.h> +#include <Library/ArmLib.h> + +#include "PrePeiCore.h" + +CONST EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport }; + +CONST EFI_PEI_PPI_DESCRIPTOR gCommonPpiTable[] = { + { + EFI_PEI_PPI_DESCRIPTOR_PPI, + &gEfiTemporaryRamSupportPpiGuid, + (VOID *) &mTemporaryRamSupportPpi + } +}; + +VOID +CreatePpiList ( + OUT UINTN *PpiListSize, + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList + ) +{ + EFI_PEI_PPI_DESCRIPTOR *PlatformPpiList; + UINTN PlatformPpiListSize; + UINTN ListBase; + EFI_PEI_PPI_DESCRIPTOR *LastPpi; + + // Get the Platform PPIs + PlatformPpiListSize = 0; + ArmPlatformGetPlatformPpiList (&PlatformPpiListSize, &PlatformPpiList); + + // Copy the Common and Platform PPis in Temporrary Memory + ListBase = PcdGet64 (PcdCPUCoresStackBase); + CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable)); + CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize); + + // Set the Terminate flag on the last PPI entry + LastPpi = (EFI_PEI_PPI_DESCRIPTOR*)ListBase + ((sizeof(gCommonPpiTable) + PlatformPpiListSize) / sizeof(EFI_PEI_PPI_DESCRIPTOR)) - 1; + LastPpi->Flags |= EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST; + + *PpiList = (EFI_PEI_PPI_DESCRIPTOR*)ListBase; + *PpiListSize = sizeof(gCommonPpiTable) + PlatformPpiListSize; +} + +VOID +CEntryPoint ( + IN UINTN MpId, + IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint + ) +{ + // Data Cache enabled on Primary core when MMU is enabled. + ArmDisableDataCache (); + // Invalidate Data cache + ArmInvalidateDataCache (); + // Invalidate instruction cache + ArmInvalidateInstructionCache (); + // Enable Instruction Caches on all cores. + ArmEnableInstructionCache (); + + // + // Note: Doesn't have to Enable CPU interface in non-secure world, + // as Non-secure interface is already enabled in Secure world. + // + + // Write VBAR - The Exception Vector table must be aligned to its requirement + // Note: The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure + // 'Align=4K' is defined into your FDF for this module. + ASSERT (((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0); + ArmWriteVBar ((UINTN)PeiVectorTable); + + //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on. + + // If not primary Jump to Secondary Main + if (ArmPlatformIsPrimaryCore (MpId)) { + // Initialize the Debug Agent for Source Level Debugging + InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL); + SaveAndSetDebugTimerInterrupt (TRUE); + + // Initialize the platform specific controllers + ArmPlatformInitialize (MpId); + + // Goto primary Main. + PrimaryMain (PeiCoreEntryPoint); + } else { + SecondaryMain (MpId); + } + + // PEI Core should always load and never return + ASSERT (FALSE); +} + +EFI_STATUS +EFIAPI +PrePeiCoreTemporaryRamSupport ( + IN CONST EFI_PEI_SERVICES **PeiServices, + IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase, + IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase, + IN UINTN CopySize + ) +{ + VOID *OldHeap; + VOID *NewHeap; + VOID *OldStack; + VOID *NewStack; + UINTN HeapSize; + + HeapSize = ALIGN_VALUE (CopySize / 2, CPU_STACK_ALIGNMENT); + + OldHeap = (VOID*)(UINTN)TemporaryMemoryBase; + NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize - HeapSize)); + + OldStack = (VOID*)((UINTN)TemporaryMemoryBase + HeapSize); + NewStack = (VOID*)(UINTN)PermanentMemoryBase; + + // + // Migrate the temporary memory stack to permanent memory stack. + // + CopyMem (NewStack, OldStack, CopySize - HeapSize); + + // + // Migrate the temporary memory heap to permanent memory heap. + // + CopyMem (NewHeap, OldHeap, HeapSize); + + SecSwitchStack ((UINTN)NewStack - (UINTN)OldStack); + + return EFI_SUCCESS; +} diff --git a/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.h b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.h new file mode 100644 index 0000000..334f086 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCore.h @@ -0,0 +1,85 @@ +/** @file +* Main file supporting the transition to PEI Core in Normal World for Versatile Express +* +* Copyright (c) 2011, ARM Limited. All rights reserved. +* Copyright (c) 2016, AMD Inc. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ +/** + Unmodified from: + ArmPlatformPkg/PrePeiCore/PrePeiCore.h + +**/ + +#ifndef __PREPEICORE_H_ +#define __PREPEICORE_H_ + +#include <Library/ArmLib.h> +#include <Library/ArmPlatformLib.h> +#include <Library/BaseMemoryLib.h> +#include <Library/DebugLib.h> +#include <Library/IoLib.h> +#include <Library/PcdLib.h> + +#include <PiPei.h> +#include <Ppi/TemporaryRamSupport.h> + +VOID +CreatePpiList ( + OUT UINTN *PpiListSize, + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList + ); + +EFI_STATUS +EFIAPI +PrePeiCoreTemporaryRamSupport ( + IN CONST EFI_PEI_SERVICES **PeiServices, + IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase, + IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase, + IN UINTN CopySize + ); + +VOID +SecSwitchStack ( + INTN StackDelta + ); + +// Vector Table for Pei Phase +VOID PeiVectorTable (VOID); + +VOID +EFIAPI +PrimaryMain ( + IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint + ); + +/* + * This is the main function for secondary cores. They loop around until a non Null value is written to + * SYS_FLAGS register.The SYS_FLAGS register is platform specific. + * Note:The secondary cores, while executing secondary_main, assumes that: + * : SGI 0 is configured as Non-secure interrupt + * : Priority Mask is configured to allow SGI 0 + * : Interrupt Distributor and CPU interfaces are enabled + * + */ +VOID +EFIAPI +SecondaryMain ( + IN UINTN MpId + ); + +VOID +PeiCommonExceptionEntry ( + IN UINT32 Entry, + IN UINTN LR + ); + +#endif diff --git a/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf new file mode 100644 index 0000000..28b5b04 --- /dev/null +++ b/Platforms/AMD/Styx/OverdriveBoard/Override/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf @@ -0,0 +1,76 @@ +#/** @file +# Pre PeiCore - Hand-off to PEI Core in Normal World +# +# Copyright (c) 2011-2014, ARM Limited. All rights reserved. +# Copyright (c) 2016, AMD Inc. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ +#/** +# Derived from: +# ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf +# +# Removes [Sources.ARM] section +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = ArmPlatformPrePeiCore + FILE_GUID = 469fc080-aec1-11df-927c-0002a5d5c51b + MODULE_TYPE = SEC + VERSION_STRING = 1.0 + +[Sources.common] + MainMPCore.c + PrePeiCore.c + +[Sources.AARCH64] + AArch64/ArchPrePeiCore.c + AArch64/PrePeiCoreEntryPoint.S + AArch64/SwitchStack.S + AArch64/Exception.S + AArch64/Helper.S + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + +[LibraryClasses] + ArmLib + ArmPlatformLib + BaseLib + DebugLib + DebugAgentLib + IoLib + ArmGicLib + PrintLib + SerialPortLib + +[Ppis] + gEfiTemporaryRamSupportPpiGuid + gArmMpCoreInfoPpiGuid + +[FeaturePcd] + gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores + +[FixedPcd] + gArmTokenSpaceGuid.PcdFvBaseAddress + gArmTokenSpaceGuid.PcdFvSize + + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize + + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase + gArmTokenSpaceGuid.PcdGicSgiIntId