This cleans up some dodgy code in the SMBIOS driver, after which it is possible to enable the shiny new memory protection controls.
Changes since v1: - enable on Cello as well as Overdrive, I will leave it up to Alan whether this gets enabled on the Overdrive 1000 as well - simplify patch #1
Note that the prerequisite EDK2 changes have now been merged.
Ard Biesheuvel (4): Platforms/AMD/Styx/PlatformSmbiosDxe: don't write to string literals Platforms/AMD/Styx: constify/staticize all local functions and variables Platforms/AMD/Overdrive: enable strict memory permission policy Platforms/AMD/Cello: enable strict memory permission policy
Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 16 ++++ Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 79 +++++++++++--------- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 16 ++++ 3 files changed, 74 insertions(+), 37 deletions(-)
Remove the code from PlatformSmbiosDxe that writes to a string literal to turn the string 'L# Cache' into L1/L2/L3, and just emit the three versions instead. This is necessary given that string literals are emitted into .rodata by default, which makes them read-only when strict memory permissions are in effect.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c index 5ee5d92fdf9c..7548be727849 100644 --- a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c +++ b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c @@ -354,17 +354,10 @@ SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { CacheTypeUnknown, // System Cache Type CacheAssociativity2Way // Associativity }; -#if (FixedPcdGetBool (PcdIscpSupport)) -CHAR8 *mCacheInfoType7Strings[] = { - "L# Cache", - NULL -}; -#else CHAR8 *mCacheInfoType7Strings[] = { "Cache1", NULL }; -#endif
/*********************************************************************** SMBIOS data definition TYPE9 System Slot Information @@ -710,7 +703,7 @@ CacheInfoUpdateSmbiosType7 ( dstType7.SocketDesignation = 1; // "L# Cache"
// L1 cache settings - mCacheInfoType7Strings[0][1] = '1'; // "L# Cache" --> "L1 Cache" + mCacheInfoType7Strings[0] = "L1 Cache"; SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L1[0]; dstType7.CacheConfiguration = SmbiosT7->T7CacheCfg; dstType7.MaximumCacheSize = SmbiosT7->T7MaxCacheSize; @@ -726,7 +719,7 @@ CacheInfoUpdateSmbiosType7 ( LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings);
// L2 cache settings - mCacheInfoType7Strings[0][1] = '2'; // "L# Cache" --> "L2 Cache" + mCacheInfoType7Strings[0] = "L2 Cache"; SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L2[0]; dstType7.CacheConfiguration = SmbiosT7->T7CacheCfg; dstType7.MaximumCacheSize = SmbiosT7->T7MaxCacheSize; @@ -742,7 +735,7 @@ CacheInfoUpdateSmbiosType7 ( LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings);
// L3 cache settings - mCacheInfoType7Strings[0][1] = '3'; // "L# Cache" --> "L3 Cache" + mCacheInfoType7Strings[0] = "L3 Cache"; SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L3[0]; dstType7.CacheConfiguration = SmbiosT7->T7CacheCfg; dstType7.MaximumCacheSize = SmbiosT7->T7MaxCacheSize;
On Tue, Feb 28, 2017 at 03:11:17PM +0000, Ard Biesheuvel wrote:
Remove the code from PlatformSmbiosDxe that writes to a string literal to turn the string 'L# Cache' into L1/L2/L3, and just emit the three versions instead. This is necessary given that string literals are emitted into .rodata by default, which makes them read-only when strict memory permissions are in effect.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c index 5ee5d92fdf9c..7548be727849 100644 --- a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c +++ b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c @@ -354,17 +354,10 @@ SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { CacheTypeUnknown, // System Cache Type CacheAssociativity2Way // Associativity }; -#if (FixedPcdGetBool (PcdIscpSupport)) -CHAR8 *mCacheInfoType7Strings[] = {
- "L# Cache",
- NULL
-}; -#else CHAR8 *mCacheInfoType7Strings[] = { "Cache1", NULL }; -#endif /*********************************************************************** SMBIOS data definition TYPE9 System Slot Information @@ -710,7 +703,7 @@ CacheInfoUpdateSmbiosType7 ( dstType7.SocketDesignation = 1; // "L# Cache" // L1 cache settings
- mCacheInfoType7Strings[0][1] = '1'; // "L# Cache" --> "L1 Cache"
- mCacheInfoType7Strings[0] = "L1 Cache"; SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L1[0]; dstType7.CacheConfiguration = SmbiosT7->T7CacheCfg; dstType7.MaximumCacheSize = SmbiosT7->T7MaxCacheSize;
@@ -726,7 +719,7 @@ CacheInfoUpdateSmbiosType7 ( LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings); // L2 cache settings
- mCacheInfoType7Strings[0][1] = '2'; // "L# Cache" --> "L2 Cache"
- mCacheInfoType7Strings[0] = "L2 Cache"; SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L2[0]; dstType7.CacheConfiguration = SmbiosT7->T7CacheCfg; dstType7.MaximumCacheSize = SmbiosT7->T7MaxCacheSize;
@@ -742,7 +735,7 @@ CacheInfoUpdateSmbiosType7 ( LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings); // L3 cache settings
- mCacheInfoType7Strings[0][1] = '3'; // "L# Cache" --> "L3 Cache"
- mCacheInfoType7Strings[0] = "L3 Cache"; SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L3[0]; dstType7.CacheConfiguration = SmbiosT7->T7CacheCfg; dstType7.MaximumCacheSize = SmbiosT7->T7MaxCacheSize;
-- 2.7.4
Now that we've made a clean spot, let's clean up this module by making everything we can STATIC and/or CONST.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 66 ++++++++++++-------- 1 file changed, 39 insertions(+), 27 deletions(-)
diff --git a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c index 7548be727849..53380b311ba7 100644 --- a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c +++ b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c @@ -57,15 +57,15 @@ extern EFI_BOOT_SERVICES *gBS; * G L O B A L S *---------------------------------------------------------------------------------------- */ -EFI_SMBIOS_PROTOCOL *mSmbiosProtocol; -AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; -ISCP_SMBIOS_INFO mSmbiosInfo; +STATIC EFI_SMBIOS_PROTOCOL *mSmbiosProtocol; +STATIC AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; +STATIC ISCP_SMBIOS_INFO mSmbiosInfo;
/*********************************************************************** SMBIOS data definition TYPE0 BIOS Information ************************************************************************/ -SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = { +STATIC CONST SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = { { EFI_SMBIOS_TYPE_BIOS_INFORMATION, sizeof (SMBIOS_TABLE_TYPE0), 0 }, 1, // Vendor String 2, // BiosVersion String @@ -130,7 +130,7 @@ SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = { 0xFF, // EmbeddedControllerFirmwareMinorRelease };
-CHAR8 *mBIOSInfoType0Strings[] = { +STATIC CHAR8 CONST * CONST mBIOSInfoType0Strings[] = { "edk2.sourceforge.net", // Vendor String __TIME__, // BiosVersion String __DATE__, // BiosReleaseDate String @@ -140,7 +140,7 @@ CHAR8 *mBIOSInfoType0Strings[] = { /*********************************************************************** SMBIOS data definition TYPE1 System Information ************************************************************************/ -SMBIOS_TABLE_TYPE1 mSysInfoType1 = { +STATIC CONST SMBIOS_TABLE_TYPE1 mSysInfoType1 = { { EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, sizeof (SMBIOS_TABLE_TYPE1), 0 }, 1, // Manufacturer String 2, // ProductName String @@ -151,7 +151,7 @@ SMBIOS_TABLE_TYPE1 mSysInfoType1 = { 5, // SKUNumber String 6, // Family String }; -CHAR8 *mSysInfoType1Strings[] = { +STATIC CHAR8 CONST * CONST mSysInfoType1Strings[] = { "AMD", "Seattle", "1.0", @@ -164,7 +164,7 @@ CHAR8 *mSysInfoType1Strings[] = { /*********************************************************************** SMBIOS data definition TYPE2 Board Information ************************************************************************/ -SMBIOS_TABLE_TYPE2 mBoardInfoType2 = { +STATIC CONST SMBIOS_TABLE_TYPE2 mBoardInfoType2 = { { EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, sizeof (SMBIOS_TABLE_TYPE2), 0 }, 1, // Manufacturer String 2, // ProductName String @@ -185,7 +185,7 @@ SMBIOS_TABLE_TYPE2 mBoardInfoType2 = { 0, // NumberOfContainedObjectHandles; { 0 } // ContainedObjectHandles[1]; }; -CHAR8 *mBoardInfoType2Strings[] = { +STATIC CHAR8 CONST * CONST mBoardInfoType2Strings[] = { "AMD", "Seattle", "1.0", @@ -198,7 +198,7 @@ CHAR8 *mBoardInfoType2Strings[] = { /*********************************************************************** SMBIOS data definition TYPE3 Enclosure Information ************************************************************************/ -SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = { +STATIC CONST SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = { { EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, sizeof (SMBIOS_TABLE_TYPE3), 0 }, 1, // Manufacturer String MiscChassisTypeLapTop, // Type; @@ -216,7 +216,7 @@ SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = { 0, // ContainedElementRecordLength; { { 0 } }, // ContainedElements[1]; }; -CHAR8 *mEnclosureInfoType3Strings[] = { +STATIC CHAR8 CONST * CONST mEnclosureInfoType3Strings[] = { "AMD", "1.0", "Chassis Board Serial#", @@ -227,7 +227,7 @@ CHAR8 *mEnclosureInfoType3Strings[] = { /*********************************************************************** SMBIOS data definition TYPE4 Processor Information ************************************************************************/ -SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = { +STATIC SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = { { EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE4), 0}, 1, // Socket String ProcessorOther, // ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA. @@ -306,7 +306,7 @@ SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = { ProcessorFamilyARM, // ARM Processor Family; };
-CHAR8 *mProcessorInfoType4Strings[] = { +STATIC CHAR8 CONST * CONST mProcessorInfoType4Strings[] = { "Socket", "ARM", #ifdef ARM_CPU_AARCH64 @@ -323,7 +323,7 @@ CHAR8 *mProcessorInfoType4Strings[] = { /*********************************************************************** SMBIOS data definition TYPE7 Cache Information ************************************************************************/ -SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { +STATIC SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { { EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 }, 1, // SocketDesignation String 0x018A, // Cache Configuration @@ -354,7 +354,7 @@ SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { CacheTypeUnknown, // System Cache Type CacheAssociativity2Way // Associativity }; -CHAR8 *mCacheInfoType7Strings[] = { +STATIC CHAR8 CONST *mCacheInfoType7Strings[] = { "Cache1", NULL }; @@ -362,7 +362,7 @@ CHAR8 *mCacheInfoType7Strings[] = { /*********************************************************************** SMBIOS data definition TYPE9 System Slot Information ************************************************************************/ -SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = { +STATIC CONST SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = { { EFI_SMBIOS_TYPE_SYSTEM_SLOTS, sizeof (SMBIOS_TABLE_TYPE9), 0 }, 1, // SlotDesignation String SlotTypeOther, // SlotType; ///< The enumeration value from MISC_SLOT_TYPE. @@ -390,7 +390,7 @@ SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = { 0, // BusNum; 0, // DevFuncNum; }; -CHAR8 *mSysSlotInfoType9Strings[] = { +STATIC CHAR8 CONST * CONST mSysSlotInfoType9Strings[] = { "SD Card", NULL }; @@ -398,7 +398,7 @@ CHAR8 *mSysSlotInfoType9Strings[] = { /*********************************************************************** SMBIOS data definition TYPE16 Physical Memory ArrayInformation ************************************************************************/ -SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = { +STATIC SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = { { EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, sizeof (SMBIOS_TABLE_TYPE16), 0 }, MemoryArrayLocationSystemBoard, // Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION. MemoryArrayUseSystemMemory, // Use; ///< The enumeration value from MEMORY_ARRAY_USE. @@ -408,14 +408,14 @@ SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = { 1, // NumberOfMemoryDevices; 0x3fffffffffffffffULL, // ExtendedMaximumCapacity; }; -CHAR8 *mPhyMemArrayInfoType16Strings[] = { +STATIC CHAR8 CONST * CONST mPhyMemArrayInfoType16Strings[] = { NULL };
/*********************************************************************** SMBIOS data definition TYPE17 Memory Device Information ************************************************************************/ -SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = { +STATIC SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = { { EFI_SMBIOS_TYPE_MEMORY_DEVICE, sizeof (SMBIOS_TABLE_TYPE17), 0 }, 0, // MemoryArrayHandle; 0xFFFE, // MemoryErrorInformationHandle; @@ -456,9 +456,9 @@ SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = { };
#if (FixedPcdGetBool (PcdIscpSupport)) -CHAR8 *mMemDevInfoType17Strings[ 7 ] = {0}; +STATIC CHAR8 CONST *mMemDevInfoType17Strings[ 7 ] = {0}; #else -CHAR8 *mMemDevInfoType17Strings[] = { +STATIC CHAR8 CONST * CONST mMemDevInfoType17Strings[] = { "OS Virtual Memory", "malloc", "OSV", @@ -469,7 +469,7 @@ CHAR8 *mMemDevInfoType17Strings[] = { /*********************************************************************** SMBIOS data definition TYPE19 Memory Array Mapped Address Information ************************************************************************/ -SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = { +STATIC SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = { { EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, sizeof (SMBIOS_TABLE_TYPE19), 0 }, 0x80000000, // StartingAddress; 0xbfffffff, // EndingAddress; @@ -478,20 +478,20 @@ SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = { 0, // ExtendedStartingAddress; 0, // ExtendedEndingAddress; }; -CHAR8 *mMemArrMapInfoType19Strings[] = { +STATIC CHAR8 CONST * CONST mMemArrMapInfoType19Strings[] = { NULL };
/*********************************************************************** SMBIOS data definition TYPE32 Boot Information ************************************************************************/ -SMBIOS_TABLE_TYPE32 mBootInfoType32 = { +STATIC CONST SMBIOS_TABLE_TYPE32 mBootInfoType32 = { { EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, sizeof (SMBIOS_TABLE_TYPE32), 0 }, { 0, 0, 0, 0, 0, 0 }, // Reserved[6]; BootInformationStatusNoError // BootStatus };
-CHAR8 *mBootInfoType32Strings[] = { +STATIC CHAR8 CONST * CONST mBootInfoType32Strings[] = { NULL };
@@ -526,11 +526,12 @@ CHAR8 *mBootInfoType32Strings[] = { NULL is OK. **/
+STATIC EFI_STATUS EFIAPI LogSmbiosData ( IN EFI_SMBIOS_TABLE_HEADER *Template, - IN CHAR8 **StringPack + IN CONST CHAR8* CONST *StringPack ) { EFI_STATUS Status; @@ -593,6 +594,7 @@ LogSmbiosData ( /*********************************************************************** SMBIOS data update TYPE0 BIOS Information ************************************************************************/ +STATIC VOID BIOSInfoUpdateSmbiosType0 ( VOID @@ -604,6 +606,7 @@ BIOSInfoUpdateSmbiosType0 ( /*********************************************************************** SMBIOS data update TYPE1 System Information ************************************************************************/ +STATIC VOID SysInfoUpdateSmbiosType1 ( VOID @@ -615,6 +618,7 @@ SysInfoUpdateSmbiosType1 ( /*********************************************************************** SMBIOS data update TYPE2 Board Information ************************************************************************/ +STATIC VOID BoardInfoUpdateSmbiosType2 ( VOID @@ -626,6 +630,7 @@ BoardInfoUpdateSmbiosType2 ( /*********************************************************************** SMBIOS data update TYPE3 Enclosure Information ************************************************************************/ +STATIC VOID EnclosureInfoUpdateSmbiosType3 ( VOID @@ -637,6 +642,7 @@ EnclosureInfoUpdateSmbiosType3 ( /*********************************************************************** SMBIOS data update TYPE4 Processor Information ************************************************************************/ +STATIC VOID ProcessorInfoUpdateSmbiosType4 ( VOID @@ -688,6 +694,7 @@ ProcessorInfoUpdateSmbiosType4 ( /*********************************************************************** SMBIOS data update TYPE7 Cache Information ************************************************************************/ +STATIC VOID CacheInfoUpdateSmbiosType7 ( VOID @@ -757,6 +764,7 @@ CacheInfoUpdateSmbiosType7 ( /*********************************************************************** SMBIOS data update TYPE9 System Slot Information ************************************************************************/ +STATIC VOID SysSlotInfoUpdateSmbiosType9 ( VOID @@ -768,6 +776,7 @@ SysSlotInfoUpdateSmbiosType9 ( /*********************************************************************** SMBIOS data update TYPE16 Physical Memory Array Information ************************************************************************/ +STATIC VOID PhyMemArrayInfoUpdateSmbiosType16 ( VOID @@ -790,6 +799,7 @@ PhyMemArrayInfoUpdateSmbiosType16 ( /*********************************************************************** SMBIOS data update TYPE17 Memory Device Information ************************************************************************/ +STATIC VOID MemDevInfoUpdatedstType17 ( VOID @@ -872,6 +882,7 @@ MemDevInfoUpdatedstType17 ( /*********************************************************************** SMBIOS data update TYPE19 Memory Array Map Information ************************************************************************/ +STATIC VOID MemArrMapInfoUpdateSmbiosType19 ( VOID @@ -897,6 +908,7 @@ MemArrMapInfoUpdateSmbiosType19 ( /*********************************************************************** SMBIOS data update TYPE32 Boot Information ************************************************************************/ +STATIC VOID BootInfoUpdateSmbiosType32 ( VOID
On Tue, Feb 28, 2017 at 03:11:18PM +0000, Ard Biesheuvel wrote:
Now that we've made a clean spot, let's clean up this module by making everything we can STATIC and/or CONST.
\o/
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 66 ++++++++++++-------- 1 file changed, 39 insertions(+), 27 deletions(-)
diff --git a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c index 7548be727849..53380b311ba7 100644 --- a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c +++ b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c @@ -57,15 +57,15 @@ extern EFI_BOOT_SERVICES *gBS;
G L O B A L S*---------------------------------------------------------------------------------------- */ -EFI_SMBIOS_PROTOCOL *mSmbiosProtocol; -AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; -ISCP_SMBIOS_INFO mSmbiosInfo; +STATIC EFI_SMBIOS_PROTOCOL *mSmbiosProtocol; +STATIC AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; +STATIC ISCP_SMBIOS_INFO mSmbiosInfo; /*********************************************************************** SMBIOS data definition TYPE0 BIOS Information ************************************************************************/ -SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = { +STATIC CONST SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = { { EFI_SMBIOS_TYPE_BIOS_INFORMATION, sizeof (SMBIOS_TABLE_TYPE0), 0 }, 1, // Vendor String 2, // BiosVersion String @@ -130,7 +130,7 @@ SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = { 0xFF, // EmbeddedControllerFirmwareMinorRelease }; -CHAR8 *mBIOSInfoType0Strings[] = { +STATIC CHAR8 CONST * CONST mBIOSInfoType0Strings[] = { "edk2.sourceforge.net", // Vendor String __TIME__, // BiosVersion String __DATE__, // BiosReleaseDate String @@ -140,7 +140,7 @@ CHAR8 *mBIOSInfoType0Strings[] = { /*********************************************************************** SMBIOS data definition TYPE1 System Information ************************************************************************/ -SMBIOS_TABLE_TYPE1 mSysInfoType1 = { +STATIC CONST SMBIOS_TABLE_TYPE1 mSysInfoType1 = { { EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, sizeof (SMBIOS_TABLE_TYPE1), 0 }, 1, // Manufacturer String 2, // ProductName String @@ -151,7 +151,7 @@ SMBIOS_TABLE_TYPE1 mSysInfoType1 = { 5, // SKUNumber String 6, // Family String }; -CHAR8 *mSysInfoType1Strings[] = { +STATIC CHAR8 CONST * CONST mSysInfoType1Strings[] = { "AMD", "Seattle", "1.0", @@ -164,7 +164,7 @@ CHAR8 *mSysInfoType1Strings[] = { /*********************************************************************** SMBIOS data definition TYPE2 Board Information ************************************************************************/ -SMBIOS_TABLE_TYPE2 mBoardInfoType2 = { +STATIC CONST SMBIOS_TABLE_TYPE2 mBoardInfoType2 = { { EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, sizeof (SMBIOS_TABLE_TYPE2), 0 }, 1, // Manufacturer String 2, // ProductName String @@ -185,7 +185,7 @@ SMBIOS_TABLE_TYPE2 mBoardInfoType2 = { 0, // NumberOfContainedObjectHandles; { 0 } // ContainedObjectHandles[1]; }; -CHAR8 *mBoardInfoType2Strings[] = { +STATIC CHAR8 CONST * CONST mBoardInfoType2Strings[] = { "AMD", "Seattle", "1.0", @@ -198,7 +198,7 @@ CHAR8 *mBoardInfoType2Strings[] = { /*********************************************************************** SMBIOS data definition TYPE3 Enclosure Information ************************************************************************/ -SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = { +STATIC CONST SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = { { EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, sizeof (SMBIOS_TABLE_TYPE3), 0 }, 1, // Manufacturer String MiscChassisTypeLapTop, // Type; @@ -216,7 +216,7 @@ SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = { 0, // ContainedElementRecordLength; { { 0 } }, // ContainedElements[1]; }; -CHAR8 *mEnclosureInfoType3Strings[] = { +STATIC CHAR8 CONST * CONST mEnclosureInfoType3Strings[] = { "AMD", "1.0", "Chassis Board Serial#", @@ -227,7 +227,7 @@ CHAR8 *mEnclosureInfoType3Strings[] = { /*********************************************************************** SMBIOS data definition TYPE4 Processor Information ************************************************************************/ -SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = { +STATIC SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = { { EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE4), 0}, 1, // Socket String ProcessorOther, // ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA. @@ -306,7 +306,7 @@ SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = { ProcessorFamilyARM, // ARM Processor Family; }; -CHAR8 *mProcessorInfoType4Strings[] = { +STATIC CHAR8 CONST * CONST mProcessorInfoType4Strings[] = { "Socket", "ARM", #ifdef ARM_CPU_AARCH64 @@ -323,7 +323,7 @@ CHAR8 *mProcessorInfoType4Strings[] = { /*********************************************************************** SMBIOS data definition TYPE7 Cache Information ************************************************************************/ -SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { +STATIC SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { { EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 }, 1, // SocketDesignation String 0x018A, // Cache Configuration @@ -354,7 +354,7 @@ SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { CacheTypeUnknown, // System Cache Type CacheAssociativity2Way // Associativity }; -CHAR8 *mCacheInfoType7Strings[] = { +STATIC CHAR8 CONST *mCacheInfoType7Strings[] = { "Cache1", NULL }; @@ -362,7 +362,7 @@ CHAR8 *mCacheInfoType7Strings[] = { /*********************************************************************** SMBIOS data definition TYPE9 System Slot Information ************************************************************************/ -SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = { +STATIC CONST SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = { { EFI_SMBIOS_TYPE_SYSTEM_SLOTS, sizeof (SMBIOS_TABLE_TYPE9), 0 }, 1, // SlotDesignation String SlotTypeOther, // SlotType; ///< The enumeration value from MISC_SLOT_TYPE. @@ -390,7 +390,7 @@ SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = { 0, // BusNum; 0, // DevFuncNum; }; -CHAR8 *mSysSlotInfoType9Strings[] = { +STATIC CHAR8 CONST * CONST mSysSlotInfoType9Strings[] = { "SD Card", NULL }; @@ -398,7 +398,7 @@ CHAR8 *mSysSlotInfoType9Strings[] = { /*********************************************************************** SMBIOS data definition TYPE16 Physical Memory ArrayInformation ************************************************************************/ -SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = { +STATIC SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = { { EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, sizeof (SMBIOS_TABLE_TYPE16), 0 }, MemoryArrayLocationSystemBoard, // Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION. MemoryArrayUseSystemMemory, // Use; ///< The enumeration value from MEMORY_ARRAY_USE. @@ -408,14 +408,14 @@ SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = { 1, // NumberOfMemoryDevices; 0x3fffffffffffffffULL, // ExtendedMaximumCapacity; }; -CHAR8 *mPhyMemArrayInfoType16Strings[] = { +STATIC CHAR8 CONST * CONST mPhyMemArrayInfoType16Strings[] = { NULL }; /*********************************************************************** SMBIOS data definition TYPE17 Memory Device Information ************************************************************************/ -SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = { +STATIC SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = { { EFI_SMBIOS_TYPE_MEMORY_DEVICE, sizeof (SMBIOS_TABLE_TYPE17), 0 }, 0, // MemoryArrayHandle; 0xFFFE, // MemoryErrorInformationHandle; @@ -456,9 +456,9 @@ SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = { }; #if (FixedPcdGetBool (PcdIscpSupport)) -CHAR8 *mMemDevInfoType17Strings[ 7 ] = {0}; +STATIC CHAR8 CONST *mMemDevInfoType17Strings[ 7 ] = {0}; #else -CHAR8 *mMemDevInfoType17Strings[] = { +STATIC CHAR8 CONST * CONST mMemDevInfoType17Strings[] = { "OS Virtual Memory", "malloc", "OSV", @@ -469,7 +469,7 @@ CHAR8 *mMemDevInfoType17Strings[] = { /*********************************************************************** SMBIOS data definition TYPE19 Memory Array Mapped Address Information ************************************************************************/ -SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = { +STATIC SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = { { EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, sizeof (SMBIOS_TABLE_TYPE19), 0 }, 0x80000000, // StartingAddress; 0xbfffffff, // EndingAddress; @@ -478,20 +478,20 @@ SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = { 0, // ExtendedStartingAddress; 0, // ExtendedEndingAddress; }; -CHAR8 *mMemArrMapInfoType19Strings[] = { +STATIC CHAR8 CONST * CONST mMemArrMapInfoType19Strings[] = { NULL }; /*********************************************************************** SMBIOS data definition TYPE32 Boot Information ************************************************************************/ -SMBIOS_TABLE_TYPE32 mBootInfoType32 = { +STATIC CONST SMBIOS_TABLE_TYPE32 mBootInfoType32 = { { EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, sizeof (SMBIOS_TABLE_TYPE32), 0 }, { 0, 0, 0, 0, 0, 0 }, // Reserved[6]; BootInformationStatusNoError // BootStatus }; -CHAR8 *mBootInfoType32Strings[] = { +STATIC CHAR8 CONST * CONST mBootInfoType32Strings[] = { NULL }; @@ -526,11 +526,12 @@ CHAR8 *mBootInfoType32Strings[] = { NULL is OK. **/ +STATIC EFI_STATUS EFIAPI LogSmbiosData ( IN EFI_SMBIOS_TABLE_HEADER *Template,
- IN CHAR8 **StringPack
- IN CONST CHAR8* CONST *StringPack )
{ EFI_STATUS Status; @@ -593,6 +594,7 @@ LogSmbiosData ( /*********************************************************************** SMBIOS data update TYPE0 BIOS Information ************************************************************************/ +STATIC VOID BIOSInfoUpdateSmbiosType0 ( VOID @@ -604,6 +606,7 @@ BIOSInfoUpdateSmbiosType0 ( /*********************************************************************** SMBIOS data update TYPE1 System Information ************************************************************************/ +STATIC VOID SysInfoUpdateSmbiosType1 ( VOID @@ -615,6 +618,7 @@ SysInfoUpdateSmbiosType1 ( /*********************************************************************** SMBIOS data update TYPE2 Board Information ************************************************************************/ +STATIC VOID BoardInfoUpdateSmbiosType2 ( VOID @@ -626,6 +630,7 @@ BoardInfoUpdateSmbiosType2 ( /*********************************************************************** SMBIOS data update TYPE3 Enclosure Information ************************************************************************/ +STATIC VOID EnclosureInfoUpdateSmbiosType3 ( VOID @@ -637,6 +642,7 @@ EnclosureInfoUpdateSmbiosType3 ( /*********************************************************************** SMBIOS data update TYPE4 Processor Information ************************************************************************/ +STATIC VOID ProcessorInfoUpdateSmbiosType4 ( VOID @@ -688,6 +694,7 @@ ProcessorInfoUpdateSmbiosType4 ( /*********************************************************************** SMBIOS data update TYPE7 Cache Information ************************************************************************/ +STATIC VOID CacheInfoUpdateSmbiosType7 ( VOID @@ -757,6 +764,7 @@ CacheInfoUpdateSmbiosType7 ( /*********************************************************************** SMBIOS data update TYPE9 System Slot Information ************************************************************************/ +STATIC VOID SysSlotInfoUpdateSmbiosType9 ( VOID @@ -768,6 +776,7 @@ SysSlotInfoUpdateSmbiosType9 ( /*********************************************************************** SMBIOS data update TYPE16 Physical Memory Array Information ************************************************************************/ +STATIC VOID PhyMemArrayInfoUpdateSmbiosType16 ( VOID @@ -790,6 +799,7 @@ PhyMemArrayInfoUpdateSmbiosType16 ( /*********************************************************************** SMBIOS data update TYPE17 Memory Device Information ************************************************************************/ +STATIC VOID MemDevInfoUpdatedstType17 ( VOID @@ -872,6 +882,7 @@ MemDevInfoUpdatedstType17 ( /*********************************************************************** SMBIOS data update TYPE19 Memory Array Map Information ************************************************************************/ +STATIC VOID MemArrMapInfoUpdateSmbiosType19 ( VOID @@ -897,6 +908,7 @@ MemArrMapInfoUpdateSmbiosType19 ( /*********************************************************************** SMBIOS data update TYPE32 Boot Information ************************************************************************/ +STATIC VOID BootInfoUpdateSmbiosType32 ( VOID -- 2.7.4
Implement a strict separation between writable and executable memory, by enabling the new core features that - map PE/COFF code and data sections with either executable or writable permissions, but never both; - map all other regions with the XN attributes set.
Note that the former requires 4 KB section alignment, which is not the default when using the tiny code model, so set the section alignment explicitly both for DEBUG and RELEASE builds.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index a236836db691..dcab8fb43cec 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -273,6 +273,9 @@ DEFINE DO_KCS = 1 [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
+[BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION] + GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x1000 + ################################################################################ # # Pcd Section - list of all EDK II PCD Entries defined by this Platform @@ -440,6 +443,19 @@ DEFINE DO_KCS = 1 ## ACPI (no tables < 4GB) gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
+ # + # Enable strict image permissions for all images. (This applies + # only to images that were built with >= 4 KB section alignment.) + # + gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x3 + + # + # Enable NX memory protection for all non-code regions, including OEM and OS + # reserved ones, with the exception of LoaderData regions, of which OS loaders + # (i.e., GRUB) may assume that its contents are executable. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1 + !if $(DO_PSCI) gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE !else
On Tue, Feb 28, 2017 at 03:11:19PM +0000, Ard Biesheuvel wrote:
Implement a strict separation between writable and executable memory, by enabling the new core features that
- map PE/COFF code and data sections with either executable or writable permissions, but never both;
- map all other regions with the XN attributes set.
Note that the former requires 4 KB section alignment, which is not the default when using the tiny code model, so set the section alignment explicitly both for DEBUG and RELEASE builds.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index a236836db691..dcab8fb43cec 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -273,6 +273,9 @@ DEFINE DO_KCS = 1 [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000 +[BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
- GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x1000
################################################################################ # # Pcd Section - list of all EDK II PCD Entries defined by this Platform @@ -440,6 +443,19 @@ DEFINE DO_KCS = 1 ## ACPI (no tables < 4GB) gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
- #
- # Enable strict image permissions for all images. (This applies
- # only to images that were built with >= 4 KB section alignment.)
- #
- gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x3
- #
- # Enable NX memory protection for all non-code regions, including OEM and OS
- # reserved ones, with the exception of LoaderData regions, of which OS loaders
- # (i.e., GRUB) may assume that its contents are executable.
- #
- gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1
!if $(DO_PSCI) gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE !else -- 2.7.4
Implement a strict separation between writable and executable memory, by enabling the new core features that - map PE/COFF code and data sections with either executable or writable permissions, but never both; - map all other regions with the XN attributes set.
Note that the former requires 4 KB section alignment, which is not the default when using the tiny code model, so set the section alignment explicitly both for DEBUG and RELEASE builds.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index d7e1a538f863..cb8b6cd0d822 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -266,6 +266,9 @@ DEFINE DO_KCS = 0 [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
+[BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION] + GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x1000 + ################################################################################ # # Pcd Section - list of all EDK II PCD Entries defined by this Platform @@ -430,6 +433,19 @@ DEFINE DO_KCS = 0 ## ACPI (no tables < 4GB) gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
+ # + # Enable strict image permissions for all images. (This applies + # only to images that were built with >= 4 KB section alignment.) + # + gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x3 + + # + # Enable NX memory protection for all non-code regions, including OEM and OS + # reserved ones, with the exception of LoaderData regions, of which OS loaders + # (i.e., GRUB) may assume that its contents are executable. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1 + gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE
On Tue, Feb 28, 2017 at 03:11:20PM +0000, Ard Biesheuvel wrote:
Implement a strict separation between writable and executable memory, by enabling the new core features that
- map PE/COFF code and data sections with either executable or writable permissions, but never both;
- map all other regions with the XN attributes set.
Note that the former requires 4 KB section alignment, which is not the default when using the tiny code model, so set the section alignment explicitly both for DEBUG and RELEASE builds.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org
Reviewed-by: Leif Lindholm leif.lindholm@linaro.org
Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index d7e1a538f863..cb8b6cd0d822 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -266,6 +266,9 @@ DEFINE DO_KCS = 0 [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000 +[BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
- GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x1000
################################################################################ # # Pcd Section - list of all EDK II PCD Entries defined by this Platform @@ -430,6 +433,19 @@ DEFINE DO_KCS = 0 ## ACPI (no tables < 4GB) gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
- #
- # Enable strict image permissions for all images. (This applies
- # only to images that were built with >= 4 KB section alignment.)
- #
- gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x3
- #
- # Enable NX memory protection for all non-code regions, including OEM and OS
- # reserved ones, with the exception of LoaderData regions, of which OS loaders
- # (i.e., GRUB) may assume that its contents are executable.
- #
- gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1
- gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE gAmdStyxTokenSpaceGuid.PcdIscpSupport|TRUE
2.7.4
On 02/28/2017 10:11 AM, Ard Biesheuvel wrote:
This cleans up some dodgy code in the SMBIOS driver, after which it is possible to enable the shiny new memory protection controls.
Changes since v1:
- enable on Cello as well as Overdrive, I will leave it up to Alan whether this gets enabled on the Overdrive 1000 as well
- simplify patch #1
Note that the prerequisite EDK2 changes have now been merged.
I think this all looks great. Thanks for your work on it. I'll have a test on the OverDrive 1000 too.
Ard Biesheuvel (4): Platforms/AMD/Styx/PlatformSmbiosDxe: don't write to string literals Platforms/AMD/Styx: constify/staticize all local functions and variables Platforms/AMD/Overdrive: enable strict memory permission policy Platforms/AMD/Cello: enable strict memory permission policy
Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 16 ++++ Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 79 +++++++++++--------- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 16 ++++ 3 files changed, 74 insertions(+), 37 deletions(-)
-
Alan Ott -
Ard Biesheuvel -
Leif Lindholm