On Fri, Apr 29, 2016 at 07:25:51PM +0200, Marcin Wojtas wrote:

From: Yehuda Yitschak yehuday@marvell.com

This patch adds initial support for Armada70x0 SoC's initialization. It implements empty mandatory hooks which are currently mostly empty except for Memory mapping information.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yehuda Yitschak yehuday@marvell.com Signed-off-by: Marcin Wojtas mw@semihalf.com

---

.../Armada70x0Lib/AArch64/ArmPlatformHelper.S | 66 +++++++++ .../Armada/Library/Armada70x0Lib/Armada70x0Lib.c | 153 +++++++++++++++++++++ .../Armada/Library/Armada70x0Lib/Armada70x0Lib.inf | 67 +++++++++ .../Library/Armada70x0Lib/Armada70x0LibMem.c | 93 +++++++++++++ 4 files changed, 379 insertions(+) create mode 100644 Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S create mode 100644 Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.c create mode 100644 Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf create mode 100644 Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c

diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S b/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S new file mode 100644 index 0000000..4ad435c --- /dev/null +++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S @@ -0,0 +1,66 @@ +//Based on ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S +// +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. +// Copyright (c) 2016, Marvell. All rights reserved. +// +// This program and the accompanying materials are licensed and made available +// under the terms and conditions of the BSD License which accompanies this +// distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED +//

+#include <AsmMacroIoLibV8.h> +#include <Library/ArmLib.h>

+.text +.align 2

+GCC_ASM_EXPORT(ArmPlatformPeiBootAction) +GCC_ASM_EXPORT(ArmPlatformGetCorePosition) +GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) +GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)

+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore) +GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)

+ASM_PFX(ArmPlatformPeiBootAction):

• ret

+//UINTN +//ArmPlatformGetCorePosition ( +// IN UINTN MpId +// ); +// With this function: CorePos = (ClusterId * 4) + CoreId +ASM_PFX(ArmPlatformGetCorePosition):

• and x1, x0, #ARM_CORE_MASK
• and x0, x0, #ARM_CLUSTER_MASK
• add x0, x1, x0, LSR #6
• ret

+//UINTN +//ArmPlatformGetPrimaryCoreMpId ( +// VOID +// ); +ASM_PFX(ArmPlatformGetPrimaryCoreMpId):

• LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
• ldrh w0, [x0]
• ret

+//UINTN +//ArmPlatformIsPrimaryCore ( +// IN UINTN MpId +// ); +ASM_PFX(ArmPlatformIsPrimaryCore):

• LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
• ldrh w1, [x1]
• and x0, x0, x1
• LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1)
• ldrh w1, [x1]
• cmp w0, w1
• mov x0, #1
• mov x1, #0
• csel x0, x0, x1, eq
• ret

diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.c b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.c new file mode 100644 index 0000000..8609700 --- /dev/null +++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.c @@ -0,0 +1,153 @@ +/**Based on ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c +* +* Copyright (c) 2011-2012, ARM Limited. All rights reserved. +* Copyright (c) 2016, Marvell International Ltd. All rights reserved. +* +* This program and the accompanying materials are licensed and made available +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/

+#include <Library/ArmLib.h> +#include <Library/ArmPlatformLib.h> +#include <Ppi/ArmMpCoreInfo.h>

+ARM_CORE_INFO mArmada7040MpCoreInfoTable[] = {

• {
• // Cluster 0, Core 0
• 0x0, 0x0,
• // MP Core MailBox Set/Get/Clear Addresses and Clear Value
• (EFI_PHYSICAL_ADDRESS)0,
• (EFI_PHYSICAL_ADDRESS)0,
• (EFI_PHYSICAL_ADDRESS)0,
• (UINT64)0xFFFFFFFF
• },
• {
• // Cluster 0, Core 1
• 0x0, 0x1,
• // MP Core MailBox Set/Get/Clear Addresses and Clear Value
• (EFI_PHYSICAL_ADDRESS)0,
• (EFI_PHYSICAL_ADDRESS)0,
• (EFI_PHYSICAL_ADDRESS)0,
• (UINT64)0xFFFFFFFF
• },
• {
• // Cluster 0, Core 2
• 0x0, 0x2,
• // MP Core MailBox Set/Get/Clear Addresses and Clear Value
• (EFI_PHYSICAL_ADDRESS)0,
• (EFI_PHYSICAL_ADDRESS)0,
• (EFI_PHYSICAL_ADDRESS)0,
• (UINT64)0xFFFFFFFF
• },
• {
• // Cluster 0, Core 3
• 0x0, 0x3,
• // MP Core MailBox Set/Get/Clear Addresses and Clear Value
• (EFI_PHYSICAL_ADDRESS)0,
• (EFI_PHYSICAL_ADDRESS)0,
• (EFI_PHYSICAL_ADDRESS)0,
• (UINT64)0xFFFFFFFF
• }

+};

First a question of clarification - since this port defines the multicore functions, does it mean the boot mechanism used is the parking protocol and that ARM Trusted Firmware is not used?

+/**

• Return the current Boot Mode
• This function returns the boot reason on the platform

+**/ +EFI_BOOT_MODE +ArmPlatformGetBootMode (

• VOID
• )

+{

• return BOOT_WITH_FULL_CONFIGURATION;

+}

+/**

• Initialize controllers that must setup in the normal world
• This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
• in the PEI phase.

+**/ +RETURN_STATUS +ArmPlatformInitialize (

• IN UINTN MpId
• )

+{

• if (!ArmPlatformIsPrimaryCore (MpId)) {
• return RETURN_SUCCESS;
• }
• //TODO: Add basic platfrom initialization
• return RETURN_SUCCESS;

+}

+/**

• Initialize the system (or sometimes called permanent) memory
• This memory is generally represented by the DRAM.

+**/ +VOID +ArmPlatformInitializeSystemMemory (

• VOID
• )

+{

• //TODO: Initialize DRAM controller here

+}

+EFI_STATUS +PrePeiCoreGetMpCoreInfo (

• OUT UINTN *CoreCount,
• OUT ARM_CORE_INFO **ArmCoreTable
• )

+{

• if (ArmIsMpCore()) {
• *CoreCount = sizeof(mArmada7040MpCoreInfoTable) / sizeof(ARM_CORE_INFO);
• *ArmCoreTable = mArmada7040MpCoreInfoTable;
• return EFI_SUCCESS;
• } else {
• return EFI_UNSUPPORTED;
• }

+}

+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };

+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {

• {
• EFI_PEI_PPI_DESCRIPTOR_PPI,
• &gArmMpCoreInfoPpiGuid,
• &mMpCoreInfoPpi
• }

+};

+VOID +ArmPlatformGetPlatformPpiList (

• OUT UINTN *PpiListSize,
• OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
• )

+{

• if (ArmIsMpCore()) {
• *PpiListSize = sizeof(gPlatformPpiTable);
• *PpiList = gPlatformPpiTable;
• } else {
• *PpiListSize = 0;
• *PpiList = NULL;
• }

+}

diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf new file mode 100644 index 0000000..2e2120e --- /dev/null +++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf @@ -0,0 +1,67 @@ +# Copyright (C) 2016 Marvell International Ltd. +# +# Marvell BSD License Option +# +# If you received this File from Marvell, you may opt to use, redistribute +# and/or modify this File under the following licensing terms. +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# * Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +#

+[Defines]

• INF_VERSION = 0x00010005
• BASE_NAME = Armada7040Lib
• FILE_GUID = 3f29b642-4a49-4dfd-8f4a-205dd38432bb
• MODULE_TYPE = BASE
• VERSION_STRING = 1.0
• LIBRARY_CLASS = ArmPlatformLib

+[Packages]

• MdePkg/MdePkg.dec
• MdeModulePkg/MdeModulePkg.dec
• ArmPkg/ArmPkg.dec
• ArmPlatformPkg/ArmPlatformPkg.dec

+[LibraryClasses]

• ArmLib
• DebugLib
• MemoryAllocationLib

+[Sources.common]

• Armada70x0Lib.c
• Armada70x0LibMem.c

+[Sources.AArch64]

• AArch64/ArmPlatformHelper.S

+[FixedPcd]

• gArmTokenSpaceGuid.PcdSystemMemoryBase
• gArmTokenSpaceGuid.PcdSystemMemorySize
• gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
• gArmTokenSpaceGuid.PcdArmPrimaryCore

+[Ppis]

• gArmMpCoreInfoPpiGuid

diff --git a/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c new file mode 100644 index 0000000..74c9956 --- /dev/null +++ b/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c @@ -0,0 +1,93 @@ +/******************************************************************************* +Copyright (C) 2016 Marvell International Ltd.

+Marvell BSD License Option

+If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met:

+* Redistributions of source code must retain the above copyright notice,

• this list of conditions and the following disclaimer.

+* Redistributions in binary form must reproduce the above copyright

• notice, this list of conditions and the following disclaimer in the
• documentation and/or other materials provided with the distribution.

+* Neither the name of Marvell nor the names of its contributors may be

• used to endorse or promote products derived from this software without
• specific prior written permission.

+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+*******************************************************************************/

+#include <Base.h> +#include <Library/ArmPlatformLib.h> +#include <Library/DebugLib.h> +#include <Library/MemoryAllocationLib.h>

+// The total number of descriptors, including the final "end-of-table" descriptor. +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16

+// DDR attributes +#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK +#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED

+/**

• Return the Virtual Memory Map of your platform
• This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
• @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-

•                                Virtual Memory mapping. This array must be ended by a zero-filled
  

•                                entry
  

+**/ +VOID +ArmPlatformGetVirtualMemoryMap (

• IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
• )

+{

• ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
• UINTN Index = 0;
• ASSERT (VirtualMemoryMap != NULL);
• VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
• if (VirtualMemoryTable == NULL) {

•  return;
  

• }
• // DDR
• VirtualMemoryTable[Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);
• VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase);
• VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
• VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_CACHED;
• // Configuration space 0xF000_0000 - 0xFFFF_FFFF
• VirtualMemoryTable[++Index].PhysicalBase = 0xF0000000;
• VirtualMemoryTable[Index].VirtualBase = 0xF0000000;
• VirtualMemoryTable[Index].Length = 0x10000000;
• VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
• // End of Table
• VirtualMemoryTable[++Index].PhysicalBase = 0;
• VirtualMemoryTable[Index].VirtualBase = 0;
• VirtualMemoryTable[Index].Length = 0;
• VirtualMemoryTable[Index].Attributes = 0;
• ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
• *VirtualMemoryMap = VirtualMemoryTable;

+}

The issues I have with this file have nothing to do with your contribution, but rather with the code it is based on. The worst part being the ASSERT checking whether or not ArmPlatformGetVirtualMemoryMap writes beyond the MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS it has allocated being sort of pointless, since it only applies for DEBUG builds and only after the locations have already been written to.

(But until we have a better template for how to do this, I'm happy to leave it in.)

Beyond that, since on the 7040 platform, RAM is socketed - is there no way to detect the amount at runtime rather than the MemoryBase/MemorySize?

Regards,

Leif

2016-06-20 17:33 GMT+02:00 Leif Lindholm leif.lindholm@linaro.org:

On Fri, Apr 29, 2016 at 07:25:52PM +0200, Marcin Wojtas wrote:

...

From: Yehuda Yitschak yehuday@marvell.com

This patch add initial support for Armada70x0 platform. It includes Armada.dsc.inc and uses Armada70x0.fdf files, which are created with the aim of support for new boards. Code currently supports:

• GICv2
• ARM architected timer
• ARM watchdog timer
• UART port

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yehuda Yitschak yehuday@marvell.com Signed-off-by: Jan Dabros jsd@semihalf.com Signed-off-by: Marcin Wojtas mw@semihalf.com

---

Platforms/Marvell/Armada/Armada.dsc.inc | 448 ++++++++++++++++++++++++++++++++ Platforms/Marvell/Armada/Armada70x0.dsc | 48 ++++ Platforms/Marvell/Armada/Armada70x0.fdf | 268 +++++++++++++++++++ 3 files changed, 764 insertions(+) create mode 100644 Platforms/Marvell/Armada/Armada.dsc.inc create mode 100644 Platforms/Marvell/Armada/Armada70x0.dsc create mode 100644 Platforms/Marvell/Armada/Armada70x0.fdf

diff --git a/Platforms/Marvell/Armada/Armada.dsc.inc b/Platforms/Marvell/Armada/Armada.dsc.inc new file mode 100644 index 0000000..048647a --- /dev/null +++ b/Platforms/Marvell/Armada/Armada.dsc.inc @@ -0,0 +1,448 @@ +#Copyright (C) 2016 Marvell International Ltd. +# +#Marvell BSD License Option +# +#If you received this File from Marvell, you may opt to use, redistribute and/or +#modify this File under the following licensing terms. +#Redistribution and use in source and binary forms, with or without modification, +#are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# * Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +#THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +#ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +#WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +#DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +#ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +#(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +#LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +#ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +#(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +#SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +[LibraryClasses.common]

• ArmPlatformLib|OpenPlatformPkg/Platforms/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf
• DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
• UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
• DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf

+# Basic utility libraries

• BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
• SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
• PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
• PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
• PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
• PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
• IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
• UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
• CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
• PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
• PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf

+# Basic UEFI services libraries

• UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
• HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
• UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
• DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
• UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
• DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
• UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
• UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
• HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
• UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
• UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
• # Assume everything is fixed at build. do not use runtime PCD feature
• PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
• # 1/123 faster than Stm or Vstm version
• #BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

Can just delete the commented-out version.

Ok, every commented-out entry will be removed.

...

• BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf
• # ARM Architectural Libraries
• CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
• DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
• CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
• ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
• DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
• ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
• ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
• ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
• ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
• TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
• # Serial port libraries
• SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
• PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
• # Reset and Time libraries
• EfiResetSystemLib|EmbeddedPkg/Library/TemplateResetSystemLib/TemplateResetSystemLib.inf
• RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
• # Networking Requirements for ArmPlatformPkg/Bds
• NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
• # These libraries are used by the dynamic EFI Shell commands
• ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
• FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
• SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
• # EBL Related Libraries
• EblCmdLib|ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.inf
• EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf
• EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf
• EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf
• #
• # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window
• # in the debugger will show load and unload commands for symbols. You can cut and paste this
• # into the command window to load symbols. We should be able to use a script to do this, but
• # the version of RVD I have does not support scripts accessing system memory.
• #
• #PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
• PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
• #PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
• DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
• DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
• # SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf

The PeCoffExtraActionLib/SemihostLib thing should be parametrised, _but_ it's taken pretty much verbatim from ArmVExpress.dsc.inc, so let's ignore that for now (and fix across all platforms at once in future).

...

• # BDS Libraries
• BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
• CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
• GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
• PlatformBdsLib|ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
• CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
• FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf

+[LibraryClasses.AARCH64]

• ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
• ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf
• ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf

+[LibraryClasses.common.SEC]

• ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
• DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
• DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf
• PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
• ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
• LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
• MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
• HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
• PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
• PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
• ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf

+[LibraryClasses.common.SEC, LibraryClasses.common.PEIM]

• MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf

+[LibraryClasses.common.DXE_CORE]

• HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
• MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
• DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
• ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
• ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
• UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
• DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
• PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf

+[LibraryClasses.common.DXE_DRIVER]

• ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
• DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
• SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
• PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
• MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+[LibraryClasses.common.UEFI_APPLICATION]

• UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
• PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
• MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
• HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf

+[LibraryClasses.common.UEFI_DRIVER]

• ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
• UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
• ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
• PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
• MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+[LibraryClasses.common.DXE_RUNTIME_DRIVER]

• HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
• MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
• ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
• CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf

+[LibraryClasses.ARM, LibraryClasses.AARCH64]

• #
• # It is not possible to prevent the ARM compiler for generic intrinsic functions.
• # This library provides the instrinsic functions generate by a given compiler.
• # [LibraryClasses.ARM] and NULL mean link this library into all ARM images.
• #
• NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
• # Add support for GCC stack protector
• NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf

+[BuildOptions]

• XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7
• GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a
• RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A8

Building this port for AArch32 doesn't appear to be a valid thing to do, so perhaps delete this section?

Ok.

...

+################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################

+[PcdsFeatureFlag.common]

• gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE
• gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
• gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
• gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
• #
• # Control what commands are supported from the UI
• # Turn these on and off to add features or save size
• #
• gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|TRUE
• gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE
• gEmbeddedTokenSpaceGuid.PcdEmbeddedHobCmd|TRUE
• gEmbeddedTokenSpaceGuid.PcdEmbeddedHwDebugCmd|TRUE
• gEmbeddedTokenSpaceGuid.PcdEmbeddedPciDebugCmd|TRUE
• gEmbeddedTokenSpaceGuid.PcdEmbeddedIoEnable|FALSE
• gEmbeddedTokenSpaceGuid.PcdEmbeddedScriptCmd|FALSE
• gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
• # Use the Vector Table location in CpuDxe.
• # We will not copy the Vector Table at PcdCpuVectorBaseAddress
• gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
• gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE
• # If TRUE, Graphics Output Protocol will be installed on virtual
• # handle created by ConsplitterDxe. It could be set FALSE to save size.
• gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
• gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
• # USB support
• gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE

+[PcdsFixedAtBuild.common]

• gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"Marvell"
• gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"MARVELL_EFI"
• gArmPlatformTokenSpaceGuid.PcdCoreCount|4
• # gArmPlatformTokenSpaceGuid.PcdClusterCount|1
• ## Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
• gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()"
• gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()"
• gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"Marvell>> "
• gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
• gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
• gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
• gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
• gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
• gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
• gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
• gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
• gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|1
• gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
• # Required for Intel BDS
• gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
• gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
• ## Trustzone enable (to make the transition from EL3 to NS EL2 in ArmPlatformPkg/Sec)
• gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE

Is the port making use of this?

We don't use Sec code, hence this entry will be removed.

...

• # ARM Generic Interrupt Controller
• gArmTokenSpaceGuid.PcdGicDistributorBase|0xF0210000
• gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF0220000
• # ARM Architectural Timer Support
• gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|25000000
• gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
• # ARM SBSA Watchdog
• gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0xF0620000
• gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0xF0600000
• gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|34
• # Serial
• gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
• gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
• gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xF0512000
• gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200
• gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|200000000
• gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4
• # DEBUG_ASSERT_ENABLED 0x01
• # DEBUG_PRINT_ENABLED 0x02
• # DEBUG_CODE_ENABLED 0x04
• # CLEAR_MEMORY_ENABLED 0x08
• # ASSERT_BREAKPOINT_ENABLED 0x10
• # ASSERT_DEADLOOP_ENABLED 0x20
• gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
• # DEBUG_INIT 0x00000001 // Initialization
• # DEBUG_WARN 0x00000002 // Warnings
• # DEBUG_LOAD 0x00000004 // Load events
• # DEBUG_FS 0x00000008 // EFI File system
• # DEBUG_POOL 0x00000010 // Alloc & Free (pool)
• # DEBUG_PAGE 0x00000020 // Alloc & Free (page)
• # DEBUG_INFO 0x00000040 // Informational debug messages
• # DEBUG_DISPATCH 0x00000080 // PEI/DXE/SMM Dispatchers
• # DEBUG_VARIABLE 0x00000100 // Variable
• # DEBUG_BM 0x00000400 // Boot Manager
• # DEBUG_BLKIO 0x00001000 // BlkIo Driver
• # DEBUG_NET 0x00004000 // SNP Driver
• # DEBUG_UNDI 0x00010000 // UNDI Driver
• # DEBUG_LOADFILE 0x00020000 // LoadFile
• # DEBUG_EVENT 0x00080000 // Event messages
• # DEBUG_GCD 0x00100000 // Global Coherency Database changes
• # DEBUG_CACHE 0x00200000 // Memory range cachability changes
• # DEBUG_VERBOSE 0x00400000 // Detailed debug messages that may
• # // significantly impact boot performance
• # DEBUG_ERROR 0x80000000 // Error

+!if $(TARGET) == RELEASE

• gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000

+!else

• gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F

+!endif

• gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
• gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""
• gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
• gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
• #
• # Optional feature to help prevent EFI memory map fragments
• # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
• # Values are in EFI Pages (4K). DXE Core will make sure that
• # at least this much of each type of memory can be allocated
• # from a single memory range. This way you only end up with
• # maximum of two fragements for each type in the memory map
• # (the memory used, and the free memory that was prereserved
• # but not used).
• #
• gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0
• gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0
• gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0
• gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|50
• gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|20
• gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400
• gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000
• gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
• gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
• # We want to use the Shell Libraries but don't want it to initialise
• # automatically. We initialise the libraries when the command is called by the
• # Shell.
• gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
• # ARM Pcds
• gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000000000000
• gArmTokenSpaceGuid.PcdSystemMemoryBase|0
• gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000
• gArmTokenSpaceGuid.PcdArmScr|0x531

+################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ +[Components.common]

• # PEI Phase modules
• ArmPlatformPkg/PrePi/PeiMPCore.inf
• # DXE
• MdeModulePkg/Core/Dxe/DxeMain.inf {

• <LibraryClasses>

•  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
  

•  NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
  

• }
• # Architectural Protocols DXE
• ArmPkg/Drivers/CpuDxe/CpuDxe.inf
• ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
• ArmPkg/Drivers/TimerDxe/TimerDxe.inf
• ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
• MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
• MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
• MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
• MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
• EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
• EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
• EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
• EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
• # Console packages
• MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
• MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
• MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
• MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
• MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
• # Simple TextIn/TextOut for UEFI Terminal
• #EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf

Why is this left in when commented out?

...

• # Human interface:
• MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
• # FAT filesystem + GPT/MBR partitioning
• MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
• MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
• MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
• # Application
• EmbeddedPkg/Ebl/Ebl.inf
• # Bds - Use Intel BDS
• MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
• MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
• MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
• IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
• #ArmPlatformPkg/Bds/Bds.inf

Why is this left in when commented out?

...

• # UEFI application (Shell Embedded Boot Loader)
• ShellPkg/Application/Shell/Shell.inf {

• <LibraryClasses>

•  ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
  

•  NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellTftpCommandLib/UefiShellTftpCommandLib.inf
  

•  HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
  

•  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
  

•  BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
  

• <PcdsFixedAtBuild>

•  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
  

•  gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
  

•  gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
  

• }

diff --git a/Platforms/Marvell/Armada/Armada70x0.dsc b/Platforms/Marvell/Armada/Armada70x0.dsc new file mode 100644 index 0000000..8c7751a --- /dev/null +++ b/Platforms/Marvell/Armada/Armada70x0.dsc @@ -0,0 +1,48 @@ +#Copyright (C) 2016 Marvell International Ltd. +# +#Marvell BSD License Option +# +#If you received this File from Marvell, you may opt to use, redistribute and/or +#modify this File under the following licensing terms. +#Redistribution and use in source and binary forms, with or without modification, +#are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# * Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +#THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +#ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +#WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +#DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +#ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +#(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +#LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +#ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +#(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +#SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines]

• PLATFORM_NAME = Armada70x0
• PLATFORM_GUID = f837e231-cfc7-4f56-9a0f-5b218d746ae3
• PLATFORM_VERSION = 0.1
• DSC_SPECIFICATION = 0x00010005
• OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
• SUPPORTED_ARCHITECTURES = AARCH64
• BUILD_TARGETS = DEBUG|RELEASE
• SKUID_IDENTIFIER = DEFAULT
• FLASH_DEFINITION = OpenPlatformPkg/Platforms/Marvell/Armada/Armada70x0.fdf

+!include Armada.dsc.inc diff --git a/Platforms/Marvell/Armada/Armada70x0.fdf b/Platforms/Marvell/Armada/Armada70x0.fdf new file mode 100644 index 0000000..5c18b6c --- /dev/null +++ b/Platforms/Marvell/Armada/Armada70x0.fdf @@ -0,0 +1,268 @@ +# +# Copyright (C) Marvell International Ltd. and its affiliates +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +#

+################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################

+[FD.Armada70x0_EFI] +BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash. +Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1

+# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00001000 +NumBlocks = 0x400

+################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType <FV, DATA, or FILE> +# +################################################################################

+0x00000000|0x000E0000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT

+################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################

+# DXE phase firmware volume +[FV.FvMain] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE +FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c

• INF MdeModulePkg/Core/Dxe/DxeMain.inf
• # PI DXE Drivers producing Architectural Protocols (EFI Services)
• INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
• INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
• INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
• INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
• INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
• INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
• INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
• INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
• INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
• INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
• INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
• INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
• # Multiple Console IO support
• INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
• INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
• INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
• INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
• INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
• # Simple TextIn/TextOut for UEFI Terminal
• #INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf

Left in but commented out?

...

• # Human interface
• INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
• # FAT filesystem + GPT/MBR partitioning
• INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
• INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
• INF FatBinPkg/EnhancedFatDxe/Fat.inf
• INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
• # UEFI application (Shell Embedded Boot Loader)
• INF EmbeddedPkg/Ebl/Ebl.inf
• # UEFI application (Shell Embedded Boot Loader)
• INF ShellPkg/Application/Shell/Shell.inf
• # Bds
• INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
• INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
• INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
• INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
• #INF ArmPlatformPkg/Bds/Bds.inf

Left in but commented out?

Regards,

Leif

...

+# PEI phase firmware volume +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +FvForceRebase = TRUE +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE

• INF ArmPlatformPkg/PrePi/PeiMPCore.inf
• FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
• SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {

•  SECTION FV_IMAGE = FVMAIN
  

• }
• }

+################################################################################ +# +# Rules are use with the [FV] section's module INF type to define +# how an FFS file is created for a given INF file. The following Rule are the default +# rules for the different module type. User can add the customized rules to define the +# content of the FFS file. +# +################################################################################

+############################################################################ +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # +############################################################################ +# +#[Rule.Common.DXE_DRIVER] +# FILE DRIVER = $(NAMED_GUID) { +# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex +# COMPRESS PI_STD { +# GUIDED { +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi +# UI STRING="$(MODULE_NAME)" Optional +# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) +# } +# } +# } +# +############################################################################

+[Rule.ARM.SEC]

• FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
• TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
• }

+# The AArch64 Vector Table requires a 2K alignment that is not supported by the FDF specification. +# It is the reason 4K is used instead of 2K for the module alignment. +[Rule.AARCH64.SEC]

• FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
• TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi
• }

+[Rule.Common.PEI_CORE]

• FILE PEI_CORE = $(NAMED_GUID) {
• TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
• UI STRING ="$(MODULE_NAME)" Optional
• }

+[Rule.Common.PEIM]

• FILE PEIM = $(NAMED_GUID) {

• PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
  

• TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
  

• UI       STRING="$(MODULE_NAME)" Optional
  

• }

+[Rule.Common.PEIM.TIANOCOMPRESSED]

• FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
• PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
• GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {

•  PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
  

•  UI        STRING="$(MODULE_NAME)" Optional
  

• }
• }

+[Rule.Common.DXE_CORE]

• FILE DXE_CORE = $(NAMED_GUID) {
• PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
• UI STRING="$(MODULE_NAME)" Optional
• }

+[Rule.Common.UEFI_DRIVER]

• FILE DRIVER = $(NAMED_GUID) {
• DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
• PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
• UI STRING="$(MODULE_NAME)" Optional
• }

+[Rule.Common.UEFI_DRIVER.BINARY]

• FILE DRIVER = $(NAMED_GUID) {
• DXE_DEPEX DXE_DEPEX Optional |.depex
• PE32 PE32 |.efi
• UI STRING="$(MODULE_NAME)" Optional
• VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
• }

+[Rule.Common.DXE_DRIVER]

• FILE DRIVER = $(NAMED_GUID) {
• DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
• PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
• UI STRING="$(MODULE_NAME)" Optional
• }

+[Rule.Common.DXE_RUNTIME_DRIVER]

• FILE DRIVER = $(NAMED_GUID) {
• DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
• PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
• UI STRING="$(MODULE_NAME)" Optional
• }

+[Rule.Common.UEFI_APPLICATION]

• FILE APPLICATION = $(NAMED_GUID) {
• UI STRING ="$(MODULE_NAME)" Optional
• PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
• }

-- 1.8.3.1

Regards, Jan

On Fri, Apr 29, 2016 at 07:25:53PM +0200, Marcin Wojtas wrote:

From: Jan Dąbroś jsd@semihalf.com

• Create Mpp Library, which allows to set MPP on board.
• Create Platforms/Marvell/Marvell.dec file, which holds PCDs' declaration.
• Export configuration capabilities via PCDs.
• Prepare porting guide document

Because GetMppPcd has to be adjusted to possible 8 MPP registers, although unused, additional PcdChip<X>MppSel are added in order to satisfy preprocessor demands. For the same reason there are MPP PCDs for all of 4 possible chips.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jan Dabros jsd@semihalf.com Signed-off-by: Marcin Wojtas mw@semihalf.com

---

Documentation/Marvell/PortingGuide/Mpp.txt | 48 +++++++++ Platforms/Marvell/Include/Library/MppLib.h | 42 ++++++++ Platforms/Marvell/Library/MppLib/MppLib.c | 161 ++++++++++++++++++++++++++++ Platforms/Marvell/Library/MppLib/MppLib.inf | 107 ++++++++++++++++++ Platforms/Marvell/Marvell.dec | 106 ++++++++++++++++++ 5 files changed, 464 insertions(+) create mode 100644 Documentation/Marvell/PortingGuide/Mpp.txt create mode 100644 Platforms/Marvell/Include/Library/MppLib.h create mode 100644 Platforms/Marvell/Library/MppLib/MppLib.c create mode 100644 Platforms/Marvell/Library/MppLib/MppLib.inf create mode 100644 Platforms/Marvell/Marvell.dec

diff --git a/Documentation/Marvell/PortingGuide/Mpp.txt b/Documentation/Marvell/PortingGuide/Mpp.txt new file mode 100644 index 0000000..3e36b5f --- /dev/null +++ b/Documentation/Marvell/PortingGuide/Mpp.txt @@ -0,0 +1,48 @@ +MPP configuration +----------------- +Multi-Purpose Ports (MPP) are configurable through platform PCDs. +In order to set desired pin multiplexing, .dsc file needs to be modified. +(OpenPlatformPkg/Platforms/Marvell/Armada/{platform_name}.dsc - please refer to +Documentation/Build.txt for currently supported {platftorm_name} ) +Following PCDs are available:

• gMarvellTokenSpaceGuid.PcdMppChipCount

+Indicates how many different chips are placed on board. So far up to 4 chips +are supported.

+Every MPP PCD has <Num> part where

• <Num> stands for chip ID (order is not important, but configuration will be
• set for first PcdMppChipCount chips).

+Below is example for the first chip (Chip0).

• gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag

+Indicates that register order is reversed. (Needs to be used only for AP806-Z1)

• gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress

+This is base address for MPP configuration register.

• gMarvellTokenSpaceGuid.PcdChip0MppPinCount

+Defines how many MPP pins are available.

• gMarvellTokenSpaceGuid.PcdChip0MppSel0
• gMarvellTokenSpaceGuid.PcdChip0MppSel1
• gMarvellTokenSpaceGuid.PcdChip0MppSel2

+This registers defines functions of 10 pins in ascending order.

+Examples +-------- +#APN806-A0 MPP SET

• gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag|FALSE
• gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress|0xF06F4000
• gMarvellTokenSpaceGuid.PcdChip0MppRegCount|3
• gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x0 }
• gMarvellTokenSpaceGuid.PcdChip0MppSel1|{ 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }

+Set pin 6 and 7 to 0xa function:

• gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xa, 0xa, 0x0, 0x0 }

diff --git a/Platforms/Marvell/Include/Library/MppLib.h b/Platforms/Marvell/Include/Library/MppLib.h new file mode 100644 index 0000000..77c6cdb --- /dev/null +++ b/Platforms/Marvell/Include/Library/MppLib.h @@ -0,0 +1,42 @@ +/******************************************************************************** +Copyright (C) 2016 Marvell International Ltd.

+Marvell BSD License Option

+If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met:

+* Redistributions of source code must retain the above copyright notice,

• this list of conditions and the following disclaimer.

+* Redistributions in binary form must reproduce the above copyright

• notice, this list of conditions and the following disclaimer in the
• documentation and/or other materials provided with the distribution.

+* Neither the name of Marvell nor the names of its contributors may be

• used to endorse or promote products derived from this software without
• specific prior written permission.

+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+*******************************************************************************/

+#ifndef __MPPLIB_H__ +#define __MPPLIB_H__

+EFI_STATUS +MppInitialize (

• );

+#endif diff --git a/Platforms/Marvell/Library/MppLib/MppLib.c b/Platforms/Marvell/Library/MppLib/MppLib.c new file mode 100644 index 0000000..4f53aa7 --- /dev/null +++ b/Platforms/Marvell/Library/MppLib/MppLib.c @@ -0,0 +1,161 @@ +/******************************************************************************** +Copyright (C) 2016 Marvell International Ltd.

+Marvell BSD License Option

+If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met:

+* Redistributions of source code must retain the above copyright notice,

• this list of conditions and the following disclaimer.

+* Redistributions in binary form must reproduce the above copyright

• notice, this list of conditions and the following disclaimer in the
• documentation and/or other materials provided with the distribution.

+* Neither the name of Marvell nor the names of its contributors may be

• used to endorse or promote products derived from this software without
• specific prior written permission.

+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+*******************************************************************************/

+#include <Library/ArmLib.h> +#include <Library/ArmPlatformLib.h> +#include <Library/DebugLib.h> +#include <Library/PcdLib.h> +#include <Library/MemoryAllocationLib.h> +#include <Library/IoLib.h>

+#define MPP_PIN_VAL(pin,func) (((func) & 0xf) << ((pin) * 4)) +#define MPP_MAX_REGS 8 +#define MPP_PINS_PER_REG 8 +#define PCD_PINS_PER_GROUP 10

+#define MAX_CHIPS 4

+#define GET_PCD_PTR(id,num) PcdGetPtr(PcdChip##id##MppSel##num) +#define GET_PIN_COUNT(id) PcdGet32(PcdChip##id##MppPinCount) +#define GET_BASE(id) PcdGet64(PcdChip##id##MppBaseAddress) +#define GET_REV_FLAG(id) PcdGetBool(PcdChip##id##MppReverseFlag)

+/* We get chip number */ +#define GetMppPcd(id) { \

• PinCount[id] = GET_PIN_COUNT(id); \
• MppRegPcd[id][7] = GET_PCD_PTR(id,7); \
• MppRegPcd[id][6] = GET_PCD_PTR(id,6); \
• MppRegPcd[id][5] = GET_PCD_PTR(id,5); \
• MppRegPcd[id][4] = GET_PCD_PTR(id,4); \
• MppRegPcd[id][3] = GET_PCD_PTR(id,3); \
• MppRegPcd[id][2] = GET_PCD_PTR(id,2); \
• MppRegPcd[id][1] = GET_PCD_PTR(id,1); \
• MppRegPcd[id][0] = GET_PCD_PTR(id,0); \
• BaseAddr[id] = GET_BASE(id); \
• ReverseFlag[id] = GET_REV_FLAG(id); \

+}

+VOID +SetRegisterValue (

Should be STATIC?

• UINT8 RegCount,
• UINT8 **MppRegPcd,
• UINTN BaseAddr,
• BOOLEAN ReverseFlag
• )

+{

• UINT32 i, j, CtrlVal;
• INTN Sign;
• Sign = ReverseFlag ? -1 : 1;
• for (i = 0; i < RegCount; i++) {
• CtrlVal = 0;
• for (j = 0; j < MPP_PINS_PER_REG; j++) {

•  CtrlVal |= MPP_PIN_VAL(7 * (UINTN) ReverseFlag + j * Sign,
  

•    MppRegPcd[i][7 * (UINTN) ReverseFlag + j * Sign]);
  

• }
• MmioWrite32 (BaseAddr + 4 * i * Sign, CtrlVal);
• }

+}

+/* Transform PCD MPP group format into hardware register format */ +UINT8 +PcdToMppRegs (

Should be STATIC?

Regards,

Leif

• UINTN PinCount,
• UINT8 **MppRegPcd
• )

+{

• UINT8 MppRegPcdTmp[MPP_MAX_REGS][MPP_PINS_PER_REG];
• UINT8 PcdGroupCount, MppRegCount;
• UINTN i, j, k, l;
• if (PinCount == 0) {
• return 0;
• }
• PcdGroupCount = PinCount / PCD_PINS_PER_GROUP;
• if ((PinCount % PCD_PINS_PER_GROUP) != 0) {
• PcdGroupCount += 1;
• }
• MppRegCount = PinCount / MPP_PINS_PER_REG;
• if ((PinCount % MPP_PINS_PER_REG) != 0) {
• MppRegCount += 1;
• }
• /* Fill temporary table with data from PCD groups in HW format */
• for (i = 0; i < PcdGroupCount; i++) {
• for (j = 0; j < PCD_PINS_PER_GROUP; j++) {

•  k = (PCD_PINS_PER_GROUP * i + j) / MPP_PINS_PER_REG;
  

•  l = (PCD_PINS_PER_GROUP * i + j) % MPP_PINS_PER_REG;
  

•  MppRegPcdTmp[k][l] = MppRegPcd[i][j];
  

• }
• }
• /* Update input table */
• for (i = 0; i < MppRegCount; i++) {
• for (j = 0; j < MPP_PINS_PER_REG; j++) {

•  MppRegPcd[i][j] = MppRegPcdTmp[i][j];
  

• }
• }
• return MppRegCount;

+}

+EFI_STATUS +MppInitialize (

• )

+{

• UINTN BaseAddr[MAX_CHIPS], PinCount[MAX_CHIPS], RegCount;
• BOOLEAN ReverseFlag[MAX_CHIPS];
• UINT8 *MppRegPcd[MAX_CHIPS][MPP_MAX_REGS];
• UINT32 i, ChipCount;
• ChipCount = PcdGet32 (PcdMppChipCount);
• /* Read all needed PCD for MPP configuration */
• GetMppPcd(0);
• GetMppPcd(1);
• GetMppPcd(2);
• GetMppPcd(3);
• for (i = 0; i < MAX_CHIPS; i++) {
• if (i == ChipCount)

•  break;
  

• RegCount = PcdToMppRegs (PinCount[i], MppRegPcd[i]);
• SetRegisterValue (RegCount, MppRegPcd[i], BaseAddr[i], ReverseFlag[i]);
• }
• return EFI_SUCCESS;

+} diff --git a/Platforms/Marvell/Library/MppLib/MppLib.inf b/Platforms/Marvell/Library/MppLib/MppLib.inf new file mode 100644 index 0000000..510064f --- /dev/null +++ b/Platforms/Marvell/Library/MppLib/MppLib.inf @@ -0,0 +1,107 @@ +# +# Marvell BSD License Option +# +# If you received this File from Marvell, you may opt to use, redistribute +# and/or modify this File under the following licensing terms. +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# * Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +#

+[Defines]

• INF_VERSION = 0x00010005
• BASE_NAME = MarvellMppLib
• FILE_GUID = 3f19b642-4a49-4dfd-8f4a-205dd38432bb
• MODULE_TYPE = BASE
• VERSION_STRING = 1.0
• LIBRARY_CLASS = MppLib

+[Packages]

• MdePkg/MdePkg.dec
• MdeModulePkg/MdeModulePkg.dec
• ArmPkg/ArmPkg.dec
• ArmPlatformPkg/ArmPlatformPkg.dec
• OpenPlatformPkg/Platforms/Marvell/Marvell.dec

+[LibraryClasses]

• ArmLib
• DebugLib
• MemoryAllocationLib
• PcdLib
• IoLib

+[Sources.common]

• MppLib.c

+[FixedPcd]

• gMarvellTokenSpaceGuid.PcdMppChipCount
• gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag
• gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress
• gMarvellTokenSpaceGuid.PcdChip0MppPinCount
• gMarvellTokenSpaceGuid.PcdChip0MppSel0
• gMarvellTokenSpaceGuid.PcdChip0MppSel1
• gMarvellTokenSpaceGuid.PcdChip0MppSel2
• gMarvellTokenSpaceGuid.PcdChip0MppSel3
• gMarvellTokenSpaceGuid.PcdChip0MppSel4
• gMarvellTokenSpaceGuid.PcdChip0MppSel5
• gMarvellTokenSpaceGuid.PcdChip0MppSel6
• gMarvellTokenSpaceGuid.PcdChip0MppSel7
• gMarvellTokenSpaceGuid.PcdChip1MppReverseFlag
• gMarvellTokenSpaceGuid.PcdChip1MppBaseAddress
• gMarvellTokenSpaceGuid.PcdChip1MppPinCount
• gMarvellTokenSpaceGuid.PcdChip1MppSel0
• gMarvellTokenSpaceGuid.PcdChip1MppSel1
• gMarvellTokenSpaceGuid.PcdChip1MppSel2
• gMarvellTokenSpaceGuid.PcdChip1MppSel3
• gMarvellTokenSpaceGuid.PcdChip1MppSel4
• gMarvellTokenSpaceGuid.PcdChip1MppSel5
• gMarvellTokenSpaceGuid.PcdChip1MppSel6
• gMarvellTokenSpaceGuid.PcdChip1MppSel7
• gMarvellTokenSpaceGuid.PcdChip2MppReverseFlag
• gMarvellTokenSpaceGuid.PcdChip2MppBaseAddress
• gMarvellTokenSpaceGuid.PcdChip2MppPinCount
• gMarvellTokenSpaceGuid.PcdChip2MppSel0
• gMarvellTokenSpaceGuid.PcdChip2MppSel1
• gMarvellTokenSpaceGuid.PcdChip2MppSel2
• gMarvellTokenSpaceGuid.PcdChip2MppSel3
• gMarvellTokenSpaceGuid.PcdChip2MppSel4
• gMarvellTokenSpaceGuid.PcdChip2MppSel5
• gMarvellTokenSpaceGuid.PcdChip2MppSel6
• gMarvellTokenSpaceGuid.PcdChip2MppSel7
• gMarvellTokenSpaceGuid.PcdChip3MppReverseFlag
• gMarvellTokenSpaceGuid.PcdChip3MppBaseAddress
• gMarvellTokenSpaceGuid.PcdChip3MppPinCount
• gMarvellTokenSpaceGuid.PcdChip3MppSel0
• gMarvellTokenSpaceGuid.PcdChip3MppSel1
• gMarvellTokenSpaceGuid.PcdChip3MppSel2
• gMarvellTokenSpaceGuid.PcdChip3MppSel3
• gMarvellTokenSpaceGuid.PcdChip3MppSel4
• gMarvellTokenSpaceGuid.PcdChip3MppSel5
• gMarvellTokenSpaceGuid.PcdChip3MppSel6
• gMarvellTokenSpaceGuid.PcdChip3MppSel7

diff --git a/Platforms/Marvell/Marvell.dec b/Platforms/Marvell/Marvell.dec new file mode 100644 index 0000000..fee8025 --- /dev/null +++ b/Platforms/Marvell/Marvell.dec @@ -0,0 +1,106 @@ +# Copyright (C) 2016 Marvell International Ltd. +# +# Marvell BSD License Option +# +# If you received this File from Marvell, you may opt to use, redistribute and/or +# modify this File under the following licensing terms. +# Redistribution and use in source and binary forms, with or without modification, +# are permitted provided that the following conditions are met: +# +#* Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +#* Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +#* Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +#

+[Defines]

• DEC_SPECIFICATION = 0x00010005
• PACKAGE_NAME = OpenPlatformMarvellPkg
• PACKAGE_GUID = c372916e-83ad-4b2a-8410-bbc31bd9e68f
• PACKAGE_VERSION = 0.1

+################################################################################ +# +# Include Section - list of Include Paths that are provided by this package. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +################################################################################

+[Includes]

• Include

+[Guids.common]

• gMarvellTokenSpaceGuid = { 0xf995c6c8, 0xbc9b, 0x4e93, { 0xbd, 0xcf, 0x49, 0x90, 0xc6, 0xe7, 0x8c, 0x7f } }

+[PcdsFixedAtBuild.common] +#MPP

• gMarvellTokenSpaceGuid.PcdMppChipCount|0|UINT32|0x30000001
• gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag|FALSE|BOOLEAN|0x30000002
• gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress|0|UINT64|0x30000003
• gMarvellTokenSpaceGuid.PcdChip0MppPinCount|0|UINT32|0x30000004
• gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0 }|VOID*|0x30000005
• gMarvellTokenSpaceGuid.PcdChip0MppSel1|{ 0 }|VOID*|0x30000006
• gMarvellTokenSpaceGuid.PcdChip0MppSel2|{ 0 }|VOID*|0x30000007
• gMarvellTokenSpaceGuid.PcdChip0MppSel3|{ 0 }|VOID*|0x30000008
• gMarvellTokenSpaceGuid.PcdChip0MppSel4|{ 0 }|VOID*|0x30000009
• gMarvellTokenSpaceGuid.PcdChip0MppSel5|{ 0 }|VOID*|0x30000010
• gMarvellTokenSpaceGuid.PcdChip0MppSel6|{ 0 }|VOID*|0x30000011
• gMarvellTokenSpaceGuid.PcdChip0MppSel7|{ 0 }|VOID*|0x30000012
• gMarvellTokenSpaceGuid.PcdChip1MppReverseFlag|FALSE|BOOLEAN|0x30000013
• gMarvellTokenSpaceGuid.PcdChip1MppBaseAddress|0|UINT64|0x30000014
• gMarvellTokenSpaceGuid.PcdChip1MppPinCount|0|UINT32|0x30000015
• gMarvellTokenSpaceGuid.PcdChip1MppSel0|{ 0 }|VOID*|0x30000016
• gMarvellTokenSpaceGuid.PcdChip1MppSel1|{ 0 }|VOID*|0x30000017
• gMarvellTokenSpaceGuid.PcdChip1MppSel2|{ 0 }|VOID*|0x30000018
• gMarvellTokenSpaceGuid.PcdChip1MppSel3|{ 0 }|VOID*|0x30000019
• gMarvellTokenSpaceGuid.PcdChip1MppSel4|{ 0 }|VOID*|0x30000020
• gMarvellTokenSpaceGuid.PcdChip1MppSel5|{ 0 }|VOID*|0x30000021
• gMarvellTokenSpaceGuid.PcdChip1MppSel6|{ 0 }|VOID*|0x30000022
• gMarvellTokenSpaceGuid.PcdChip1MppSel7|{ 0 }|VOID*|0x30000023
• gMarvellTokenSpaceGuid.PcdChip2MppReverseFlag|FALSE|BOOLEAN|0x30000024
• gMarvellTokenSpaceGuid.PcdChip2MppBaseAddress|0|UINT64|0x30000025
• gMarvellTokenSpaceGuid.PcdChip2MppPinCount|0|UINT32|0x30000026
• gMarvellTokenSpaceGuid.PcdChip2MppSel0|{ 0 }|VOID*|0x30000027
• gMarvellTokenSpaceGuid.PcdChip2MppSel1|{ 0 }|VOID*|0x30000028
• gMarvellTokenSpaceGuid.PcdChip2MppSel2|{ 0 }|VOID*|0x30000029
• gMarvellTokenSpaceGuid.PcdChip2MppSel3|{ 0 }|VOID*|0x30000030
• gMarvellTokenSpaceGuid.PcdChip2MppSel4|{ 0 }|VOID*|0x30000031
• gMarvellTokenSpaceGuid.PcdChip2MppSel5|{ 0 }|VOID*|0x30000032
• gMarvellTokenSpaceGuid.PcdChip2MppSel6|{ 0 }|VOID*|0x30000033
• gMarvellTokenSpaceGuid.PcdChip2MppSel7|{ 0 }|VOID*|0x30000034
• gMarvellTokenSpaceGuid.PcdChip3MppReverseFlag|FALSE|BOOLEAN|0x30000035
• gMarvellTokenSpaceGuid.PcdChip3MppBaseAddress|0|UINT64|0x30000036
• gMarvellTokenSpaceGuid.PcdChip3MppPinCount|0|UINT32|0x30000037
• gMarvellTokenSpaceGuid.PcdChip3MppSel0|{ 0 }|VOID*|0x30000038
• gMarvellTokenSpaceGuid.PcdChip3MppSel1|{ 0 }|VOID*|0x30000039
• gMarvellTokenSpaceGuid.PcdChip3MppSel2|{ 0 }|VOID*|0x30000040
• gMarvellTokenSpaceGuid.PcdChip3MppSel3|{ 0 }|VOID*|0x30000041
• gMarvellTokenSpaceGuid.PcdChip3MppSel4|{ 0 }|VOID*|0x30000042
• gMarvellTokenSpaceGuid.PcdChip3MppSel5|{ 0 }|VOID*|0x30000043
• gMarvellTokenSpaceGuid.PcdChip3MppSel6|{ 0 }|VOID*|0x30000044
• gMarvellTokenSpaceGuid.PcdChip3MppSel7|{ 0 }|VOID*|0x30000045

-- 1.8.3.1

On Fri, Apr 29, 2016 at 07:25:55PM +0200, Marcin Wojtas wrote:

From: Bartosz Szczepanek bsz@semihalf.com

MvI2cDxe driver was adapted to generic UEFI I2C stack. Connection with following interfaces was required:

• EFI_I2C_MASTER_PROTOCOL
• EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL
• EFI_I2C_ENUMERATE_PROTOCOL

Driver exports configuration options via PCDs. Configurable options include:

• PcdI2cSlaveAddresses - should contain a list of valid I2C devices' addresses on bus
• PcdI2cBaseAddress - physical address of I2C controller registers
• PcdI2cClockFrequency - I2c clock frequency on platform

Drivers of devices on I2C bus should never use EFI_I2C_MASTER_PROTOCOL directly. Instead, these ought to utilise EFI_I2C_IO_PROTOCOL produced by generic UEFI stack.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Bartosz Szczepanek bsz@semihalf.com Signed-off-by: Marcin Wojtas mw@semihalf.com

---

Documentation/Marvell/Drivers/I2cDriver.txt | 64 +++ Documentation/Marvell/PortingGuide/I2c.txt | 16 + Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 683 ++++++++++++++++++++++++++++ Drivers/I2c/MvI2cDxe/MvI2cDxe.h | 258 +++++++++++ Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 72 +++ Platforms/Marvell/Marvell.dec | 6 + 6 files changed, 1099 insertions(+) create mode 100644 Documentation/Marvell/Drivers/I2cDriver.txt create mode 100644 Documentation/Marvell/PortingGuide/I2c.txt create mode 100644 Drivers/I2c/MvI2cDxe/MvI2cDxe.c create mode 100644 Drivers/I2c/MvI2cDxe/MvI2cDxe.h create mode 100644 Drivers/I2c/MvI2cDxe/MvI2cDxe.inf

diff --git a/Documentation/Marvell/Drivers/I2cDriver.txt b/Documentation/Marvell/Drivers/I2cDriver.txt new file mode 100644 index 0000000..2f890de --- /dev/null +++ b/Documentation/Marvell/Drivers/I2cDriver.txt @@ -0,0 +1,64 @@ +1. Introduction +--------------- +**MvI2cDxe** is a driver supporting I2C controller on Marvell SOCs boards. +It is connected through protocols to generic UEFI I2C stack, which exposes +IO functionality to drivers of specific devices on I2C bus.

+2. MvI2cDxe driver design +-------------------------- +MvI2cDxe produces several protocols from generic I2C stack:

• • EFI_I2C_MASTER_PROTOCOL,
• • EFI_I2C_ENUMERATE_PROTOCOL,
• • EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL
• • general-purpose EFI_DRIVER_BINDING_PROTOCOL.
• 2.1 EFI_I2C_MASTER_PROTOCOL

• ---

• This is the most important protocol produced by MvI2cDxe. Following functions
• are implemented:

•  ///
  

•  /// Reset the I2C host controller.
  

•  ///
  

•  EFI_I2C_MASTER_PROTOCOL_RESET             Reset;
  

•  ///
  

•  /// Start an I2C transaction in master mode on the host controller.
  

•  ///
  

•  EFI_I2C_MASTER_PROTOCOL_START_REQUEST     StartRequest;
  

• StartRequest and Reset functions are used by I2cHost.
• These should **not** be used by I2C device drivers - required
• synchronization is not provided. Instead, members of EFI_I2C_IO_PROTOCOL
• should be used.
• 2.2 EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL

• ---

• The only function exposed via this protocol is MvI2cEnableConf. It is
• required by I2C stack in order to allow changing I2C bus configuration from
• device drivers.
• 2.3 EFI_I2C_ENUMERATE_PROTOCOL

• ---

• Provides Enumerate function, which is used by I2cBus code as an iterator over
• devices on I2C bus.
• typedef
• EFI_STATUS
• (EFIAPI *EFI_I2C_ENUMERATE_PROTOCOL_ENUMERATE) (

•  IN CONST EFI_I2C_ENUMERATE_PROTOCOL *This,
  

•  IN OUT CONST EFI_I2C_DEVICE         **Device
  

• );
• ///
• /// Traverse the set of I2C devices on an I2C bus. This routine
• /// returns the next I2C device on an I2C bus.
• ///
• EFI_I2C_ENUMERATE_PROTOCOL_ENUMERATE Enumerate;
• MvI2cDevice creates EFI_I2C_DEVICE structure for every device on the bus.
• Due to the fact that hardware-based I2C enumeration isn't safe, information
• about attached devices should be provided through PCDs. After EFI_I2C_DEVICE
• structure is created and filled properly, it is returned to I2cBus. It is
• followed by attachment of I2C device driver.

diff --git a/Documentation/Marvell/PortingGuide/I2c.txt b/Documentation/Marvell/PortingGuide/I2c.txt new file mode 100644 index 0000000..7b78367 --- /dev/null +++ b/Documentation/Marvell/PortingGuide/I2c.txt @@ -0,0 +1,16 @@ +1. Porting I2C driver to a new SOC +---------------------------------- +In order to enable driver on a new platform, following steps need to be taken:

• • add following line to .dsc file:
• OpenPlatformPkg/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
• • add following line to .fdf file:
• INF OpenPlatformPkg/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
• • add PCDs with relevant values to .dsc file:

• gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57 }
  

• (addresses of I2C slave devices on bus)

• gMarvellTokenSpaceGuid.PcdI2cBaseAddress|0xF0511000
  

• (base address of I2C controller)

• gMarvellTokenSpaceGuid.PcdI2cClockFrequency|200000000
  

• (I2C host controller clock frequency)

• gMarvellTokenSpaceGuid.PcdI2cBaudRate|100000
  

• (baud rate used in I2C transmission)

diff --git a/Drivers/I2c/MvI2cDxe/MvI2cDxe.c b/Drivers/I2c/MvI2cDxe/MvI2cDxe.c new file mode 100644 index 0000000..b91ccfe --- /dev/null +++ b/Drivers/I2c/MvI2cDxe/MvI2cDxe.c @@ -0,0 +1,683 @@ +/******************************************************************************** +Copyright (C) 2016 Marvell International Ltd.

+Marvell BSD License Option

+If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met:

+* Redistributions of source code must retain the above copyright notice,

• this list of conditions and the following disclaimer.

+* Redistributions in binary form must reproduce the above copyright

• notice, this list of conditions and the following disclaimer in the
• documentation and/or other materials provided with the distribution.

+* Neither the name of Marvell nor the names of its contributors may be

• used to endorse or promote products derived from this software without
• specific prior written permission.

+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+*******************************************************************************/

+#include <Protocol/I2cMaster.h> +#include <Protocol/I2cEnumerate.h> +#include <Protocol/I2cBusConfigurationManagement.h> +#include <Protocol/DevicePath.h>

+#include <Library/BaseLib.h> +#include <Library/IoLib.h> +#include <Library/DebugLib.h> +#include <Library/PcdLib.h> +#include <Library/UefiLib.h> +#include <Library/MemoryAllocationLib.h> +#include <Library/UefiBootServicesTableLib.h>

+#include "MvI2cDxe.h"

+STATIC MV_I2C_BAUD_RATE baud_rate;

+MV_I2C_DEVICE_PATH gDevicePathProtocol = {

If this is meant to be a global variable, could it be renamed gMvI2cDevicePathProtocol? If not, keep the name but make it STATIC.

• {
• {

•  HARDWARE_DEVICE_PATH,
  

•  HW_VENDOR_DP,
  

•  {
  

• (UINT8) (sizeof(VENDOR_DEVICE_PATH)),
• (UINT8) (sizeof(VENDOR_DEVICE_PATH) >> 8),

•  },
  

• },
• EFI_CALLER_ID_GUID
• },
• {
• END_DEVICE_PATH_TYPE,
• END_ENTIRE_DEVICE_PATH_SUBTYPE,
• {

•  sizeof(EFI_DEVICE_PATH_PROTOCOL),
  

•  0
  

• }
• }

+};

+STATIC +UINT32 +I2C_READ(

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINTN off)

+{

• ASSERT (I2cMasterContext != NULL);
• return MmioRead32 (I2cMasterContext->BaseAddress + off);

+}

+STATIC +EFI_STATUS +I2C_WRITE (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINTN off,
• IN UINT32 Value)

+{

• ASSERT (I2cMasterContext != NULL);
• return MmioWrite32 (I2cMasterContext->BaseAddress + off, Value);

+}

+EFI_STATUS +EFIAPI +MvI2cInitialise (

• IN EFI_HANDLE ImageHandle,
• IN EFI_SYSTEM_TABLE *SystemTable
• )

+{

• EFI_STATUS Status;
• I2C_MASTER_CONTEXT *I2cMasterContext;
• /* if attachment succeeds, this gets freed at ExitBootServices */
• I2cMasterContext = AllocateZeroPool (sizeof (I2C_MASTER_CONTEXT));
• if (I2cMasterContext == NULL) {
• DEBUG((DEBUG_ERROR, "MvI2cDxe: I2C master context allocation failed\n"));
• return EFI_OUT_OF_RESOURCES;
• }
• I2cMasterContext->Signature = I2C_MASTER_SIGNATURE;
• I2cMasterContext->I2cMaster.Reset = MvI2cReset;
• I2cMasterContext->I2cMaster.StartRequest = MvI2cStartRequest;
• I2cMasterContext->I2cEnumerate.Enumerate = MvI2cEnumerate;
• I2cMasterContext->I2cBusConf.EnableI2cBusConfiguration = MvI2cEnableConf;
• I2cMasterContext->TclkFrequency = PcdGet32 (PcdI2cClockFrequency);
• I2cMasterContext->BaseAddress = PcdGet64 (PcdI2cBaseAddress);
• /* I2cMasterContext->Lock is responsible for serializing I2C operations */
• EfiInitializeLock(&I2cMasterContext->Lock, TPL_NOTIFY);
• /* Checks if protocol is *not yet* installed */
• ASSERT_PROTOCOL_ALREADY_INSTALLED(NULL, &gEfiI2cMasterProtocolGuid);
• ASSERT_PROTOCOL_ALREADY_INSTALLED(NULL, &gEfiI2cEnumerateProtocolGuid);
• ASSERT_PROTOCOL_ALREADY_INSTALLED(NULL, &gEfiI2cBusConfigurationManagementProtocolGuid);
• MvI2cCalBaudRate( I2cMasterContext,

•                PcdGet32 (PcdI2cBaudRate),
  

•                &baud_rate,
  

•                I2cMasterContext->TclkFrequency
  

•              );
  

• Status = gBS->InstallMultipleProtocolInterfaces(

•  &I2cMasterContext->Controller,
  

•  &gEfiI2cMasterProtocolGuid,
  

•  &I2cMasterContext->I2cMaster,
  

•  &gEfiI2cEnumerateProtocolGuid,
  

•  &I2cMasterContext->I2cEnumerate,
  

•  &gEfiI2cBusConfigurationManagementProtocolGuid,
  

•  &I2cMasterContext->I2cBusConf,
  

•  &gEfiDevicePathProtocolGuid,
  

•  (EFI_DEVICE_PATH_PROTOCOL *) &gDevicePathProtocol,
  

•  NULL);
  

• if (EFI_ERROR(Status)) {
• DEBUG((DEBUG_ERROR, "MvI2cDxe: Installing protocol interfaces failed!\n"));
• goto fail;
• }
• return EFI_SUCCESS;

+fail:

• FreePool(I2cMasterContext);
• return Status;

+}

+STATIC +VOID +MvI2cControlClear (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINT32 Mask)

+{

• UINT32 Value;
• /* clears given bits in I2C_CONTROL register */
• Value = I2C_READ(I2cMasterContext, I2C_CONTROL);
• Value &= ~Mask;
• I2C_WRITE(I2cMasterContext, I2C_CONTROL, Value);

+}

+STATIC +VOID +MvI2cControlSet (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINT32 Mask)

+{

• UINT32 Value;
• /* sets given bits in I2C_CONTROL register */
• Value = I2C_READ(I2cMasterContext, I2C_CONTROL);
• Value |= Mask;
• I2C_WRITE(I2cMasterContext, I2C_CONTROL, Value);

+}

+STATIC +VOID +MvI2cClearIflg (

• IN I2C_MASTER_CONTEXT *I2cMasterContext
• )

+{

• gBS->Stall(I2C_OPERATION_TIMEOUT);
• MvI2cControlClear(I2cMasterContext, I2C_CONTROL_IFLG);
• gBS->Stall(I2C_OPERATION_TIMEOUT);

+}

+/* Timeout is given in us */ +STATIC +UINTN +MvI2cPollCtrl (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINTN Timeout,
• IN UINT32 Mask)

+{

• Timeout /= 10;
• while (!(I2C_READ(I2cMasterContext, I2C_CONTROL) & Mask)) {
• gBS->Stall(10);
• if (--Timeout == 0)

•  return (Timeout);
  

• }
• return (0);

+}

+/*

• • 'Timeout' is given in us. Note also that Timeout handling is not exact --
• • MvI2cLockedStart() total wait can be more than 2 x Timeout
• • (MvI2cPollCtrl() is called twice). 'Mask' can be either I2C_STATUS_START
• • or I2C_STATUS_RPTD_START
• */

+STATIC +EFI_STATUS +MvI2cLockedStart (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN INT32 Mask,
• IN UINT8 Slave,
• IN UINTN Timeout
• )

+{

• UINTN ReadAccess, IflgSet = 0;
• UINT32 I2cStatus;
• if (Mask == I2C_STATUS_RPTD_START) {
• /* read IFLG to know if it should be cleared later */
• IflgSet = I2C_READ(I2cMasterContext, I2C_CONTROL) & I2C_CONTROL_IFLG;
• }
• MvI2cControlSet(I2cMasterContext, I2C_CONTROL_START);
• if (Mask == I2C_STATUS_RPTD_START && IflgSet) {
• DEBUG((DEBUG_INFO, "MvI2cDxe: IFLG set, clearing\n"));
• MvI2cClearIflg(I2cMasterContext);
• }
• /* Without this delay we Timeout checking IFLG if the Timeout is 0 */
• gBS->Stall(I2C_OPERATION_TIMEOUT);
• if (MvI2cPollCtrl(I2cMasterContext, Timeout, I2C_CONTROL_IFLG)) {
• DEBUG((DEBUG_ERROR, "MvI2cDxe: Timeout sending %sSTART condition\n",

•    Mask == I2C_STATUS_START ? "" : "repeated "));
  

• return EFI_NO_RESPONSE;
• }
• I2cStatus = I2C_READ(I2cMasterContext, I2C_STATUS);
• if (I2cStatus != Mask) {
• DEBUG((DEBUG_ERROR, "MvI2cDxe: wrong I2cStatus (%02x) after sending %sSTART condition\n",

•    I2cStatus, Mask == I2C_STATUS_START ? "" : "repeated "));
  

• return EFI_DEVICE_ERROR;
• }
• I2C_WRITE(I2cMasterContext, I2C_DATA, Slave);
• gBS->Stall(I2C_OPERATION_TIMEOUT);
• MvI2cClearIflg(I2cMasterContext);
• if (MvI2cPollCtrl(I2cMasterContext, Timeout, I2C_CONTROL_IFLG)) {
• DEBUG((DEBUG_ERROR, "MvI2cDxe: Timeout sending Slave address\n"));
• return EFI_NO_RESPONSE;
• }
• ReadAccess = (Slave & 0x1) ? 1 : 0;
• I2cStatus = I2C_READ(I2cMasterContext, I2C_STATUS);
• if (I2cStatus != (ReadAccess ?

•  I2C_STATUS_ADDR_R_ACK : I2C_STATUS_ADDR_W_ACK)) {
  

• DEBUG((DEBUG_ERROR, "MvI2cDxe: no ACK (I2cStatus: %02x) after sending Slave address\n",

•    I2cStatus));
  

• return EFI_NO_RESPONSE;
• }
• return EFI_SUCCESS;

+}

+#define ABSSUB(a,b) (((a) > (b)) ? (a) - (b) : (b) - (a)) +STATIC +VOID +MvI2cCalBaudRate (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN CONST UINT32 target,
• IN OUT MV_I2C_BAUD_RATE *rate,
• UINT32 clk
• )

+{

• UINT32 cur, diff, diff0, baud;
• UINTN m, n, m0, n0;
• /* Read initial m0, n0 values from register */
• baud = I2C_READ(I2cMasterContext, I2C_BAUD_RATE);
• m0 = I2C_M_FROM_BAUD(baud);
• n0 = I2C_N_FROM_BAUD(baud);
• /* Calculate baud rate. */
• diff0 = 0xffffffff;
• for (n = 0; n < 8; n++) {
• for (m = 0; m < 16; m++) {

•  cur = I2C_BAUD_RATE_RAW(clk,m,n);
  

•  diff = ABSSUB(target, cur);
  

•  if (diff < diff0) {
  

•    m0 = m;
  

•    n0 = n;
  

•    diff0 = diff;
  

•  }
  

• }
• }
• rate->raw = I2C_BAUD_RATE_RAW(clk, m0, n0);
• rate->param = I2C_BAUD_RATE_PARAM(m0, n0);
• rate->m = m0;
• rate->n = n0;

+}

+EFI_STATUS +EFIAPI +MvI2cReset (

• IN CONST EFI_I2C_MASTER_PROTOCOL *This
• )

+{

• UINT32 param;
• I2C_MASTER_CONTEXT *I2cMasterContext = I2C_SC_FROM_MASTER(This);
• param = baud_rate.param;
• EfiAcquireLock (&I2cMasterContext->Lock);
• I2C_WRITE(I2cMasterContext, I2C_SOFT_RESET, 0x0);
• gBS->Stall(2 * I2C_OPERATION_TIMEOUT);
• I2C_WRITE(I2cMasterContext, I2C_BAUD_RATE, param);
• I2C_WRITE(I2cMasterContext, I2C_CONTROL, I2C_CONTROL_I2CEN | I2C_CONTROL_ACK);
• gBS->Stall(I2C_OPERATION_TIMEOUT);
• EfiReleaseLock (&I2cMasterContext->Lock);
• return EFI_SUCCESS;

+}

+/*

• • Timeout is given in us
• */

+STATIC +EFI_STATUS +MvI2cRepeatedStart (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINT8 Slave,
• IN UINTN Timeout
• )

+{

• EFI_STATUS Status;
• EfiAcquireLock (&I2cMasterContext->Lock);
• Status = MvI2cLockedStart(I2cMasterContext, I2C_STATUS_RPTD_START, Slave,

•  Timeout);
  

• EfiReleaseLock (&I2cMasterContext->Lock);
• if (EFI_ERROR(Status)) {
• MvI2cStop(I2cMasterContext);
• }
• return Status;

+}

+/*

• • Timeout is given in us
• */

+STATIC +EFI_STATUS +MvI2cStart (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINT8 Slave,
• IN UINTN Timeout
• )

+{

• EFI_STATUS Status;
• EfiAcquireLock (&I2cMasterContext->Lock);
• Status = MvI2cLockedStart(I2cMasterContext, I2C_STATUS_START, Slave, Timeout);
• EfiReleaseLock (&I2cMasterContext->Lock);
• if (EFI_ERROR(Status)) {
• MvI2cStop(I2cMasterContext);
• }
• return Status;

+}

+STATIC +EFI_STATUS +MvI2cStop (

• IN I2C_MASTER_CONTEXT *I2cMasterContext
• )

+{

• EfiAcquireLock (&I2cMasterContext->Lock);
• MvI2cControlSet(I2cMasterContext, I2C_CONTROL_STOP);
• gBS->Stall(I2C_OPERATION_TIMEOUT);
• MvI2cClearIflg(I2cMasterContext);
• EfiReleaseLock (&I2cMasterContext->Lock);
• return EFI_SUCCESS;

+}

+STATIC +EFI_STATUS +MvI2cRead (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN OUT UINT8 *Buf,
• IN UINTN Length,
• IN OUT UINTN *read,
• IN UINTN last,
• IN UINTN delay
• )

+{

• UINT32 I2cStatus;
• UINTN LastByte;
• EFI_STATUS Status;
• EfiAcquireLock (&I2cMasterContext->Lock);
• *read = 0;
• while (*read < Length) {
• /*

• * Check if we are reading last byte of the last Buffer,
  

• * do not send ACK then, per I2C specs
  

• */
  

• LastByte = ((*read == Length - 1) && last) ? 1 : 0;
• if (LastByte)

•  MvI2cControlClear(I2cMasterContext, I2C_CONTROL_ACK);
  

• else

•  MvI2cControlSet(I2cMasterContext, I2C_CONTROL_ACK);
  

• gBS->Stall (I2C_OPERATION_TIMEOUT);
• MvI2cClearIflg(I2cMasterContext);
• if (MvI2cPollCtrl(I2cMasterContext, delay, I2C_CONTROL_IFLG)) {

•  DEBUG((DEBUG_ERROR, "MvI2cDxe: Timeout reading data\n"));
  

•  Status = EFI_NO_RESPONSE;
  

•  goto out;
  

• }
• I2cStatus = I2C_READ(I2cMasterContext, I2C_STATUS);
• if (I2cStatus != (LastByte ?

•    I2C_STATUS_DATA_RD_NOACK : I2C_STATUS_DATA_RD_ACK)) {
  

•  DEBUG((DEBUG_ERROR, "MvI2cDxe: wrong I2cStatus (%02x) while reading\n", I2cStatus));
  

•  Status = EFI_DEVICE_ERROR;
  

•  goto out;
  

• }
• *Buf++ = I2C_READ(I2cMasterContext, I2C_DATA);
• (*read)++;
• }
• Status = EFI_SUCCESS;

+out:

• EfiReleaseLock (&I2cMasterContext->Lock);
• return (Status);

+}

+STATIC +EFI_STATUS +MvI2cWrite (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN OUT CONST UINT8 *Buf,
• IN UINTN Length,
• IN OUT UINTN *Sent,
• IN UINTN Timeout
• )

+{

• UINT32 status;
• EFI_STATUS Status;
• EfiAcquireLock (&I2cMasterContext->Lock);
• *Sent = 0;
• while (*Sent < Length) {
• I2C_WRITE(I2cMasterContext, I2C_DATA, *Buf++);
• MvI2cClearIflg(I2cMasterContext);
• if (MvI2cPollCtrl(I2cMasterContext, Timeout, I2C_CONTROL_IFLG)) {

•  DEBUG((DEBUG_ERROR, "MvI2cDxe: Timeout writing data\n"));
  

•  Status = EFI_NO_RESPONSE;
  

•  goto out;
  

• }
• status = I2C_READ(I2cMasterContext, I2C_STATUS);
• if (status != I2C_STATUS_DATA_WR_ACK) {

•  DEBUG((DEBUG_ERROR, "MvI2cDxe: wrong status (%02x) while writing\n", status));
  

•  Status = EFI_DEVICE_ERROR;
  

•  goto out;
  

• }
• (*Sent)++;
• }
• Status = EFI_SUCCESS;

+out:

• EfiReleaseLock (&I2cMasterContext->Lock);
• return (Status);

+}

+/*

• • MvI2cStartRequest should be called only by I2cHost.
• • I2C device drivers ought to use EFI_I2C_IO_PROTOCOL instead.
• */

+STATIC +EFI_STATUS +MvI2cStartRequest (

• IN CONST EFI_I2C_MASTER_PROTOCOL *This,
• IN UINTN SlaveAddress,
• IN EFI_I2C_REQUEST_PACKET *RequestPacket,
• IN EFI_EVENT Event OPTIONAL,
• OUT EFI_STATUS *I2cStatus OPTIONAL
• )

+{

• UINTN Count;
• UINTN ReadMode;
• UINTN Transmitted;
• I2C_MASTER_CONTEXT *I2cMasterContext = I2C_SC_FROM_MASTER(This);
• EFI_I2C_OPERATION *Operation;
• ASSERT (RequestPacket != NULL);
• ASSERT (I2cMasterContext != NULL);
• for (Count = 0; Count < RequestPacket->OperationCount; Count++) {
• Operation = &RequestPacket->Operation[Count];
• ReadMode = Operation->Flags & I2C_FLAG_READ;
• if (Count == 0) {

•  MvI2cStart ( I2cMasterContext,
  

•               (SlaveAddress << 1) | ReadMode,
  

•               I2C_TRANSFER_TIMEOUT
  

•             );
  

• } else if (!(Operation->Flags & I2C_FLAG_NORESTART)) {

•  MvI2cRepeatedStart ( I2cMasterContext,
  

•                       (SlaveAddress << 1) | ReadMode,
  

•                       I2C_TRANSFER_TIMEOUT
  

•                     );
  

• }
• if (ReadMode) {

•  MvI2cRead ( I2cMasterContext,
  

•              Operation->Buffer,
  

•              Operation->LengthInBytes,
  

•              &Transmitted,
  

•              Count == 1,
  

•              I2C_TRANSFER_TIMEOUT
  

•             );
  

• } else {

•  MvI2cWrite ( I2cMasterContext,
  

•               Operation->Buffer,
  

•               Operation->LengthInBytes,
  

•               &Transmitted,
  

•               I2C_TRANSFER_TIMEOUT
  

•              );
  

• }
• if (Count == RequestPacket->OperationCount - 1) {

•  MvI2cStop ( I2cMasterContext );
  

• }
• }
• if (I2cStatus != NULL)
• I2cStatus = EFI_SUCCESS;
• if (Event != NULL)
• gBS->SignalEvent(Event);
• return EFI_SUCCESS;

+}

+/*

• • I2C_GUID is embedded in EFI_I2C_DEVICE structure, with last byte set to
• • address of device on I2C bus. Device driver should compare its GUID with
• • offered one in Supported() function.

So, I think I commented on this in the last round: I don't think this use of the device address for the last byte is compliant with rfc4122. If you disagree, could you let me know your reasoning?

Regards,

Leif

• */

+#define I2C_GUID \

• { \
• 0x391fc679, 0x6cb0, 0x4f01, { 0x9a, 0xc7, 0x8e, 0x1b, 0x78, 0x6b, 0x7a, 0x00 } \
• }

+STATIC CONST EFI_GUID DevGuid = I2C_GUID;

+STATIC +EFI_STATUS +MvI2cAllocDevice (

• IN UINT8 SlaveAddress,
• IN OUT CONST EFI_I2C_DEVICE **Device
• )

+{

• EFI_STATUS Status;
• EFI_I2C_DEVICE *Dev;
• UINT32 *TmpSlaveArray;
• EFI_GUID *TmpGuidP;
• Status = gBS->AllocatePool ( EfiBootServicesData,

•         sizeof(EFI_I2C_DEVICE),
  

•         (VOID **) &Dev );
  

• if (EFI_ERROR(Status)) {
• DEBUG((DEBUG_ERROR, "MvI2cDxe: I2C device memory allocation failed\n"));
• return Status;
• }
• *Device = Dev;
• Dev->DeviceIndex = SlaveAddress;
• Dev->SlaveAddressCount = 1;
• Dev->I2cBusConfiguration = 0;
• Status = gBS->AllocatePool ( EfiBootServicesData,

•         sizeof(UINT32),
  

•         (VOID **) &TmpSlaveArray);
  

• if (EFI_ERROR(Status)) {
• goto fail1;
• }
• TmpSlaveArray[0] = SlaveAddress;
• Dev->SlaveAddressArray = TmpSlaveArray;
• Status = gBS->AllocatePool ( EfiBootServicesData,

•         sizeof(EFI_GUID),
  

•         (VOID **) &TmpGuidP);
  

• if (EFI_ERROR(Status)) {
• goto fail2;
• }
• *TmpGuidP = DevGuid;
• Dev->DeviceGuid = TmpGuidP;
• DEBUG((DEBUG_INFO, "MvI2c: allocated device with address %x\n", (UINTN)SlaveAddress));
• return EFI_SUCCESS;

+fail2:

• FreePool(TmpSlaveArray);

+fail1:

• FreePool(Dev);
• return Status;

+}

+/*

• • It is called by I2cBus to enumerate devices on I2C bus. In this case,
• • enumeration is based on PCD configuration - all Slave addresses specified
• • in PCD get their corresponding EFI_I2C_DEVICE structures here.
• • After enumeration succeeds, Supported() function of drivers that installed
• • DriverBinding protocol is called.
• */

+STATIC +EFI_STATUS +EFIAPI +MvI2cEnumerate (

• IN CONST EFI_I2C_ENUMERATE_PROTOCOL *This,
• IN OUT CONST EFI_I2C_DEVICE **Device
• )

+{

• UINT8 *DevicesPcd;
• UINTN Index;
• UINT8 NextDeviceAddress;
• DevicesPcd = PcdGetPtr (PcdI2cSlaveAddresses);
• if (*Device == NULL) {
• if (DevicesPcd[0] != '\0')

•  MvI2cAllocDevice (DevicesPcd[0], Device);
  

• return EFI_SUCCESS;
• } else {
• /* Device is not NULL, so something was already allocated */
• for (Index = 0; DevicesPcd[Index] != '\0'; Index++) {

•  if (DevicesPcd[Index] == (*Device)->DeviceIndex) {
  

•    NextDeviceAddress = DevicesPcd[Index + 1];
  

•    if (NextDeviceAddress != '\0') {
  

•      MvI2cAllocDevice(NextDeviceAddress, Device);
  

•      return EFI_SUCCESS;
  

•    }
  

•    break;
  

•  }
  

• }
• *Device = NULL;
• return EFI_SUCCESS;
• }

+}

+STATIC +EFI_STATUS +EFIAPI +MvI2cEnableConf (

• IN CONST EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *This,
• IN UINTN I2cBusConfiguration,
• IN EFI_EVENT Event OPTIONAL,
• IN EFI_STATUS *I2cStatus OPTIONAL
• )

+{

• /* do nothing */
• if (I2cStatus != NULL)
• I2cStatus = EFI_SUCCESS;
• if (Event != NULL)
• gBS->SignalEvent(Event);
• return EFI_SUCCESS;

+} diff --git a/Drivers/I2c/MvI2cDxe/MvI2cDxe.h b/Drivers/I2c/MvI2cDxe/MvI2cDxe.h new file mode 100644 index 0000000..7bdff8f --- /dev/null +++ b/Drivers/I2c/MvI2cDxe/MvI2cDxe.h @@ -0,0 +1,258 @@ +/******************************************************************************** +Copyright (C) 2016 Marvell International Ltd.

+Marvell BSD License Option

+If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met:

+* Redistributions of source code must retain the above copyright notice,

• this list of conditions and the following disclaimer.

+* Redistributions in binary form must reproduce the above copyright

• notice, this list of conditions and the following disclaimer in the
• documentation and/or other materials provided with the distribution.

+* Neither the name of Marvell nor the names of its contributors may be

• used to endorse or promote products derived from this software without
• specific prior written permission.

+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+*******************************************************************************/

+#ifndef __MV_I2C_H__ +#define __MV_I2C_H__

+#include <Uefi.h>

+#define I2C_BASE_ADDRESS 0xf0511000

+#define I2C_SLAVE_ADDR 0x00 +#define I2C_EXT_SLAVE_ADDR 0x10 +#define I2C_DATA 0x04

+#define I2C_CONTROL 0x08 +#define I2C_CONTROL_ACK (1 << 2) +#define I2C_CONTROL_IFLG (1 << 3) +#define I2C_CONTROL_STOP (1 << 4) +#define I2C_CONTROL_START (1 << 5) +#define I2C_CONTROL_I2CEN (1 << 6) +#define I2C_CONTROL_INTEN (1 << 7)

+#define I2C_STATUS 0x0c +#define I2C_STATUS_START 0x08 +#define I2C_STATUS_RPTD_START 0x10 +#define I2C_STATUS_ADDR_W_ACK 0x18 +#define I2C_STATUS_DATA_WR_ACK 0x28 +#define I2C_STATUS_ADDR_R_ACK 0x40 +#define I2C_STATUS_DATA_RD_ACK 0x50 +#define I2C_STATUS_DATA_RD_NOACK 0x58

+#define I2C_BAUD_RATE 0x0c +#define I2C_BAUD_RATE_PARAM(M,N) ((((M) << 3) | ((N) & 0x7)) & 0x7f) +#define I2C_BAUD_RATE_RAW(C,M,N) ((C)/((10*(M+1))<<(N+1))) +#define I2C_M_FROM_BAUD(baud) (((baud) >> 3) & 0xf) +#define I2C_N_FROM_BAUD(baud) ((baud) & 0x7)

+#define I2C_SOFT_RESET 0x1c +#define I2C_TRANSFER_TIMEOUT 10000 +#define I2C_OPERATION_TIMEOUT 1000

+#define I2C_UNKNOWN 0x0 +#define I2C_SLOW 0x1 +#define I2C_FAST 0x2 +#define I2C_FASTEST 0x3

+/*

• • I2C_FLAG_NORESTART is not part of PI spec, it allows to continue
• • transmission without repeated start operation.
• */

+#define I2C_FLAG_NORESTART 0x00000002

+#define I2C_MASTER_SIGNATURE SIGNATURE_32 ('I', '2', 'C', 'M')

+typedef struct {

• UINT32 Signature;
• EFI_HANDLE Controller;
• EFI_LOCK Lock;
• UINTN TclkFrequency;
• UINTN BaseAddress;
• EFI_I2C_MASTER_PROTOCOL I2cMaster;
• EFI_I2C_ENUMERATE_PROTOCOL I2cEnumerate;
• EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL I2cBusConf;

+} I2C_MASTER_CONTEXT;

+#define I2C_SC_FROM_MASTER(a) CR (a, I2C_MASTER_CONTEXT, I2cMaster, I2C_MASTER_SIGNATURE) +#define I2C_SC_FROM_ENUMERATE(a) CR (a, I2C_MASTER_CONTEXT, I2cEnumerate, I2C_MASTER_SIGNATURE) +#define I2C_SC_FROM_BUSCONF(a) CR (a, I2C_MASTER_CONTEXT, I2cBusConf, I2C_MASTER_SIGNATURE)

+typedef struct {

• UINT32 raw;
• UINTN param;
• UINTN m;
• UINTN n;

+} MV_I2C_BAUD_RATE;

+typedef struct {

• VENDOR_DEVICE_PATH Guid;
• EFI_DEVICE_PATH_PROTOCOL End;

+} MV_I2C_DEVICE_PATH;

+STATIC +UINT32 +I2C_READ(

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINTN off
• );

+STATIC +EFI_STATUS +I2C_WRITE (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINTN off,
• IN UINT32 val
• );

+EFI_STATUS +EFIAPI +MvI2cInitialise (

• IN EFI_HANDLE ImageHandle,
• IN EFI_SYSTEM_TABLE *SystemTable
• );

+STATIC +VOID +MvI2cControlClear (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINT32 mask
• );

+STATIC +VOID +MvI2cControlSet (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINT32 mask
• );

+STATIC +VOID +MvI2cClearIflg (

• IN I2C_MASTER_CONTEXT *I2cMasterContext
• );

+STATIC +UINTN +MvI2cPollCtrl (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINTN timeout,
• IN UINT32 mask
• );

+STATIC +EFI_STATUS +MvI2cLockedStart (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN INT32 mask,
• IN UINT8 slave,
• IN UINTN timeout
• );

+STATIC +VOID +MvI2cCalBaudRate (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN CONST UINT32 target,
• IN OUT MV_I2C_BAUD_RATE *rate,
• UINT32 clk
• );

+EFI_STATUS +EFIAPI +MvI2cReset (

• IN CONST EFI_I2C_MASTER_PROTOCOL *This
• );

+STATIC +EFI_STATUS +MvI2cRepeatedStart (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINT8 slave,
• IN UINTN timeout
• );

+STATIC +EFI_STATUS +MvI2cStart (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN UINT8 slave,
• IN UINTN timeout
• );

+STATIC +EFI_STATUS +MvI2cStop (

• IN I2C_MASTER_CONTEXT *I2cMasterContext
• );

+STATIC +EFI_STATUS +MvI2cRead (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN OUT UINT8 *buf,
• IN UINTN len,
• IN OUT UINTN *read,
• IN UINTN last,
• IN UINTN delay
• );

+STATIC +EFI_STATUS +MvI2cWrite (

• IN I2C_MASTER_CONTEXT *I2cMasterContext,
• IN OUT CONST UINT8 *buf,
• IN UINTN len,
• IN OUT UINTN *sent,
• IN UINTN timeout
• );

+STATIC +EFI_STATUS +EFIAPI +MvI2cStartRequest (

• IN CONST EFI_I2C_MASTER_PROTOCOL *This,
• IN UINTN SlaveAddress,
• IN EFI_I2C_REQUEST_PACKET *RequestPacket,
• IN EFI_EVENT Event OPTIONAL,
• OUT EFI_STATUS *I2cStatus OPTIONAL
• );

+STATIC +EFI_STATUS +EFIAPI +MvI2cEnumerate (

• IN CONST EFI_I2C_ENUMERATE_PROTOCOL *This,
• IN OUT CONST EFI_I2C_DEVICE **Device
• );

+STATIC +EFI_STATUS +EFIAPI +MvI2cEnableConf (

• IN CONST EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL *This,
• IN UINTN I2cBusConfiguration,
• IN EFI_EVENT Event OPTIONAL,
• IN EFI_STATUS *I2cStatus OPTIONAL
• );

+#endif // __MV_I2C_H__ diff --git a/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf b/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf new file mode 100644 index 0000000..328e29d --- /dev/null +++ b/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf @@ -0,0 +1,72 @@ +# +# Marvell BSD License Option +# +# If you received this File from Marvell, you may opt to use, redistribute +# and/or modify this File under the following licensing terms. +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# * Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +#

+[Defines]

• INF_VERSION = 0x00010005
• BASE_NAME = MvI2cDxe
• FILE_GUID = 59fc3843-d8d4-40aa-ae07-38967138509b
• MODULE_TYPE = DXE_DRIVER
• VERSION_STRING = 1.0
• ENTRY_POINT = MvI2cInitialise

+[Sources.common]

• MvI2cDxe.c

+[Packages]

• MdePkg/MdePkg.dec
• MdeModulePkg/MdeModulePkg.dec
• ArmPlatformPkg/ArmPlatformPkg.dec
• ArmPkg/ArmPkg.dec
• OpenPlatformPkg/Platforms/Marvell/Marvell.dec

+[LibraryClasses]

• IoLib
• PcdLib
• BaseLib
• DebugLib
• UefiLib
• UefiDriverEntryPoint
• UefiBootServicesTableLib

+[Protocols]

• gEfiI2cMasterProtocolGuid
• gEfiDevicePathProtocolGuid
• gEfiI2cEnumerateProtocolGuid
• gEfiI2cBusConfigurationManagementProtocolGuid

+[Pcd]

• gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses
• gMarvellTokenSpaceGuid.PcdI2cBaseAddress
• gMarvellTokenSpaceGuid.PcdI2cClockFrequency
• gMarvellTokenSpaceGuid.PcdI2cBaudRate

+[Depex]

• TRUE

diff --git a/Platforms/Marvell/Marvell.dec b/Platforms/Marvell/Marvell.dec index fee8025..9e65986 100644 --- a/Platforms/Marvell/Marvell.dec +++ b/Platforms/Marvell/Marvell.dec @@ -104,3 +104,9 @@ gMarvellTokenSpaceGuid.PcdChip3MppSel6|{ 0 }|VOID*|0x30000044 gMarvellTokenSpaceGuid.PcdChip3MppSel7|{ 0 }|VOID*|0x30000045 +#I2C

• gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0 }|VOID*|0x3000046
• gMarvellTokenSpaceGuid.PcdI2cBaseAddress|0|UINT64|0x3000047
• gMarvellTokenSpaceGuid.PcdI2cClockFrequency|0|UINT32|0x3000048
• gMarvellTokenSpaceGuid.PcdI2cBaudRate|0|UINT32|0x3000049

-- 1.8.3.1

On Fri, Apr 29, 2016 at 07:25:57PM +0200, Marcin Wojtas wrote:

From: Bartosz Szczepanek bsz@semihalf.com

MvEeprom driver produces EFI_EEPROM_PROTOCOL, which can be used by other drivers or applications. Working EFI_I2C_IO_PROTOCOL is required by driver to operate.

EEPROM devices' addresses need to be fed via 'PcdEepromI2cAddresses'.

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Bartosz Szczepanek bsz@semihalf.com Signed-off-by: Marcin Wojtas mw@semihalf.com

---

Documentation/Marvell/Drivers/EepromDriver.txt | 96 ++++++++ Drivers/I2c/Devices/MvEeprom/MvEeprom.c | 293 +++++++++++++++++++++++++ Drivers/I2c/Devices/MvEeprom/MvEeprom.h | 90 ++++++++ Drivers/I2c/Devices/MvEeprom/MvEeprom.inf | 69 ++++++ Platforms/Marvell/Include/Protocol/Eeprom.h | 60 +++++ Platforms/Marvell/Marvell.dec | 4 + 6 files changed, 612 insertions(+) create mode 100644 Documentation/Marvell/Drivers/EepromDriver.txt create mode 100644 Drivers/I2c/Devices/MvEeprom/MvEeprom.c create mode 100644 Drivers/I2c/Devices/MvEeprom/MvEeprom.h create mode 100644 Drivers/I2c/Devices/MvEeprom/MvEeprom.inf create mode 100644 Platforms/Marvell/Include/Protocol/Eeprom.h

diff --git a/Documentation/Marvell/Drivers/EepromDriver.txt b/Documentation/Marvell/Drivers/EepromDriver.txt new file mode 100644 index 0000000..e2da35f --- /dev/null +++ b/Documentation/Marvell/Drivers/EepromDriver.txt @@ -0,0 +1,96 @@ +1. Introduction +--------------- +**MvEeprom** driver creates MARVELL_EEPROM_PROTOCOL, which ++is used for managing eeprom.

+2. MvEeprom driver design +------------------------- +Every I2C device driver should implement EFI_DRIVER_BINDING_PROTOCOL and +consume EFI_I2C_IO_PROTOCOL for transactions on I2C bus. MvEeprom driver +additionally implements MARVELL_EEPROM_PROTOCOL.

• 2.1 EFI_DRIVER_BINDING_PROTOCOL

• ---

• Driver Binding protocol is extensively covered in UEFI documentation, as
• it is not specific to I2C stack. The only difference is that Supported()
• function should check if EFI_I2C_IO_PROTOCOL provides valid EFI_GUID and
• DeviceIndex values.
• Excerpt from MvEepromSupported():
• Status = gBS->OpenProtocol (

•                ControllerHandle,
  

•                &gEfiI2cIoProtocolGuid,
  

•                (VOID **) &TmpI2cIo,
  

•                gImageHandle,
  

•                ControllerHandle,
  

•                EFI_OPEN_PROTOCOL_BY_DRIVER
  

•                );
  

• if (EFI_ERROR(Status)) {

•  return EFI_UNSUPPORTED;
  

• }
• /* get EEPROM devices' addresses from PCD */
• EepromAddresses = PcdGetPtr (PcdEepromI2cAddresses);
• if (EepromAddresses == 0) {

•  Status = EFI_UNSUPPORTED;
  

•  goto out;
  

• }
• Status = EFI_UNSUPPORTED;
• for (i = 0; EepromAddresses[i] != '\0'; i++) {

•  /* I2C guid must fit and valid DeviceIndex must be provided */
  

•  if (CompareGuid(TmpI2cIo->DeviceGuid, &I2cGuid) &&
  

•      TmpI2cIo->DeviceIndex == EepromAddresses[i]) {
  

•    DEBUG((DEBUG_INFO, "A8kEepromSupported: attached to EEPROM device\n"));
  

•    Status = EFI_SUCCESS;
  

•    break;
  

•  }
  

• }
• 2.2 EFI_I2C_IO_PROTOCOL

• ---

• This protocol is provided by generic I2C stack. Multiple drivers can use IO
• protocol at once, as queueing is implemented.
• QueueRequest is a routine that queues an I2C transaction to the I2C
• controller for execution on the I2C bus.
• 2.3 MARVELL_EEPROM_PROTOCOL

• ---

• typedef struct _MARVELL_EEPROM_PROTOCOL MARVELL_EEPROM_PROTOCOL;
• #define EEPROM_READ 0x1
• #define EEPROM_WRITE 0x0
• typedef
• EFI_STATUS
• (EFIAPI *EFI_EEPROM_TRANSFER) (

•  IN CONST MARVELL_EEPROM_PROTOCOL  *This,
  

•  IN UINT16                     Address,
  

•  IN UINT32                     Length,
  

•  IN UINT8                      *Buffer,
  

•  IN UINT8                      Operation
  

•  );
  

• struct _MARVELL_EEPROM_PROTOCOL {

•  EFI_EEPROM_TRANSFER Transfer;
  

•  UINT8 Identifier;
  

• };

+3. Adding new I2C slave device drivers +-------------------------------------- +In order to support I2C slave device other than EEPROM, new driver should +be created. Required steps follow.

• 1. Create driver directory (OpenPlatformPkg/Drivers/I2c/Devices/...).
• 2. Create stubs of .inf and .c files (MvEeprom files are a reference),

• include .inf file in platform .dsc and .fdf files.
  

• 3. Implement EFI_DRIVER_BINDING_PROTOCOL - Start(), Stop(), Supported()

• functions' implementation is a must. EFI_DRIVER_BINDING_PROTOCOL
  

• should be installed at driver's entry point.
  

• 4. Add I2C address of device to PcdI2cSlaveAddresses in .dsc file.
• 5. Test available EFI_I2C_IO_PROTOCOLs in Supported() - find instance

• with valid GUID and DeviceIndex (I2C slave address).
  

• 6. Open EFI_I2C_IO_PROTOCOL for usage in Start(). After that, QueueRequest

• function should be available.
  

• 7. Implement core functionality of driver (using QueueRequest to access I2C).
• 8. (not mandatory) Produce/consume additional protocols.

diff --git a/Drivers/I2c/Devices/MvEeprom/MvEeprom.c b/Drivers/I2c/Devices/MvEeprom/MvEeprom.c new file mode 100644 index 0000000..c75a7ef --- /dev/null +++ b/Drivers/I2c/Devices/MvEeprom/MvEeprom.c @@ -0,0 +1,293 @@ +/******************************************************************************** +Copyright (C) 2016 Marvell International Ltd.

+Marvell BSD License Option

+If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met:

+* Redistributions of source code must retain the above copyright notice,

• this list of conditions and the following disclaimer.

+* Redistributions in binary form must reproduce the above copyright

• notice, this list of conditions and the following disclaimer in the
• documentation and/or other materials provided with the distribution.

+* Neither the name of Marvell nor the names of its contributors may be

• used to endorse or promote products derived from this software without
• specific prior written permission.

+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+*******************************************************************************/

+#include <Protocol/DriverBinding.h> +#include <Protocol/I2cIo.h> +#include <Protocol/Eeprom.h>

+#include <Library/BaseLib.h> +#include <Library/BaseMemoryLib.h> +#include <Library/MemoryAllocationLib.h> +#include <Library/IoLib.h> +#include <Library/DebugLib.h> +#include <Library/PcdLib.h> +#include <Library/UefiLib.h> +#include <Library/UefiBootServicesTableLib.h>

+#include <Pi/PiI2c.h>

+#include "MvEeprom.h"

+/* Last byte of GUID will contain address of device */

Same question as for 5 - rfc4122 compliance?

+#define I2C_GUID \

• { \
• 0x391fc679, 0x6cb0, 0x4f01, { 0x9a, 0xc7, 0x8e, 0x1b, 0x78, 0x6b, 0x7a, 0x00 } \
• }

+STATIC CONST EFI_GUID I2cGuid = I2C_GUID;

+EFI_DRIVER_BINDING_PROTOCOL gDriverBindingProtocol = {

• MvEepromSupported,
• MvEepromStart,
• MvEepromStop

+};

+EFI_STATUS +EFIAPI +MvEepromSupported (

• IN EFI_DRIVER_BINDING_PROTOCOL *This,
• IN EFI_HANDLE ControllerHandle,
• IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
• )

+{

• EFI_STATUS Status = EFI_UNSUPPORTED;
• EFI_I2C_IO_PROTOCOL *TmpI2cIo;
• UINT8 *EepromAddresses;
• UINTN i;
• Status = gBS->OpenProtocol (

•  ControllerHandle,
  

•  &gEfiI2cIoProtocolGuid,
  

•  (VOID **) &TmpI2cIo,
  

•  gImageHandle,
  

•  ControllerHandle,
  

•  EFI_OPEN_PROTOCOL_BY_DRIVER
  

•  );
  

• if (EFI_ERROR(Status)) {
• return EFI_UNSUPPORTED;
• }
• /* get EEPROM devices' addresses from PCD */
• EepromAddresses = PcdGetPtr (PcdEepromI2cAddresses);
• if (EepromAddresses == 0) {
• Status = EFI_UNSUPPORTED;
• DEBUG((DEBUG_INFO, "MvEepromSupported: I2C device found, but it's not EEPROM\n"));
• goto out;
• }
• Status = EFI_UNSUPPORTED;
• for (i = 0; EepromAddresses[i] != '\0'; i++) {
• /* I2C guid must fit and valid DeviceIndex must be provided */
• if (CompareGuid(TmpI2cIo->DeviceGuid, &I2cGuid) &&

•    TmpI2cIo->DeviceIndex == EepromAddresses[i]) {
  

•  DEBUG((DEBUG_INFO, "MvEepromSupported: attached to EEPROM device\n"));
  

•  Status = EFI_SUCCESS;
  

•  break;
  

• }
• }

+out:

• gBS->CloseProtocol (

•  ControllerHandle,
  

•  &gEfiI2cIoProtocolGuid,
  

•  gImageHandle,
  

•  ControllerHandle
  

•  );
  

• return Status;

+}

+EFI_STATUS +EFIAPI +MvEepromTransfer (

• IN CONST MARVELL_EEPROM_PROTOCOL *This,
• IN UINT16 Address,
• IN UINT32 Length,
• IN UINT8 *Buffer,
• IN UINT8 Operation
• )

+{

• EFI_I2C_REQUEST_PACKET *RequestPacket;
• UINTN RequestPacketSize;
• EFI_STATUS Status = EFI_SUCCESS;
• EEPROM_CONTEXT *EepromContext = EEPROM_SC_FROM_EEPROM(This);
• UINT32 BufferLength;
• UINT32 Transmitted = 0;
• UINT32 CurrentAddress = Address;
• ASSERT(EepromContext != NULL);
• ASSERT(EepromContext->I2cIo != NULL);
• RequestPacketSize = sizeof(UINTN) + sizeof (EFI_I2C_OPERATION) * 2;
• RequestPacket = AllocateZeroPool (RequestPacketSize);
• if (RequestPacket == NULL)
• return EFI_OUT_OF_RESOURCES;
• /* First operation contains address, the second is buffer */
• RequestPacket->OperationCount = 2;
• RequestPacket->Operation[0].LengthInBytes = 2;
• RequestPacket->Operation[0].Buffer = AllocateZeroPool ( RequestPacket->Operation[0].LengthInBytes );
• if (RequestPacket->Operation[0].Buffer == NULL) {
• FreePool(RequestPacket);
• return EFI_OUT_OF_RESOURCES;
• }
• RequestPacket->Operation[1].Flags = (Operation == EEPROM_READ ? I2C_FLAG_READ : I2C_FLAG_NORESTART);
• while (Length > 0) {
• CurrentAddress = Address + Transmitted;
• BufferLength = (Length <= MAX_BUFFER_LENGTH ? Length : MAX_BUFFER_LENGTH);
• RequestPacket->Operation[0].Buffer[0] = (CurrentAddress >> 8) & 0xff;
• RequestPacket->Operation[0].Buffer[1] = CurrentAddress & 0xff;
• RequestPacket->Operation[1].LengthInBytes = BufferLength;
• RequestPacket->Operation[1].Buffer = Buffer + Transmitted;
• Status = EepromContext->I2cIo->QueueRequest(EepromContext->I2cIo, 0, NULL, RequestPacket, NULL);
• if (EFI_ERROR(Status)) {

•  DEBUG((DEBUG_ERROR, "MvEepromTransfer: error %d during transmission\n", Status));
  

•  break;
  

• }
• Length -= BufferLength;
• Transmitted += BufferLength;
• }
• FreePool(RequestPacket->Operation[0].Buffer);
• FreePool(RequestPacket);
• return Status;

+}

+EFI_STATUS +EFIAPI +MvEepromStart (

• IN EFI_DRIVER_BINDING_PROTOCOL *This,
• IN EFI_HANDLE ControllerHandle,
• IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
• )

+{

• EFI_STATUS Status = EFI_SUCCESS;
• EEPROM_CONTEXT *EepromContext;
• EepromContext = AllocateZeroPool (sizeof(EEPROM_CONTEXT));
• if (EepromContext == NULL) {
• DEBUG((DEBUG_ERROR, "MvEeprom: allocation fail\n"));
• return EFI_OUT_OF_RESOURCES;
• }
• EepromContext->ControllerHandle = ControllerHandle;
• EepromContext->Signature = EEPROM_SIGNATURE;
• EepromContext->EepromProtocol.Transfer = MvEepromTransfer;
• Status = gBS->OpenProtocol (

•  ControllerHandle,
  

•  &gEfiI2cIoProtocolGuid,
  

•  (VOID **) &EepromContext->I2cIo,
  

•  gImageHandle,
  

•  ControllerHandle,
  

•  EFI_OPEN_PROTOCOL_BY_DRIVER
  

•  );
  

• if (EFI_ERROR(Status)) {
• DEBUG((DEBUG_ERROR, "MvEeprom: failed to open I2cIo\n"));
• FreePool(EepromContext);
• return EFI_UNSUPPORTED;
• }
• EepromContext->EepromProtocol.Identifier = EepromContext->I2cIo->DeviceIndex;
• Status = gBS->InstallMultipleProtocolInterfaces (

•  &ControllerHandle,
  

•  &gMarvellEepromProtocolGuid, &EepromContext->EepromProtocol,
  

•  NULL
  

•  );
  

• if (EFI_ERROR(Status)) {
• DEBUG((DEBUG_ERROR, "MvEeprom: failed to install EEPROM protocol\n"));
• goto fail;
• }
• return Status;

+fail:

• FreePool(EepromContext);
• gBS->CloseProtocol (

•  ControllerHandle,
  

•  &gEfiI2cIoProtocolGuid,
  

•  gImageHandle,
  

•  ControllerHandle
  

•  );
  

• return Status;

+}

+EFI_STATUS +EFIAPI +MvEepromStop (

• IN EFI_DRIVER_BINDING_PROTOCOL *This,
• IN EFI_HANDLE ControllerHandle,
• IN UINTN NumberOfChildren,
• IN EFI_HANDLE *ChildHandleBuffer OPTIONAL
• )

+{

• MARVELL_EEPROM_PROTOCOL *EepromProtocol;
• EFI_STATUS Status;
• EEPROM_CONTEXT *EepromContext;
• Status = gBS->OpenProtocol (

•              ControllerHandle,
  

•              &gMarvellEepromProtocolGuid,
  

•              (VOID **) &EepromProtocol,
  

•              This->DriverBindingHandle,
  

•              ControllerHandle,
  

•              EFI_OPEN_PROTOCOL_GET_PROTOCOL
  

•              );
  

• if (EFI_ERROR (Status)) {
• return EFI_DEVICE_ERROR;
• }
• EepromContext = EEPROM_SC_FROM_EEPROM(EepromProtocol);
• gBS->UninstallMultipleProtocolInterfaces (

•  &ControllerHandle,
  

•  &gMarvellEepromProtocolGuid, &EepromContext->EepromProtocol,
  

•  &gEfiDriverBindingProtocolGuid, &gDriverBindingProtocol,
  

•  NULL
  

•  );
  

• gBS->CloseProtocol (

•  ControllerHandle,
  

•  &gEfiI2cIoProtocolGuid,
  

•  gImageHandle,
  

•  ControllerHandle
  

•  );
  

• FreePool(EepromContext);
• return EFI_SUCCESS;

+}

+EFI_STATUS +EFIAPI +MvEepromInitialise (

• IN EFI_HANDLE ImageHandle,
• IN EFI_SYSTEM_TABLE *SystemTable
• )

+{

• EFI_STATUS Status;
• Status = gBS->InstallMultipleProtocolInterfaces (

•  &ImageHandle,
  

•  &gEfiDriverBindingProtocolGuid, &gDriverBindingProtocol,
  

•  NULL
  

•  );
  

• return Status;

+} diff --git a/Drivers/I2c/Devices/MvEeprom/MvEeprom.h b/Drivers/I2c/Devices/MvEeprom/MvEeprom.h new file mode 100644 index 0000000..6b3f752 --- /dev/null +++ b/Drivers/I2c/Devices/MvEeprom/MvEeprom.h @@ -0,0 +1,90 @@ +/******************************************************************************** +Copyright (C) 2016 Marvell International Ltd.

+Marvell BSD License Option

+If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met:

+* Redistributions of source code must retain the above copyright notice,

• this list of conditions and the following disclaimer.

+* Redistributions in binary form must reproduce the above copyright

• notice, this list of conditions and the following disclaimer in the
• documentation and/or other materials provided with the distribution.

+* Neither the name of Marvell nor the names of its contributors may be

• used to endorse or promote products derived from this software without
• specific prior written permission.

+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+*******************************************************************************/

+#ifndef __MV_EEPROM_H__ +#define __MV_EEPROM_H__

+#include <Uefi.h>

+#define EEPROM_SIGNATURE SIGNATURE_32 ('E', 'E', 'P', 'R')

+#define MAX_BUFFER_LENGTH 64

+#define I2C_FLAG_NORESTART 0x00000002