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from 57e4ba18100 Make red zone size more flexible for stack variables (PR sa [...]
new a90ea173ee1 [PATCH][GCC][ARM] Ensure dotproduct is only enabled on armv8 neon
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Summary of changes:
gcc/ChangeLog | 4 ++++
gcc/config/arm/arm.h | 2 +-
gcc/testsuite/ChangeLog | 8 ++++++++
gcc/testsuite/lib/target-supports.exp | 1 +
4 files changed, 14 insertions(+), 1 deletion(-)
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from 9e622efe71a [RS6000] PowerPC64 soft-float
new 57e4ba18100 Make red zone size more flexible for stack variables (PR sa [...]
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Summary of changes:
gcc/ChangeLog | 19 ++
gcc/asan.c | 202 ++++++++++++++++-----
gcc/asan.h | 25 +++
gcc/cfgexpand.c | 14 +-
gcc/testsuite/ChangeLog | 5 +
gcc/testsuite/c-c++-common/asan/asan-stack-small.c | 28 +++
6 files changed, 243 insertions(+), 50 deletions(-)
create mode 100644 gcc/testsuite/c-c++-common/asan/asan-stack-small.c
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unknown user pushed a change to branch master
in repository llvm.
from 98272e49b80 TableGen/ISel: Allow PatFrag predicate code to access captu [...]
new d339265d524 [AMDGPU] Combine DPP mov with use instructions (VOP1/2/3)
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Summary of changes:
lib/Target/AMDGPU/AMDGPU.h | 4 +
lib/Target/AMDGPU/AMDGPU.td | 4 +
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 8 +
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 12 +-
lib/Target/AMDGPU/CMakeLists.txt | 1 +
lib/Target/AMDGPU/GCNDPPCombine.cpp | 446 ++++++++++++++++++++++++
lib/Target/AMDGPU/SIInstrInfo.cpp | 81 +++++
lib/Target/AMDGPU/SIInstrInfo.h | 32 +-
lib/Target/AMDGPU/SIInstrInfo.td | 28 +-
lib/Target/AMDGPU/VOP1Instructions.td | 30 +-
lib/Target/AMDGPU/VOP2Instructions.td | 69 ++--
lib/Target/AMDGPU/VOPInstructions.td | 46 ++-
test/CodeGen/AMDGPU/dpp_combine.ll | 185 ++++++++++
test/CodeGen/AMDGPU/dpp_combine_subregs.mir | 143 ++++++++
test/MC/AMDGPU/vop_dpp.s | 1 -
15 files changed, 1039 insertions(+), 51 deletions(-)
create mode 100644 lib/Target/AMDGPU/GCNDPPCombine.cpp
create mode 100644 test/CodeGen/AMDGPU/dpp_combine.ll
create mode 100644 test/CodeGen/AMDGPU/dpp_combine_subregs.mir
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from 5b0ffb89bd6 Fix parenthesis warning in IVDescriptors
new 993bc9badc3 [RISCV] Add additional CSR instruction aliases (imm. operands)
new 98272e49b80 TableGen/ISel: Allow PatFrag predicate code to access captu [...]
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Summary of changes:
include/llvm/CodeGen/SelectionDAGISel.h | 12 ++++
include/llvm/Target/TargetSelectionDAG.td | 9 +++
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 12 ++++
lib/Target/RISCV/RISCVInstrInfo.td | 10 +++
test/MC/RISCV/rvi-aliases-valid.s | 20 ++++++
utils/TableGen/CodeGenDAGPatterns.cpp | 74 ++++++++++++++++------
utils/TableGen/CodeGenDAGPatterns.h | 89 ++++++++++++++++++++++----
utils/TableGen/DAGISelMatcher.cpp | 14 ++++-
utils/TableGen/DAGISelMatcher.h | 6 +-
utils/TableGen/DAGISelMatcherEmitter.cpp | 90 +++++++++++++++++++--------
utils/TableGen/DAGISelMatcherGen.cpp | 74 ++++++++++++++++------
utils/TableGen/FastISelEmitter.cpp | 12 ++--
utils/TableGen/GlobalISelEmitter.cpp | 13 ++--
13 files changed, 344 insertions(+), 91 deletions(-)
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