Tcwg-commits November 2018

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9752 discussions

[toolchain/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allmodconfig updated (d60f17f9dbd -> a8dfe19f3b0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allmodconfig in repository toolchain/gcc. from d60f17f9dbd Daily bump. adds a8dfe19f3b0 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig updated (13d737c2f9 -> 1eef9d87da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig in repository toolchain/binutils-gdb. from 13d737c2f9 Automatic date update in version.in adds 1eef9d87da Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig updated (38139a9681 -> 79a9468c70)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-defconfig in repository toolchain/binutils-gdb. from 38139a9681 valops.c: Overload resolution code: Rename parameters/locals adds b5ffee3181 gdb/riscv: Add target description support adds ca94519e70 Fix linking MSP430 files created by gcc's LTO optimizer. adds 1c97054b87 Make command-repeat work after gdb.execute adds 51534d7ab8 S12Z: Add alias instructions BHS and BLO. adds 27f42a4ddb S12Z opcodes: Fix bug disassembling certain shift instructions. adds 79a9468c70 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 + bfd/elf32-msp430.c | 6 + bfd/version.h | 2 +- gas/ChangeLog | 11 + gas/config/tc-s12z.c | 2 + gas/testsuite/gas/s12z/bra.d | 6 +- gas/testsuite/gas/s12z/bra.s | 2 + gas/testsuite/gas/s12z/shift.d | 4 +- gas/testsuite/gas/s12z/shift.s | 2 + gdb/ChangeLog | 72 +++ gdb/Makefile.in | 2 + gdb/NEWS | 2 + gdb/arch/riscv.c | 69 +++ gdb/arch/riscv.h | 64 +++ gdb/configure.tgt | 9 +- gdb/doc/ChangeLog | 5 + gdb/doc/gdb.texinfo | 36 ++ gdb/features/Makefile | 11 + gdb/features/riscv/32bit-cpu.c | 46 ++ gdb/features/riscv/32bit-cpu.xml | 43 ++ gdb/features/riscv/32bit-csr.c | 253 ++++++++++ gdb/features/riscv/32bit-csr.xml | 250 ++++++++++ gdb/features/riscv/32bit-fpu.c | 48 ++ gdb/features/riscv/32bit-fpu.xml | 46 ++ gdb/features/riscv/64bit-cpu.c | 46 ++ gdb/features/riscv/64bit-cpu.xml | 43 ++ gdb/features/riscv/64bit-csr.c | 253 ++++++++++ gdb/features/riscv/64bit-csr.xml | 250 ++++++++++ gdb/features/riscv/64bit-fpu.c | 56 +++ gdb/features/riscv/64bit-fpu.xml | 52 ++ gdb/features/riscv/rebuild-csr-xml.sh | 29 ++ gdb/python/python.c | 3 +- gdb/riscv-tdep.c | 888 ++++++++++++++++++++-------------- gdb/riscv-tdep.h | 29 +- gdb/target-descriptions.c | 1 + gdb/testsuite/ChangeLog | 6 + gdb/testsuite/gdb.python/python.exp | 1 + opcodes/ChangeLog | 5 + opcodes/s12z-dis.c | 44 +- 39 files changed, 2302 insertions(+), 401 deletions(-) create mode 100644 gdb/arch/riscv.c create mode 100644 gdb/arch/riscv.h create mode 100644 gdb/features/riscv/32bit-cpu.c create mode 100644 gdb/features/riscv/32bit-cpu.xml create mode 100644 gdb/features/riscv/32bit-csr.c create mode 100644 gdb/features/riscv/32bit-csr.xml create mode 100644 gdb/features/riscv/32bit-fpu.c create mode 100644 gdb/features/riscv/32bit-fpu.xml create mode 100644 gdb/features/riscv/64bit-cpu.c create mode 100644 gdb/features/riscv/64bit-cpu.xml create mode 100644 gdb/features/riscv/64bit-csr.c create mode 100644 gdb/features/riscv/64bit-csr.xml create mode 100644 gdb/features/riscv/64bit-fpu.c create mode 100644 gdb/features/riscv/64bit-fpu.xml create mode 100755 gdb/features/riscv/rebuild-csr-xml.sh -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

[toolchain/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig updated (d60f17f9dbd -> a8dfe19f3b0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig in repository toolchain/gcc. from d60f17f9dbd Daily bump. adds a8dfe19f3b0 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

[clang] branch master updated (ea98fe0936 -> 0718def197)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from ea98fe0936 [ASTMatchers] Add hasSideEffect() matcher. new 0718def197 Revert rL347462 "[ASTMatchers] Add hasSideEffect() matcher." The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: docs/LibASTMatchersReference.html | 18 ------------------ include/clang/ASTMatchers/ASTMatchers.h | 20 -------------------- lib/ASTMatchers/Dynamic/Registry.cpp | 1 - unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp | 16 ---------------- 4 files changed, 55 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig updated (1b288e9bbf -> 79a9468c70)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig in repository toolchain/binutils-gdb. from 1b288e9bbf Automatic date update in version.in adds e71585ffe2 Use gdb:array_view in call_function_by_hand & friends adds 6b1747cd13 invoke_xmethod & array_view adds 0891c3cc13 Eliminate make_symbol_overload_list-related globals & cleanup adds 82ceee5014 C++ify badness_vector, fix leaks adds 85cca2bcbc valops.c: Some more gdb::array_view adds 38139a9681 valops.c: Overload resolution code: Rename parameters/locals adds b5ffee3181 gdb/riscv: Add target description support adds ca94519e70 Fix linking MSP430 files created by gcc's LTO optimizer. adds 1c97054b87 Make command-repeat work after gdb.execute adds 51534d7ab8 S12Z: Add alias instructions BHS and BLO. adds 27f42a4ddb S12Z opcodes: Fix bug disassembling certain shift instructions. adds 79a9468c70 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 + bfd/elf32-msp430.c | 6 + bfd/version.h | 2 +- gas/ChangeLog | 11 + gas/config/tc-s12z.c | 2 + gas/testsuite/gas/s12z/bra.d | 6 +- gas/testsuite/gas/s12z/bra.s | 2 + gas/testsuite/gas/s12z/shift.d | 4 +- gas/testsuite/gas/s12z/shift.s | 2 + gdb/ChangeLog | 209 ++++++++ gdb/Makefile.in | 2 + gdb/NEWS | 2 + gdb/ada-lang.c | 4 +- gdb/arch/riscv.c | 69 +++ gdb/arch/riscv.h | 64 +++ gdb/common/array-view.h | 53 ++ gdb/compile/compile-object-run.c | 4 +- gdb/configure.tgt | 9 +- gdb/cp-support.c | 142 +++--- gdb/cp-support.h | 13 +- gdb/doc/ChangeLog | 5 + gdb/doc/gdb.texinfo | 36 ++ gdb/elfread.c | 2 +- gdb/eval.c | 32 +- gdb/extension.c | 12 +- gdb/extension.h | 32 +- gdb/features/Makefile | 11 + gdb/features/riscv/32bit-cpu.c | 46 ++ gdb/features/riscv/32bit-cpu.xml | 43 ++ gdb/features/riscv/32bit-csr.c | 253 ++++++++++ gdb/features/riscv/32bit-csr.xml | 250 ++++++++++ gdb/features/riscv/32bit-fpu.c | 48 ++ gdb/features/riscv/32bit-fpu.xml | 46 ++ gdb/features/riscv/64bit-cpu.c | 46 ++ gdb/features/riscv/64bit-cpu.xml | 43 ++ gdb/features/riscv/64bit-csr.c | 253 ++++++++++ gdb/features/riscv/64bit-csr.xml | 250 ++++++++++ gdb/features/riscv/64bit-fpu.c | 56 +++ gdb/features/riscv/64bit-fpu.xml | 52 ++ gdb/features/riscv/rebuild-csr-xml.sh | 29 ++ gdb/gcore.c | 2 +- gdb/gdbtypes.c | 50 +- gdb/gdbtypes.h | 18 +- gdb/guile/scm-value.c | 4 +- gdb/infcall.c | 29 +- gdb/infcall.h | 15 +- gdb/linux-fork.c | 7 +- gdb/linux-tdep.c | 4 +- gdb/objc-lang.c | 13 +- gdb/python/py-value.c | 6 +- gdb/python/py-xmethods.c | 40 +- gdb/python/python.c | 3 +- gdb/riscv-tdep.c | 888 ++++++++++++++++++++-------------- gdb/riscv-tdep.h | 29 +- gdb/rust-lang.c | 2 +- gdb/spu-tdep.c | 2 +- gdb/target-descriptions.c | 1 + gdb/testsuite/ChangeLog | 6 + gdb/testsuite/gdb.python/python.exp | 1 + gdb/unittests/array-view-selftests.c | 35 ++ gdb/valarith.c | 53 +- gdb/valops.c | 362 +++++++------- gdb/value.c | 13 +- gdb/value.h | 6 +- opcodes/ChangeLog | 5 + opcodes/s12z-dis.c | 44 +- 66 files changed, 2930 insertions(+), 865 deletions(-) create mode 100644 gdb/arch/riscv.c create mode 100644 gdb/arch/riscv.h create mode 100644 gdb/features/riscv/32bit-cpu.c create mode 100644 gdb/features/riscv/32bit-cpu.xml create mode 100644 gdb/features/riscv/32bit-csr.c create mode 100644 gdb/features/riscv/32bit-csr.xml create mode 100644 gdb/features/riscv/32bit-fpu.c create mode 100644 gdb/features/riscv/32bit-fpu.xml create mode 100644 gdb/features/riscv/64bit-cpu.c create mode 100644 gdb/features/riscv/64bit-cpu.xml create mode 100644 gdb/features/riscv/64bit-csr.c create mode 100644 gdb/features/riscv/64bit-csr.xml create mode 100644 gdb/features/riscv/64bit-fpu.c create mode 100644 gdb/features/riscv/64bit-fpu.xml create mode 100755 gdb/features/riscv/rebuild-csr-xml.sh -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

[toolchain/linux-next] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig updated (c8ce94b8fe53 -> 92b419289cee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-defconfig in repository toolchain/linux-next. from c8ce94b8fe53 Merge tag 'mips_fixes_4.20_3' of git://git.kernel.org/pub/ [...] adds 21f70d4abf9e RISC-V: Fix raw_copy_{to,from}_user() adds c0fbcd991860 RISC-V: Build flat and compressed kernel images adds 0138ebb90c63 riscv: fix warning in arch/riscv/include/asm/module.h adds 27f8899d6002 riscv: add asm/unistd.h UAPI header adds 5d8f81ba1da5 RISC-V: recognize S/U mode bits in print_isa adds 92b419289cee Merge tag 'riscv-for-linus-4.20-rc4' of git://git.kernel.o [...] No new revisions were added by this update. Summary of changes: arch/riscv/Makefile | 15 +++++- arch/{arm64 => riscv}/boot/.gitignore | 0 arch/riscv/boot/Makefile | 33 ++++++++++++ arch/riscv/boot/install.sh | 60 ++++++++++++++++++++++ arch/riscv/include/asm/module.h | 1 + arch/riscv/include/asm/uaccess.h | 4 +- arch/riscv/include/asm/unistd.h | 5 +- .../include/uapi/asm/{syscalls.h => unistd.h} | 26 +++++++--- arch/riscv/kernel/cpu.c | 9 ++-- arch/riscv/kernel/head.S | 10 ++++ arch/riscv/kernel/vmlinux.lds.S | 2 +- 11 files changed, 148 insertions(+), 17 deletions(-) copy arch/{arm64 => riscv}/boot/.gitignore (100%) create mode 100644 arch/riscv/boot/Makefile create mode 100644 arch/riscv/boot/install.sh rename arch/riscv/include/uapi/asm/{syscalls.h => unistd.h} (53%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig updated (1b288e9bbf -> 79a9468c70)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-defconfig in repository toolchain/binutils-gdb. from 1b288e9bbf Automatic date update in version.in adds e71585ffe2 Use gdb:array_view in call_function_by_hand & friends adds 6b1747cd13 invoke_xmethod & array_view adds 0891c3cc13 Eliminate make_symbol_overload_list-related globals & cleanup adds 82ceee5014 C++ify badness_vector, fix leaks adds 85cca2bcbc valops.c: Some more gdb::array_view adds 38139a9681 valops.c: Overload resolution code: Rename parameters/locals adds b5ffee3181 gdb/riscv: Add target description support adds ca94519e70 Fix linking MSP430 files created by gcc's LTO optimizer. adds 1c97054b87 Make command-repeat work after gdb.execute adds 51534d7ab8 S12Z: Add alias instructions BHS and BLO. adds 27f42a4ddb S12Z opcodes: Fix bug disassembling certain shift instructions. adds 79a9468c70 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 + bfd/elf32-msp430.c | 6 + bfd/version.h | 2 +- gas/ChangeLog | 11 + gas/config/tc-s12z.c | 2 + gas/testsuite/gas/s12z/bra.d | 6 +- gas/testsuite/gas/s12z/bra.s | 2 + gas/testsuite/gas/s12z/shift.d | 4 +- gas/testsuite/gas/s12z/shift.s | 2 + gdb/ChangeLog | 209 ++++++++ gdb/Makefile.in | 2 + gdb/NEWS | 2 + gdb/ada-lang.c | 4 +- gdb/arch/riscv.c | 69 +++ gdb/arch/riscv.h | 64 +++ gdb/common/array-view.h | 53 ++ gdb/compile/compile-object-run.c | 4 +- gdb/configure.tgt | 9 +- gdb/cp-support.c | 142 +++--- gdb/cp-support.h | 13 +- gdb/doc/ChangeLog | 5 + gdb/doc/gdb.texinfo | 36 ++ gdb/elfread.c | 2 +- gdb/eval.c | 32 +- gdb/extension.c | 12 +- gdb/extension.h | 32 +- gdb/features/Makefile | 11 + gdb/features/riscv/32bit-cpu.c | 46 ++ gdb/features/riscv/32bit-cpu.xml | 43 ++ gdb/features/riscv/32bit-csr.c | 253 ++++++++++ gdb/features/riscv/32bit-csr.xml | 250 ++++++++++ gdb/features/riscv/32bit-fpu.c | 48 ++ gdb/features/riscv/32bit-fpu.xml | 46 ++ gdb/features/riscv/64bit-cpu.c | 46 ++ gdb/features/riscv/64bit-cpu.xml | 43 ++ gdb/features/riscv/64bit-csr.c | 253 ++++++++++ gdb/features/riscv/64bit-csr.xml | 250 ++++++++++ gdb/features/riscv/64bit-fpu.c | 56 +++ gdb/features/riscv/64bit-fpu.xml | 52 ++ gdb/features/riscv/rebuild-csr-xml.sh | 29 ++ gdb/gcore.c | 2 +- gdb/gdbtypes.c | 50 +- gdb/gdbtypes.h | 18 +- gdb/guile/scm-value.c | 4 +- gdb/infcall.c | 29 +- gdb/infcall.h | 15 +- gdb/linux-fork.c | 7 +- gdb/linux-tdep.c | 4 +- gdb/objc-lang.c | 13 +- gdb/python/py-value.c | 6 +- gdb/python/py-xmethods.c | 40 +- gdb/python/python.c | 3 +- gdb/riscv-tdep.c | 888 ++++++++++++++++++++-------------- gdb/riscv-tdep.h | 29 +- gdb/rust-lang.c | 2 +- gdb/spu-tdep.c | 2 +- gdb/target-descriptions.c | 1 + gdb/testsuite/ChangeLog | 6 + gdb/testsuite/gdb.python/python.exp | 1 + gdb/unittests/array-view-selftests.c | 35 ++ gdb/valarith.c | 53 +- gdb/valops.c | 362 +++++++------- gdb/value.c | 13 +- gdb/value.h | 6 +- opcodes/ChangeLog | 5 + opcodes/s12z-dis.c | 44 +- 66 files changed, 2930 insertions(+), 865 deletions(-) create mode 100644 gdb/arch/riscv.c create mode 100644 gdb/arch/riscv.h create mode 100644 gdb/features/riscv/32bit-cpu.c create mode 100644 gdb/features/riscv/32bit-cpu.xml create mode 100644 gdb/features/riscv/32bit-csr.c create mode 100644 gdb/features/riscv/32bit-csr.xml create mode 100644 gdb/features/riscv/32bit-fpu.c create mode 100644 gdb/features/riscv/32bit-fpu.xml create mode 100644 gdb/features/riscv/64bit-cpu.c create mode 100644 gdb/features/riscv/64bit-cpu.xml create mode 100644 gdb/features/riscv/64bit-csr.c create mode 100644 gdb/features/riscv/64bit-csr.xml create mode 100644 gdb/features/riscv/64bit-fpu.c create mode 100644 gdb/features/riscv/64bit-fpu.xml create mode 100755 gdb/features/riscv/rebuild-csr-xml.sh -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (1b288e9bbf -> 79a9468c70)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/binutils-gdb. from 1b288e9bbf Automatic date update in version.in adds e71585ffe2 Use gdb:array_view in call_function_by_hand & friends adds 6b1747cd13 invoke_xmethod & array_view adds 0891c3cc13 Eliminate make_symbol_overload_list-related globals & cleanup adds 82ceee5014 C++ify badness_vector, fix leaks adds 85cca2bcbc valops.c: Some more gdb::array_view adds 38139a9681 valops.c: Overload resolution code: Rename parameters/locals adds b5ffee3181 gdb/riscv: Add target description support adds ca94519e70 Fix linking MSP430 files created by gcc's LTO optimizer. adds 1c97054b87 Make command-repeat work after gdb.execute adds 51534d7ab8 S12Z: Add alias instructions BHS and BLO. adds 27f42a4ddb S12Z opcodes: Fix bug disassembling certain shift instructions. adds 79a9468c70 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 + bfd/elf32-msp430.c | 6 + bfd/version.h | 2 +- gas/ChangeLog | 11 + gas/config/tc-s12z.c | 2 + gas/testsuite/gas/s12z/bra.d | 6 +- gas/testsuite/gas/s12z/bra.s | 2 + gas/testsuite/gas/s12z/shift.d | 4 +- gas/testsuite/gas/s12z/shift.s | 2 + gdb/ChangeLog | 209 ++++++++ gdb/Makefile.in | 2 + gdb/NEWS | 2 + gdb/ada-lang.c | 4 +- gdb/arch/riscv.c | 69 +++ gdb/arch/riscv.h | 64 +++ gdb/common/array-view.h | 53 ++ gdb/compile/compile-object-run.c | 4 +- gdb/configure.tgt | 9 +- gdb/cp-support.c | 142 +++--- gdb/cp-support.h | 13 +- gdb/doc/ChangeLog | 5 + gdb/doc/gdb.texinfo | 36 ++ gdb/elfread.c | 2 +- gdb/eval.c | 32 +- gdb/extension.c | 12 +- gdb/extension.h | 32 +- gdb/features/Makefile | 11 + gdb/features/riscv/32bit-cpu.c | 46 ++ gdb/features/riscv/32bit-cpu.xml | 43 ++ gdb/features/riscv/32bit-csr.c | 253 ++++++++++ gdb/features/riscv/32bit-csr.xml | 250 ++++++++++ gdb/features/riscv/32bit-fpu.c | 48 ++ gdb/features/riscv/32bit-fpu.xml | 46 ++ gdb/features/riscv/64bit-cpu.c | 46 ++ gdb/features/riscv/64bit-cpu.xml | 43 ++ gdb/features/riscv/64bit-csr.c | 253 ++++++++++ gdb/features/riscv/64bit-csr.xml | 250 ++++++++++ gdb/features/riscv/64bit-fpu.c | 56 +++ gdb/features/riscv/64bit-fpu.xml | 52 ++ gdb/features/riscv/rebuild-csr-xml.sh | 29 ++ gdb/gcore.c | 2 +- gdb/gdbtypes.c | 50 +- gdb/gdbtypes.h | 18 +- gdb/guile/scm-value.c | 4 +- gdb/infcall.c | 29 +- gdb/infcall.h | 15 +- gdb/linux-fork.c | 7 +- gdb/linux-tdep.c | 4 +- gdb/objc-lang.c | 13 +- gdb/python/py-value.c | 6 +- gdb/python/py-xmethods.c | 40 +- gdb/python/python.c | 3 +- gdb/riscv-tdep.c | 888 ++++++++++++++++++++-------------- gdb/riscv-tdep.h | 29 +- gdb/rust-lang.c | 2 +- gdb/spu-tdep.c | 2 +- gdb/target-descriptions.c | 1 + gdb/testsuite/ChangeLog | 6 + gdb/testsuite/gdb.python/python.exp | 1 + gdb/unittests/array-view-selftests.c | 35 ++ gdb/valarith.c | 53 +- gdb/valops.c | 362 +++++++------- gdb/value.c | 13 +- gdb/value.h | 6 +- opcodes/ChangeLog | 5 + opcodes/s12z-dis.c | 44 +- 66 files changed, 2930 insertions(+), 865 deletions(-) create mode 100644 gdb/arch/riscv.c create mode 100644 gdb/arch/riscv.h create mode 100644 gdb/features/riscv/32bit-cpu.c create mode 100644 gdb/features/riscv/32bit-cpu.xml create mode 100644 gdb/features/riscv/32bit-csr.c create mode 100644 gdb/features/riscv/32bit-csr.xml create mode 100644 gdb/features/riscv/32bit-fpu.c create mode 100644 gdb/features/riscv/32bit-fpu.xml create mode 100644 gdb/features/riscv/64bit-cpu.c create mode 100644 gdb/features/riscv/64bit-cpu.xml create mode 100644 gdb/features/riscv/64bit-csr.c create mode 100644 gdb/features/riscv/64bit-csr.xml create mode 100644 gdb/features/riscv/64bit-fpu.c create mode 100644 gdb/features/riscv/64bit-fpu.xml create mode 100755 gdb/features/riscv/rebuild-csr-xml.sh -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

[gcc] branch master updated (d58f58b02d4 -> b51523c4af8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from d58f58b02d4 PR libstdc++/87520 Always pass type-punned type_info reference new 545031a3bc6 Add new maintainer script for PRs that can be closed. new b51523c4af8 2018-11-22 Richard Biener <rguenther(a)suse.de> The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 8 ++ gcc/testsuite/ChangeLog | 5 ++ .../gfortran.dg/{vect/vect-8.f90 => pr88148.f90} | 7 +- gcc/tree-ssa-loop-niter.c | 27 ++++-- gcc/tree-ssa-loop-niter.h | 1 + gcc/tree-ssa-sccvn.c | 11 +++ maintainer-scripts/ChangeLog | 4 + maintainer-scripts/bugzilla-close-candidate.py | 96 ++++++++++++++++++++++ 8 files changed, 147 insertions(+), 12 deletions(-) copy gcc/testsuite/gfortran.dg/{vect/vect-8.f90 => pr88148.f90} (98%) create mode 100755 maintainer-scripts/bugzilla-close-candidate.py -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 7 months

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Tcwg-commits November 2018