Tcwg-commits November 2018

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[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (099dd9ccb2d -> e46db320659)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/llvm-monorepo. from 099dd9ccb2d Added missing whitespace in the link. adds 24287ec17c5 [X86] Add some test cases for vector multiplies on vectors [...] adds 9c0131580e0 Revert r347014 "[X86] Add some test cases for vector multip [...] adds 829fbcc3c28 [VFS] Update unittest to fix Windows buildbot. adds 79145fed181 [NativePDB] Rewrite the PdbSymUid to use our own custom nam [...] adds c2bb1ca23a4 [Clang][Sema]Choose a better candidate in overload function [...] adds 5b80c33d001 Don't use uniform initialization syntax. adds c8ad20bbada [CMake] Use the correct spelling for armv7 in Fuchsia's toolchain adds dae709b025e [compiler-rt] Use exact spelling when building for default target adds 138eb6e77f1 [CMake] Support cross-compiling with multi-stage builds adds 53ddacef944 [CMake] Support cross-compiling with Fuchsia toolchain build adds 76e69eda418 AMDGPU: Fix analyzeBranch failing with pseudoterminators adds a3b76406f07 [ELF][MIPS] Use MIPS R6 `sigrie` as a trap instruction adds bcd8bc37e70 [X86] Add some test cases for vector multiplies on vectors [...] adds d139d805b75 [X86] Add custom type legalization for v2i8/v4i8/v8i8 mul u [...] adds e579f25e26f [ThinLTO] Internalize readonly globals adds 2583bfd4ffd [LegalizeVectorTypes] Teach WidenVecRes_Convert to turn ANY [...] adds 59aa1cb4aea [clang] - Simplify tools::SplitDebugName. adds 0d9a93115a6 [clangd] Initial clang-tidy diagnostics support. adds d5357cd9c15 [DAGCombine] Fix non-deterministic debug output adds 0bd2dae7adc Introduce shard storage to auto-index. adds 5a6696d0076 [clangd] Fix a compiler warning and test crashes caused in [...] adds c9b761e109c [MSP430] Add more tests for ABI and calling convention adds f1d9df9d035 [MSP430] Add support for .refsym directive adds 08b9196394c [RISCV] Constant materialisation for RV64I adds 3bdb53bfdbf [RISCV][NFC] Define and use the new CA instruction format adds e70e5536a1c [clangd] Truncate SymbolID to 8 bytes. adds ec27209c7cd [TargetLowering] Cleanup more of the EXTEND demanded bits c [...] adds 3064202eefa Remove BUILD file from google-benchmark adds 094af196271 [lldb] NFC: Remove the extra ';' adds e2070ba3d8c [X86] X86DAGToDAGISel::matchBitExtract(): extract 'lshr' from `X` adds da3e6308e8f [DWARF] Use PRIx64 instead of 'x' to format 64-bit values adds 02bbc4956c9 [IRVerifier] Allow StructRet in statepoint adds b28c609e9e6 [x86] regenerate complete checks for test; NFC adds 6881f9126fc [libcxx] Mention restriction on inline namespaces in LIBCXX [...] adds 5976f9e685f [clang-tidy] Expanded a test NFC adds 4089049fc16 [X86][SSE] Move number of input limit out of resolveTargetS [...] adds 02d00b9a1f2 [InstSimplify] add test to demonstrate undef matching diffe [...] adds f356005646c Makefile.rules: Use a shared clang module cache directory. adds 0995bfe8bcf Use a shared module cache directory for LLDB. adds 7d713d5f2af Typo adds 25372e02294 [OpenCL] Enable address spaces for references in C++ adds 6a2e1d88f6e [InstSimplify] add tests for saturating add/sub; NFC adds 59469e38ca8 [CodeGen] Expose some data types and accessors from StackMaps adds 793854cedb5 [AST][NFC] Pack CXXBoolLiteralExpr adds 27a906a761f [AST][NFC] Pack CXXNullPtrLiteralExpr adds 3ed5220fe21 [AST][NFC] Pack CXXThisExpr adds 7e1c886d1f6 GlobalDCE: Teach isEmptyFunction() to ignore debug intrinsics. adds a6119380571 [X86] Add codegen tests for scalar funnel shifts adds cf919fed010 [SelectionDAG] Move (repeated) SDTIntShiftDOp double shift [...] adds ef5d7630a18 [CMake] Accept ENTITLEMENTS in add_llvm_executable and llvm [...] adds f7e6c6d84ab [PowerPC] Make no-PIC default to match GCC - LLVM adds becbcdba25a [PowerPC] Make no-PIC default to match GCC - CLANG adds 7927aa1288d Make path more robust so it also works with out-of-tree builds. adds aef089897f8 [codeview] Expose -gcodeview-ghash for global type hashing adds 8efa3877a1b [WebAssembly] Default to static reloc model adds 6421f0dc8eb [MSP430] Use R_MSP430_16_BYTE type for FK_Data_2 fixup adds b44e1b3ca2c Revert "[PowerPC] Make no-PIC default to match GCC - CLANG" adds 5aec7fd8f08 Revert "[PowerPC] Make no-PIC default to match GCC - LLVM" adds f01b004d880 Support ARM_V4BX relocation adds 4118662c386 [X86] Disable Condbr_merge pass adds 18b788bc752 [MSP430] Add RTLIB::[SRL/SRA/SHL]_I32 lowering to EABI lib calls adds b2a2911c099 [OPENMP][NVPTX]Emit correct reduction code for teams/parall [...] adds b23282b0dd1 [hwasan] optionally right-align heap allocations adds 546af08d1a9 Add new interceptor for getmntinfo(3) from NetBSD adds a2182d17b30 [SymbolFile] Remove unused function. NFCI. adds c8ab49aefe4 [libcxx] Add missing includes in tests adds 8acb54df2b8 [FNeg] Add FNeg Instruction to LangRef document adds 037a850ff03 [Cocoa] Prefer llvm::SignExtend64. Pointed out by zturner. adds 04ccf2af96e Add new interceptor for mi_vector_hash(3) adds 73ce343f2bd AArch64: Emit a call frame instruction for the shadow call [...] adds c5a13810aa9 [PowerPC][NFC] Add tests for vector fp <-> int conversions adds f5818452afc [hwasan] disable one test line while investigating a bot failure adds b9d8c46d56e Preprocessing support in tablegen. adds 10511eb50d6 [X86] In LowerLoad, fix assert messages and rename a variab [...] adds 3d2513e5540 [LegalizeVectorOps] After custom legalizing an extending lo [...] adds 88787838f9c [X86] Remove a branch on SSE4.1 from LowerLoad adds d556f50b20a [OPENMP]Fix PR39694: do not capture `this` in non-`this` region. adds 94709f33dec [SimpleLoopUnswitch] adding cost multiplier to cap exponent [...] adds 1f3d9b6b65f [WebAssembly] Cleanup unused declares in test code. NFC. adds 4693c9f5c3e [sanitizer] Update global_symbols.txt adds 5b091ac9239 [X86] Qualify part of the masked gather handling in Replace [...] adds 85507ecdf3c Cast _Unwind_GetIP() and _Unwind_GetRegionStart() to uintptr_t adds c27a4ed1060 Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr adds 6d9e4e702b0 Speed up git-llvm script by only svn up'ing affected directories. adds d719bb36c3f Makefile.rules: Degrade gracefully on Windows machines with [...] adds 01b08e9824d [X86] Add custom promotion of narrow fp_to_uint/fp_to_sint [...] adds 1f9a518d8a1 Revert "Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr" adds ab8e7e94cb9 [hwasan] use reads instead of writes in a test adds 4e51f283ba1 [CMake] Use lld and llvm-objcopy for first stage compiler i [...] adds 616e06125ff Rewrite stop-hook tests as a couple of FileCheck tests adds 61905a5dd80 DAG combiner: fold (select, C, X, undef) -> X adds 067b8274e45 Add missing test for r347072 -gcodeview-ghash adds af3d45022de Fixed test after r347110 adds e6f9467b5bc Make git-llvm python3 compatible again. Hopefully. :) adds f833d5dce08 Add missing triple from llvm-mc command line. adds 4ad3b250174 Moved dag-combine-select-undef.ll into amdgpu. NFC. adds fb64c10b9ea [hwasan] implement free_checks_tail_magic=1 adds 22edaf70bf7 Make TestAppleSimulatorOSType.py more flexible adds 9f3f19ff602 [hwasan] make the heap-buffer-overflow.c test more robust a [...] adds 0c17bca2668 [clangd] Fix crash hovering on non-decltype trailing return adds 354f7176a9c Makefile.rules: Fix the windows-sed-quoting issue harder. adds f6271c455af [hwasan] don't check tail magic when in right_align mode (s [...] adds 378cd0dec63 add PdbSymUid.cpp adds cabf5f65a46 [llvm-objcopy] Use llvm::all_of and rename the variables "S [...] adds aecfd5a4683 Revert "Makefile.rules: Fix the windows-sed-quoting issue harder." adds e46db320659 Just don't even attempt to invoke sed on Windows. No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/CMakeLists.txt | 19 + clang-tools-extra/clangd/ClangdUnit.cpp | 83 +- clang-tools-extra/clangd/XRefs.cpp | 9 +- clang-tools-extra/clangd/index/Background.cpp | 65 +- clang-tools-extra/clangd/index/Background.h | 42 +- .../clangd/index/BackgroundIndexStorage.cpp | 112 ++ clang-tools-extra/clangd/index/Index.h | 3 +- clang-tools-extra/clangd/index/Serialization.cpp | 4 +- ...onsistent-declaration-parameter-name-macros.cpp | 38 +- .../unittests/clangd/BackgroundIndexTests.cpp | 82 +- .../unittests/clangd/ClangdUnitTests.cpp | 25 + .../unittests/clangd/SerializationTests.cpp | 16 +- clang-tools-extra/unittests/clangd/XRefsTests.cpp | 8 + clang/CMakeLists.txt | 33 +- clang/cmake/caches/Fuchsia-stage2.cmake | 2 +- clang/cmake/caches/Fuchsia.cmake | 37 +- clang/include/clang/AST/ExprCXX.h | 69 +- clang/include/clang/AST/Stmt.h | 36 + clang/include/clang/Driver/Options.td | 6 + clang/include/clang/Frontend/CodeGenOptions.def | 3 + clang/include/clang/Sema/Sema.h | 4 + clang/lib/AST/Expr.cpp | 19 +- clang/lib/CodeGen/CGExpr.cpp | 9 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 407 +++--- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 4 + clang/lib/CodeGen/CodeGenModule.cpp | 3 + clang/lib/Driver/ToolChains/Clang.cpp | 13 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 19 +- clang/lib/Driver/ToolChains/CommonArgs.h | 2 +- clang/lib/Driver/ToolChains/Gnu.cpp | 2 +- clang/lib/Driver/ToolChains/MinGW.cpp | 2 +- clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Sema/DeclSpec.cpp | 6 +- clang/lib/Sema/SemaDecl.cpp | 12 +- clang/lib/Sema/SemaExprCXX.cpp | 22 +- clang/lib/Sema/SemaInit.cpp | 31 +- clang/lib/Sema/SemaOpenMP.cpp | 11 +- clang/lib/Sema/SemaOverload.cpp | 25 + clang/lib/Sema/SemaType.cpp | 3 +- clang/test/CodeGenCXX/debug-info-ms-abi.cpp | 4 + .../CodeGenOpenCLCXX/address-space-deduction.cl | 46 + clang/test/Driver/gcodeview-ghash.c | 19 + clang/test/OpenMP/nvptx_data_sharing.cpp | 2 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 27 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 2 +- .../nvptx_target_parallel_reduction_codegen.cpp | 107 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 2 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 4 +- .../test/OpenMP/nvptx_teams_reduction_codegen.cpp | 410 +++++- clang/test/Sema/altivec-generic-overload.c | 100 ++ clang/test/SemaCXX/vector.cpp | 8 +- compiler-rt/cmake/Modules/CompilerRTUtils.cmake | 5 +- compiler-rt/lib/builtins/gcc_personality_v0.c | 5 +- compiler-rt/lib/hwasan/hwasan_allocator.cc | 100 +- compiler-rt/lib/hwasan/hwasan_allocator.h | 3 +- compiler-rt/lib/hwasan/hwasan_flags.inc | 31 + compiler-rt/lib/hwasan/hwasan_report.cc | 60 + compiler-rt/lib/hwasan/hwasan_report.h | 2 + .../sanitizer_common_interceptors.inc | 36 + .../sanitizer_platform_interceptors.h | 2 + .../symbolizer/scripts/global_symbols.txt | 3 + .../test/hwasan/TestCases/heap-buffer-overflow.c | 40 +- .../test/hwasan/TestCases/random-align-right.c | 35 + compiler-rt/test/hwasan/TestCases/tail-magic.c | 28 + compiler-rt/test/hwasan/TestCases/use-after-free.c | 4 +- .../TestCases/NetBSD/getmntinfo.cc | 25 + .../TestCases/NetBSD/mi_vector_hash.cc | 19 + libcxx/docs/BuildingLibcxx.rst | 4 +- .../unord.map/unord.map.cnstr/assign_init.pass.cpp | 1 + .../unord.map/unord.map.cnstr/assign_move.pass.cpp | 1 + .../unord/unord.map/unord.map.cnstr/init.pass.cpp | 1 + .../unord/unord.map/unord.map.cnstr/range.pass.cpp | 1 + .../unord.multimap.cnstr/assign_copy.pass.cpp | 2 + .../unord.multimap.cnstr/assign_init.pass.cpp | 1 + .../unord.multimap.cnstr/assign_move.pass.cpp | 1 + .../unord.multimap.cnstr/init.pass.cpp | 1 + .../unord.multimap.cnstr/range.pass.cpp | 1 + .../unord/unord.multiset/erase_range.pass.cpp | 1 + .../unord.multiset.cnstr/assign_copy.pass.cpp | 2 + .../unord.multiset.cnstr/assign_init.pass.cpp | 1 + .../unord.multiset.cnstr/assign_move.pass.cpp | 1 + .../unord.multiset.cnstr/init.pass.cpp | 1 + .../unord.multiset.cnstr/range.pass.cpp | 1 + .../unord/unord.set/erase_range.pass.cpp | 1 + .../unord.set/unord.set.cnstr/assign_copy.pass.cpp | 2 + .../unord.set/unord.set.cnstr/assign_init.pass.cpp | 1 + .../unord.set/unord.set.cnstr/assign_move.pass.cpp | 1 + .../unord/unord.set/unord.set.cnstr/init.pass.cpp | 1 + .../unord/unord.set/unord.set.cnstr/range.pass.cpp | 1 + libcxx/utils/google-benchmark/test/BUILD | 65 - lld/ELF/Arch/ARM.cpp | 6 + lld/ELF/Arch/Mips.cpp | 4 +- lld/test/ELF/mips-got16-relocatable.s | 8 +- lld/test/ELF/mips-npic-call-pic-os.s | 35 +- lld/test/ELF/mips-npic-call-pic-script.s | 114 +- lld/test/ELF/mips-npic-call-pic.s | 25 +- lld/test/ELF/mips-traps.s | 22 + lld/test/ELF/v4bx.yaml | 38 + .../StopHook/Inputs/stop-hook-threads.cpp} | 11 +- .../ExecControl/StopHook/Inputs/stop-hook.c} | 0 .../ExecControl/StopHook/stop-hook-threads.test | 44 + lldb/lit/ExecControl/StopHook/stop-hook.test | 71 + lldb/lit/SymbolFile/NativePDB/s_constant.cpp | 2 +- lldb/lit/lit.cfg.py | 13 +- lldb/lldb.xcodeproj/project.pbxproj | 4 + .../test/functionalities/stop-hook/Makefile | 5 - .../functionalities/stop-hook/TestStopHookCmd.py | 77 - .../stop-hook/TestStopHookMechanism.py | 128 -- .../stop-hook/multiple_threads/Makefile | 6 - .../TestStopHookMultipleThreads.py | 100 -- lldb/packages/Python/lldbsuite/test/lldbtest.py | 5 +- .../Python/lldbsuite/test/make/Makefile.rules | 14 +- .../tools/lldb-server/TestAppleSimulatorOSType.py | 8 +- .../Plugins/Language/CPlusPlus/LibCxxVariant.cpp | 2 +- lldb/source/Plugins/Language/ObjC/Cocoa.cpp | 3 +- .../Plugins/SymbolFile/NativePDB/CMakeLists.txt | 1 + .../SymbolFile/NativePDB/CompileUnitIndex.cpp | 28 +- .../SymbolFile/NativePDB/CompileUnitIndex.h | 12 +- .../Plugins/SymbolFile/NativePDB/PdbIndex.cpp | 14 +- .../source/Plugins/SymbolFile/NativePDB/PdbIndex.h | 2 +- .../Plugins/SymbolFile/NativePDB/PdbSymUid.cpp | 161 +++ .../Plugins/SymbolFile/NativePDB/PdbSymUid.h | 244 +--- .../Plugins/SymbolFile/NativePDB/PdbUtil.cpp | 15 + lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.h | 11 + .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 333 ++--- .../SymbolFile/NativePDB/SymbolFileNativePDB.h | 39 +- .../SymbolFile/NativePDB/UdtRecordCompleter.cpp | 12 +- .../SymbolFile/NativePDB/UdtRecordCompleter.h | 4 +- lldb/test/CMakeLists.txt | 2 +- llvm/CMakeLists.txt | 4 +- llvm/cmake/modules/AddLLVM.cmake | 28 +- llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 29 +- llvm/docs/LangRef.rst | 52 +- llvm/docs/TableGen/LangRef.rst | 49 +- llvm/include/llvm/CodeGen/StackMaps.h | 44 +- .../include/llvm/DebugInfo/CodeView/SymbolRecord.h | 1 + llvm/include/llvm/IR/ModuleSummaryIndex.h | 50 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 3 + llvm/include/llvm/Transforms/IPO/FunctionImport.h | 8 + .../llvm/Transforms/Utils/FunctionImportUtils.h | 1 - llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 75 +- llvm/lib/AsmParser/LLParser.cpp | 3 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 51 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 22 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 8 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h | 3 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 12 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 2 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 21 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 4 +- llvm/lib/IR/ModuleSummaryIndex.cpp | 107 +- llvm/lib/IR/Verifier.cpp | 16 +- llvm/lib/LTO/LTO.cpp | 5 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 19 +- llvm/lib/Linker/IRMover.cpp | 5 - llvm/lib/TableGen/Main.cpp | 6 +- llvm/lib/TableGen/TGLexer.cpp | 557 +++++++- llvm/lib/TableGen/TGLexer.h | 243 +++- llvm/lib/TableGen/TGParser.h | 5 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 29 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 3 +- .../Target/MSP430/AsmParser/MSP430AsmParser.cpp | 13 + .../MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp | 2 +- llvm/lib/Target/MSP430/MSP430ISelLowering.cpp | 9 +- llvm/lib/Target/NVPTX/NVPTXInstrInfo.td | 3 - llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 29 +- llvm/lib/Target/RISCV/RISCVInstrFormats.td | 9 +- llvm/lib/Target/RISCV/RISCVInstrFormatsC.td | 13 + llvm/lib/Target/RISCV/RISCVInstrInfoC.td | 21 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 7 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 8 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 20 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 157 ++- llvm/lib/Target/X86/X86InstrInfo.td | 4 - llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- llvm/lib/Transforms/IPO/FunctionImport.cpp | 39 +- llvm/lib/Transforms/IPO/GlobalDCE.cpp | 15 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 118 +- llvm/lib/Transforms/Utils/FunctionImportUtils.cpp | 21 +- llvm/test/Bitcode/summary_version.ll | 2 +- llvm/test/Bitcode/thinlto-alias.ll | 4 +- llvm/test/Bitcode/thinlto-alias2.ll | 2 +- .../thinlto-function-summary-callgraph-cast.ll | 4 +- .../thinlto-function-summary-callgraph-pgo.ll | 4 +- ...o-function-summary-callgraph-profile-summary.ll | 4 +- .../thinlto-function-summary-callgraph-relbf.ll | 2 +- ...ion-summary-callgraph-sample-profile-summary.ll | 4 +- .../Bitcode/thinlto-function-summary-callgraph.ll | 4 +- .../Bitcode/thinlto-function-summary-refgraph.ll | 12 +- llvm/test/CodeGen/AArch64/half.ll | 4 +- llvm/test/CodeGen/AArch64/shadow-call-stack.ll | 1 + llvm/test/CodeGen/AMDGPU/select-undef.ll | 45 + .../CodeGen/AMDGPU/verifier-pseudo-terminators.mir | 23 + llvm/test/CodeGen/ARM/sub-cmp-peephole.ll | 2 +- .../autohvx/isel-extractelt-illegal-type.ll | 2 +- llvm/test/CodeGen/Hexagon/swp-const-tc1.ll | 2 +- llvm/test/CodeGen/MSP430/callee-saved.ll | 38 + llvm/test/CodeGen/MSP430/calls.ll | 22 + llvm/test/CodeGen/MSP430/cc_args.ll | 79 ++ llvm/test/CodeGen/MSP430/interrupt.ll | 49 + llvm/test/CodeGen/MSP430/libcalls.ll | 35 + llvm/test/CodeGen/MSP430/struct-return.ll | 36 +- .../CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll | 1474 +++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll | 846 +++++++++++ .../CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll | 1486 ++++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll | 1304 +++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll | 598 ++++++++ .../CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll | 1316 +++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll | 304 ++++ .../CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll | 438 ++++++ .../CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll | 1366 ++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll | 828 +++++++++++ .../CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll | 518 +++++++ .../CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll | 844 +++++++++++ .../CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll | 1382 ++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll | 1322 +++++++++++++++++ .../CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll | 304 ++++ .../CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll | 438 ++++++ llvm/test/CodeGen/RISCV/imm.ll | 211 ++- llvm/test/CodeGen/SystemZ/subregliveness-04.ll | 2 +- llvm/test/CodeGen/WebAssembly/byval.ll | 3 - llvm/test/CodeGen/WebAssembly/global.ll | 2 +- llvm/test/CodeGen/WebAssembly/indirect-import.ll | 9 +- llvm/test/CodeGen/WebAssembly/vtable.ll | 8 +- llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll | 79 +- llvm/test/CodeGen/X86/2012-08-07-CmpISelBug.ll | 2 +- llvm/test/CodeGen/X86/O3-pipeline.ll | 1 - llvm/test/CodeGen/X86/avx512-cvt-widen.ll | 42 +- llvm/test/CodeGen/X86/condbr_if.ll | 14 +- llvm/test/CodeGen/X86/condbr_switch.ll | 14 +- llvm/test/CodeGen/X86/extract-bits.ll | 406 +++--- llvm/test/CodeGen/X86/fshl.ll | 268 ++++ llvm/test/CodeGen/X86/fshr.ll | 264 ++++ llvm/test/CodeGen/X86/hoist-spill.ll | 4 +- llvm/test/CodeGen/X86/pr31045.ll | 26 +- llvm/test/CodeGen/X86/pr32610.ll | 4 +- llvm/test/CodeGen/X86/scheduler-backtracking.ll | 566 +++----- llvm/test/CodeGen/X86/vec_cast2.ll | 94 +- llvm/test/CodeGen/X86/vec_cast3.ll | 28 +- llvm/test/CodeGen/X86/vec_fp_to_int-widen.ll | 334 +---- llvm/test/CodeGen/X86/widen_mul.ll | 148 ++ llvm/test/DebugInfo/COFF/global-type-hashes.ll | 9 +- llvm/test/MC/MSP430/refsym.s | 14 + llvm/test/MC/MSP430/reloc.s | 5 + llvm/test/TableGen/prep-diag1.td | 26 + llvm/test/TableGen/prep-diag10.td | 6 + llvm/test/TableGen/prep-diag11-include.inc | 1 + llvm/test/TableGen/prep-diag11.td | 8 + llvm/test/TableGen/prep-diag12-include.inc | 2 + llvm/test/TableGen/prep-diag12.td | 8 + llvm/test/TableGen/prep-diag13.td | 9 + llvm/test/TableGen/prep-diag14.td | 6 + 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.../ThinLTO/X86/Inputs/index-const-prop-gvref.ll | 5 + .../ThinLTO/X86/Inputs/index-const-prop-linkage.ll | 15 + llvm/test/ThinLTO/X86/Inputs/index-const-prop.ll | 64 + llvm/test/ThinLTO/X86/dot-dumper.ll | 10 +- llvm/test/ThinLTO/X86/globals-import-const-fold.ll | 4 +- llvm/test/ThinLTO/X86/index-const-prop-O0.ll | 18 + llvm/test/ThinLTO/X86/index-const-prop-alias.ll | 42 + llvm/test/ThinLTO/X86/index-const-prop-cache.ll | 41 + llvm/test/ThinLTO/X86/index-const-prop-comdat.ll | 17 + llvm/test/ThinLTO/X86/index-const-prop-dead.ll | 26 + llvm/test/ThinLTO/X86/index-const-prop-full-lto.ll | 24 + llvm/test/ThinLTO/X86/index-const-prop-gvref.ll | 27 + llvm/test/ThinLTO/X86/index-const-prop-ldst.ll | 21 + llvm/test/ThinLTO/X86/index-const-prop-linkage.ll | 27 + llvm/test/ThinLTO/X86/index-const-prop.ll | 40 + llvm/test/ThinLTO/X86/index-const-prop2.ll | 59 + llvm/test/Transforms/GlobalDCE/global_ctors.ll | 25 +- .../Transforms/InstSimplify/saturating-add-sub.ll | 448 ++++++ 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llvm/test/ThinLTO/X86/index-const-prop-alias.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-cache.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-comdat.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-dead.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-full-lto.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-gvref.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-ldst.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-linkage.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop2.ll create mode 100644 llvm/test/Transforms/InstSimplify/saturating-add-sub.ll create mode 100644 llvm/test/Transforms/InstSimplify/shr-scalar-vector-consistency.ll create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-switch-unswitch.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-defconfig updated (98b160da5c0 -> 44d154413d9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-defconfig in repository toolchain/gcc. from 98b160da5c0 Daily bump. adds 6b93528308e [PR c++/86246] ICE tsubst explicit operator call adds 302221bf4ca * tree-switch-conversion.c (emit_case_decision_tree): Pass [...] adds 44d154413d9 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 10 ++++++ gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 7 ++++ gcc/cp/typeck.c | 7 +++- gcc/testsuite/ChangeLog | 7 ++++ gcc/tree-switch-conversion.c | 78 ++++++++++++++++++++++++-------------------- 6 files changed, 74 insertions(+), 37 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allyesconfig updated (65892c4d0c3 -> c3e9144f11e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allyesconfig in repository toolchain/gcc. from 65892c4d0c3 2018-11-15 Xianmiao Qu <xianmiao_qu(a)c-sky.com> adds 1bff06cea93 Allow target overrides of ctors/dtors support advertisement [...] adds 4b86385fdbe 2018-11-16 Richard Biener <rguenther(a)suse.de> adds a351f1bbff7 S/390: Add a new pattern for r{o,x}sbg adds 885b1010f4b 2018-11-16 Richard Biener <rguenther(a)suse.de> adds 1109d9d362c 2018-11-16 Richard Biener <rguenther(a)suse.de> adds 8ac6652dd92 Fix ICE in lto_symtab_merge_symbols_1 (PR lto/88004). adds 03fac02cc11 Don't use %z printf length specifier adds baa13bededa [Patch][libstdc++.exp] Update the usage of cached result. adds 8f9783e44ef [PR c++/87269] Mark string operator overload in template defn. adds 9ee615a44b0 Allow memory operands for PTWRITE adds be9e723cb40 Remove ovl_used, it is no longer needed * cp-tree.h (OVL_ [...] adds 7ec2d0f7415 * tree-switch-conversion.h (switch_decision_tree::emit_cas [...] adds 3b06a8b36d9 When running the testsuite on boards that can't report an e [...] adds 1cc6e4a452b PR middle-end/88032 * optabs.c (expand_binop): For op0_mo [...] adds bee3d99f717 PR middle-end/87854 * c-common.c (fix_string_type): Rejec [...] adds 31e4e2349e9 PR target/88051 * config/i386/i386.md (floatunsdidf2): Al [...] adds 6b8784b2b7e PR rtl-optimization/87475 * cfgrtl.c (patch_jump_insn): A [...] adds 453b5ac5a0c [gcc] 2018-11-16 Michael Meissner <meissner(a)linux.ibm.com> adds b67e663d5f7 libphobos: Add IEEE quadruple support to core.internal.convert adds 863c62e0bf4 Implement P0479R5, [[likely]] and [[unlikely]]. adds cf465ccdc51 PR c++/52869 adds 1d8e601cbfd PR c++/87269 * g++.dg/lookup/pr87269.C (std::size_t): New [...] adds db879ec7d1b 2018-11-16 Jozef Lawrynowicz <jozef.l(a)mittosystems.com> adds 781161f0efe Daily bump. adds 19efecf665e 2018-11-17 Jozef Lawrynowicz <jozef.l(a)mittosystems.com> adds c3e9144f11e 2018-11-16 Sandra Loosemore <sandra(a)codesourcery.com> No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 169 +++- gcc/DATESTAMP | 2 +- gcc/alloc-pool.h | 8 +- gcc/bitmap.h | 6 +- gcc/c-family/ChangeLog | 11 + gcc/c-family/c-attribs.c | 2 +- gcc/c-family/c-common.c | 23 +- gcc/c-family/c-common.h | 1 + gcc/c-family/c-lex.c | 4 +- gcc/cfgrtl.c | 9 +- gcc/config/i386/i386.md | 5 +- gcc/config/i386/sse.md | 11 +- gcc/config/msp430/msp430.c | 5 + gcc/config/rs6000/constraints.md | 2 +- gcc/config/rs6000/predicates.md | 154 +--- gcc/config/rs6000/rs6000-cpus.def | 7 +- gcc/config/rs6000/rs6000-protos.h | 6 - gcc/config/rs6000/rs6000.c | 400 +--------- gcc/config/rs6000/rs6000.md | 142 ---- gcc/config/rs6000/rs6000.opt | 4 - gcc/config/s390/s390.md | 42 +- gcc/config/vxworks.c | 13 +- gcc/config/vxworks.h | 17 +- gcc/cp/ChangeLog | 42 + gcc/cp/cp-gimplify.c | 93 +++ gcc/cp/cp-tree.h | 5 +- gcc/cp/decl.c | 2 +- gcc/cp/friend.c | 6 - gcc/cp/parser.c | 74 +- gcc/cp/pt.c | 14 +- gcc/cp/semantics.c | 5 - gcc/cp/tree.c | 103 +-- gcc/doc/invoke.texi | 80 +- gcc/doc/md.texi | 2 +- gcc/doc/tm.texi | 6 + gcc/ggc-common.c | 4 +- gcc/ggc-page.c | 51 +- gcc/gimplify.c | 10 +- gcc/input.c | 30 +- gcc/lto/ChangeLog | 7 + gcc/lto/lto-symtab.c | 5 +- gcc/mem-stats.h | 6 +- gcc/optabs.c | 8 +- gcc/rtl.c | 6 +- gcc/system.h | 6 +- gcc/target-def.h | 15 + gcc/target.def | 6 + gcc/target.h | 3 + gcc/targhooks.c | 4 +- gcc/testsuite/ChangeLog | 50 ++ gcc/testsuite/g++.dg/DRs/dr1207-1.C | 23 + gcc/testsuite/g++.dg/DRs/dr1207-2.C | 12 + gcc/testsuite/g++.dg/cpp2a/attr-likely1.C | 38 + gcc/testsuite/g++.dg/cpp2a/attr-likely2.C | 12 + gcc/testsuite/g++.dg/cpp2a/attr-likely3.C | 8 + gcc/testsuite/g++.dg/cpp2a/attr-likely4.C | 19 + gcc/testsuite/g++.dg/cpp2a/feat-cxx2a.C | 12 + gcc/testsuite/g++.dg/lookup/pr87269.C | 19 + gcc/testsuite/g++.dg/lto/pr54625-1_0.c | 1 + gcc/testsuite/g++.dg/lto/pr54625-2_0.c | 1 + gcc/testsuite/g++.dg/opt/pr87475.C | 7 + gcc/testsuite/g++.dg/parse/concat1.C | 6 +- gcc/testsuite/gcc.c-torture/compile/pr46534.c | 4 +- gcc/testsuite/gcc.c-torture/execute/printf-2.c | 1 + gcc/testsuite/gcc.c-torture/execute/user-printf.c | 1 + gcc/testsuite/gcc.dg/concat2.c | 6 +- gcc/testsuite/gcc.target/powerpc/fusion3.c | 18 - gcc/testsuite/gcc.target/powerpc/fusion4.c | 12 - gcc/testsuite/gcc.target/s390/md/rXsbg_mode_sXl.c | 16 +- gcc/testsuite/gcc.target/s390/risbg-ll-2.c | 2 +- gcc/tree-cfg.c | 6 +- gcc/tree-dfa.c | 4 +- gcc/tree-phinodes.c | 5 +- gcc/tree-ssanames.c | 4 +- gcc/tree-switch-conversion.c | 47 +- gcc/tree-switch-conversion.h | 8 +- gcc/tree-vrp.c | 2 +- gcc/varasm.c | 14 + gcc/vec.c | 10 +- libphobos/libdruntime/core/internal/convert.d | 135 +++- libstdc++-v3/ChangeLog | 6 + libstdc++-v3/testsuite/lib/libstdc++.exp | 933 +++++----------------- 82 files changed, 1334 insertions(+), 1744 deletions(-) create mode 100644 gcc/testsuite/g++.dg/DRs/dr1207-1.C create mode 100644 gcc/testsuite/g++.dg/DRs/dr1207-2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/attr-likely1.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/attr-likely2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/attr-likely3.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/attr-likely4.C create mode 100644 gcc/testsuite/g++.dg/lookup/pr87269.C create mode 100644 gcc/testsuite/g++.dg/opt/pr87475.C delete mode 100644 gcc/testsuite/gcc.target/powerpc/fusion3.c delete mode 100644 gcc/testsuite/gcc.target/powerpc/fusion4.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig updated (6610167d84f -> 38e5d73af8d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-monorepo. from 6610167d84f AMDHSA: More code object v3 fixes: adds 26d6696f797 [AMDGPU] NFC Test commit adds f82205664f8 [WebAssembly] Split BBs after throw instructions adds 83a02e9b61d Re-apply r346985: [ADT] Drop llvm::Optional clang-specific [...] adds 603a8573fd8 [WebAssembly] Change type of wake count to unsigned int adds 78b567fb139 [analyzer] ConversionChecker: handle floating point adds 928c4fd743a [CUDA] updated CompileCudaWithLLVM.rst adds 8fb027c0cfd [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs [...] adds eeea3d23132 [VFS] Implement `RedirectingFileSystem::getRealPath`. adds 06c849c8777 [X86] Update a couple comments to remove a mention of a sig [...] adds d974e75192a [X86] Use ANY_EXTEND instead of SIGN_EXTEND in the AVX2 and [...] adds d2ff55ae288 [VFS] Implement `RedirectingFileSystem::getRealPath`. adds 099dd9ccb2d Added missing whitespace in the link. adds 24287ec17c5 [X86] Add some test cases for vector multiplies on vectors [...] adds 9c0131580e0 Revert r347014 "[X86] Add some test cases for vector multip [...] adds 829fbcc3c28 [VFS] Update unittest to fix Windows buildbot. adds 79145fed181 [NativePDB] Rewrite the PdbSymUid to use our own custom nam [...] adds c2bb1ca23a4 [Clang][Sema]Choose a better candidate in overload function [...] adds 5b80c33d001 Don't use uniform initialization syntax. adds c8ad20bbada [CMake] Use the correct spelling for armv7 in Fuchsia's toolchain adds dae709b025e [compiler-rt] Use exact spelling when building for default target adds 138eb6e77f1 [CMake] Support cross-compiling with multi-stage builds adds 53ddacef944 [CMake] Support cross-compiling with Fuchsia toolchain build adds 76e69eda418 AMDGPU: Fix analyzeBranch failing with pseudoterminators adds a3b76406f07 [ELF][MIPS] Use MIPS R6 `sigrie` as a trap instruction adds bcd8bc37e70 [X86] Add some test cases for vector multiplies on vectors [...] adds d139d805b75 [X86] Add custom type legalization for v2i8/v4i8/v8i8 mul u [...] adds e579f25e26f [ThinLTO] Internalize readonly globals adds 2583bfd4ffd [LegalizeVectorTypes] Teach WidenVecRes_Convert to turn ANY [...] adds 59aa1cb4aea [clang] - Simplify tools::SplitDebugName. adds 0d9a93115a6 [clangd] Initial clang-tidy diagnostics support. adds d5357cd9c15 [DAGCombine] Fix non-deterministic debug output adds 0bd2dae7adc Introduce shard storage to auto-index. adds 5a6696d0076 [clangd] Fix a compiler warning and test crashes caused in [...] adds c9b761e109c [MSP430] Add more tests for ABI and calling convention adds f1d9df9d035 [MSP430] Add support for .refsym directive adds 08b9196394c [RISCV] Constant materialisation for RV64I adds 3bdb53bfdbf [RISCV][NFC] Define and use the new CA instruction format adds e70e5536a1c [clangd] Truncate SymbolID to 8 bytes. adds ec27209c7cd [TargetLowering] Cleanup more of the EXTEND demanded bits c [...] adds 3064202eefa Remove BUILD file from google-benchmark adds 094af196271 [lldb] NFC: Remove the extra ';' adds e2070ba3d8c [X86] X86DAGToDAGISel::matchBitExtract(): extract 'lshr' from `X` adds da3e6308e8f [DWARF] Use PRIx64 instead of 'x' to format 64-bit values adds 02bbc4956c9 [IRVerifier] Allow StructRet in statepoint adds b28c609e9e6 [x86] regenerate complete checks for test; NFC adds 6881f9126fc [libcxx] Mention restriction on inline namespaces in LIBCXX [...] adds 5976f9e685f [clang-tidy] Expanded a test NFC adds 4089049fc16 [X86][SSE] Move number of input limit out of resolveTargetS [...] adds 02d00b9a1f2 [InstSimplify] add test to demonstrate undef matching diffe [...] adds f356005646c Makefile.rules: Use a shared clang module cache directory. adds 0995bfe8bcf Use a shared module cache directory for LLDB. adds 7d713d5f2af Typo adds 25372e02294 [OpenCL] Enable address spaces for references in C++ adds 6a2e1d88f6e [InstSimplify] add tests for saturating add/sub; NFC adds 59469e38ca8 [CodeGen] Expose some data types and accessors from StackMaps adds 793854cedb5 [AST][NFC] Pack CXXBoolLiteralExpr adds 27a906a761f [AST][NFC] Pack CXXNullPtrLiteralExpr adds 3ed5220fe21 [AST][NFC] Pack CXXThisExpr adds 7e1c886d1f6 GlobalDCE: Teach isEmptyFunction() to ignore debug intrinsics. adds a6119380571 [X86] Add codegen tests for scalar funnel shifts adds cf919fed010 [SelectionDAG] Move (repeated) SDTIntShiftDOp double shift [...] adds ef5d7630a18 [CMake] Accept ENTITLEMENTS in add_llvm_executable and llvm [...] adds f7e6c6d84ab [PowerPC] Make no-PIC default to match GCC - LLVM adds becbcdba25a [PowerPC] Make no-PIC default to match GCC - CLANG adds 7927aa1288d Make path more robust so it also works with out-of-tree builds. adds aef089897f8 [codeview] Expose -gcodeview-ghash for global type hashing adds 8efa3877a1b [WebAssembly] Default to static reloc model adds 6421f0dc8eb [MSP430] Use R_MSP430_16_BYTE type for FK_Data_2 fixup adds b44e1b3ca2c Revert "[PowerPC] Make no-PIC default to match GCC - CLANG" adds 5aec7fd8f08 Revert "[PowerPC] Make no-PIC default to match GCC - LLVM" adds f01b004d880 Support ARM_V4BX relocation adds 4118662c386 [X86] Disable Condbr_merge pass adds 18b788bc752 [MSP430] Add RTLIB::[SRL/SRA/SHL]_I32 lowering to EABI lib calls adds b2a2911c099 [OPENMP][NVPTX]Emit correct reduction code for teams/parall [...] adds b23282b0dd1 [hwasan] optionally right-align heap allocations adds 546af08d1a9 Add new interceptor for getmntinfo(3) from NetBSD adds a2182d17b30 [SymbolFile] Remove unused function. NFCI. adds c8ab49aefe4 [libcxx] Add missing includes in tests adds 8acb54df2b8 [FNeg] Add FNeg Instruction to LangRef document adds 037a850ff03 [Cocoa] Prefer llvm::SignExtend64. Pointed out by zturner. adds 04ccf2af96e Add new interceptor for mi_vector_hash(3) adds 73ce343f2bd AArch64: Emit a call frame instruction for the shadow call [...] adds c5a13810aa9 [PowerPC][NFC] Add tests for vector fp <-> int conversions adds f5818452afc [hwasan] disable one test line while investigating a bot failure adds b9d8c46d56e Preprocessing support in tablegen. adds 10511eb50d6 [X86] In LowerLoad, fix assert messages and rename a variab [...] adds 3d2513e5540 [LegalizeVectorOps] After custom legalizing an extending lo [...] adds 88787838f9c [X86] Remove a branch on SSE4.1 from LowerLoad adds d556f50b20a [OPENMP]Fix PR39694: do not capture `this` in non-`this` region. adds 94709f33dec [SimpleLoopUnswitch] adding cost multiplier to cap exponent [...] adds 1f3d9b6b65f [WebAssembly] Cleanup unused declares in test code. NFC. adds 4693c9f5c3e [sanitizer] Update global_symbols.txt adds 5b091ac9239 [X86] Qualify part of the masked gather handling in Replace [...] adds 85507ecdf3c Cast _Unwind_GetIP() and _Unwind_GetRegionStart() to uintptr_t adds c27a4ed1060 Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr adds 6d9e4e702b0 Speed up git-llvm script by only svn up'ing affected directories. adds d719bb36c3f Makefile.rules: Degrade gracefully on Windows machines with [...] adds 01b08e9824d [X86] Add custom promotion of narrow fp_to_uint/fp_to_sint [...] adds 1f9a518d8a1 Revert "Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr" adds ab8e7e94cb9 [hwasan] use reads instead of writes in a test adds 4e51f283ba1 [CMake] Use lld and llvm-objcopy for first stage compiler i [...] adds 616e06125ff Rewrite stop-hook tests as a couple of FileCheck tests adds 61905a5dd80 DAG combiner: fold (select, C, X, undef) -> X adds 067b8274e45 Add missing test for r347072 -gcodeview-ghash adds af3d45022de Fixed test after r347110 adds e6f9467b5bc Make git-llvm python3 compatible again. Hopefully. :) adds f833d5dce08 Add missing triple from llvm-mc command line. adds 4ad3b250174 Moved dag-combine-select-undef.ll into amdgpu. NFC. adds fb64c10b9ea [hwasan] implement free_checks_tail_magic=1 adds 22edaf70bf7 Make TestAppleSimulatorOSType.py more flexible adds 9f3f19ff602 [hwasan] make the heap-buffer-overflow.c test more robust a [...] adds 0c17bca2668 [clangd] Fix crash hovering on non-decltype trailing return adds 354f7176a9c Makefile.rules: Fix the windows-sed-quoting issue harder. adds f6271c455af [hwasan] don't check tail magic when in right_align mode (s [...] adds 378cd0dec63 add PdbSymUid.cpp adds cabf5f65a46 [llvm-objcopy] Use llvm::all_of and rename the variables "S [...] adds aecfd5a4683 Revert "Makefile.rules: Fix the windows-sed-quoting issue harder." adds e46db320659 Just don't even attempt to invoke sed on Windows. adds 38e5d73af8d Use llvm::copy. NFC No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/CMakeLists.txt | 19 + clang-tools-extra/clangd/ClangdUnit.cpp | 83 +- clang-tools-extra/clangd/XRefs.cpp | 9 +- clang-tools-extra/clangd/index/Background.cpp | 65 +- clang-tools-extra/clangd/index/Background.h | 42 +- .../clangd/index/BackgroundIndexStorage.cpp | 112 ++ clang-tools-extra/clangd/index/Index.h | 3 +- clang-tools-extra/clangd/index/Serialization.cpp | 4 +- ...onsistent-declaration-parameter-name-macros.cpp | 38 +- .../unittests/clangd/BackgroundIndexTests.cpp | 82 +- .../unittests/clangd/ClangdUnitTests.cpp | 25 + .../unittests/clangd/SerializationTests.cpp | 16 +- clang-tools-extra/unittests/clangd/XRefsTests.cpp | 8 + clang/CMakeLists.txt | 33 +- clang/cmake/caches/Fuchsia-stage2.cmake | 2 +- clang/cmake/caches/Fuchsia.cmake | 37 +- clang/include/clang/AST/ExprCXX.h | 69 +- clang/include/clang/AST/Stmt.h | 36 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 2 +- clang/include/clang/Driver/Options.td | 6 + clang/include/clang/Frontend/CodeGenOptions.def | 3 + clang/include/clang/Sema/Sema.h | 4 + clang/lib/AST/Expr.cpp | 19 +- clang/lib/CodeGen/CGExpr.cpp | 9 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 407 +++--- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 4 + clang/lib/CodeGen/CodeGenModule.cpp | 3 + clang/lib/Driver/ToolChains/Clang.cpp | 13 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 19 +- clang/lib/Driver/ToolChains/CommonArgs.h | 2 +- clang/lib/Driver/ToolChains/Gnu.cpp | 2 +- clang/lib/Driver/ToolChains/MinGW.cpp | 2 +- clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Sema/DeclSpec.cpp | 6 +- clang/lib/Sema/SemaDecl.cpp | 12 +- clang/lib/Sema/SemaExprCXX.cpp | 22 +- clang/lib/Sema/SemaInit.cpp | 31 +- clang/lib/Sema/SemaOpenMP.cpp | 11 +- clang/lib/Sema/SemaOverload.cpp | 25 + clang/lib/Sema/SemaType.cpp | 3 +- .../StaticAnalyzer/Checkers/ConversionChecker.cpp | 55 +- clang/test/Analysis/conversion.c | 31 +- clang/test/CodeGen/builtins-wasm.c | 2 +- clang/test/CodeGenCXX/debug-info-ms-abi.cpp | 4 + .../CodeGenOpenCLCXX/address-space-deduction.cl | 46 + clang/test/Driver/gcodeview-ghash.c | 19 + clang/test/OpenMP/nvptx_data_sharing.cpp | 2 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 27 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 2 +- .../nvptx_target_parallel_reduction_codegen.cpp | 107 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 2 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 4 +- .../test/OpenMP/nvptx_teams_reduction_codegen.cpp | 410 +++++- clang/test/Sema/altivec-generic-overload.c | 100 ++ clang/test/SemaCXX/vector.cpp | 8 +- clang/test/VFS/subframework-symlink.m | 23 + compiler-rt/cmake/Modules/CompilerRTUtils.cmake | 5 +- compiler-rt/lib/builtins/gcc_personality_v0.c | 5 +- compiler-rt/lib/hwasan/hwasan_allocator.cc | 100 +- compiler-rt/lib/hwasan/hwasan_allocator.h | 3 +- compiler-rt/lib/hwasan/hwasan_flags.inc | 31 + compiler-rt/lib/hwasan/hwasan_report.cc | 60 + compiler-rt/lib/hwasan/hwasan_report.h | 2 + .../sanitizer_common_interceptors.inc | 36 + .../sanitizer_platform_interceptors.h | 2 + .../symbolizer/scripts/global_symbols.txt | 3 + .../test/hwasan/TestCases/heap-buffer-overflow.c | 40 +- .../test/hwasan/TestCases/random-align-right.c | 35 + compiler-rt/test/hwasan/TestCases/tail-magic.c | 28 + compiler-rt/test/hwasan/TestCases/use-after-free.c | 4 +- .../TestCases/NetBSD/getmntinfo.cc | 25 + .../TestCases/NetBSD/mi_vector_hash.cc | 19 + libcxx/docs/BuildingLibcxx.rst | 4 +- .../unord.map/unord.map.cnstr/assign_init.pass.cpp | 1 + .../unord.map/unord.map.cnstr/assign_move.pass.cpp | 1 + .../unord/unord.map/unord.map.cnstr/init.pass.cpp | 1 + .../unord/unord.map/unord.map.cnstr/range.pass.cpp | 1 + .../unord.multimap.cnstr/assign_copy.pass.cpp | 2 + .../unord.multimap.cnstr/assign_init.pass.cpp | 1 + .../unord.multimap.cnstr/assign_move.pass.cpp | 1 + .../unord.multimap.cnstr/init.pass.cpp | 1 + .../unord.multimap.cnstr/range.pass.cpp | 1 + .../unord/unord.multiset/erase_range.pass.cpp | 1 + .../unord.multiset.cnstr/assign_copy.pass.cpp | 2 + .../unord.multiset.cnstr/assign_init.pass.cpp | 1 + .../unord.multiset.cnstr/assign_move.pass.cpp | 1 + .../unord.multiset.cnstr/init.pass.cpp | 1 + .../unord.multiset.cnstr/range.pass.cpp | 1 + .../unord/unord.set/erase_range.pass.cpp | 1 + .../unord.set/unord.set.cnstr/assign_copy.pass.cpp | 2 + .../unord.set/unord.set.cnstr/assign_init.pass.cpp | 1 + .../unord.set/unord.set.cnstr/assign_move.pass.cpp | 1 + .../unord/unord.set/unord.set.cnstr/init.pass.cpp | 1 + .../unord/unord.set/unord.set.cnstr/range.pass.cpp | 1 + libcxx/utils/google-benchmark/test/BUILD | 65 - lld/ELF/Arch/ARM.cpp | 6 + lld/ELF/Arch/Mips.cpp | 4 +- lld/test/ELF/mips-got16-relocatable.s | 8 +- lld/test/ELF/mips-npic-call-pic-os.s | 35 +- lld/test/ELF/mips-npic-call-pic-script.s | 114 +- lld/test/ELF/mips-npic-call-pic.s | 25 +- lld/test/ELF/mips-traps.s | 22 + lld/test/ELF/v4bx.yaml | 38 + .../StopHook/Inputs/stop-hook-threads.cpp} | 11 +- .../ExecControl/StopHook/Inputs/stop-hook.c} | 0 .../ExecControl/StopHook/stop-hook-threads.test | 44 + lldb/lit/ExecControl/StopHook/stop-hook.test | 71 + lldb/lit/SymbolFile/NativePDB/s_constant.cpp | 2 +- lldb/lit/lit.cfg.py | 13 +- lldb/lldb.xcodeproj/project.pbxproj | 4 + .../test/functionalities/stop-hook/Makefile | 5 - .../functionalities/stop-hook/TestStopHookCmd.py | 77 - .../stop-hook/TestStopHookMechanism.py | 128 -- .../stop-hook/multiple_threads/Makefile | 6 - .../TestStopHookMultipleThreads.py | 100 -- lldb/packages/Python/lldbsuite/test/lldbtest.py | 5 +- .../Python/lldbsuite/test/make/Makefile.rules | 14 +- .../tools/lldb-server/TestAppleSimulatorOSType.py | 8 +- .../Plugins/Language/CPlusPlus/LibCxxVariant.cpp | 2 +- lldb/source/Plugins/Language/ObjC/Cocoa.cpp | 3 +- .../Plugins/SymbolFile/NativePDB/CMakeLists.txt | 1 + .../SymbolFile/NativePDB/CompileUnitIndex.cpp | 28 +- .../SymbolFile/NativePDB/CompileUnitIndex.h | 12 +- .../Plugins/SymbolFile/NativePDB/PdbIndex.cpp | 14 +- .../source/Plugins/SymbolFile/NativePDB/PdbIndex.h | 2 +- .../Plugins/SymbolFile/NativePDB/PdbSymUid.cpp | 161 +++ .../Plugins/SymbolFile/NativePDB/PdbSymUid.h | 244 +--- .../Plugins/SymbolFile/NativePDB/PdbUtil.cpp | 15 + lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.h | 11 + .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 333 ++--- .../SymbolFile/NativePDB/SymbolFileNativePDB.h | 39 +- .../SymbolFile/NativePDB/UdtRecordCompleter.cpp | 12 +- .../SymbolFile/NativePDB/UdtRecordCompleter.h | 4 +- lldb/test/CMakeLists.txt | 2 +- llvm/CMakeLists.txt | 4 +- llvm/cmake/modules/AddLLVM.cmake | 28 +- llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 29 +- llvm/docs/CompileCudaWithLLVM.rst | 41 +- llvm/docs/LangRef.rst | 52 +- llvm/docs/TableGen/LangRef.rst | 49 +- llvm/include/llvm/ADT/Optional.h | 18 - llvm/include/llvm/CodeGen/StackMaps.h | 44 +- .../include/llvm/DebugInfo/CodeView/SymbolRecord.h | 1 + llvm/include/llvm/IR/ModuleSummaryIndex.h | 50 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 3 + llvm/include/llvm/Transforms/IPO/FunctionImport.h | 8 + .../llvm/Transforms/Utils/FunctionImportUtils.h | 1 - llvm/lib/Analysis/LoopAccessAnalysis.cpp | 2 +- llvm/lib/Analysis/MemorySSAUpdater.cpp | 2 +- llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 75 +- llvm/lib/AsmParser/LLParser.cpp | 3 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 51 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 24 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 8 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h | 3 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 +- llvm/lib/CodeGen/MIRCanonicalizerPass.cpp | 3 +- llvm/lib/CodeGen/MachineFunction.cpp | 2 +- llvm/lib/CodeGen/MachineTraceMetrics.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 12 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 2 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 21 +- llvm/lib/CodeGen/WasmEHPrepare.cpp | 62 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 8 +- llvm/lib/IR/Attributes.cpp | 4 +- llvm/lib/IR/Constants.cpp | 2 +- llvm/lib/IR/Instructions.cpp | 8 +- llvm/lib/IR/Metadata.cpp | 2 +- llvm/lib/IR/ModuleSummaryIndex.cpp | 107 +- llvm/lib/IR/Verifier.cpp | 16 +- llvm/lib/LTO/LTO.cpp | 5 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 19 +- llvm/lib/Linker/IRMover.cpp | 5 - llvm/lib/Object/Object.cpp | 2 +- llvm/lib/Object/WindowsResource.cpp | 7 +- llvm/lib/Support/Path.cpp | 2 +- llvm/lib/Support/RandomNumberGenerator.cpp | 2 +- llvm/lib/Support/VirtualFileSystem.cpp | 33 +- llvm/lib/TableGen/Main.cpp | 6 +- llvm/lib/TableGen/TGLexer.cpp | 557 +++++++- llvm/lib/TableGen/TGLexer.h | 243 +++- llvm/lib/TableGen/TGParser.h | 5 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 4 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/FLATInstructions.td | 23 +- llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp | 224 +++ llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 29 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 3 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 9 + llvm/lib/Target/AMDGPU/SIInstructions.td | 3 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 1 + .../Target/MSP430/AsmParser/MSP430AsmParser.cpp | 13 + .../MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp | 2 +- llvm/lib/Target/MSP430/MSP430ISelLowering.cpp | 9 +- llvm/lib/Target/NVPTX/NVPTXInstrInfo.td | 3 - llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 29 +- llvm/lib/Target/RISCV/RISCVInstrFormats.td | 9 +- llvm/lib/Target/RISCV/RISCVInstrFormatsC.td | 13 + llvm/lib/Target/RISCV/RISCVInstrInfoC.td | 21 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 7 +- .../WebAssembly/WebAssemblyLateEHPrepare.cpp | 58 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 8 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 20 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 171 ++- llvm/lib/Target/X86/X86InstrInfo.td | 4 - llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- llvm/lib/Transforms/IPO/FunctionImport.cpp | 39 +- llvm/lib/Transforms/IPO/GlobalDCE.cpp | 15 +- .../Instrumentation/ControlHeightReduction.cpp | 2 +- llvm/lib/Transforms/Scalar/GVNSink.cpp | 6 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 3 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 118 +- llvm/lib/Transforms/Utils/FunctionImportUtils.cpp | 21 +- llvm/test/Bitcode/summary_version.ll | 2 +- llvm/test/Bitcode/thinlto-alias.ll | 4 +- llvm/test/Bitcode/thinlto-alias2.ll | 2 +- .../thinlto-function-summary-callgraph-cast.ll | 4 +- .../thinlto-function-summary-callgraph-pgo.ll | 4 +- ...o-function-summary-callgraph-profile-summary.ll | 4 +- .../thinlto-function-summary-callgraph-relbf.ll | 2 +- ...ion-summary-callgraph-sample-profile-summary.ll | 4 +- .../Bitcode/thinlto-function-summary-callgraph.ll | 4 +- .../Bitcode/thinlto-function-summary-refgraph.ll | 12 +- llvm/test/CodeGen/AArch64/half.ll | 4 +- llvm/test/CodeGen/AArch64/shadow-call-stack.ll | 1 + llvm/test/CodeGen/AMDGPU/ds_write2.ll | 12 +- llvm/test/CodeGen/AMDGPU/ds_write2st64.ll | 12 +- .../CodeGen/AMDGPU/global-load-store-atomics.mir | 249 ++++ llvm/test/CodeGen/AMDGPU/global-saddr.ll | 102 ++ .../CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll | 85 ++ .../AMDGPU/indirect-addressing-si-pregfx9.ll | 88 ++ llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll | 73 +- .../test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 32 +- .../insert_vector_elt.v2i16.subtest-nosaddr.ll | 36 + .../insert_vector_elt.v2i16.subtest-saddr.ll | 36 + llvm/test/CodeGen/AMDGPU/madak.ll | 12 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll | 2 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-store.ll | 2 +- llvm/test/CodeGen/AMDGPU/memory_clause.ll | 2 +- llvm/test/CodeGen/AMDGPU/select-undef.ll | 45 + .../CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 15 +- .../CodeGen/AMDGPU/verifier-pseudo-terminators.mir | 23 + llvm/test/CodeGen/ARM/sub-cmp-peephole.ll | 2 +- .../autohvx/isel-extractelt-illegal-type.ll | 2 +- llvm/test/CodeGen/Hexagon/swp-const-tc1.ll | 2 +- llvm/test/CodeGen/MSP430/callee-saved.ll | 38 + llvm/test/CodeGen/MSP430/calls.ll | 22 + llvm/test/CodeGen/MSP430/cc_args.ll | 79 ++ llvm/test/CodeGen/MSP430/interrupt.ll | 49 + llvm/test/CodeGen/MSP430/libcalls.ll | 35 + llvm/test/CodeGen/MSP430/struct-return.ll | 36 +- .../CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll | 1474 +++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll | 846 +++++++++++ .../CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll | 1486 ++++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll | 1304 +++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll | 598 ++++++++ .../CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll | 1316 +++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll | 304 ++++ .../CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll | 438 ++++++ .../CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll | 1366 ++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll | 828 +++++++++++ .../CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll | 518 +++++++ .../CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll | 844 +++++++++++ .../CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll | 1382 ++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll | 1322 +++++++++++++++++ .../CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll | 304 ++++ .../CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll | 438 ++++++ llvm/test/CodeGen/RISCV/imm.ll | 211 ++- llvm/test/CodeGen/SystemZ/subregliveness-04.ll | 2 +- llvm/test/CodeGen/WebAssembly/byval.ll | 3 - llvm/test/CodeGen/WebAssembly/exception.ll | 9 +- llvm/test/CodeGen/WebAssembly/global.ll | 2 +- llvm/test/CodeGen/WebAssembly/indirect-import.ll | 9 +- llvm/test/CodeGen/WebAssembly/vtable.ll | 8 +- llvm/test/CodeGen/WebAssembly/wasmehprepare.ll | 30 +- llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll | 79 +- llvm/test/CodeGen/X86/2012-08-07-CmpISelBug.ll | 2 +- llvm/test/CodeGen/X86/O3-pipeline.ll | 1 - llvm/test/CodeGen/X86/avx2-arith.ll | 24 +- llvm/test/CodeGen/X86/avx512-cvt-widen.ll | 42 +- llvm/test/CodeGen/X86/combine-mul.ll | 2 +- llvm/test/CodeGen/X86/condbr_if.ll | 14 +- llvm/test/CodeGen/X86/condbr_switch.ll | 14 +- llvm/test/CodeGen/X86/extract-bits.ll | 406 +++--- llvm/test/CodeGen/X86/fshl.ll | 268 ++++ llvm/test/CodeGen/X86/fshr.ll | 264 ++++ llvm/test/CodeGen/X86/hoist-spill.ll | 4 +- llvm/test/CodeGen/X86/pmul.ll | 108 +- llvm/test/CodeGen/X86/pr31045.ll | 26 +- llvm/test/CodeGen/X86/pr32610.ll | 4 +- llvm/test/CodeGen/X86/scheduler-backtracking.ll | 566 +++----- llvm/test/CodeGen/X86/vec_cast2.ll | 94 +- llvm/test/CodeGen/X86/vec_cast3.ll | 28 +- llvm/test/CodeGen/X86/vec_fp_to_int-widen.ll | 334 +---- llvm/test/CodeGen/X86/vector-mul.ll | 6 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 832 +++++------ llvm/test/CodeGen/X86/vector-shift-shl-128.ll | 2 +- llvm/test/CodeGen/X86/widen_mul.ll | 148 ++ llvm/test/DebugInfo/COFF/global-type-hashes.ll | 9 +- llvm/test/MC/MSP430/refsym.s | 14 + llvm/test/MC/MSP430/reloc.s | 5 + llvm/test/MC/WebAssembly/event-section.ll | 7 +- llvm/test/TableGen/prep-diag1.td | 26 + llvm/test/TableGen/prep-diag10.td | 6 + llvm/test/TableGen/prep-diag11-include.inc | 1 + llvm/test/TableGen/prep-diag11.td | 8 + llvm/test/TableGen/prep-diag12-include.inc | 2 + llvm/test/TableGen/prep-diag12.td | 8 + llvm/test/TableGen/prep-diag13.td | 9 + llvm/test/TableGen/prep-diag14.td | 6 + llvm/test/TableGen/prep-diag2.td | 14 + llvm/test/TableGen/prep-diag3.td | 14 + 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.../ThinLTO/X86/Inputs/index-const-prop-linkage.ll | 15 + llvm/test/ThinLTO/X86/Inputs/index-const-prop.ll | 64 + llvm/test/ThinLTO/X86/dot-dumper.ll | 10 +- llvm/test/ThinLTO/X86/globals-import-const-fold.ll | 4 +- llvm/test/ThinLTO/X86/index-const-prop-O0.ll | 18 + llvm/test/ThinLTO/X86/index-const-prop-alias.ll | 42 + llvm/test/ThinLTO/X86/index-const-prop-cache.ll | 41 + llvm/test/ThinLTO/X86/index-const-prop-comdat.ll | 17 + llvm/test/ThinLTO/X86/index-const-prop-dead.ll | 26 + llvm/test/ThinLTO/X86/index-const-prop-full-lto.ll | 24 + llvm/test/ThinLTO/X86/index-const-prop-gvref.ll | 27 + llvm/test/ThinLTO/X86/index-const-prop-ldst.ll | 21 + llvm/test/ThinLTO/X86/index-const-prop-linkage.ll | 27 + llvm/test/ThinLTO/X86/index-const-prop.ll | 40 + llvm/test/ThinLTO/X86/index-const-prop2.ll | 59 + llvm/test/Transforms/GlobalDCE/global_ctors.ll | 25 +- .../Transforms/InstSimplify/saturating-add-sub.ll | 448 ++++++ .../InstSimplify/shr-scalar-vector-consistency.ll | 25 + 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llvm/test/ThinLTO/X86/Inputs/index-const-prop-cache-test2.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-comdat.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-define-g.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-full-lto.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-gvref.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-linkage.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-O0.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-alias.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-cache.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-comdat.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-dead.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-full-lto.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-gvref.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-ldst.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-linkage.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop2.ll create mode 100644 llvm/test/Transforms/InstSimplify/saturating-add-sub.ll create mode 100644 llvm/test/Transforms/InstSimplify/shr-scalar-vector-consistency.ll create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-switch-unswitch.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-defconfig updated (4b63289a08 -> 5b6b27019a)

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7 years

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (4b63289a08 -> 5b6b27019a)

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7 years

[llvm] branch master updated (b8eb94bb7b8 -> 3a054fa1b7b)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from b8eb94bb7b8 [X86] Don't extend v32i8 multiplies to v32i16 with avx512bw [...] new 3a054fa1b7b llvm-symbolizer: Avoid calling getFromOffset when the index [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/DebugInfo/DWARF/DWARFUnit.h | 6 ++++-- lib/DebugInfo/DWARF/DWARFUnit.cpp | 22 ++++++++++++++-------- 2 files changed, 18 insertions(+), 10 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (099dd9ccb2d -> 38e5d73af8d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/llvm-monorepo. from 099dd9ccb2d Added missing whitespace in the link. adds 24287ec17c5 [X86] Add some test cases for vector multiplies on vectors [...] adds 9c0131580e0 Revert r347014 "[X86] Add some test cases for vector multip [...] adds 829fbcc3c28 [VFS] Update unittest to fix Windows buildbot. adds 79145fed181 [NativePDB] Rewrite the PdbSymUid to use our own custom nam [...] adds c2bb1ca23a4 [Clang][Sema]Choose a better candidate in overload function [...] adds 5b80c33d001 Don't use uniform initialization syntax. adds c8ad20bbada [CMake] Use the correct spelling for armv7 in Fuchsia's toolchain adds dae709b025e [compiler-rt] Use exact spelling when building for default target adds 138eb6e77f1 [CMake] Support cross-compiling with multi-stage builds adds 53ddacef944 [CMake] Support cross-compiling with Fuchsia toolchain build adds 76e69eda418 AMDGPU: Fix analyzeBranch failing with pseudoterminators adds a3b76406f07 [ELF][MIPS] Use MIPS R6 `sigrie` as a trap instruction adds bcd8bc37e70 [X86] Add some test cases for vector multiplies on vectors [...] adds d139d805b75 [X86] Add custom type legalization for v2i8/v4i8/v8i8 mul u [...] adds e579f25e26f [ThinLTO] Internalize readonly globals adds 2583bfd4ffd [LegalizeVectorTypes] Teach WidenVecRes_Convert to turn ANY [...] adds 59aa1cb4aea [clang] - Simplify tools::SplitDebugName. adds 0d9a93115a6 [clangd] Initial clang-tidy diagnostics support. adds d5357cd9c15 [DAGCombine] Fix non-deterministic debug output adds 0bd2dae7adc Introduce shard storage to auto-index. adds 5a6696d0076 [clangd] Fix a compiler warning and test crashes caused in [...] adds c9b761e109c [MSP430] Add more tests for ABI and calling convention adds f1d9df9d035 [MSP430] Add support for .refsym directive adds 08b9196394c [RISCV] Constant materialisation for RV64I adds 3bdb53bfdbf [RISCV][NFC] Define and use the new CA instruction format adds e70e5536a1c [clangd] Truncate SymbolID to 8 bytes. adds ec27209c7cd [TargetLowering] Cleanup more of the EXTEND demanded bits c [...] adds 3064202eefa Remove BUILD file from google-benchmark adds 094af196271 [lldb] NFC: Remove the extra ';' adds e2070ba3d8c [X86] X86DAGToDAGISel::matchBitExtract(): extract 'lshr' from `X` adds da3e6308e8f [DWARF] Use PRIx64 instead of 'x' to format 64-bit values adds 02bbc4956c9 [IRVerifier] Allow StructRet in statepoint adds b28c609e9e6 [x86] regenerate complete checks for test; NFC adds 6881f9126fc [libcxx] Mention restriction on inline namespaces in LIBCXX [...] adds 5976f9e685f [clang-tidy] Expanded a test NFC adds 4089049fc16 [X86][SSE] Move number of input limit out of resolveTargetS [...] adds 02d00b9a1f2 [InstSimplify] add test to demonstrate undef matching diffe [...] adds f356005646c Makefile.rules: Use a shared clang module cache directory. adds 0995bfe8bcf Use a shared module cache directory for LLDB. adds 7d713d5f2af Typo adds 25372e02294 [OpenCL] Enable address spaces for references in C++ adds 6a2e1d88f6e [InstSimplify] add tests for saturating add/sub; NFC adds 59469e38ca8 [CodeGen] Expose some data types and accessors from StackMaps adds 793854cedb5 [AST][NFC] Pack CXXBoolLiteralExpr adds 27a906a761f [AST][NFC] Pack CXXNullPtrLiteralExpr adds 3ed5220fe21 [AST][NFC] Pack CXXThisExpr adds 7e1c886d1f6 GlobalDCE: Teach isEmptyFunction() to ignore debug intrinsics. adds a6119380571 [X86] Add codegen tests for scalar funnel shifts adds cf919fed010 [SelectionDAG] Move (repeated) SDTIntShiftDOp double shift [...] adds ef5d7630a18 [CMake] Accept ENTITLEMENTS in add_llvm_executable and llvm [...] adds f7e6c6d84ab [PowerPC] Make no-PIC default to match GCC - LLVM adds becbcdba25a [PowerPC] Make no-PIC default to match GCC - CLANG adds 7927aa1288d Make path more robust so it also works with out-of-tree builds. adds aef089897f8 [codeview] Expose -gcodeview-ghash for global type hashing adds 8efa3877a1b [WebAssembly] Default to static reloc model adds 6421f0dc8eb [MSP430] Use R_MSP430_16_BYTE type for FK_Data_2 fixup adds b44e1b3ca2c Revert "[PowerPC] Make no-PIC default to match GCC - CLANG" adds 5aec7fd8f08 Revert "[PowerPC] Make no-PIC default to match GCC - LLVM" adds f01b004d880 Support ARM_V4BX relocation adds 4118662c386 [X86] Disable Condbr_merge pass adds 18b788bc752 [MSP430] Add RTLIB::[SRL/SRA/SHL]_I32 lowering to EABI lib calls adds b2a2911c099 [OPENMP][NVPTX]Emit correct reduction code for teams/parall [...] adds b23282b0dd1 [hwasan] optionally right-align heap allocations adds 546af08d1a9 Add new interceptor for getmntinfo(3) from NetBSD adds a2182d17b30 [SymbolFile] Remove unused function. NFCI. adds c8ab49aefe4 [libcxx] Add missing includes in tests adds 8acb54df2b8 [FNeg] Add FNeg Instruction to LangRef document adds 037a850ff03 [Cocoa] Prefer llvm::SignExtend64. Pointed out by zturner. adds 04ccf2af96e Add new interceptor for mi_vector_hash(3) adds 73ce343f2bd AArch64: Emit a call frame instruction for the shadow call [...] adds c5a13810aa9 [PowerPC][NFC] Add tests for vector fp <-> int conversions adds f5818452afc [hwasan] disable one test line while investigating a bot failure adds b9d8c46d56e Preprocessing support in tablegen. adds 10511eb50d6 [X86] In LowerLoad, fix assert messages and rename a variab [...] adds 3d2513e5540 [LegalizeVectorOps] After custom legalizing an extending lo [...] adds 88787838f9c [X86] Remove a branch on SSE4.1 from LowerLoad adds d556f50b20a [OPENMP]Fix PR39694: do not capture `this` in non-`this` region. adds 94709f33dec [SimpleLoopUnswitch] adding cost multiplier to cap exponent [...] adds 1f3d9b6b65f [WebAssembly] Cleanup unused declares in test code. NFC. adds 4693c9f5c3e [sanitizer] Update global_symbols.txt adds 5b091ac9239 [X86] Qualify part of the masked gather handling in Replace [...] adds 85507ecdf3c Cast _Unwind_GetIP() and _Unwind_GetRegionStart() to uintptr_t adds c27a4ed1060 Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr adds 6d9e4e702b0 Speed up git-llvm script by only svn up'ing affected directories. adds d719bb36c3f Makefile.rules: Degrade gracefully on Windows machines with [...] adds 01b08e9824d [X86] Add custom promotion of narrow fp_to_uint/fp_to_sint [...] adds 1f9a518d8a1 Revert "Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr" adds ab8e7e94cb9 [hwasan] use reads instead of writes in a test adds 4e51f283ba1 [CMake] Use lld and llvm-objcopy for first stage compiler i [...] adds 616e06125ff Rewrite stop-hook tests as a couple of FileCheck tests adds 61905a5dd80 DAG combiner: fold (select, C, X, undef) -> X adds 067b8274e45 Add missing test for r347072 -gcodeview-ghash new af3d45022de Fixed test after r347110 new e6f9467b5bc Make git-llvm python3 compatible again. Hopefully. :) new f833d5dce08 Add missing triple from llvm-mc command line. new 4ad3b250174 Moved dag-combine-select-undef.ll into amdgpu. NFC. new fb64c10b9ea [hwasan] implement free_checks_tail_magic=1 new 22edaf70bf7 Make TestAppleSimulatorOSType.py more flexible new 9f3f19ff602 [hwasan] make the heap-buffer-overflow.c test more robust a [...] new 0c17bca2668 [clangd] Fix crash hovering on non-decltype trailing return new 354f7176a9c Makefile.rules: Fix the windows-sed-quoting issue harder. new f6271c455af [hwasan] don't check tail magic when in right_align mode (s [...] new 378cd0dec63 add PdbSymUid.cpp new cabf5f65a46 [llvm-objcopy] Use llvm::all_of and rename the variables "S [...] new aecfd5a4683 Revert "Makefile.rules: Fix the windows-sed-quoting issue harder." new e46db320659 Just don't even attempt to invoke sed on Windows. new 38e5d73af8d Use llvm::copy. NFC The 15 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/CMakeLists.txt | 19 + clang-tools-extra/clangd/ClangdUnit.cpp | 83 +- clang-tools-extra/clangd/XRefs.cpp | 9 +- clang-tools-extra/clangd/index/Background.cpp | 65 +- clang-tools-extra/clangd/index/Background.h | 42 +- .../clangd/index/BackgroundIndexStorage.cpp | 112 ++ clang-tools-extra/clangd/index/Index.h | 3 +- clang-tools-extra/clangd/index/Serialization.cpp | 4 +- ...onsistent-declaration-parameter-name-macros.cpp | 38 +- .../unittests/clangd/BackgroundIndexTests.cpp | 82 +- .../unittests/clangd/ClangdUnitTests.cpp | 25 + .../unittests/clangd/SerializationTests.cpp | 16 +- clang-tools-extra/unittests/clangd/XRefsTests.cpp | 8 + clang/CMakeLists.txt | 33 +- clang/cmake/caches/Fuchsia-stage2.cmake | 2 +- clang/cmake/caches/Fuchsia.cmake | 37 +- clang/include/clang/AST/ExprCXX.h | 69 +- clang/include/clang/AST/Stmt.h | 36 + clang/include/clang/Driver/Options.td | 6 + clang/include/clang/Frontend/CodeGenOptions.def | 3 + clang/include/clang/Sema/Sema.h | 4 + clang/lib/AST/Expr.cpp | 19 +- clang/lib/CodeGen/CGExpr.cpp | 9 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 407 +++--- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 4 + clang/lib/CodeGen/CodeGenModule.cpp | 3 + clang/lib/Driver/ToolChains/Clang.cpp | 13 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 19 +- clang/lib/Driver/ToolChains/CommonArgs.h | 2 +- clang/lib/Driver/ToolChains/Gnu.cpp | 2 +- clang/lib/Driver/ToolChains/MinGW.cpp | 2 +- clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Sema/DeclSpec.cpp | 6 +- clang/lib/Sema/SemaDecl.cpp | 12 +- clang/lib/Sema/SemaExprCXX.cpp | 22 +- clang/lib/Sema/SemaInit.cpp | 31 +- clang/lib/Sema/SemaOpenMP.cpp | 11 +- clang/lib/Sema/SemaOverload.cpp | 25 + clang/lib/Sema/SemaType.cpp | 3 +- clang/test/CodeGenCXX/debug-info-ms-abi.cpp | 4 + .../CodeGenOpenCLCXX/address-space-deduction.cl | 46 + clang/test/Driver/gcodeview-ghash.c | 19 + clang/test/OpenMP/nvptx_data_sharing.cpp | 2 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 27 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 2 +- .../nvptx_target_parallel_reduction_codegen.cpp | 107 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 2 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 4 +- .../test/OpenMP/nvptx_teams_reduction_codegen.cpp | 410 +++++- clang/test/Sema/altivec-generic-overload.c | 100 ++ clang/test/SemaCXX/vector.cpp | 8 +- compiler-rt/cmake/Modules/CompilerRTUtils.cmake | 5 +- compiler-rt/lib/builtins/gcc_personality_v0.c | 5 +- compiler-rt/lib/hwasan/hwasan_allocator.cc | 100 +- compiler-rt/lib/hwasan/hwasan_allocator.h | 3 +- compiler-rt/lib/hwasan/hwasan_flags.inc | 31 + compiler-rt/lib/hwasan/hwasan_report.cc | 60 + compiler-rt/lib/hwasan/hwasan_report.h | 2 + .../sanitizer_common_interceptors.inc | 36 + .../sanitizer_platform_interceptors.h | 2 + .../symbolizer/scripts/global_symbols.txt | 3 + .../test/hwasan/TestCases/heap-buffer-overflow.c | 40 +- .../test/hwasan/TestCases/random-align-right.c | 35 + compiler-rt/test/hwasan/TestCases/tail-magic.c | 28 + compiler-rt/test/hwasan/TestCases/use-after-free.c | 4 +- .../TestCases/NetBSD/getmntinfo.cc | 25 + .../TestCases/NetBSD/mi_vector_hash.cc | 19 + libcxx/docs/BuildingLibcxx.rst | 4 +- .../unord.map/unord.map.cnstr/assign_init.pass.cpp | 1 + .../unord.map/unord.map.cnstr/assign_move.pass.cpp | 1 + .../unord/unord.map/unord.map.cnstr/init.pass.cpp | 1 + .../unord/unord.map/unord.map.cnstr/range.pass.cpp | 1 + .../unord.multimap.cnstr/assign_copy.pass.cpp | 2 + .../unord.multimap.cnstr/assign_init.pass.cpp | 1 + .../unord.multimap.cnstr/assign_move.pass.cpp | 1 + .../unord.multimap.cnstr/init.pass.cpp | 1 + .../unord.multimap.cnstr/range.pass.cpp | 1 + .../unord/unord.multiset/erase_range.pass.cpp | 1 + .../unord.multiset.cnstr/assign_copy.pass.cpp | 2 + .../unord.multiset.cnstr/assign_init.pass.cpp | 1 + .../unord.multiset.cnstr/assign_move.pass.cpp | 1 + .../unord.multiset.cnstr/init.pass.cpp | 1 + .../unord.multiset.cnstr/range.pass.cpp | 1 + .../unord/unord.set/erase_range.pass.cpp | 1 + .../unord.set/unord.set.cnstr/assign_copy.pass.cpp | 2 + .../unord.set/unord.set.cnstr/assign_init.pass.cpp | 1 + .../unord.set/unord.set.cnstr/assign_move.pass.cpp | 1 + .../unord/unord.set/unord.set.cnstr/init.pass.cpp | 1 + .../unord/unord.set/unord.set.cnstr/range.pass.cpp | 1 + libcxx/utils/google-benchmark/test/BUILD | 65 - lld/ELF/Arch/ARM.cpp | 6 + lld/ELF/Arch/Mips.cpp | 4 +- lld/test/ELF/mips-got16-relocatable.s | 8 +- lld/test/ELF/mips-npic-call-pic-os.s | 35 +- lld/test/ELF/mips-npic-call-pic-script.s | 114 +- lld/test/ELF/mips-npic-call-pic.s | 25 +- lld/test/ELF/mips-traps.s | 22 + lld/test/ELF/v4bx.yaml | 38 + .../StopHook/Inputs/stop-hook-threads.cpp} | 11 +- .../ExecControl/StopHook/Inputs/stop-hook.c} | 0 .../ExecControl/StopHook/stop-hook-threads.test | 44 + lldb/lit/ExecControl/StopHook/stop-hook.test | 71 + lldb/lit/SymbolFile/NativePDB/s_constant.cpp | 2 +- lldb/lit/lit.cfg.py | 13 +- lldb/lldb.xcodeproj/project.pbxproj | 4 + .../test/functionalities/stop-hook/Makefile | 5 - .../functionalities/stop-hook/TestStopHookCmd.py | 77 - .../stop-hook/TestStopHookMechanism.py | 128 -- .../stop-hook/multiple_threads/Makefile | 6 - .../TestStopHookMultipleThreads.py | 100 -- lldb/packages/Python/lldbsuite/test/lldbtest.py | 5 +- .../Python/lldbsuite/test/make/Makefile.rules | 14 +- .../tools/lldb-server/TestAppleSimulatorOSType.py | 8 +- .../Plugins/Language/CPlusPlus/LibCxxVariant.cpp | 2 +- lldb/source/Plugins/Language/ObjC/Cocoa.cpp | 3 +- .../Plugins/SymbolFile/NativePDB/CMakeLists.txt | 1 + .../SymbolFile/NativePDB/CompileUnitIndex.cpp | 28 +- .../SymbolFile/NativePDB/CompileUnitIndex.h | 12 +- .../Plugins/SymbolFile/NativePDB/PdbIndex.cpp | 14 +- .../source/Plugins/SymbolFile/NativePDB/PdbIndex.h | 2 +- .../Plugins/SymbolFile/NativePDB/PdbSymUid.cpp | 161 +++ .../Plugins/SymbolFile/NativePDB/PdbSymUid.h | 244 +--- .../Plugins/SymbolFile/NativePDB/PdbUtil.cpp | 15 + lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.h | 11 + .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 333 ++--- .../SymbolFile/NativePDB/SymbolFileNativePDB.h | 39 +- .../SymbolFile/NativePDB/UdtRecordCompleter.cpp | 12 +- .../SymbolFile/NativePDB/UdtRecordCompleter.h | 4 +- lldb/test/CMakeLists.txt | 2 +- llvm/CMakeLists.txt | 4 +- llvm/cmake/modules/AddLLVM.cmake | 28 +- llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 29 +- llvm/docs/LangRef.rst | 52 +- llvm/docs/TableGen/LangRef.rst | 49 +- llvm/include/llvm/CodeGen/StackMaps.h | 44 +- .../include/llvm/DebugInfo/CodeView/SymbolRecord.h | 1 + llvm/include/llvm/IR/ModuleSummaryIndex.h | 50 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 3 + llvm/include/llvm/Transforms/IPO/FunctionImport.h | 8 + .../llvm/Transforms/Utils/FunctionImportUtils.h | 1 - llvm/lib/Analysis/LoopAccessAnalysis.cpp | 2 +- llvm/lib/Analysis/MemorySSAUpdater.cpp | 2 +- llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 75 +- llvm/lib/AsmParser/LLParser.cpp | 3 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 51 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 24 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 8 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h | 3 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 +- llvm/lib/CodeGen/MIRCanonicalizerPass.cpp | 3 +- llvm/lib/CodeGen/MachineFunction.cpp | 2 +- llvm/lib/CodeGen/MachineTraceMetrics.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 12 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 2 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 21 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 8 +- llvm/lib/IR/Attributes.cpp | 4 +- llvm/lib/IR/Constants.cpp | 2 +- llvm/lib/IR/Instructions.cpp | 8 +- llvm/lib/IR/Metadata.cpp | 2 +- llvm/lib/IR/ModuleSummaryIndex.cpp | 107 +- llvm/lib/IR/Verifier.cpp | 16 +- llvm/lib/LTO/LTO.cpp | 5 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 19 +- llvm/lib/Linker/IRMover.cpp | 5 - llvm/lib/Object/Object.cpp | 2 +- llvm/lib/Object/WindowsResource.cpp | 7 +- llvm/lib/Support/Path.cpp | 2 +- llvm/lib/Support/RandomNumberGenerator.cpp | 2 +- llvm/lib/TableGen/Main.cpp | 6 +- llvm/lib/TableGen/TGLexer.cpp | 557 +++++++- llvm/lib/TableGen/TGLexer.h | 243 +++- llvm/lib/TableGen/TGParser.h | 5 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 29 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 3 +- .../Target/MSP430/AsmParser/MSP430AsmParser.cpp | 13 + .../MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp | 2 +- llvm/lib/Target/MSP430/MSP430ISelLowering.cpp | 9 +- llvm/lib/Target/NVPTX/NVPTXInstrInfo.td | 3 - llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 29 +- llvm/lib/Target/RISCV/RISCVInstrFormats.td | 9 +- llvm/lib/Target/RISCV/RISCVInstrFormatsC.td | 13 + llvm/lib/Target/RISCV/RISCVInstrInfoC.td | 21 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 7 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 8 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 20 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 161 ++- llvm/lib/Target/X86/X86InstrInfo.td | 4 - llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- llvm/lib/Transforms/IPO/FunctionImport.cpp | 39 +- llvm/lib/Transforms/IPO/GlobalDCE.cpp | 15 +- .../Instrumentation/ControlHeightReduction.cpp | 2 +- llvm/lib/Transforms/Scalar/GVNSink.cpp | 6 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 3 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 118 +- llvm/lib/Transforms/Utils/FunctionImportUtils.cpp | 21 +- llvm/test/Bitcode/summary_version.ll | 2 +- llvm/test/Bitcode/thinlto-alias.ll | 4 +- llvm/test/Bitcode/thinlto-alias2.ll | 2 +- .../thinlto-function-summary-callgraph-cast.ll | 4 +- .../thinlto-function-summary-callgraph-pgo.ll | 4 +- ...o-function-summary-callgraph-profile-summary.ll | 4 +- .../thinlto-function-summary-callgraph-relbf.ll | 2 +- ...ion-summary-callgraph-sample-profile-summary.ll | 4 +- .../Bitcode/thinlto-function-summary-callgraph.ll | 4 +- .../Bitcode/thinlto-function-summary-refgraph.ll | 12 +- llvm/test/CodeGen/AArch64/half.ll | 4 +- llvm/test/CodeGen/AArch64/shadow-call-stack.ll | 1 + llvm/test/CodeGen/AMDGPU/select-undef.ll | 45 + .../CodeGen/AMDGPU/verifier-pseudo-terminators.mir | 23 + llvm/test/CodeGen/ARM/sub-cmp-peephole.ll | 2 +- .../autohvx/isel-extractelt-illegal-type.ll | 2 +- llvm/test/CodeGen/Hexagon/swp-const-tc1.ll | 2 +- llvm/test/CodeGen/MSP430/callee-saved.ll | 38 + llvm/test/CodeGen/MSP430/calls.ll | 22 + llvm/test/CodeGen/MSP430/cc_args.ll | 79 ++ llvm/test/CodeGen/MSP430/interrupt.ll | 49 + llvm/test/CodeGen/MSP430/libcalls.ll | 35 + llvm/test/CodeGen/MSP430/struct-return.ll | 36 +- .../CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll | 1474 +++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll | 846 +++++++++++ .../CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll | 1486 ++++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll | 1304 +++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll | 598 ++++++++ .../CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll | 1316 +++++++++++++++++ .../CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll | 304 ++++ .../CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll | 438 ++++++ .../CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll | 1366 ++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll | 828 +++++++++++ .../CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll | 518 +++++++ .../CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll | 844 +++++++++++ .../CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll | 1382 ++++++++++++++++++ .../CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll | 1322 +++++++++++++++++ .../CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll | 304 ++++ .../CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll | 438 ++++++ llvm/test/CodeGen/RISCV/imm.ll | 211 ++- llvm/test/CodeGen/SystemZ/subregliveness-04.ll | 2 +- llvm/test/CodeGen/WebAssembly/byval.ll | 3 - llvm/test/CodeGen/WebAssembly/global.ll | 2 +- llvm/test/CodeGen/WebAssembly/indirect-import.ll | 9 +- llvm/test/CodeGen/WebAssembly/vtable.ll | 8 +- llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll | 79 +- llvm/test/CodeGen/X86/2012-08-07-CmpISelBug.ll | 2 +- llvm/test/CodeGen/X86/O3-pipeline.ll | 1 - llvm/test/CodeGen/X86/avx512-cvt-widen.ll | 42 +- llvm/test/CodeGen/X86/condbr_if.ll | 14 +- llvm/test/CodeGen/X86/condbr_switch.ll | 14 +- llvm/test/CodeGen/X86/extract-bits.ll | 406 +++--- llvm/test/CodeGen/X86/fshl.ll | 268 ++++ llvm/test/CodeGen/X86/fshr.ll | 264 ++++ llvm/test/CodeGen/X86/hoist-spill.ll | 4 +- llvm/test/CodeGen/X86/pr31045.ll | 26 +- llvm/test/CodeGen/X86/pr32610.ll | 4 +- llvm/test/CodeGen/X86/scheduler-backtracking.ll | 566 +++----- llvm/test/CodeGen/X86/vec_cast2.ll | 94 +- llvm/test/CodeGen/X86/vec_cast3.ll | 28 +- llvm/test/CodeGen/X86/vec_fp_to_int-widen.ll | 334 +---- llvm/test/CodeGen/X86/widen_mul.ll | 148 ++ llvm/test/DebugInfo/COFF/global-type-hashes.ll | 9 +- llvm/test/MC/MSP430/refsym.s | 14 + llvm/test/MC/MSP430/reloc.s | 5 + llvm/test/TableGen/prep-diag1.td | 26 + llvm/test/TableGen/prep-diag10.td | 6 + llvm/test/TableGen/prep-diag11-include.inc | 1 + llvm/test/TableGen/prep-diag11.td | 8 + llvm/test/TableGen/prep-diag12-include.inc | 2 + llvm/test/TableGen/prep-diag12.td | 8 + llvm/test/TableGen/prep-diag13.td | 9 + llvm/test/TableGen/prep-diag14.td | 6 + llvm/test/TableGen/prep-diag2.td | 14 + llvm/test/TableGen/prep-diag3.td | 14 + llvm/test/TableGen/prep-diag4.td | 8 + llvm/test/TableGen/prep-diag5.td | 6 + llvm/test/TableGen/prep-diag6.td | 7 + llvm/test/TableGen/prep-diag7.td | 4 + llvm/test/TableGen/prep-diag8.td | 5 + llvm/test/TableGen/prep-diag9.td | 5 + llvm/test/TableGen/prep-region-include.inc | 8 + llvm/test/TableGen/prep-region-processing.td | 150 ++ .../TableGen/unterminated-c-comment-include.inc | 2 + llvm/test/TableGen/unterminated-c-comment.td | 5 + .../TableGen/unterminated-code-block-include.inc | 8 + llvm/test/TableGen/unterminated-code-block.td | 5 + .../ThinLTO/X86/Inputs/index-const-prop-alias.ll | 5 + .../X86/Inputs/index-const-prop-cache-foo.ll | 19 + .../X86/Inputs/index-const-prop-cache-test1.ll | 10 + .../X86/Inputs/index-const-prop-cache-test2.ll | 14 + .../ThinLTO/X86/Inputs/index-const-prop-comdat.ll | 5 + .../X86/Inputs/index-const-prop-define-g.ll | 4 + .../X86/Inputs/index-const-prop-full-lto.ll | 12 + .../ThinLTO/X86/Inputs/index-const-prop-gvref.ll | 5 + .../ThinLTO/X86/Inputs/index-const-prop-linkage.ll | 15 + llvm/test/ThinLTO/X86/Inputs/index-const-prop.ll | 64 + llvm/test/ThinLTO/X86/dot-dumper.ll | 10 +- llvm/test/ThinLTO/X86/globals-import-const-fold.ll | 4 +- llvm/test/ThinLTO/X86/index-const-prop-O0.ll | 18 + llvm/test/ThinLTO/X86/index-const-prop-alias.ll | 42 + llvm/test/ThinLTO/X86/index-const-prop-cache.ll | 41 + llvm/test/ThinLTO/X86/index-const-prop-comdat.ll | 17 + llvm/test/ThinLTO/X86/index-const-prop-dead.ll | 26 + llvm/test/ThinLTO/X86/index-const-prop-full-lto.ll | 24 + llvm/test/ThinLTO/X86/index-const-prop-gvref.ll | 27 + llvm/test/ThinLTO/X86/index-const-prop-ldst.ll | 21 + llvm/test/ThinLTO/X86/index-const-prop-linkage.ll | 27 + llvm/test/ThinLTO/X86/index-const-prop.ll | 40 + llvm/test/ThinLTO/X86/index-const-prop2.ll | 59 + llvm/test/Transforms/GlobalDCE/global_ctors.ll | 25 +- .../Transforms/InstSimplify/saturating-add-sub.ll | 448 ++++++ .../InstSimplify/shr-scalar-vector-consistency.ll | 25 + .../exponential-nontrivial-unswitch-nested.ll | 139 ++ .../exponential-nontrivial-unswitch-nested2.ll | 149 ++ .../exponential-nontrivial-unswitch.ll | 80 ++ .../exponential-nontrivial-unswitch2.ll | 56 + .../exponential-switch-unswitch.ll | 118 ++ llvm/test/Verifier/statepoint.ll | 18 + llvm/tools/llvm-objcopy/ELF/Object.cpp | 22 +- llvm/unittests/Support/VirtualFileSystemTest.cpp | 12 +- llvm/utils/git-svn/git-llvm | 111 +- 325 files changed, 23041 insertions(+), 2893 deletions(-) create mode 100644 clang-tools-extra/clangd/index/BackgroundIndexStorage.cpp create mode 100644 clang/test/CodeGenOpenCLCXX/address-space-deduction.cl create mode 100644 clang/test/Driver/gcodeview-ghash.c create mode 100644 clang/test/Sema/altivec-generic-overload.c create mode 100644 compiler-rt/test/hwasan/TestCases/random-align-right.c create mode 100644 compiler-rt/test/hwasan/TestCases/tail-magic.c create mode 100644 compiler-rt/test/sanitizer_common/TestCases/NetBSD/getmntinfo.cc create mode 100644 compiler-rt/test/sanitizer_common/TestCases/NetBSD/mi_vector_hash.cc delete mode 100644 libcxx/utils/google-benchmark/test/BUILD create mode 100644 lld/test/ELF/mips-traps.s create mode 100644 lld/test/ELF/v4bx.yaml rename lldb/{packages/Python/lldbsuite/test/functionalities/stop-hook/multiple_thr [...] rename lldb/{packages/Python/lldbsuite/test/functionalities/stop-hook/main.cpp => [...] create mode 100644 lldb/lit/ExecControl/StopHook/stop-hook-threads.test create mode 100644 lldb/lit/ExecControl/StopHook/stop-hook.test delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/stop-hook/Makefile delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/stop-hook/T [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/stop-hook/T [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/stop-hook/m [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/stop-hook/m [...] create mode 100644 lldb/source/Plugins/SymbolFile/NativePDB/PdbSymUid.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/select-undef.ll create mode 100644 llvm/test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir create mode 100644 llvm/test/CodeGen/MSP430/callee-saved.ll create mode 100644 llvm/test/CodeGen/MSP430/calls.ll create mode 100644 llvm/test/CodeGen/MSP430/interrupt.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_8byte_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_8byte_elts.ll create mode 100644 llvm/test/CodeGen/X86/fshl.ll create mode 100644 llvm/test/CodeGen/X86/fshr.ll create mode 100644 llvm/test/CodeGen/X86/widen_mul.ll create mode 100644 llvm/test/MC/MSP430/refsym.s create mode 100644 llvm/test/TableGen/prep-diag1.td create mode 100644 llvm/test/TableGen/prep-diag10.td create mode 100644 llvm/test/TableGen/prep-diag11-include.inc create mode 100644 llvm/test/TableGen/prep-diag11.td create mode 100644 llvm/test/TableGen/prep-diag12-include.inc create mode 100644 llvm/test/TableGen/prep-diag12.td create mode 100644 llvm/test/TableGen/prep-diag13.td create mode 100644 llvm/test/TableGen/prep-diag14.td create mode 100644 llvm/test/TableGen/prep-diag2.td create mode 100644 llvm/test/TableGen/prep-diag3.td create mode 100644 llvm/test/TableGen/prep-diag4.td create mode 100644 llvm/test/TableGen/prep-diag5.td create mode 100644 llvm/test/TableGen/prep-diag6.td create mode 100644 llvm/test/TableGen/prep-diag7.td create mode 100644 llvm/test/TableGen/prep-diag8.td create mode 100644 llvm/test/TableGen/prep-diag9.td create mode 100644 llvm/test/TableGen/prep-region-include.inc create mode 100644 llvm/test/TableGen/prep-region-processing.td create mode 100644 llvm/test/TableGen/unterminated-c-comment-include.inc create mode 100644 llvm/test/TableGen/unterminated-c-comment.td create mode 100644 llvm/test/TableGen/unterminated-code-block-include.inc create mode 100644 llvm/test/TableGen/unterminated-code-block.td create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-alias.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-cache-foo.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-cache-test1.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-cache-test2.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-comdat.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-define-g.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-full-lto.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-gvref.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop-linkage.ll create mode 100644 llvm/test/ThinLTO/X86/Inputs/index-const-prop.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-O0.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-alias.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-cache.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-comdat.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-dead.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-full-lto.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-gvref.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-ldst.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop-linkage.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop.ll create mode 100644 llvm/test/ThinLTO/X86/index-const-prop2.ll create mode 100644 llvm/test/Transforms/InstSimplify/saturating-add-sub.ll create mode 100644 llvm/test/Transforms/InstSimplify/shr-scalar-vector-consistency.ll create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial- [...] create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/exponential-switch-unswitch.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/linux-next] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allnoconfig updated (da5322e65940 -> 1ce80e0fe98e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allnoconfig in repository toolchain/linux-next. from da5322e65940 Merge tag 'selinux-pr-20181115' of git://git.kernel.org/pu [...] adds 7fabaf303458 fuse: fix leaked notify reply adds 2d84a2d19b61 fuse: fix possibly missed wake-up after abort adds ebacb8127359 fuse: fix use-after-free in fuse_direct_IO() adds 9b5f361ac4a9 Merge tag 'fuse-fixes-4.20-rc3' of git://git.kernel.org/pu [...] adds de7b75d82f70 floppy: fix race condition in __floppy_read_block_0() adds 18e962ac0781 kyber: fix wrong strlcpy() size in trace_kyber_latency() adds ca474b73896b block: copy ioprio in __bio_clone_fast() and bounce adds 410b5c7b4836 libata: blacklist SAMSUNG MZ7TD256HAFV-000L9 SSD adds 4800bf7bc8c7 block: fix 32 bit overflow in __blkdev_issue_discard() adds 8dc765d438f1 SCSI: fix queue cleanup race before queue initialization is done adds 59749c2d49bf Merge tag 'for-linus-20181115' of git://git.kernel.dk/linux-block adds 0773495b1f5f xtensa: make sure bFLT stack is 16 byte aligned adds 40dc948f234b xtensa: fix boot parameters address translation adds 50d25bdc6431 Merge tag 'xtensa-20181115' of git://github.com/jcmvbkbc/l [...] adds 3182215dd0b2 powerpc/powernv/npu: Remove NPU DMA ops adds 0ae790683fc2 powerpc/mm/64s: Consolidate SLB assertions adds 08e6a3434e21 powerpc/mm/64s: Use PPC_SLBFEE macro adds 9586d569a369 powerpc/mm/64s: Only use slbfee on CPUs that support it adds 28c5bcf74fa0 KVM: PPC: Move and undef TRACE_INCLUDE_PATH/FILE adds c8b00bb742dd powerpc/mm/64s: Fix preempt warning in slb_allocate_kernel() adds 43c6494fa149 powerpc/io: Fix the IO workarounds code to work with Radix adds 2c7645b0f7d1 selftests/powerpc: Fix wild_bctr test to work on ppc64 adds 437ccdc8ce62 powerpc/numa: Suppress "VPHN is not supported" messages adds 66f93c5a02d5 powerpc/64: Fix kernel stack 16-byte alignment adds b2fed34a628d selftests/powerpc: Adjust wild_bctr to build with old binutils adds ef268de19756 Merge tag 'powerpc-4.20-3' of git://git.kernel.org/pub/scm [...] adds cf3d02a185ed drm: Fix htmldocs warnings in drm_fourcc.c adds 23d8003907d0 drm/dp_mst: Check if primary mstb is null adds e0c827aca073 drm/omap: Populate DSS children in omapdss driver adds f8523b64d2d2 drm/omap: hdmi4: Ensure the device is active during bind adds 350c03e88003 drm/omap: dsi: Ensure the device is active during probe adds 24ec84e854c6 drm/omap: Move DISPC runtime PM handling to omapdrm adds cbed7545db7a drm/omap: dsi: Fix missing of_platform_depopulate() adds adf59dd2408c drm/meson: venc: dmt mode must use encp adds 7b74026d9c4e Merge tag 'drm-misc-fixes-2018-11-14' of git://anongit.fre [...] adds 5581c670fb7e drm/amdgpu: set system aperture to cover whole FB region adds c837243ff401 drm/amdgpu: fix bug with IH ring setup adds 4d454e9ffdb1 drm/amd/pp: Fix truncated clock value when set watermark adds c1a17777eb45 drm/amdgpu: fix huge page handling on Vega10 adds 9826b1138e49 Merge branch 'drm-fixes-4.20' of git://people.freedesktop. [...] adds fb5bbae9b133 drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5 adds 7c4512300cfa drm/i915: Fix possible race in intel_dp_add_mst_connector() adds 541ff7e96c13 drm/i915: Fix NULL deref when re-enabling HPD IRQs on syst [...] adds c4f224076d00 drm/i915/icl: Fix power well 2 wrt. DC-off toggling order adds 0a823e8fd4fd drm/i915/execlists: Force write serialisation into context [...] adds 44a7276b30c3 drm/i915: Fix hpd handling for pins with two encoders adds 6a67a20366f8 drm/i915: fix broadwell EU computation adds a22612301ae6 drm/i915/icl: Drop spurious register read from icl_dbuf_sl [...] adds 2a2777990a34 drm/i915: Move programming plane scaler to its own function. adds 27971d613fcb drm/i915: Clean up skl_program_scaler() adds 6e8adf6f4a4f drm/i915: Account for scale factor when calculating initial phase adds 20325e8a6143 Merge tag 'drm-intel-fixes-2018-11-15' of git://anongit.fr [...] adds 4efd34602fc0 Merge tag 'drm-fixes-2018-11-16' of git://anongit.freedesk [...] adds 68a031d22c57 crypto: hisilicon - Fix NULL dereference for same dst and src adds 0b0cf6af3f31 crypto: hisilicon - Fix reference after free of memories o [...] adds 508a1c4df085 crypto: simd - correctly take reqsize of wrapped skcipher [...] adds f43f39958beb crypto: user - fix leaking uninitialized memory to userspace adds 9f4debe38415 crypto: user - Zeroize whole structure given to user space adds 32e2524a529c Merge branch 'linus' of git://git.kernel.org/pub/scm/linux [...] adds 10283ea525d3 gfs2: Put bitmap buffers in put_super adds e7445ceddfc2 gfs2: Fix metadata read-ahead during truncate (2) adds c26b5aa8ef0d gfs2: Fix iomap buffer head reference counting bug adds e6a2562fe27f Merge tag 'gfs2-4.20.fixes3' of git://git.kernel.org/pub/s [...] adds b469e7e47c8a fanotify: fix handling of events on child sub-directory adds 1ce80e0fe98e Merge tag 'fsnotify_for_v4.20-rc3' of git://git.kernel.org [...] No new revisions were added by this update. Summary of changes: arch/arm/mach-omap2/display.c | 111 +++++++++++------------ arch/powerpc/include/asm/io.h | 20 ++-- arch/powerpc/include/asm/ppc-opcode.h | 2 + arch/powerpc/include/asm/ptrace.h | 1 + arch/powerpc/kernel/setup_64.c | 2 + arch/powerpc/kvm/trace.h | 8 +- arch/powerpc/kvm/trace_booke.h | 9 +- arch/powerpc/kvm/trace_hv.h | 9 +- arch/powerpc/kvm/trace_pr.h | 9 +- arch/powerpc/mm/numa.c | 2 +- arch/powerpc/mm/slb.c | 35 +++---- arch/powerpc/platforms/powernv/npu-dma.c | 64 +------------ arch/xtensa/include/asm/processor.h | 6 +- arch/xtensa/kernel/head.S | 7 +- block/bio.c | 1 + block/blk-core.c | 5 +- block/blk-lib.c | 4 +- block/bounce.c | 1 + crypto/crypto_user_base.c | 18 ++-- crypto/crypto_user_stat.c | 21 +++++ crypto/simd.c | 5 +- drivers/ata/libata-core.c | 2 +- drivers/block/floppy.c | 3 +- drivers/crypto/hisilicon/sec/sec_algs.c | 31 ++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 18 ++-- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 6 +- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 6 +- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c | 32 +++---- drivers/gpu/drm/drm_dp_mst_topology.c | 3 + drivers/gpu/drm/drm_fourcc.c | 2 +- drivers/gpu/drm/i915/intel_device_info.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 45 ++++++++- drivers/gpu/drm/i915/intel_dp_mst.c | 8 +- drivers/gpu/drm/i915/intel_drv.h | 2 +- drivers/gpu/drm/i915/intel_hotplug.c | 70 ++++++++++---- drivers/gpu/drm/i915/intel_lrc.c | 14 ++- drivers/gpu/drm/i915/intel_ringbuffer.c | 38 +++++++- drivers/gpu/drm/i915/intel_runtime_pm.c | 16 ++-- drivers/gpu/drm/i915/intel_sprite.c | 93 +++++++++++-------- drivers/gpu/drm/meson/meson_venc.c | 15 +-- drivers/gpu/drm/omapdrm/dss/dsi.c | 22 ++--- drivers/gpu/drm/omapdrm/dss/dss.c | 11 ++- drivers/gpu/drm/omapdrm/dss/hdmi4.c | 37 ++------ drivers/gpu/drm/omapdrm/dss/hdmi5.c | 27 ------ drivers/gpu/drm/omapdrm/dss/venc.c | 7 -- drivers/gpu/drm/omapdrm/omap_crtc.c | 6 ++ drivers/scsi/scsi_lib.c | 8 ++ fs/fuse/dev.c | 16 +++- fs/fuse/file.c | 4 +- fs/gfs2/bmap.c | 54 +++++------ fs/gfs2/rgrp.c | 3 +- fs/notify/fanotify/fanotify.c | 10 +- fs/notify/fsnotify.c | 7 +- include/trace/events/kyber.h | 8 +- tools/testing/selftests/powerpc/mm/wild_bctr.c | 21 ++++- 56 files changed, 554 insertions(+), 435 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allyesconfig updated (ec87910c282 -> 6027ebc46b4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-monorepo. from ec87910c282 Merging r342946: adds 1151387a041 Merging r344516: adds 3465615e318 Merging r343212: adds 16c44a11cd4 Merging r344591: adds 6027ebc46b4 Merging r344605: No new revisions were added by this update. Summary of changes: lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 6 +- llvm/include/llvm/MC/MCAsmBackend.h | 5 ++ llvm/lib/MC/MCExpr.cpp | 5 ++ .../Target/Mips/MCTargetDesc/MipsAsmBackend.cpp | 9 +++ llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h | 2 + .../Target/Mips/MCTargetDesc/MipsELFStreamer.cpp | 17 ++++++ .../lib/Target/Mips/MCTargetDesc/MipsELFStreamer.h | 7 +++ .../CodeGen/Mips/micromips-gcc-except-table.ll | 37 ++++++++++++ llvm/test/DebugInfo/Mips/eh_frame.ll | 38 +++++++++++++ polly/include/polly/CodeGen/IslAst.h | 6 +- polly/lib/CodeGen/IslAst.cpp | 38 ++++++------- polly/test/ScheduleOptimizer/SIMDInParallelFor.ll | 65 ++++++++++++++++++++++ .../full_partial_tile_separation.ll | 4 ++ 13 files changed, 217 insertions(+), 22 deletions(-) create mode 100644 llvm/test/CodeGen/Mips/micromips-gcc-except-table.ll create mode 100644 llvm/test/DebugInfo/Mips/eh_frame.ll create mode 100644 polly/test/ScheduleOptimizer/SIMDInParallelFor.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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2020

2019

2018

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2015

Tcwg-commits November 2018