Tcwg-commits September 2018

tcwg-commits@lists.linaro.org

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2701 discussions

[llvm] branch master updated (edfa885345d -> 46304bd3adc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from edfa885345d Split invocations in CodeGen/X86/cpus.ll among multiple tes [...] new 72cdd511978 [X86][Btver2] CVTSS2I/CVTSD2I - add missing JFPU0 pipe new 46304bd3adc [MIPS GlobalISel] Lower i64 arguments The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/Mips/MipsCallLowering.cpp | 144 +++++++++++++-------- lib/Target/Mips/MipsCallLowering.h | 27 ++-- lib/Target/X86/X86ScheduleBtVer2.td | 4 +- .../Mips/GlobalISel/irtranslator/split_args.ll | 106 +++++++++++++++ test/tools/llvm-mca/X86/BtVer2/resources-avx1.s | 34 ++--- test/tools/llvm-mca/X86/BtVer2/resources-sse1.s | 18 +-- test/tools/llvm-mca/X86/BtVer2/resources-sse2.s | 18 +-- 7 files changed, 253 insertions(+), 98 deletions(-) create mode 100644 test/CodeGen/Mips/GlobalISel/irtranslator/split_args.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[llvm] branch master updated (965ed082b4d -> edfa885345d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 965ed082b4d [llvm-mca] Remove redundant namespace prefixes. NFC new edfa885345d Split invocations in CodeGen/X86/cpus.ll among multiple tes [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/CodeGen/X86/cpus-amd.ll | 32 +++++++++ test/CodeGen/X86/cpus-intel.ll | 52 ++++++++++++++ test/CodeGen/X86/cpus-no-x86_64.ll | 37 ++++++++++ test/CodeGen/X86/cpus-other.ll | 21 ++++++ test/CodeGen/X86/cpus.ll | 137 ------------------------------------- 5 files changed, 142 insertions(+), 137 deletions(-) create mode 100644 test/CodeGen/X86/cpus-amd.ll create mode 100644 test/CodeGen/X86/cpus-intel.ll create mode 100644 test/CodeGen/X86/cpus-no-x86_64.ll create mode 100644 test/CodeGen/X86/cpus-other.ll delete mode 100644 test/CodeGen/X86/cpus.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[gcc] branch master updated (5d580028ffe -> 0e59d2fbb80)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 5d580028ffe Simplify vec_merge according to the mask. new 0e59d2fbb80 2018-09-28 Richard Biener <rguenther(a)suse.de> The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 17 +++++++++++++++++ gcc/auto-profile.c | 11 ++--------- gcc/cp/ChangeLog | 5 +++++ gcc/cp/error.c | 10 ---------- gcc/langhooks.c | 10 ---------- gcc/omp-expand.c | 2 +- gcc/optinfo-emit-json.cc | 6 ------ gcc/tree-inline.c | 2 +- gcc/tree-pretty-print.c | 24 ------------------------ gcc/tree-ssa-live.c | 7 +------ gcc/tree.c | 17 +---------------- gcc/tree.h | 2 ++ 12 files changed, 30 insertions(+), 83 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/llvm-kernel-armv8l-good updated (ad08e9096a61 -> 93dbd2e1f5c4)

by tcwg-buildslave

This is an automated email from the git hooks/post-receive script. "tcwg-buildslave pushed a change to branch linaro-local/ci/llvm-kernel-armv8l-good in repository toolchain/ci/llvm-monorepo. from ad08e9096a61 Update CallFrameString API to account for r343114 adds 76cd9e1a31a0 [X86][Btver2] Add uops counter for exegesis reports adds fe5197ada296 [PowerPC] [NFC] Refactor code for printing register operands adds 51ad98a36588 [COFF] Add missing Requires x86 to fix buildbot adds 7d96f08c7773 Improve diagnostics range reporting. adds 537253988134 [clang-tidy] use CHECK-NOTES in tests for bugprone-forward [...] adds f2f1220c0514 [clang-tidy] use CHECK-NOTES in tests for bugprone-use-after-move adds efc78e69693d [X86][Btver2] TZCNT instructions take 2uops not 1 adds 629837acfacc [clang-tidy] use CHECK-NOTES in tests for bugprone suspici [...] adds 0984051d9b23 [Sparc] Add support for the partial write PSR instruction adds 06ab8f26bfb8 [Sparc] Add unimp alias adds f7927bf316fe [Lex] TokenConcatenation now takes const Preprocessor adds 0fb92b0c48af Revert untintentionally commited changes adds 59eb772362d5 [OpenCL] Improve extension-version.cl and to_addr_builtin. [...] adds 6e1075e2999b [llvm-exegesis] Fix PR39096. adds 63725141a660 [AArch64][v8.5A] Add FRINT[32,64][Z,X] instructions adds 597852007d19 [Sparc] Remove the support for builtin setjmp/longjmp adds cb9468ece1f4 [AArch64][v8.5A] Add speculation barrier to AArch64 instru [...] adds 1aafada812de [IslAst] Fix InParallelFor nesting. adds 78ff42780c0c [ARM][v8.5A] Add speculation barrier to ARM & Thumb instru [...] adds 0c0ee6e015ac [AArch64][v8.5A] Add prediction invalidation instructions [...] adds 6300beb04a34 The llvm-exegesis output file is a html file not a txt file. adds ed43db23b048 [AArch64][v8.5A] Add Armv8.5-A "DC CVADP" instruction adds 9c4e947161f9 [AArch64][v8.5A] Add Armv8.5-A random number instructions adds d98ff484dc46 [AArch64][v8.5A] Add speculation restriction system registers adds dee872f194fb [AArch64][v8.5A] Test optional Armv8.5-A random number extension adds 13530d3070b8 Tell whether file/folder for include completions. adds d45395cae0dd [InstCombine] add tests for FP sign-bit cmp optimization w [...] adds 23ef65a31967 [clangd] Make IncludeInserter less slow. NFC adds e2d9155968e8 [Tooling] Get rid of uses of llvm::Twine::str which is slow. NFC adds aff19c15cb5e [AArch64][v8.5A] Add Branch Target Identification instructions adds 4475e2a470d1 [WPD] Fix incorrect devirtualization after indirect call p [...] adds 0ffc2c848b55 [X86][Btver2] BLSI/BLSMSK/BLSR instructions take 2uops not [...] adds dd5ce95dad97 [InstCombine] Without infinites, fold (C / X) < 0.0 --> (X < 0) adds 49c1caaf4bc2 [AArch64][v8.5A] Add speculation barriers SSBB and PSSBB adds 8b619ee8e15d [OpenMP] Improve search for libomptarget-nvptx adds 68594ad81d18 [AArch64] Refactor immediate details out of add/sub tblgen [...] adds 7fca178b6ba9 [Sparc] EXPENSIVE_CHECKS now passes all machine verifier e [...] adds 442672a074c3 [X86] Split BT and BTC/BTR/BTS scheduler classes adds d13bd4c0921f [X86][Btver2] BTC/BTR/BTS instructions take 2uops not 1 adds 981944c90fb6 Revert r343192 as an ubsan build is currently failing adds 38caf2550c64 Revert r343193 together with r343192 adds 3c5e1c821e2b Introduce completionItemKind capability support. adds efd4e04aa492 [X86][Btver2] (V)MPSADBW instructions take 3uops not 1 adds 906f015c7e37 [analyzer] Highlight nodes which have error reports in the [...] adds 78ea0b9bcbda Fix greedy FileCheck expression in test/Driver/mips-abi.c adds b3d67a743af1 [X86] Remove BT/BTC/BTR/BTS rr/ri overrides adds 3f63f30ece6c Add an interactive mode to BSD archive parser. adds 544a79b489f4 Fixes for GDB remote packet disassembler: adds 89eafde03f99 [ScalarizeMaskedMemIntrin] Don't emit 'icmp eq i1 %x, 1' t [...] adds 6318a6243c37 [compiler-rt] [builtins] Restore tests from r342917 (disab [...] adds 9707b1307dcf [sanitizer] Introduce a new SizeClassMap with minimal amou [...] adds a353bd5a2f5c [clangd] Add more tracing to index queries. NFC adds 17d2f2947d99 [clangd] Initial supoprt for cross-namespace global code c [...] adds 780d8603fbfb [AMDGPU] Fold copy (copy vgpr) adds adb88347949c [compiler-rt][ubsan][NFC] Slight test cleanup in preparati [...] adds be4d202c8404 [clang][ubsan][NFC] Slight test cleanup in preparation for D50901 adds 019c8bf4951f [sanitizer] Disable failing Android test after D52371 adds 58c54e7a5aad [OpenMP] Make default distribute schedule for NVPTX target [...] adds 782b84d12832 AMDGPU/NFC: Simplify VOP_MAC_F16/F32 adds 00eb18442b93 [lli] Fix ArgV setup bug when running in -jit-kind=orc-lazy mode. adds a08a82d39163 [ORC] LastKey needs to be protected to prevent data races. adds 2bc5b9d85628 [ORC] Coalesce all of ORC's symbol renaming / linkage-prom [...] adds 733f399ddb41 Test commit. NFC adds 96a1454465df AMDGPU: Split VOP2Inst into VOP2Inst_e32/e64/sdwa adds 8f8f51dafca5 [OpenMP] Make default parallel for schedule in NVPTX targe [...] adds 816384779b35 [ORC] Lock ThreadSafeContext during Module destructing in [...] adds 3bf03f083073 [ORC] Make LocalIndirectStubsManager's operations thread-safe. adds a337eec5f158 NFC: Fix some darwin linker warnings introduced in r338385 adds c52ef693f40e AMDGPU: Split HasExt into HasExtDPP/SDWA/SDWA9 adds fa09fc854912 [WebAssembly] Add --[no]-export-dynamic to replace --expor [...] adds c9ce7a5f39b1 [ORC] Add definition for IRLayer::setCloneToNewContextOnEm [...] adds 053ea06914fe [ScalarizeMaskedMemIntrin] Cleanup comments. NFC adds a82089e91c6e [ScalarizeMaskedMemIntrin] Remove some temporary variables [...] adds 6a3c26b52f6d [ScalarizeMaskedMemIntrin] Add dedicated IR only tests for [...] adds 22589ff5d889 [ScalarizeMaskedMemIntrin] Handle the case where the mask [...] adds 745b5ffc5932 [ScalarizeMaskedMemIntrin] When expanding masked loads, st [...] adds b3e85005755b [ScalarizeMaskedMemIntrin] Add some IR only test cases for [...] adds 0b81fac420b8 [ScalarizeMaskedMemIntrin] When expanding masked gathers, [...] adds 553a7cee0f07 WebAssembly: Rename GetSignature to GetLibcallSignature [NFC] adds 2f1865a462b9 [analyzer] Hotfix for the bug in exploded graph printing adds ae88691b9a93 [ScalarizeMaskedMemIntrin] Use cast instead of dyn_cast ch [...] adds e3dd0218674b [ScalarizeMaskedMemIntrin] Ensure the mask is a vector of [...] adds bb15c838af2e [cxx2a] P0624R2: Lambdas with no capture-default are defau [...] adds 8c26b8c6426f [XRay] Add LD_LIBRARY_PATH to env variables for Unit Tests adds 1c160f068fd2 [X86] Add the test case from PR38986. adds bdc09736b1ee [XRay] Fix argv0-log-file-name.cc race when tests are exec [...] adds 79060e58e893 [ScalarizeMaskedMemIntrin] Add test cases for masked store [...] adds 0f8225a1e444 [ScalarizeMaskedMemIntrin] Fix the alignment calculation f [...] adds 2aabe1e28220 [cxx2a] P0641R2: (Some) type mismatches on defaulted funct [...] adds 6af07e81e6e5 [ORC] Lock ThreadSafeContext during module destruction in [...] adds dc7d1e34966f [ORC] Add a const version of ThreadSafeModule::getModule(). adds 13bdd271378e [ORC] clang-format the ThreadSafeModule code. adds a0d99b389ae0 [XRay] Guard local variables with `static` and struct with [...] adds 18b8d4e7a52e merge-request.sh: Add 7.0 metabug adds e956a994c2c3 [pdb] Simplify the code by replacing a few string conversi [...] adds 8603757eb82d [lldb] Remove an assertion in RichManglingContext::GetBuff [...] adds dcbf2450ed0a Handle dependent class template names in class template ar [...] adds f8e3fa0f06bc [ScalarizeMaskedMemIntrin] Use MinAlign to calculate align [...] adds 22fb019d9db4 [XRay] Fix fdr-thread-order.cc when current directory cont [...] adds 26725acf2177 Test commit. NFC. adds a09f502a7eea [CodeGen] fix broken successor probability in MBB dump adds 12e2986adbaa [PDB] Handle `char` as a builtin type adds d2d4854e5887 [X86][BtVer2] Fix PHMINPOS schedule resources typo adds 93b21edfdd60 [ARM][v8.5A] Add speculation barriers SSBB and PSSBB adds cabec6ff962a Remove extra whitespace. NFC. (test commit) adds 537172cff2ad [ARM] Allow execute only code on Cortex-m23 adds eb8db536ae40 [ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k adds 0fa18f04bfe2 [ARM] Alter test to account for change to armv6k default CPU adds 3b204378fe5e [ClangFormat] 'try' of function-try-block doesn't obey Bra [...] adds 2d3fd448c5cf [docs] Fix links in Clangd documentation adds 28ed7674e36a [llvm-mca] Teach how to track zero registers in class Regi [...] adds 9b5626b4ae31 [LoopInterchange] Turn into a loop pass. adds 9f7570b9aa7f [ARM] Prevent DSP and SIM32 being set for v6m adds c99ed357e9e4 Revert r343308: [LoopInterchange] Turn into a loop pass. adds f2d8a1938272 [X86][Btver2] Fix BSF/BSR schedule adds 93dbd2e1f5c4 [llvm-mca] Remove redundant namespace prefixes. NFC No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 26 +- clang-tools-extra/clangd/ClangdLSPServer.h | 2 + clang-tools-extra/clangd/CodeComplete.cpp | 56 +++- clang-tools-extra/clangd/CodeComplete.h | 7 + clang-tools-extra/clangd/Diagnostics.cpp | 11 + clang-tools-extra/clangd/Headers.cpp | 12 +- clang-tools-extra/clangd/Headers.h | 6 +- clang-tools-extra/clangd/Protocol.cpp | 51 +++ clang-tools-extra/clangd/Protocol.h | 80 +++-- clang-tools-extra/clangd/index/Index.h | 6 + clang-tools-extra/clangd/index/MemIndex.cpp | 11 +- clang-tools-extra/clangd/index/Merge.cpp | 17 +- clang-tools-extra/clangd/index/dex/Dex.cpp | 11 + clang-tools-extra/clangd/tool/ClangdMain.cpp | 10 + clang-tools-extra/docs/clangd.rst | 6 +- .../bugprone-forward-declaration-namespace.cpp | 44 +-- .../bugprone-suspicious-enum-usage-strict.cpp | 20 +- .../clang-tidy/bugprone-suspicious-enum-usage.cpp | 4 +- .../test/clang-tidy/bugprone-use-after-move.cpp | 220 ++++++------- .../unittests/clangd/ClangdUnitTests.cpp | 12 +- .../unittests/clangd/CodeCompleteTests.cpp | 72 ++++ clang-tools-extra/unittests/clangd/DexTests.cpp | 11 + clang/include/clang/AST/DeclCXX.h | 14 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 15 + clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Lex/TokenConcatenation.h | 4 +- clang/lib/AST/DeclCXX.cpp | 18 + clang/lib/Basic/Targets/ARM.cpp | 2 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 12 + clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 23 ++ clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 10 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 8 + clang/lib/Driver/CMakeLists.txt | 2 +- clang/lib/Driver/Driver.cpp | 2 +- clang/lib/Driver/ToolChains/Cuda.cpp | 20 +- .../ToolChains/{RISCV.cpp => RISCVToolchain.cpp} | 4 +- .../ToolChains/{RISCV.h => RISCVToolchain.h} | 8 +- clang/lib/Format/UnwrappedLineParser.cpp | 2 + clang/lib/Lex/TokenConcatenation.cpp | 4 +- clang/lib/Sema/SemaDeclCXX.cpp | 62 +++- clang/lib/Sema/SemaExpr.cpp | 11 + clang/lib/Sema/SemaInit.cpp | 5 +- clang/lib/Sema/TreeTransform.h | 2 +- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 92 ++++-- clang/lib/Tooling/Inclusions/HeaderIncludes.cpp | 9 +- .../test/CXX/class.derived/class.abstract/p16.cpp | 4 +- .../dcl.fct.def/dcl.fct.def.default/p1.cpp | 51 ++- clang/test/CXX/drs/dr6xx.cpp | 4 +- clang/test/CXX/special/class.copy/p12-0x.cpp | 2 +- clang/test/CXX/special/class.copy/p23-cxx11.cpp | 2 +- clang/test/CXX/special/class.ctor/p5-0x.cpp | 2 +- clang/test/CXX/special/class.dtor/p5-0x.cpp | 2 +- .../catch-implicit-integer-conversions-basics.c | 16 - ...implicit-integer-truncations-basics-negatives.c | 58 ++++ .../catch-implicit-integer-truncations-basics.c | 16 - .../CodeGen/catch-implicit-integer-truncations.c | 63 +--- clang/test/Driver/aarch64-rand.c | 13 + clang/test/Driver/arm-cortex-cpus.c | 4 +- clang/test/Driver/mips-abi.c | 6 +- clang/test/Driver/openmp-offload-gpu.c | 21 ++ ...arget_teams_distribute_parallel_for_codegen.cpp | 14 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 14 +- clang/test/Preprocessor/arm-acle-6.4.c | 7 + clang/test/SemaCUDA/implicit-member-target.cu | 2 +- clang/test/SemaCXX/cxx0x-deleted-default-ctor.cpp | 6 +- clang/test/SemaCXX/cxx17-compat.cpp | 29 +- .../cxx1z-class-template-argument-deduction.cpp | 7 + .../SemaCXX/cxx2a-lambda-default-ctor-assign.cpp | 37 +++ clang/test/SemaCXX/dr1301.cpp | 6 +- clang/test/SemaCXX/microsoft-dtor-lookup-cxx11.cpp | 4 +- clang/test/SemaOpenCL/extension-version.cl | 12 + clang/test/SemaOpenCL/to_addr_builtin.cl | 76 +++++ clang/test/SemaTemplate/exception-spec-crash.cpp | 4 +- clang/unittests/Format/FormatTest.cpp | 10 + clang/www/cxx_status.html | 4 +- .../sanitizer_allocator_size_class_map.h | 5 + .../tests/sanitizer_allocator_test.cc | 18 + compiler-rt/lib/xray/tests/CMakeLists.txt | 10 +- compiler-rt/lib/xray/xray_basic_logging.cc | 12 +- compiler-rt/lib/xray/xray_fdr_logging.cc | 5 +- .../test/builtins/Unit/compiler_rt_logb_test.c | 4 +- .../test/builtins/Unit/compiler_rt_logbf_test.c | 4 +- .../test/builtins/Unit/compiler_rt_logbl_test.c | 4 +- .../ImplicitConversion/integer-conversion.c | 332 ++++++++++++++++--- .../ImplicitConversion/integer-truncation.c | 363 ++++++++++++++++++--- .../xray/TestCases/Posix/argv0-log-file-name.cc | 2 +- .../test/xray/TestCases/Posix/fdr-thread-order.cc | 19 +- compiler-rt/test/xray/Unit/lit.site.cfg.in | 8 + .../unittests/lit.common.unit.configured.in | 1 + lld/test/COFF/pdb-debug-f.s | 1 + lld/test/wasm/alias.ll | 2 +- lld/test/wasm/archive-export.ll | 4 +- lld/test/wasm/call-indirect.ll | 2 +- lld/test/wasm/comdats.ll | 2 +- lld/test/wasm/compress-relocs.ll | 6 +- lld/test/wasm/cxx-mangling.ll | 4 +- lld/test/wasm/local-symbols.ll | 3 +- lld/test/wasm/locals-duplicate.test | 2 +- lld/test/wasm/lto/archive.ll | 2 +- lld/test/wasm/undefined-weak-call.ll | 2 +- lld/test/wasm/visibility-hidden.ll | 21 +- lld/test/wasm/weak-alias-overide.ll | 2 +- lld/test/wasm/weak-alias.ll | 2 +- lld/test/wasm/weak-symbols.ll | 15 +- lld/test/wasm/weak-undefined.ll | 11 +- lld/wasm/Config.h | 2 +- lld/wasm/Driver.cpp | 13 +- lld/wasm/Options.td | 19 +- lld/wasm/Symbols.cpp | 6 +- lldb/examples/python/bsd.py | 105 +++++- lldb/examples/python/gdbremote.py | 190 +++++++---- lldb/include/lldb/Core/RichManglingContext.h | 1 - lldb/lit/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp | 3 + lldb/lit/SymbolFile/PDB/ast-restore.test | 2 +- lldb/lit/SymbolFile/PDB/func-symbols.test | 2 +- lldb/lit/SymbolFile/PDB/typedefs.test | 5 +- .../Plugins/SymbolFile/DWARF/DWARFDefines.cpp | 4 +- .../source/Plugins/SymbolFile/DWARF/DWARFDefines.h | 2 +- .../source/Plugins/SymbolFile/PDB/PDBASTParser.cpp | 2 + lldb/unittests/Core/RichManglingContextTest.cpp | 23 ++ llvm/docs/CommandGuide/llvm-exegesis.rst | 2 +- llvm/include/llvm/Analysis/TypeMetadataUtils.h | 7 +- llvm/include/llvm/BinaryFormat/Dwarf.def | 15 +- llvm/include/llvm/BinaryFormat/Dwarf.h | 4 +- llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 3 +- .../include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h | 26 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.h | 32 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 4 +- .../llvm/ExecutionEngine/Orc/IndirectionUtils.h | 29 +- llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 1 + llvm/include/llvm/ExecutionEngine/Orc/Layer.h | 4 +- .../llvm/ExecutionEngine/Orc/ThreadSafeModule.h | 56 +++- llvm/include/llvm/MC/MCDwarf.h | 6 - llvm/include/llvm/MC/MCStreamer.h | 1 - llvm/include/llvm/Support/AArch64TargetParser.def | 1 + llvm/include/llvm/Support/ARMTargetParser.def | 5 +- llvm/include/llvm/Support/TargetParser.h | 1 + llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 23 +- llvm/lib/Analysis/TypeMetadataUtils.cpp | 42 ++- llvm/lib/BinaryFormat/Dwarf.cpp | 20 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp | 3 - llvm/lib/CodeGen/CFIInstrInserter.cpp | 1 - llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 - llvm/lib/CodeGen/MIRParser/MILexer.h | 1 - llvm/lib/CodeGen/MIRParser/MIParser.cpp | 4 - llvm/lib/CodeGen/MachineBasicBlock.cpp | 2 +- llvm/lib/CodeGen/MachineOperand.cpp | 5 - llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 266 +++++++-------- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 8 +- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 13 +- llvm/lib/DebugInfo/PDB/DIA/DIADataStream.cpp | 14 +- llvm/lib/DebugInfo/PDB/DIA/DIAEnumTables.cpp | 5 +- llvm/lib/DebugInfo/PDB/DIA/DIARawSymbol.cpp | 12 +- llvm/lib/DebugInfo/PDB/DIA/DIASourceFile.cpp | 14 +- llvm/lib/DebugInfo/PDB/DIA/DIATable.cpp | 17 +- llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp | 64 +--- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 44 +-- llvm/lib/ExecutionEngine/Orc/ThreadSafeModule.cpp | 8 +- llvm/lib/MC/MCAsmStreamer.cpp | 7 - llvm/lib/MC/MCDwarf.cpp | 4 - llvm/lib/MC/MCStreamer.cpp | 9 - llvm/lib/Target/AArch64/AArch64.td | 30 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 6 - llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 84 ++++- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 39 ++- llvm/lib/Target/AArch64/AArch64Subtarget.h | 14 + llvm/lib/Target/AArch64/AArch64SystemOperands.td | 64 ++++ .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 105 +++++- .../AArch64/Disassembler/AArch64Disassembler.cpp | 3 +- .../AArch64/InstPrinter/AArch64InstPrinter.cpp | 40 ++- .../AArch64/InstPrinter/AArch64InstPrinter.h | 3 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 2 +- llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | 14 + llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h | 16 + llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 14 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 8 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 9 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 80 +++-- llvm/lib/Target/AMDGPU/VOPInstructions.td | 22 +- llvm/lib/Target/ARM/ARM.td | 7 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 14 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 14 + llvm/lib/Target/ARM/ARMSubtarget.cpp | 6 +- llvm/lib/Target/ARM/ARMSubtarget.h | 4 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 24 +- llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 15 + .../Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 37 +-- .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 27 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 41 +-- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 19 ++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 17 + llvm/lib/Target/PowerPC/PPCRegisterInfo.td | 8 +- llvm/lib/Target/Sparc/Sparc.td | 6 +- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 227 ------------- llvm/lib/Target/Sparc/SparcISelLowering.h | 12 - llvm/lib/Target/Sparc/SparcInstrAliases.td | 5 + llvm/lib/Target/Sparc/SparcInstrInfo.td | 47 +-- llvm/lib/Target/Sparc/SparcSubtarget.cpp | 1 + llvm/lib/Target/Sparc/SparcSubtarget.h | 2 + llvm/lib/Target/Sparc/SparcTargetMachine.h | 4 - .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 2 +- .../WebAssemblyRuntimeLibcallSignatures.cpp | 16 +- .../WebAssemblyRuntimeLibcallSignatures.h | 17 +- llvm/lib/Target/X86/X86InstrInfo.td | 12 +- llvm/lib/Target/X86/X86PfmCounters.td | 1 + llvm/lib/Target/X86/X86SchedBroadwell.td | 5 +- llvm/lib/Target/X86/X86SchedHaswell.td | 5 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 5 +- llvm/lib/Target/X86/X86SchedSkylakeClient.td | 5 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 5 +- llvm/lib/Target/X86/X86Schedule.td | 1 + llvm/lib/Target/X86/X86ScheduleAtom.td | 6 +- llvm/lib/Target/X86/X86ScheduleBtVer2.td | 16 +- llvm/lib/Target/X86/X86ScheduleSLM.td | 5 +- llvm/lib/Target/X86/X86ScheduleZnver1.td | 11 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 61 ++-- .../Transforms/InstCombine/InstCombineCompares.cpp | 55 ++++ llvm/test/CodeGen/AArch64/sign-return-address.ll | 22 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 27 ++ .../CodeGen/ARM/execute-only-big-stack-frame.ll | 2 + llvm/test/CodeGen/ARM/execute-only-section.ll | 1 + llvm/test/CodeGen/ARM/execute-only.ll | 1 + llvm/test/CodeGen/MIR/AArch64/cfi.mir | 2 - llvm/test/CodeGen/SPARC/sjlj.ll | 93 ------ llvm/test/CodeGen/X86/avx2-masked-gather.ll | 358 +++++++++----------- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 157 ++++----- .../CodeGen/X86/masked_gather_scatter_widen.ll | 42 +-- llvm/test/CodeGen/X86/masked_memop.ll | 97 +++--- llvm/test/CodeGen/X86/schedule-x86_64.ll | 24 +- llvm/test/CodeGen/X86/sse41-schedule.ll | 4 +- llvm/test/MC/AArch64/armv8.5a-bti-error.s | 12 + llvm/test/MC/AArch64/armv8.5a-bti.s | 37 +++ llvm/test/MC/AArch64/armv8.5a-frint-error.s | 52 +++ llvm/test/MC/AArch64/armv8.5a-frint.s | 92 ++++++ llvm/test/MC/AArch64/armv8.5a-persistent-memory.s | 7 + llvm/test/MC/AArch64/armv8.5a-predctrl-error.s | 20 ++ llvm/test/MC/AArch64/armv8.5a-predctrl.s | 18 + llvm/test/MC/AArch64/armv8.5a-rand-error.s | 17 + llvm/test/MC/AArch64/armv8.5a-rand.s | 14 + llvm/test/MC/AArch64/armv8.5a-specctrl.s | 11 + llvm/test/MC/AArch64/armv8.5a-specrestrict-error.s | 10 + llvm/test/MC/AArch64/armv8.5a-specrestrict.s | 69 ++++ llvm/test/MC/AArch64/basic-a64-instructions.s | 4 +- .../MC/AArch64/{csdb.s => speculation-barriers.s} | 7 +- llvm/test/MC/ARM/armv8.5a-specctrl-error-thumb.s | 6 + llvm/test/MC/ARM/armv8.5a-specctrl-error.s | 5 + llvm/test/MC/ARM/armv8.5a-specctrl.s | 15 + llvm/test/MC/ARM/basic-arm-instructions.s | 4 +- llvm/test/MC/ARM/basic-thumb2-instructions.s | 4 +- llvm/test/MC/ARM/csdb-errors.s | 6 - llvm/test/MC/ARM/csdb.s | 8 - llvm/test/MC/ARM/speculation-barriers-errors.s | 34 ++ llvm/test/MC/ARM/speculation-barriers.s | 22 ++ llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt | 18 + .../MC/Disassembler/AArch64/armv8.5a-dataproc.txt | 99 +++++- .../AArch64/armv8.5a-persistent-memory.txt | 7 + .../MC/Disassembler/AArch64/armv8.5a-predctrl.txt | 15 + .../test/MC/Disassembler/AArch64/armv8.5a-rand.txt | 12 + .../MC/Disassembler/AArch64/armv8.5a-specctrl.txt | 9 + .../Disassembler/AArch64/armv8.5a-specrestrict.txt | 52 +++ .../AArch64/basic-a64-instructions.txt | 2 - .../AArch64/{csdb.txt => speculation-barriers.txt} | 7 +- .../Disassembler/ARM/armv8.5a-specctrl-thumb.txt | 9 + .../test/MC/Disassembler/ARM/armv8.5a-specctrl.txt | 9 + .../MC/Disassembler/ARM/basic-arm-instructions.txt | 4 +- llvm/test/MC/Disassembler/ARM/thumb2.txt | 4 +- llvm/test/MC/Sparc/leon-pwrpsr-instruction.s | 10 + llvm/test/MC/Sparc/sparc-misc-instructions.s | 8 + llvm/test/Other/X86/mbb-dump.ll | 25 ++ llvm/test/ThinLTO/X86/devirt-after-icp.ll | 148 +++++++++ llvm/test/Transforms/InstCombine/fcmp.ll | 91 ++++++ .../X86/expand-masked-gather.ll | 63 ++++ .../X86/expand-masked-load.ll | 119 +++++++ .../X86/expand-masked-store.ll | 59 ++++ .../analysis-inconsistencies-uops-backwards.test | 28 ++ .../X86/analysis-inconsistencies-uops.test | 28 ++ .../llvm-mca/X86/BtVer2/clear-super-register-1.s | 36 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 12 +- .../tools/llvm-mca/X86/BtVer2/resources-bmi1.s | 32 +- .../tools/llvm-mca/X86/BtVer2/resources-sse41.s | 12 +- .../tools/llvm-mca/X86/BtVer2/resources-x86_64.s | 86 ++--- llvm/tools/lli/lli.cpp | 6 +- llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 53 ++- .../llvm-mca/include/HardwareUnits/RegisterFile.h | 34 +- llvm/tools/llvm-mca/include/Instruction.h | 25 +- .../llvm-mca/lib/HardwareUnits/RegisterFile.cpp | 51 ++- .../llvm-mca/lib/HardwareUnits/ResourceManager.cpp | 12 +- .../lib/HardwareUnits/RetireControlUnit.cpp | 2 +- llvm/tools/llvm-mca/lib/InstrBuilder.cpp | 21 +- llvm/tools/llvm-mca/lib/Instruction.cpp | 4 +- llvm/tools/llvm-mca/lib/Pipeline.cpp | 12 +- llvm/tools/llvm-mca/lib/Stages/DispatchStage.cpp | 10 +- llvm/tools/llvm-mca/lib/Stages/ExecuteStage.cpp | 6 +- llvm/tools/llvm-mca/llvm-mca.cpp | 2 +- llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 13 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 81 ++--- .../ExecutionEngine/Orc/ThreadSafeModuleTest.cpp | 6 +- llvm/unittests/Support/TargetParserTest.cpp | 9 +- llvm/utils/release/merge-request.sh | 3 + polly/include/polly/CodeGen/IslAst.h | 6 +- polly/lib/CodeGen/IslAst.cpp | 38 +-- polly/test/ScheduleOptimizer/SIMDInParallelFor.ll | 65 ++++ .../full_partial_tile_separation.ll | 4 + 305 files changed, 5242 insertions(+), 2404 deletions(-) rename clang/lib/Driver/ToolChains/{RISCV.cpp => RISCVToolchain.cpp} (98%) rename clang/lib/Driver/ToolChains/{RISCV.h => RISCVToolchain.h} (88%) create mode 100644 clang/test/CodeGen/catch-implicit-integer-truncations-basics-ne [...] create mode 100644 clang/test/Driver/aarch64-rand.c create mode 100644 clang/test/SemaCXX/cxx2a-lambda-default-ctor-assign.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir delete mode 100644 llvm/test/CodeGen/SPARC/sjlj.ll create mode 100644 llvm/test/MC/AArch64/armv8.5a-bti-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-bti.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-frint-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-frint.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-persistent-memory.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-predctrl-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-predctrl.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-rand-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-rand.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specctrl.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specrestrict-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specrestrict.s rename llvm/test/MC/AArch64/{csdb.s => speculation-barriers.s} (52%) create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl-error-thumb.s create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl-error.s create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl.s delete mode 100644 llvm/test/MC/ARM/csdb-errors.s delete mode 100644 llvm/test/MC/ARM/csdb.s create mode 100644 llvm/test/MC/ARM/speculation-barriers-errors.s create mode 100644 llvm/test/MC/ARM/speculation-barriers.s create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-persistent-memory.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-rand.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-specctrl.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-specrestrict.txt rename llvm/test/MC/Disassembler/AArch64/{csdb.txt => speculation-barriers.txt} (50%) create mode 100644 llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl-thumb.txt create mode 100644 llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl.txt create mode 100644 llvm/test/MC/Sparc/leon-pwrpsr-instruction.s create mode 100644 llvm/test/MC/Sparc/sparc-misc-instructions.s create mode 100644 llvm/test/Other/X86/mbb-dump.ll create mode 100644 llvm/test/ThinLTO/X86/devirt-after-icp.ll create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/tools/llvm-exegesis/X86/analysis-inconsistencies-uops [...] create mode 100644 llvm/test/tools/llvm-exegesis/X86/analysis-inconsistencies-uops.test create mode 100644 polly/test/ScheduleOptimizer/SIMDInParallelFor.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/llvm-kernel-aarch64-good updated (ad08e9096a61 -> 93dbd2e1f5c4)

by tcwg-buildslave

This is an automated email from the git hooks/post-receive script. "tcwg-buildslave pushed a change to branch linaro-local/ci/llvm-kernel-aarch64-good in repository toolchain/ci/llvm-monorepo. from ad08e9096a61 Update CallFrameString API to account for r343114 adds 76cd9e1a31a0 [X86][Btver2] Add uops counter for exegesis reports adds fe5197ada296 [PowerPC] [NFC] Refactor code for printing register operands adds 51ad98a36588 [COFF] Add missing Requires x86 to fix buildbot adds 7d96f08c7773 Improve diagnostics range reporting. adds 537253988134 [clang-tidy] use CHECK-NOTES in tests for bugprone-forward [...] adds f2f1220c0514 [clang-tidy] use CHECK-NOTES in tests for bugprone-use-after-move adds efc78e69693d [X86][Btver2] TZCNT instructions take 2uops not 1 adds 629837acfacc [clang-tidy] use CHECK-NOTES in tests for bugprone suspici [...] adds 0984051d9b23 [Sparc] Add support for the partial write PSR instruction adds 06ab8f26bfb8 [Sparc] Add unimp alias adds f7927bf316fe [Lex] TokenConcatenation now takes const Preprocessor adds 0fb92b0c48af Revert untintentionally commited changes adds 59eb772362d5 [OpenCL] Improve extension-version.cl and to_addr_builtin. [...] adds 6e1075e2999b [llvm-exegesis] Fix PR39096. adds 63725141a660 [AArch64][v8.5A] Add FRINT[32,64][Z,X] instructions adds 597852007d19 [Sparc] Remove the support for builtin setjmp/longjmp adds cb9468ece1f4 [AArch64][v8.5A] Add speculation barrier to AArch64 instru [...] adds 1aafada812de [IslAst] Fix InParallelFor nesting. adds 78ff42780c0c [ARM][v8.5A] Add speculation barrier to ARM & Thumb instru [...] adds 0c0ee6e015ac [AArch64][v8.5A] Add prediction invalidation instructions [...] adds 6300beb04a34 The llvm-exegesis output file is a html file not a txt file. adds ed43db23b048 [AArch64][v8.5A] Add Armv8.5-A "DC CVADP" instruction adds 9c4e947161f9 [AArch64][v8.5A] Add Armv8.5-A random number instructions adds d98ff484dc46 [AArch64][v8.5A] Add speculation restriction system registers adds dee872f194fb [AArch64][v8.5A] Test optional Armv8.5-A random number extension adds 13530d3070b8 Tell whether file/folder for include completions. adds d45395cae0dd [InstCombine] add tests for FP sign-bit cmp optimization w [...] adds 23ef65a31967 [clangd] Make IncludeInserter less slow. NFC adds e2d9155968e8 [Tooling] Get rid of uses of llvm::Twine::str which is slow. NFC adds aff19c15cb5e [AArch64][v8.5A] Add Branch Target Identification instructions adds 4475e2a470d1 [WPD] Fix incorrect devirtualization after indirect call p [...] adds 0ffc2c848b55 [X86][Btver2] BLSI/BLSMSK/BLSR instructions take 2uops not [...] adds dd5ce95dad97 [InstCombine] Without infinites, fold (C / X) < 0.0 --> (X < 0) adds 49c1caaf4bc2 [AArch64][v8.5A] Add speculation barriers SSBB and PSSBB adds 8b619ee8e15d [OpenMP] Improve search for libomptarget-nvptx adds 68594ad81d18 [AArch64] Refactor immediate details out of add/sub tblgen [...] adds 7fca178b6ba9 [Sparc] EXPENSIVE_CHECKS now passes all machine verifier e [...] adds 442672a074c3 [X86] Split BT and BTC/BTR/BTS scheduler classes adds d13bd4c0921f [X86][Btver2] BTC/BTR/BTS instructions take 2uops not 1 adds 981944c90fb6 Revert r343192 as an ubsan build is currently failing adds 38caf2550c64 Revert r343193 together with r343192 adds 3c5e1c821e2b Introduce completionItemKind capability support. adds efd4e04aa492 [X86][Btver2] (V)MPSADBW instructions take 3uops not 1 adds 906f015c7e37 [analyzer] Highlight nodes which have error reports in the [...] adds 78ea0b9bcbda Fix greedy FileCheck expression in test/Driver/mips-abi.c adds b3d67a743af1 [X86] Remove BT/BTC/BTR/BTS rr/ri overrides adds 3f63f30ece6c Add an interactive mode to BSD archive parser. adds 544a79b489f4 Fixes for GDB remote packet disassembler: adds 89eafde03f99 [ScalarizeMaskedMemIntrin] Don't emit 'icmp eq i1 %x, 1' t [...] adds 6318a6243c37 [compiler-rt] [builtins] Restore tests from r342917 (disab [...] adds 9707b1307dcf [sanitizer] Introduce a new SizeClassMap with minimal amou [...] adds a353bd5a2f5c [clangd] Add more tracing to index queries. NFC adds 17d2f2947d99 [clangd] Initial supoprt for cross-namespace global code c [...] adds 780d8603fbfb [AMDGPU] Fold copy (copy vgpr) adds adb88347949c [compiler-rt][ubsan][NFC] Slight test cleanup in preparati [...] adds be4d202c8404 [clang][ubsan][NFC] Slight test cleanup in preparation for D50901 adds 019c8bf4951f [sanitizer] Disable failing Android test after D52371 adds 58c54e7a5aad [OpenMP] Make default distribute schedule for NVPTX target [...] adds 782b84d12832 AMDGPU/NFC: Simplify VOP_MAC_F16/F32 adds 00eb18442b93 [lli] Fix ArgV setup bug when running in -jit-kind=orc-lazy mode. adds a08a82d39163 [ORC] LastKey needs to be protected to prevent data races. adds 2bc5b9d85628 [ORC] Coalesce all of ORC's symbol renaming / linkage-prom [...] adds 733f399ddb41 Test commit. NFC adds 96a1454465df AMDGPU: Split VOP2Inst into VOP2Inst_e32/e64/sdwa adds 8f8f51dafca5 [OpenMP] Make default parallel for schedule in NVPTX targe [...] adds 816384779b35 [ORC] Lock ThreadSafeContext during Module destructing in [...] adds 3bf03f083073 [ORC] Make LocalIndirectStubsManager's operations thread-safe. adds a337eec5f158 NFC: Fix some darwin linker warnings introduced in r338385 adds c52ef693f40e AMDGPU: Split HasExt into HasExtDPP/SDWA/SDWA9 adds fa09fc854912 [WebAssembly] Add --[no]-export-dynamic to replace --expor [...] adds c9ce7a5f39b1 [ORC] Add definition for IRLayer::setCloneToNewContextOnEm [...] adds 053ea06914fe [ScalarizeMaskedMemIntrin] Cleanup comments. NFC adds a82089e91c6e [ScalarizeMaskedMemIntrin] Remove some temporary variables [...] adds 6a3c26b52f6d [ScalarizeMaskedMemIntrin] Add dedicated IR only tests for [...] adds 22589ff5d889 [ScalarizeMaskedMemIntrin] Handle the case where the mask [...] adds 745b5ffc5932 [ScalarizeMaskedMemIntrin] When expanding masked loads, st [...] adds b3e85005755b [ScalarizeMaskedMemIntrin] Add some IR only test cases for [...] adds 0b81fac420b8 [ScalarizeMaskedMemIntrin] When expanding masked gathers, [...] adds 553a7cee0f07 WebAssembly: Rename GetSignature to GetLibcallSignature [NFC] adds 2f1865a462b9 [analyzer] Hotfix for the bug in exploded graph printing adds ae88691b9a93 [ScalarizeMaskedMemIntrin] Use cast instead of dyn_cast ch [...] adds e3dd0218674b [ScalarizeMaskedMemIntrin] Ensure the mask is a vector of [...] adds bb15c838af2e [cxx2a] P0624R2: Lambdas with no capture-default are defau [...] adds 8c26b8c6426f [XRay] Add LD_LIBRARY_PATH to env variables for Unit Tests adds 1c160f068fd2 [X86] Add the test case from PR38986. adds bdc09736b1ee [XRay] Fix argv0-log-file-name.cc race when tests are exec [...] adds 79060e58e893 [ScalarizeMaskedMemIntrin] Add test cases for masked store [...] adds 0f8225a1e444 [ScalarizeMaskedMemIntrin] Fix the alignment calculation f [...] adds 2aabe1e28220 [cxx2a] P0641R2: (Some) type mismatches on defaulted funct [...] adds 6af07e81e6e5 [ORC] Lock ThreadSafeContext during module destruction in [...] adds dc7d1e34966f [ORC] Add a const version of ThreadSafeModule::getModule(). adds 13bdd271378e [ORC] clang-format the ThreadSafeModule code. adds a0d99b389ae0 [XRay] Guard local variables with `static` and struct with [...] adds 18b8d4e7a52e merge-request.sh: Add 7.0 metabug adds e956a994c2c3 [pdb] Simplify the code by replacing a few string conversi [...] adds 8603757eb82d [lldb] Remove an assertion in RichManglingContext::GetBuff [...] adds dcbf2450ed0a Handle dependent class template names in class template ar [...] adds f8e3fa0f06bc [ScalarizeMaskedMemIntrin] Use MinAlign to calculate align [...] adds 22fb019d9db4 [XRay] Fix fdr-thread-order.cc when current directory cont [...] adds 26725acf2177 Test commit. NFC. adds a09f502a7eea [CodeGen] fix broken successor probability in MBB dump adds 12e2986adbaa [PDB] Handle `char` as a builtin type adds d2d4854e5887 [X86][BtVer2] Fix PHMINPOS schedule resources typo adds 93b21edfdd60 [ARM][v8.5A] Add speculation barriers SSBB and PSSBB adds cabec6ff962a Remove extra whitespace. NFC. (test commit) adds 537172cff2ad [ARM] Allow execute only code on Cortex-m23 adds eb8db536ae40 [ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k adds 0fa18f04bfe2 [ARM] Alter test to account for change to armv6k default CPU adds 3b204378fe5e [ClangFormat] 'try' of function-try-block doesn't obey Bra [...] adds 2d3fd448c5cf [docs] Fix links in Clangd documentation adds 28ed7674e36a [llvm-mca] Teach how to track zero registers in class Regi [...] adds 9b5626b4ae31 [LoopInterchange] Turn into a loop pass. adds 9f7570b9aa7f [ARM] Prevent DSP and SIM32 being set for v6m adds c99ed357e9e4 Revert r343308: [LoopInterchange] Turn into a loop pass. adds f2d8a1938272 [X86][Btver2] Fix BSF/BSR schedule adds 93dbd2e1f5c4 [llvm-mca] Remove redundant namespace prefixes. NFC No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 26 +- clang-tools-extra/clangd/ClangdLSPServer.h | 2 + clang-tools-extra/clangd/CodeComplete.cpp | 56 +++- clang-tools-extra/clangd/CodeComplete.h | 7 + clang-tools-extra/clangd/Diagnostics.cpp | 11 + clang-tools-extra/clangd/Headers.cpp | 12 +- clang-tools-extra/clangd/Headers.h | 6 +- clang-tools-extra/clangd/Protocol.cpp | 51 +++ clang-tools-extra/clangd/Protocol.h | 80 +++-- clang-tools-extra/clangd/index/Index.h | 6 + clang-tools-extra/clangd/index/MemIndex.cpp | 11 +- clang-tools-extra/clangd/index/Merge.cpp | 17 +- clang-tools-extra/clangd/index/dex/Dex.cpp | 11 + clang-tools-extra/clangd/tool/ClangdMain.cpp | 10 + clang-tools-extra/docs/clangd.rst | 6 +- .../bugprone-forward-declaration-namespace.cpp | 44 +-- .../bugprone-suspicious-enum-usage-strict.cpp | 20 +- .../clang-tidy/bugprone-suspicious-enum-usage.cpp | 4 +- .../test/clang-tidy/bugprone-use-after-move.cpp | 220 ++++++------- .../unittests/clangd/ClangdUnitTests.cpp | 12 +- .../unittests/clangd/CodeCompleteTests.cpp | 72 ++++ clang-tools-extra/unittests/clangd/DexTests.cpp | 11 + clang/include/clang/AST/DeclCXX.h | 14 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 15 + clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Lex/TokenConcatenation.h | 4 +- clang/lib/AST/DeclCXX.cpp | 18 + clang/lib/Basic/Targets/ARM.cpp | 2 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 12 + clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 23 ++ clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 10 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 8 + clang/lib/Driver/CMakeLists.txt | 2 +- clang/lib/Driver/Driver.cpp | 2 +- clang/lib/Driver/ToolChains/Cuda.cpp | 20 +- .../ToolChains/{RISCV.cpp => RISCVToolchain.cpp} | 4 +- .../ToolChains/{RISCV.h => RISCVToolchain.h} | 8 +- clang/lib/Format/UnwrappedLineParser.cpp | 2 + clang/lib/Lex/TokenConcatenation.cpp | 4 +- clang/lib/Sema/SemaDeclCXX.cpp | 62 +++- clang/lib/Sema/SemaExpr.cpp | 11 + clang/lib/Sema/SemaInit.cpp | 5 +- clang/lib/Sema/TreeTransform.h | 2 +- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 92 ++++-- clang/lib/Tooling/Inclusions/HeaderIncludes.cpp | 9 +- .../test/CXX/class.derived/class.abstract/p16.cpp | 4 +- .../dcl.fct.def/dcl.fct.def.default/p1.cpp | 51 ++- clang/test/CXX/drs/dr6xx.cpp | 4 +- clang/test/CXX/special/class.copy/p12-0x.cpp | 2 +- clang/test/CXX/special/class.copy/p23-cxx11.cpp | 2 +- clang/test/CXX/special/class.ctor/p5-0x.cpp | 2 +- clang/test/CXX/special/class.dtor/p5-0x.cpp | 2 +- .../catch-implicit-integer-conversions-basics.c | 16 - ...implicit-integer-truncations-basics-negatives.c | 58 ++++ .../catch-implicit-integer-truncations-basics.c | 16 - .../CodeGen/catch-implicit-integer-truncations.c | 63 +--- clang/test/Driver/aarch64-rand.c | 13 + clang/test/Driver/arm-cortex-cpus.c | 4 +- clang/test/Driver/mips-abi.c | 6 +- clang/test/Driver/openmp-offload-gpu.c | 21 ++ ...arget_teams_distribute_parallel_for_codegen.cpp | 14 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 14 +- clang/test/Preprocessor/arm-acle-6.4.c | 7 + clang/test/SemaCUDA/implicit-member-target.cu | 2 +- clang/test/SemaCXX/cxx0x-deleted-default-ctor.cpp | 6 +- clang/test/SemaCXX/cxx17-compat.cpp | 29 +- .../cxx1z-class-template-argument-deduction.cpp | 7 + .../SemaCXX/cxx2a-lambda-default-ctor-assign.cpp | 37 +++ clang/test/SemaCXX/dr1301.cpp | 6 +- clang/test/SemaCXX/microsoft-dtor-lookup-cxx11.cpp | 4 +- clang/test/SemaOpenCL/extension-version.cl | 12 + clang/test/SemaOpenCL/to_addr_builtin.cl | 76 +++++ clang/test/SemaTemplate/exception-spec-crash.cpp | 4 +- clang/unittests/Format/FormatTest.cpp | 10 + clang/www/cxx_status.html | 4 +- .../sanitizer_allocator_size_class_map.h | 5 + .../tests/sanitizer_allocator_test.cc | 18 + compiler-rt/lib/xray/tests/CMakeLists.txt | 10 +- compiler-rt/lib/xray/xray_basic_logging.cc | 12 +- compiler-rt/lib/xray/xray_fdr_logging.cc | 5 +- .../test/builtins/Unit/compiler_rt_logb_test.c | 4 +- .../test/builtins/Unit/compiler_rt_logbf_test.c | 4 +- .../test/builtins/Unit/compiler_rt_logbl_test.c | 4 +- .../ImplicitConversion/integer-conversion.c | 332 ++++++++++++++++--- .../ImplicitConversion/integer-truncation.c | 363 ++++++++++++++++++--- .../xray/TestCases/Posix/argv0-log-file-name.cc | 2 +- .../test/xray/TestCases/Posix/fdr-thread-order.cc | 19 +- compiler-rt/test/xray/Unit/lit.site.cfg.in | 8 + .../unittests/lit.common.unit.configured.in | 1 + lld/test/COFF/pdb-debug-f.s | 1 + lld/test/wasm/alias.ll | 2 +- lld/test/wasm/archive-export.ll | 4 +- lld/test/wasm/call-indirect.ll | 2 +- lld/test/wasm/comdats.ll | 2 +- lld/test/wasm/compress-relocs.ll | 6 +- lld/test/wasm/cxx-mangling.ll | 4 +- lld/test/wasm/local-symbols.ll | 3 +- lld/test/wasm/locals-duplicate.test | 2 +- lld/test/wasm/lto/archive.ll | 2 +- lld/test/wasm/undefined-weak-call.ll | 2 +- lld/test/wasm/visibility-hidden.ll | 21 +- lld/test/wasm/weak-alias-overide.ll | 2 +- lld/test/wasm/weak-alias.ll | 2 +- lld/test/wasm/weak-symbols.ll | 15 +- lld/test/wasm/weak-undefined.ll | 11 +- lld/wasm/Config.h | 2 +- lld/wasm/Driver.cpp | 13 +- lld/wasm/Options.td | 19 +- lld/wasm/Symbols.cpp | 6 +- lldb/examples/python/bsd.py | 105 +++++- lldb/examples/python/gdbremote.py | 190 +++++++---- lldb/include/lldb/Core/RichManglingContext.h | 1 - lldb/lit/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp | 3 + lldb/lit/SymbolFile/PDB/ast-restore.test | 2 +- lldb/lit/SymbolFile/PDB/func-symbols.test | 2 +- lldb/lit/SymbolFile/PDB/typedefs.test | 5 +- .../Plugins/SymbolFile/DWARF/DWARFDefines.cpp | 4 +- .../source/Plugins/SymbolFile/DWARF/DWARFDefines.h | 2 +- .../source/Plugins/SymbolFile/PDB/PDBASTParser.cpp | 2 + lldb/unittests/Core/RichManglingContextTest.cpp | 23 ++ llvm/docs/CommandGuide/llvm-exegesis.rst | 2 +- llvm/include/llvm/Analysis/TypeMetadataUtils.h | 7 +- llvm/include/llvm/BinaryFormat/Dwarf.def | 15 +- llvm/include/llvm/BinaryFormat/Dwarf.h | 4 +- llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 3 +- .../include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h | 26 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.h | 32 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 4 +- .../llvm/ExecutionEngine/Orc/IndirectionUtils.h | 29 +- llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 1 + llvm/include/llvm/ExecutionEngine/Orc/Layer.h | 4 +- .../llvm/ExecutionEngine/Orc/ThreadSafeModule.h | 56 +++- llvm/include/llvm/MC/MCDwarf.h | 6 - llvm/include/llvm/MC/MCStreamer.h | 1 - llvm/include/llvm/Support/AArch64TargetParser.def | 1 + llvm/include/llvm/Support/ARMTargetParser.def | 5 +- llvm/include/llvm/Support/TargetParser.h | 1 + llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 23 +- llvm/lib/Analysis/TypeMetadataUtils.cpp | 42 ++- llvm/lib/BinaryFormat/Dwarf.cpp | 20 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp | 3 - llvm/lib/CodeGen/CFIInstrInserter.cpp | 1 - llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 - llvm/lib/CodeGen/MIRParser/MILexer.h | 1 - llvm/lib/CodeGen/MIRParser/MIParser.cpp | 4 - llvm/lib/CodeGen/MachineBasicBlock.cpp | 2 +- llvm/lib/CodeGen/MachineOperand.cpp | 5 - llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 266 +++++++-------- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 8 +- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 13 +- llvm/lib/DebugInfo/PDB/DIA/DIADataStream.cpp | 14 +- llvm/lib/DebugInfo/PDB/DIA/DIAEnumTables.cpp | 5 +- llvm/lib/DebugInfo/PDB/DIA/DIARawSymbol.cpp | 12 +- llvm/lib/DebugInfo/PDB/DIA/DIASourceFile.cpp | 14 +- llvm/lib/DebugInfo/PDB/DIA/DIATable.cpp | 17 +- llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp | 64 +--- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 44 +-- llvm/lib/ExecutionEngine/Orc/ThreadSafeModule.cpp | 8 +- llvm/lib/MC/MCAsmStreamer.cpp | 7 - llvm/lib/MC/MCDwarf.cpp | 4 - llvm/lib/MC/MCStreamer.cpp | 9 - llvm/lib/Target/AArch64/AArch64.td | 30 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 6 - llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 84 ++++- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 39 ++- llvm/lib/Target/AArch64/AArch64Subtarget.h | 14 + llvm/lib/Target/AArch64/AArch64SystemOperands.td | 64 ++++ .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 105 +++++- .../AArch64/Disassembler/AArch64Disassembler.cpp | 3 +- .../AArch64/InstPrinter/AArch64InstPrinter.cpp | 40 ++- .../AArch64/InstPrinter/AArch64InstPrinter.h | 3 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 2 +- llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | 14 + llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h | 16 + llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 14 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 8 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 9 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 80 +++-- llvm/lib/Target/AMDGPU/VOPInstructions.td | 22 +- llvm/lib/Target/ARM/ARM.td | 7 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 14 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 14 + llvm/lib/Target/ARM/ARMSubtarget.cpp | 6 +- llvm/lib/Target/ARM/ARMSubtarget.h | 4 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 24 +- llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 15 + .../Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 37 +-- .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 27 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 41 +-- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 19 ++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 17 + llvm/lib/Target/PowerPC/PPCRegisterInfo.td | 8 +- llvm/lib/Target/Sparc/Sparc.td | 6 +- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 227 ------------- llvm/lib/Target/Sparc/SparcISelLowering.h | 12 - llvm/lib/Target/Sparc/SparcInstrAliases.td | 5 + llvm/lib/Target/Sparc/SparcInstrInfo.td | 47 +-- llvm/lib/Target/Sparc/SparcSubtarget.cpp | 1 + llvm/lib/Target/Sparc/SparcSubtarget.h | 2 + llvm/lib/Target/Sparc/SparcTargetMachine.h | 4 - .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 2 +- .../WebAssemblyRuntimeLibcallSignatures.cpp | 16 +- .../WebAssemblyRuntimeLibcallSignatures.h | 17 +- llvm/lib/Target/X86/X86InstrInfo.td | 12 +- llvm/lib/Target/X86/X86PfmCounters.td | 1 + llvm/lib/Target/X86/X86SchedBroadwell.td | 5 +- llvm/lib/Target/X86/X86SchedHaswell.td | 5 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 5 +- llvm/lib/Target/X86/X86SchedSkylakeClient.td | 5 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 5 +- llvm/lib/Target/X86/X86Schedule.td | 1 + llvm/lib/Target/X86/X86ScheduleAtom.td | 6 +- llvm/lib/Target/X86/X86ScheduleBtVer2.td | 16 +- llvm/lib/Target/X86/X86ScheduleSLM.td | 5 +- llvm/lib/Target/X86/X86ScheduleZnver1.td | 11 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 61 ++-- .../Transforms/InstCombine/InstCombineCompares.cpp | 55 ++++ llvm/test/CodeGen/AArch64/sign-return-address.ll | 22 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 27 ++ .../CodeGen/ARM/execute-only-big-stack-frame.ll | 2 + llvm/test/CodeGen/ARM/execute-only-section.ll | 1 + llvm/test/CodeGen/ARM/execute-only.ll | 1 + llvm/test/CodeGen/MIR/AArch64/cfi.mir | 2 - llvm/test/CodeGen/SPARC/sjlj.ll | 93 ------ llvm/test/CodeGen/X86/avx2-masked-gather.ll | 358 +++++++++----------- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 157 ++++----- .../CodeGen/X86/masked_gather_scatter_widen.ll | 42 +-- llvm/test/CodeGen/X86/masked_memop.ll | 97 +++--- llvm/test/CodeGen/X86/schedule-x86_64.ll | 24 +- llvm/test/CodeGen/X86/sse41-schedule.ll | 4 +- llvm/test/MC/AArch64/armv8.5a-bti-error.s | 12 + llvm/test/MC/AArch64/armv8.5a-bti.s | 37 +++ llvm/test/MC/AArch64/armv8.5a-frint-error.s | 52 +++ llvm/test/MC/AArch64/armv8.5a-frint.s | 92 ++++++ llvm/test/MC/AArch64/armv8.5a-persistent-memory.s | 7 + llvm/test/MC/AArch64/armv8.5a-predctrl-error.s | 20 ++ llvm/test/MC/AArch64/armv8.5a-predctrl.s | 18 + llvm/test/MC/AArch64/armv8.5a-rand-error.s | 17 + llvm/test/MC/AArch64/armv8.5a-rand.s | 14 + llvm/test/MC/AArch64/armv8.5a-specctrl.s | 11 + llvm/test/MC/AArch64/armv8.5a-specrestrict-error.s | 10 + llvm/test/MC/AArch64/armv8.5a-specrestrict.s | 69 ++++ llvm/test/MC/AArch64/basic-a64-instructions.s | 4 +- .../MC/AArch64/{csdb.s => speculation-barriers.s} | 7 +- llvm/test/MC/ARM/armv8.5a-specctrl-error-thumb.s | 6 + llvm/test/MC/ARM/armv8.5a-specctrl-error.s | 5 + llvm/test/MC/ARM/armv8.5a-specctrl.s | 15 + llvm/test/MC/ARM/basic-arm-instructions.s | 4 +- llvm/test/MC/ARM/basic-thumb2-instructions.s | 4 +- llvm/test/MC/ARM/csdb-errors.s | 6 - llvm/test/MC/ARM/csdb.s | 8 - llvm/test/MC/ARM/speculation-barriers-errors.s | 34 ++ llvm/test/MC/ARM/speculation-barriers.s | 22 ++ llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt | 18 + .../MC/Disassembler/AArch64/armv8.5a-dataproc.txt | 99 +++++- .../AArch64/armv8.5a-persistent-memory.txt | 7 + .../MC/Disassembler/AArch64/armv8.5a-predctrl.txt | 15 + .../test/MC/Disassembler/AArch64/armv8.5a-rand.txt | 12 + .../MC/Disassembler/AArch64/armv8.5a-specctrl.txt | 9 + .../Disassembler/AArch64/armv8.5a-specrestrict.txt | 52 +++ .../AArch64/basic-a64-instructions.txt | 2 - .../AArch64/{csdb.txt => speculation-barriers.txt} | 7 +- .../Disassembler/ARM/armv8.5a-specctrl-thumb.txt | 9 + .../test/MC/Disassembler/ARM/armv8.5a-specctrl.txt | 9 + .../MC/Disassembler/ARM/basic-arm-instructions.txt | 4 +- llvm/test/MC/Disassembler/ARM/thumb2.txt | 4 +- llvm/test/MC/Sparc/leon-pwrpsr-instruction.s | 10 + llvm/test/MC/Sparc/sparc-misc-instructions.s | 8 + llvm/test/Other/X86/mbb-dump.ll | 25 ++ llvm/test/ThinLTO/X86/devirt-after-icp.ll | 148 +++++++++ llvm/test/Transforms/InstCombine/fcmp.ll | 91 ++++++ .../X86/expand-masked-gather.ll | 63 ++++ .../X86/expand-masked-load.ll | 119 +++++++ .../X86/expand-masked-store.ll | 59 ++++ .../analysis-inconsistencies-uops-backwards.test | 28 ++ .../X86/analysis-inconsistencies-uops.test | 28 ++ .../llvm-mca/X86/BtVer2/clear-super-register-1.s | 36 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 12 +- .../tools/llvm-mca/X86/BtVer2/resources-bmi1.s | 32 +- .../tools/llvm-mca/X86/BtVer2/resources-sse41.s | 12 +- .../tools/llvm-mca/X86/BtVer2/resources-x86_64.s | 86 ++--- llvm/tools/lli/lli.cpp | 6 +- llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 53 ++- .../llvm-mca/include/HardwareUnits/RegisterFile.h | 34 +- llvm/tools/llvm-mca/include/Instruction.h | 25 +- .../llvm-mca/lib/HardwareUnits/RegisterFile.cpp | 51 ++- .../llvm-mca/lib/HardwareUnits/ResourceManager.cpp | 12 +- .../lib/HardwareUnits/RetireControlUnit.cpp | 2 +- llvm/tools/llvm-mca/lib/InstrBuilder.cpp | 21 +- llvm/tools/llvm-mca/lib/Instruction.cpp | 4 +- llvm/tools/llvm-mca/lib/Pipeline.cpp | 12 +- llvm/tools/llvm-mca/lib/Stages/DispatchStage.cpp | 10 +- llvm/tools/llvm-mca/lib/Stages/ExecuteStage.cpp | 6 +- llvm/tools/llvm-mca/llvm-mca.cpp | 2 +- llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 13 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 81 ++--- .../ExecutionEngine/Orc/ThreadSafeModuleTest.cpp | 6 +- llvm/unittests/Support/TargetParserTest.cpp | 9 +- llvm/utils/release/merge-request.sh | 3 + polly/include/polly/CodeGen/IslAst.h | 6 +- polly/lib/CodeGen/IslAst.cpp | 38 +-- polly/test/ScheduleOptimizer/SIMDInParallelFor.ll | 65 ++++ .../full_partial_tile_separation.ll | 4 + 305 files changed, 5242 insertions(+), 2404 deletions(-) rename clang/lib/Driver/ToolChains/{RISCV.cpp => RISCVToolchain.cpp} (98%) rename clang/lib/Driver/ToolChains/{RISCV.h => RISCVToolchain.h} (88%) create mode 100644 clang/test/CodeGen/catch-implicit-integer-truncations-basics-ne [...] create mode 100644 clang/test/Driver/aarch64-rand.c create mode 100644 clang/test/SemaCXX/cxx2a-lambda-default-ctor-assign.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir delete mode 100644 llvm/test/CodeGen/SPARC/sjlj.ll create mode 100644 llvm/test/MC/AArch64/armv8.5a-bti-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-bti.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-frint-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-frint.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-persistent-memory.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-predctrl-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-predctrl.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-rand-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-rand.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specctrl.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specrestrict-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specrestrict.s rename llvm/test/MC/AArch64/{csdb.s => speculation-barriers.s} (52%) create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl-error-thumb.s create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl-error.s create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl.s delete mode 100644 llvm/test/MC/ARM/csdb-errors.s delete mode 100644 llvm/test/MC/ARM/csdb.s create mode 100644 llvm/test/MC/ARM/speculation-barriers-errors.s create mode 100644 llvm/test/MC/ARM/speculation-barriers.s create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-persistent-memory.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-rand.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-specctrl.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-specrestrict.txt rename llvm/test/MC/Disassembler/AArch64/{csdb.txt => speculation-barriers.txt} (50%) create mode 100644 llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl-thumb.txt create mode 100644 llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl.txt create mode 100644 llvm/test/MC/Sparc/leon-pwrpsr-instruction.s create mode 100644 llvm/test/MC/Sparc/sparc-misc-instructions.s create mode 100644 llvm/test/Other/X86/mbb-dump.ll create mode 100644 llvm/test/ThinLTO/X86/devirt-after-icp.ll create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/tools/llvm-exegesis/X86/analysis-inconsistencies-uops [...] create mode 100644 llvm/test/tools/llvm-exegesis/X86/analysis-inconsistencies-uops.test create mode 100644 polly/test/ScheduleOptimizer/SIMDInParallelFor.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[binutils-gdb] branch master updated (5f9aecea0d -> f67ffa6a78)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 5f9aecea0d RISC-V: Pc-rel to gp-rel relaxation function cleanup. new f67ffa6a78 gdb: Change how frames are selected for 'frame' and 'info frame'. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/ChangeLog | 39 ++ gdb/NEWS | 8 + gdb/cli/cli-decode.c | 44 +- gdb/command.h | 14 + gdb/doc/ChangeLog | 8 + gdb/doc/gdb.texinfo | 111 +++-- gdb/mi/mi-cmd-stack.c | 77 ++- gdb/stack.c | 526 ++++++++++++++------- gdb/stack.h | 6 +- gdb/testsuite/ChangeLog | 5 + .../bar.c => gdb.base/frame-selection.c} | 35 +- gdb/testsuite/gdb.base/frame-selection.exp | 188 ++++++++ 12 files changed, 851 insertions(+), 210 deletions(-) copy gdb/testsuite/{gdb.ada/bp_c_mixed_case/bar.c => gdb.base/frame-selection.c} (71%) create mode 100644 gdb/testsuite/gdb.base/frame-selection.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[gcc] branch master updated (b9abfabb761 -> 5d580028ffe)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from b9abfabb761 * config/sparc/sparc-protos.h (sparc_branch_cost): Declare [...] new 5d580028ffe Simplify vec_merge according to the mask. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 10 ++++ gcc/simplify-rtx.c | 136 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 146 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/llvm-kernel-armv8l-tested updated (ad08e9096a61 -> 93dbd2e1f5c4)

by tcwg-buildslave

This is an automated email from the git hooks/post-receive script. "tcwg-buildslave pushed a change to branch linaro-local/ci/llvm-kernel-armv8l-tested in repository toolchain/ci/llvm-monorepo. from ad08e9096a61 Update CallFrameString API to account for r343114 adds 76cd9e1a31a0 [X86][Btver2] Add uops counter for exegesis reports adds fe5197ada296 [PowerPC] [NFC] Refactor code for printing register operands adds 51ad98a36588 [COFF] Add missing Requires x86 to fix buildbot adds 7d96f08c7773 Improve diagnostics range reporting. adds 537253988134 [clang-tidy] use CHECK-NOTES in tests for bugprone-forward [...] adds f2f1220c0514 [clang-tidy] use CHECK-NOTES in tests for bugprone-use-after-move adds efc78e69693d [X86][Btver2] TZCNT instructions take 2uops not 1 adds 629837acfacc [clang-tidy] use CHECK-NOTES in tests for bugprone suspici [...] adds 0984051d9b23 [Sparc] Add support for the partial write PSR instruction adds 06ab8f26bfb8 [Sparc] Add unimp alias adds f7927bf316fe [Lex] TokenConcatenation now takes const Preprocessor adds 0fb92b0c48af Revert untintentionally commited changes adds 59eb772362d5 [OpenCL] Improve extension-version.cl and to_addr_builtin. [...] adds 6e1075e2999b [llvm-exegesis] Fix PR39096. adds 63725141a660 [AArch64][v8.5A] Add FRINT[32,64][Z,X] instructions adds 597852007d19 [Sparc] Remove the support for builtin setjmp/longjmp adds cb9468ece1f4 [AArch64][v8.5A] Add speculation barrier to AArch64 instru [...] adds 1aafada812de [IslAst] Fix InParallelFor nesting. adds 78ff42780c0c [ARM][v8.5A] Add speculation barrier to ARM & Thumb instru [...] adds 0c0ee6e015ac [AArch64][v8.5A] Add prediction invalidation instructions [...] adds 6300beb04a34 The llvm-exegesis output file is a html file not a txt file. adds ed43db23b048 [AArch64][v8.5A] Add Armv8.5-A "DC CVADP" instruction adds 9c4e947161f9 [AArch64][v8.5A] Add Armv8.5-A random number instructions adds d98ff484dc46 [AArch64][v8.5A] Add speculation restriction system registers adds dee872f194fb [AArch64][v8.5A] Test optional Armv8.5-A random number extension adds 13530d3070b8 Tell whether file/folder for include completions. adds d45395cae0dd [InstCombine] add tests for FP sign-bit cmp optimization w [...] adds 23ef65a31967 [clangd] Make IncludeInserter less slow. NFC adds e2d9155968e8 [Tooling] Get rid of uses of llvm::Twine::str which is slow. NFC adds aff19c15cb5e [AArch64][v8.5A] Add Branch Target Identification instructions adds 4475e2a470d1 [WPD] Fix incorrect devirtualization after indirect call p [...] adds 0ffc2c848b55 [X86][Btver2] BLSI/BLSMSK/BLSR instructions take 2uops not [...] adds dd5ce95dad97 [InstCombine] Without infinites, fold (C / X) < 0.0 --> (X < 0) adds 49c1caaf4bc2 [AArch64][v8.5A] Add speculation barriers SSBB and PSSBB adds 8b619ee8e15d [OpenMP] Improve search for libomptarget-nvptx adds 68594ad81d18 [AArch64] Refactor immediate details out of add/sub tblgen [...] adds 7fca178b6ba9 [Sparc] EXPENSIVE_CHECKS now passes all machine verifier e [...] adds 442672a074c3 [X86] Split BT and BTC/BTR/BTS scheduler classes adds d13bd4c0921f [X86][Btver2] BTC/BTR/BTS instructions take 2uops not 1 adds 981944c90fb6 Revert r343192 as an ubsan build is currently failing adds 38caf2550c64 Revert r343193 together with r343192 adds 3c5e1c821e2b Introduce completionItemKind capability support. adds efd4e04aa492 [X86][Btver2] (V)MPSADBW instructions take 3uops not 1 adds 906f015c7e37 [analyzer] Highlight nodes which have error reports in the [...] adds 78ea0b9bcbda Fix greedy FileCheck expression in test/Driver/mips-abi.c adds b3d67a743af1 [X86] Remove BT/BTC/BTR/BTS rr/ri overrides adds 3f63f30ece6c Add an interactive mode to BSD archive parser. adds 544a79b489f4 Fixes for GDB remote packet disassembler: adds 89eafde03f99 [ScalarizeMaskedMemIntrin] Don't emit 'icmp eq i1 %x, 1' t [...] adds 6318a6243c37 [compiler-rt] [builtins] Restore tests from r342917 (disab [...] adds 9707b1307dcf [sanitizer] Introduce a new SizeClassMap with minimal amou [...] adds a353bd5a2f5c [clangd] Add more tracing to index queries. NFC adds 17d2f2947d99 [clangd] Initial supoprt for cross-namespace global code c [...] adds 780d8603fbfb [AMDGPU] Fold copy (copy vgpr) adds adb88347949c [compiler-rt][ubsan][NFC] Slight test cleanup in preparati [...] adds be4d202c8404 [clang][ubsan][NFC] Slight test cleanup in preparation for D50901 adds 019c8bf4951f [sanitizer] Disable failing Android test after D52371 adds 58c54e7a5aad [OpenMP] Make default distribute schedule for NVPTX target [...] adds 782b84d12832 AMDGPU/NFC: Simplify VOP_MAC_F16/F32 adds 00eb18442b93 [lli] Fix ArgV setup bug when running in -jit-kind=orc-lazy mode. adds a08a82d39163 [ORC] LastKey needs to be protected to prevent data races. adds 2bc5b9d85628 [ORC] Coalesce all of ORC's symbol renaming / linkage-prom [...] adds 733f399ddb41 Test commit. NFC adds 96a1454465df AMDGPU: Split VOP2Inst into VOP2Inst_e32/e64/sdwa adds 8f8f51dafca5 [OpenMP] Make default parallel for schedule in NVPTX targe [...] adds 816384779b35 [ORC] Lock ThreadSafeContext during Module destructing in [...] adds 3bf03f083073 [ORC] Make LocalIndirectStubsManager's operations thread-safe. adds a337eec5f158 NFC: Fix some darwin linker warnings introduced in r338385 adds c52ef693f40e AMDGPU: Split HasExt into HasExtDPP/SDWA/SDWA9 adds fa09fc854912 [WebAssembly] Add --[no]-export-dynamic to replace --expor [...] adds c9ce7a5f39b1 [ORC] Add definition for IRLayer::setCloneToNewContextOnEm [...] adds 053ea06914fe [ScalarizeMaskedMemIntrin] Cleanup comments. NFC adds a82089e91c6e [ScalarizeMaskedMemIntrin] Remove some temporary variables [...] adds 6a3c26b52f6d [ScalarizeMaskedMemIntrin] Add dedicated IR only tests for [...] adds 22589ff5d889 [ScalarizeMaskedMemIntrin] Handle the case where the mask [...] adds 745b5ffc5932 [ScalarizeMaskedMemIntrin] When expanding masked loads, st [...] adds b3e85005755b [ScalarizeMaskedMemIntrin] Add some IR only test cases for [...] adds 0b81fac420b8 [ScalarizeMaskedMemIntrin] When expanding masked gathers, [...] adds 553a7cee0f07 WebAssembly: Rename GetSignature to GetLibcallSignature [NFC] adds 2f1865a462b9 [analyzer] Hotfix for the bug in exploded graph printing adds ae88691b9a93 [ScalarizeMaskedMemIntrin] Use cast instead of dyn_cast ch [...] adds e3dd0218674b [ScalarizeMaskedMemIntrin] Ensure the mask is a vector of [...] adds bb15c838af2e [cxx2a] P0624R2: Lambdas with no capture-default are defau [...] adds 8c26b8c6426f [XRay] Add LD_LIBRARY_PATH to env variables for Unit Tests adds 1c160f068fd2 [X86] Add the test case from PR38986. adds bdc09736b1ee [XRay] Fix argv0-log-file-name.cc race when tests are exec [...] adds 79060e58e893 [ScalarizeMaskedMemIntrin] Add test cases for masked store [...] adds 0f8225a1e444 [ScalarizeMaskedMemIntrin] Fix the alignment calculation f [...] adds 2aabe1e28220 [cxx2a] P0641R2: (Some) type mismatches on defaulted funct [...] adds 6af07e81e6e5 [ORC] Lock ThreadSafeContext during module destruction in [...] adds dc7d1e34966f [ORC] Add a const version of ThreadSafeModule::getModule(). adds 13bdd271378e [ORC] clang-format the ThreadSafeModule code. adds a0d99b389ae0 [XRay] Guard local variables with `static` and struct with [...] adds 18b8d4e7a52e merge-request.sh: Add 7.0 metabug adds e956a994c2c3 [pdb] Simplify the code by replacing a few string conversi [...] adds 8603757eb82d [lldb] Remove an assertion in RichManglingContext::GetBuff [...] adds dcbf2450ed0a Handle dependent class template names in class template ar [...] adds f8e3fa0f06bc [ScalarizeMaskedMemIntrin] Use MinAlign to calculate align [...] adds 22fb019d9db4 [XRay] Fix fdr-thread-order.cc when current directory cont [...] adds 26725acf2177 Test commit. NFC. adds a09f502a7eea [CodeGen] fix broken successor probability in MBB dump adds 12e2986adbaa [PDB] Handle `char` as a builtin type adds d2d4854e5887 [X86][BtVer2] Fix PHMINPOS schedule resources typo adds 93b21edfdd60 [ARM][v8.5A] Add speculation barriers SSBB and PSSBB adds cabec6ff962a Remove extra whitespace. NFC. (test commit) adds 537172cff2ad [ARM] Allow execute only code on Cortex-m23 adds eb8db536ae40 [ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k adds 0fa18f04bfe2 [ARM] Alter test to account for change to armv6k default CPU adds 3b204378fe5e [ClangFormat] 'try' of function-try-block doesn't obey Bra [...] adds 2d3fd448c5cf [docs] Fix links in Clangd documentation adds 28ed7674e36a [llvm-mca] Teach how to track zero registers in class Regi [...] adds 9b5626b4ae31 [LoopInterchange] Turn into a loop pass. adds 9f7570b9aa7f [ARM] Prevent DSP and SIM32 being set for v6m adds c99ed357e9e4 Revert r343308: [LoopInterchange] Turn into a loop pass. adds f2d8a1938272 [X86][Btver2] Fix BSF/BSR schedule adds 93dbd2e1f5c4 [llvm-mca] Remove redundant namespace prefixes. NFC No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 26 +- clang-tools-extra/clangd/ClangdLSPServer.h | 2 + clang-tools-extra/clangd/CodeComplete.cpp | 56 +++- clang-tools-extra/clangd/CodeComplete.h | 7 + clang-tools-extra/clangd/Diagnostics.cpp | 11 + clang-tools-extra/clangd/Headers.cpp | 12 +- clang-tools-extra/clangd/Headers.h | 6 +- clang-tools-extra/clangd/Protocol.cpp | 51 +++ clang-tools-extra/clangd/Protocol.h | 80 +++-- clang-tools-extra/clangd/index/Index.h | 6 + clang-tools-extra/clangd/index/MemIndex.cpp | 11 +- clang-tools-extra/clangd/index/Merge.cpp | 17 +- clang-tools-extra/clangd/index/dex/Dex.cpp | 11 + clang-tools-extra/clangd/tool/ClangdMain.cpp | 10 + clang-tools-extra/docs/clangd.rst | 6 +- .../bugprone-forward-declaration-namespace.cpp | 44 +-- .../bugprone-suspicious-enum-usage-strict.cpp | 20 +- .../clang-tidy/bugprone-suspicious-enum-usage.cpp | 4 +- .../test/clang-tidy/bugprone-use-after-move.cpp | 220 ++++++------- .../unittests/clangd/ClangdUnitTests.cpp | 12 +- .../unittests/clangd/CodeCompleteTests.cpp | 72 ++++ clang-tools-extra/unittests/clangd/DexTests.cpp | 11 + clang/include/clang/AST/DeclCXX.h | 14 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 15 + clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Lex/TokenConcatenation.h | 4 +- clang/lib/AST/DeclCXX.cpp | 18 + clang/lib/Basic/Targets/ARM.cpp | 2 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 12 + clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 23 ++ clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 10 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 8 + clang/lib/Driver/CMakeLists.txt | 2 +- clang/lib/Driver/Driver.cpp | 2 +- clang/lib/Driver/ToolChains/Cuda.cpp | 20 +- .../ToolChains/{RISCV.cpp => RISCVToolchain.cpp} | 4 +- .../ToolChains/{RISCV.h => RISCVToolchain.h} | 8 +- clang/lib/Format/UnwrappedLineParser.cpp | 2 + clang/lib/Lex/TokenConcatenation.cpp | 4 +- clang/lib/Sema/SemaDeclCXX.cpp | 62 +++- clang/lib/Sema/SemaExpr.cpp | 11 + clang/lib/Sema/SemaInit.cpp | 5 +- clang/lib/Sema/TreeTransform.h | 2 +- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 92 ++++-- clang/lib/Tooling/Inclusions/HeaderIncludes.cpp | 9 +- .../test/CXX/class.derived/class.abstract/p16.cpp | 4 +- .../dcl.fct.def/dcl.fct.def.default/p1.cpp | 51 ++- clang/test/CXX/drs/dr6xx.cpp | 4 +- clang/test/CXX/special/class.copy/p12-0x.cpp | 2 +- clang/test/CXX/special/class.copy/p23-cxx11.cpp | 2 +- clang/test/CXX/special/class.ctor/p5-0x.cpp | 2 +- clang/test/CXX/special/class.dtor/p5-0x.cpp | 2 +- .../catch-implicit-integer-conversions-basics.c | 16 - ...implicit-integer-truncations-basics-negatives.c | 58 ++++ .../catch-implicit-integer-truncations-basics.c | 16 - .../CodeGen/catch-implicit-integer-truncations.c | 63 +--- clang/test/Driver/aarch64-rand.c | 13 + clang/test/Driver/arm-cortex-cpus.c | 4 +- clang/test/Driver/mips-abi.c | 6 +- clang/test/Driver/openmp-offload-gpu.c | 21 ++ ...arget_teams_distribute_parallel_for_codegen.cpp | 14 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 14 +- clang/test/Preprocessor/arm-acle-6.4.c | 7 + clang/test/SemaCUDA/implicit-member-target.cu | 2 +- clang/test/SemaCXX/cxx0x-deleted-default-ctor.cpp | 6 +- clang/test/SemaCXX/cxx17-compat.cpp | 29 +- .../cxx1z-class-template-argument-deduction.cpp | 7 + .../SemaCXX/cxx2a-lambda-default-ctor-assign.cpp | 37 +++ clang/test/SemaCXX/dr1301.cpp | 6 +- clang/test/SemaCXX/microsoft-dtor-lookup-cxx11.cpp | 4 +- clang/test/SemaOpenCL/extension-version.cl | 12 + clang/test/SemaOpenCL/to_addr_builtin.cl | 76 +++++ clang/test/SemaTemplate/exception-spec-crash.cpp | 4 +- clang/unittests/Format/FormatTest.cpp | 10 + clang/www/cxx_status.html | 4 +- .../sanitizer_allocator_size_class_map.h | 5 + .../tests/sanitizer_allocator_test.cc | 18 + compiler-rt/lib/xray/tests/CMakeLists.txt | 10 +- compiler-rt/lib/xray/xray_basic_logging.cc | 12 +- compiler-rt/lib/xray/xray_fdr_logging.cc | 5 +- .../test/builtins/Unit/compiler_rt_logb_test.c | 4 +- .../test/builtins/Unit/compiler_rt_logbf_test.c | 4 +- .../test/builtins/Unit/compiler_rt_logbl_test.c | 4 +- .../ImplicitConversion/integer-conversion.c | 332 ++++++++++++++++--- .../ImplicitConversion/integer-truncation.c | 363 ++++++++++++++++++--- .../xray/TestCases/Posix/argv0-log-file-name.cc | 2 +- .../test/xray/TestCases/Posix/fdr-thread-order.cc | 19 +- compiler-rt/test/xray/Unit/lit.site.cfg.in | 8 + .../unittests/lit.common.unit.configured.in | 1 + lld/test/COFF/pdb-debug-f.s | 1 + lld/test/wasm/alias.ll | 2 +- lld/test/wasm/archive-export.ll | 4 +- lld/test/wasm/call-indirect.ll | 2 +- lld/test/wasm/comdats.ll | 2 +- lld/test/wasm/compress-relocs.ll | 6 +- lld/test/wasm/cxx-mangling.ll | 4 +- lld/test/wasm/local-symbols.ll | 3 +- lld/test/wasm/locals-duplicate.test | 2 +- lld/test/wasm/lto/archive.ll | 2 +- lld/test/wasm/undefined-weak-call.ll | 2 +- lld/test/wasm/visibility-hidden.ll | 21 +- lld/test/wasm/weak-alias-overide.ll | 2 +- lld/test/wasm/weak-alias.ll | 2 +- lld/test/wasm/weak-symbols.ll | 15 +- lld/test/wasm/weak-undefined.ll | 11 +- lld/wasm/Config.h | 2 +- lld/wasm/Driver.cpp | 13 +- lld/wasm/Options.td | 19 +- lld/wasm/Symbols.cpp | 6 +- lldb/examples/python/bsd.py | 105 +++++- lldb/examples/python/gdbremote.py | 190 +++++++---- lldb/include/lldb/Core/RichManglingContext.h | 1 - lldb/lit/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp | 3 + lldb/lit/SymbolFile/PDB/ast-restore.test | 2 +- lldb/lit/SymbolFile/PDB/func-symbols.test | 2 +- lldb/lit/SymbolFile/PDB/typedefs.test | 5 +- .../Plugins/SymbolFile/DWARF/DWARFDefines.cpp | 4 +- .../source/Plugins/SymbolFile/DWARF/DWARFDefines.h | 2 +- .../source/Plugins/SymbolFile/PDB/PDBASTParser.cpp | 2 + lldb/unittests/Core/RichManglingContextTest.cpp | 23 ++ llvm/docs/CommandGuide/llvm-exegesis.rst | 2 +- llvm/include/llvm/Analysis/TypeMetadataUtils.h | 7 +- llvm/include/llvm/BinaryFormat/Dwarf.def | 15 +- llvm/include/llvm/BinaryFormat/Dwarf.h | 4 +- llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 3 +- .../include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h | 26 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.h | 32 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 4 +- .../llvm/ExecutionEngine/Orc/IndirectionUtils.h | 29 +- llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 1 + llvm/include/llvm/ExecutionEngine/Orc/Layer.h | 4 +- .../llvm/ExecutionEngine/Orc/ThreadSafeModule.h | 56 +++- llvm/include/llvm/MC/MCDwarf.h | 6 - llvm/include/llvm/MC/MCStreamer.h | 1 - llvm/include/llvm/Support/AArch64TargetParser.def | 1 + llvm/include/llvm/Support/ARMTargetParser.def | 5 +- llvm/include/llvm/Support/TargetParser.h | 1 + llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 23 +- llvm/lib/Analysis/TypeMetadataUtils.cpp | 42 ++- llvm/lib/BinaryFormat/Dwarf.cpp | 20 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp | 3 - llvm/lib/CodeGen/CFIInstrInserter.cpp | 1 - llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 - llvm/lib/CodeGen/MIRParser/MILexer.h | 1 - llvm/lib/CodeGen/MIRParser/MIParser.cpp | 4 - llvm/lib/CodeGen/MachineBasicBlock.cpp | 2 +- llvm/lib/CodeGen/MachineOperand.cpp | 5 - llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 266 +++++++-------- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 8 +- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 13 +- llvm/lib/DebugInfo/PDB/DIA/DIADataStream.cpp | 14 +- llvm/lib/DebugInfo/PDB/DIA/DIAEnumTables.cpp | 5 +- llvm/lib/DebugInfo/PDB/DIA/DIARawSymbol.cpp | 12 +- llvm/lib/DebugInfo/PDB/DIA/DIASourceFile.cpp | 14 +- llvm/lib/DebugInfo/PDB/DIA/DIATable.cpp | 17 +- llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp | 64 +--- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 44 +-- llvm/lib/ExecutionEngine/Orc/ThreadSafeModule.cpp | 8 +- llvm/lib/MC/MCAsmStreamer.cpp | 7 - llvm/lib/MC/MCDwarf.cpp | 4 - llvm/lib/MC/MCStreamer.cpp | 9 - llvm/lib/Target/AArch64/AArch64.td | 30 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 6 - llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 84 ++++- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 39 ++- llvm/lib/Target/AArch64/AArch64Subtarget.h | 14 + llvm/lib/Target/AArch64/AArch64SystemOperands.td | 64 ++++ .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 105 +++++- .../AArch64/Disassembler/AArch64Disassembler.cpp | 3 +- .../AArch64/InstPrinter/AArch64InstPrinter.cpp | 40 ++- .../AArch64/InstPrinter/AArch64InstPrinter.h | 3 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 2 +- llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | 14 + llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h | 16 + llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 14 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 8 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 9 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 80 +++-- llvm/lib/Target/AMDGPU/VOPInstructions.td | 22 +- llvm/lib/Target/ARM/ARM.td | 7 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 14 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 14 + llvm/lib/Target/ARM/ARMSubtarget.cpp | 6 +- llvm/lib/Target/ARM/ARMSubtarget.h | 4 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 24 +- llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 15 + .../Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 37 +-- .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 27 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 41 +-- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 19 ++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 17 + llvm/lib/Target/PowerPC/PPCRegisterInfo.td | 8 +- llvm/lib/Target/Sparc/Sparc.td | 6 +- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 227 ------------- llvm/lib/Target/Sparc/SparcISelLowering.h | 12 - llvm/lib/Target/Sparc/SparcInstrAliases.td | 5 + llvm/lib/Target/Sparc/SparcInstrInfo.td | 47 +-- llvm/lib/Target/Sparc/SparcSubtarget.cpp | 1 + llvm/lib/Target/Sparc/SparcSubtarget.h | 2 + llvm/lib/Target/Sparc/SparcTargetMachine.h | 4 - .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 2 +- .../WebAssemblyRuntimeLibcallSignatures.cpp | 16 +- .../WebAssemblyRuntimeLibcallSignatures.h | 17 +- llvm/lib/Target/X86/X86InstrInfo.td | 12 +- llvm/lib/Target/X86/X86PfmCounters.td | 1 + llvm/lib/Target/X86/X86SchedBroadwell.td | 5 +- llvm/lib/Target/X86/X86SchedHaswell.td | 5 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 5 +- llvm/lib/Target/X86/X86SchedSkylakeClient.td | 5 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 5 +- llvm/lib/Target/X86/X86Schedule.td | 1 + llvm/lib/Target/X86/X86ScheduleAtom.td | 6 +- llvm/lib/Target/X86/X86ScheduleBtVer2.td | 16 +- llvm/lib/Target/X86/X86ScheduleSLM.td | 5 +- llvm/lib/Target/X86/X86ScheduleZnver1.td | 11 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 61 ++-- .../Transforms/InstCombine/InstCombineCompares.cpp | 55 ++++ llvm/test/CodeGen/AArch64/sign-return-address.ll | 22 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 27 ++ .../CodeGen/ARM/execute-only-big-stack-frame.ll | 2 + llvm/test/CodeGen/ARM/execute-only-section.ll | 1 + llvm/test/CodeGen/ARM/execute-only.ll | 1 + llvm/test/CodeGen/MIR/AArch64/cfi.mir | 2 - llvm/test/CodeGen/SPARC/sjlj.ll | 93 ------ llvm/test/CodeGen/X86/avx2-masked-gather.ll | 358 +++++++++----------- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 157 ++++----- .../CodeGen/X86/masked_gather_scatter_widen.ll | 42 +-- llvm/test/CodeGen/X86/masked_memop.ll | 97 +++--- llvm/test/CodeGen/X86/schedule-x86_64.ll | 24 +- llvm/test/CodeGen/X86/sse41-schedule.ll | 4 +- llvm/test/MC/AArch64/armv8.5a-bti-error.s | 12 + llvm/test/MC/AArch64/armv8.5a-bti.s | 37 +++ llvm/test/MC/AArch64/armv8.5a-frint-error.s | 52 +++ llvm/test/MC/AArch64/armv8.5a-frint.s | 92 ++++++ llvm/test/MC/AArch64/armv8.5a-persistent-memory.s | 7 + llvm/test/MC/AArch64/armv8.5a-predctrl-error.s | 20 ++ llvm/test/MC/AArch64/armv8.5a-predctrl.s | 18 + llvm/test/MC/AArch64/armv8.5a-rand-error.s | 17 + llvm/test/MC/AArch64/armv8.5a-rand.s | 14 + llvm/test/MC/AArch64/armv8.5a-specctrl.s | 11 + llvm/test/MC/AArch64/armv8.5a-specrestrict-error.s | 10 + llvm/test/MC/AArch64/armv8.5a-specrestrict.s | 69 ++++ llvm/test/MC/AArch64/basic-a64-instructions.s | 4 +- .../MC/AArch64/{csdb.s => speculation-barriers.s} | 7 +- llvm/test/MC/ARM/armv8.5a-specctrl-error-thumb.s | 6 + llvm/test/MC/ARM/armv8.5a-specctrl-error.s | 5 + llvm/test/MC/ARM/armv8.5a-specctrl.s | 15 + llvm/test/MC/ARM/basic-arm-instructions.s | 4 +- llvm/test/MC/ARM/basic-thumb2-instructions.s | 4 +- llvm/test/MC/ARM/csdb-errors.s | 6 - llvm/test/MC/ARM/csdb.s | 8 - llvm/test/MC/ARM/speculation-barriers-errors.s | 34 ++ llvm/test/MC/ARM/speculation-barriers.s | 22 ++ llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt | 18 + .../MC/Disassembler/AArch64/armv8.5a-dataproc.txt | 99 +++++- .../AArch64/armv8.5a-persistent-memory.txt | 7 + .../MC/Disassembler/AArch64/armv8.5a-predctrl.txt | 15 + .../test/MC/Disassembler/AArch64/armv8.5a-rand.txt | 12 + .../MC/Disassembler/AArch64/armv8.5a-specctrl.txt | 9 + .../Disassembler/AArch64/armv8.5a-specrestrict.txt | 52 +++ .../AArch64/basic-a64-instructions.txt | 2 - .../AArch64/{csdb.txt => speculation-barriers.txt} | 7 +- .../Disassembler/ARM/armv8.5a-specctrl-thumb.txt | 9 + .../test/MC/Disassembler/ARM/armv8.5a-specctrl.txt | 9 + .../MC/Disassembler/ARM/basic-arm-instructions.txt | 4 +- llvm/test/MC/Disassembler/ARM/thumb2.txt | 4 +- llvm/test/MC/Sparc/leon-pwrpsr-instruction.s | 10 + llvm/test/MC/Sparc/sparc-misc-instructions.s | 8 + llvm/test/Other/X86/mbb-dump.ll | 25 ++ llvm/test/ThinLTO/X86/devirt-after-icp.ll | 148 +++++++++ llvm/test/Transforms/InstCombine/fcmp.ll | 91 ++++++ .../X86/expand-masked-gather.ll | 63 ++++ .../X86/expand-masked-load.ll | 119 +++++++ .../X86/expand-masked-store.ll | 59 ++++ .../analysis-inconsistencies-uops-backwards.test | 28 ++ .../X86/analysis-inconsistencies-uops.test | 28 ++ .../llvm-mca/X86/BtVer2/clear-super-register-1.s | 36 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 12 +- .../tools/llvm-mca/X86/BtVer2/resources-bmi1.s | 32 +- .../tools/llvm-mca/X86/BtVer2/resources-sse41.s | 12 +- .../tools/llvm-mca/X86/BtVer2/resources-x86_64.s | 86 ++--- llvm/tools/lli/lli.cpp | 6 +- llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 53 ++- .../llvm-mca/include/HardwareUnits/RegisterFile.h | 34 +- llvm/tools/llvm-mca/include/Instruction.h | 25 +- .../llvm-mca/lib/HardwareUnits/RegisterFile.cpp | 51 ++- .../llvm-mca/lib/HardwareUnits/ResourceManager.cpp | 12 +- .../lib/HardwareUnits/RetireControlUnit.cpp | 2 +- llvm/tools/llvm-mca/lib/InstrBuilder.cpp | 21 +- llvm/tools/llvm-mca/lib/Instruction.cpp | 4 +- llvm/tools/llvm-mca/lib/Pipeline.cpp | 12 +- llvm/tools/llvm-mca/lib/Stages/DispatchStage.cpp | 10 +- llvm/tools/llvm-mca/lib/Stages/ExecuteStage.cpp | 6 +- llvm/tools/llvm-mca/llvm-mca.cpp | 2 +- llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 13 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 81 ++--- .../ExecutionEngine/Orc/ThreadSafeModuleTest.cpp | 6 +- llvm/unittests/Support/TargetParserTest.cpp | 9 +- llvm/utils/release/merge-request.sh | 3 + polly/include/polly/CodeGen/IslAst.h | 6 +- polly/lib/CodeGen/IslAst.cpp | 38 +-- polly/test/ScheduleOptimizer/SIMDInParallelFor.ll | 65 ++++ .../full_partial_tile_separation.ll | 4 + 305 files changed, 5242 insertions(+), 2404 deletions(-) rename clang/lib/Driver/ToolChains/{RISCV.cpp => RISCVToolchain.cpp} (98%) rename clang/lib/Driver/ToolChains/{RISCV.h => RISCVToolchain.h} (88%) create mode 100644 clang/test/CodeGen/catch-implicit-integer-truncations-basics-ne [...] create mode 100644 clang/test/Driver/aarch64-rand.c create mode 100644 clang/test/SemaCXX/cxx2a-lambda-default-ctor-assign.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir delete mode 100644 llvm/test/CodeGen/SPARC/sjlj.ll create mode 100644 llvm/test/MC/AArch64/armv8.5a-bti-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-bti.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-frint-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-frint.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-persistent-memory.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-predctrl-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-predctrl.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-rand-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-rand.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specctrl.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specrestrict-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specrestrict.s rename llvm/test/MC/AArch64/{csdb.s => speculation-barriers.s} (52%) create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl-error-thumb.s create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl-error.s create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl.s delete mode 100644 llvm/test/MC/ARM/csdb-errors.s delete mode 100644 llvm/test/MC/ARM/csdb.s create mode 100644 llvm/test/MC/ARM/speculation-barriers-errors.s create mode 100644 llvm/test/MC/ARM/speculation-barriers.s create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-persistent-memory.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-rand.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-specctrl.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-specrestrict.txt rename llvm/test/MC/Disassembler/AArch64/{csdb.txt => speculation-barriers.txt} (50%) create mode 100644 llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl-thumb.txt create mode 100644 llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl.txt create mode 100644 llvm/test/MC/Sparc/leon-pwrpsr-instruction.s create mode 100644 llvm/test/MC/Sparc/sparc-misc-instructions.s create mode 100644 llvm/test/Other/X86/mbb-dump.ll create mode 100644 llvm/test/ThinLTO/X86/devirt-after-icp.ll create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/tools/llvm-exegesis/X86/analysis-inconsistencies-uops [...] create mode 100644 llvm/test/tools/llvm-exegesis/X86/analysis-inconsistencies-uops.test create mode 100644 polly/test/ScheduleOptimizer/SIMDInParallelFor.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/llvm-kernel-aarch64-tested updated (ad08e9096a61 -> 93dbd2e1f5c4)

by tcwg-buildslave

This is an automated email from the git hooks/post-receive script. "tcwg-buildslave pushed a change to branch linaro-local/ci/llvm-kernel-aarch64-tested in repository toolchain/ci/llvm-monorepo. from ad08e9096a61 Update CallFrameString API to account for r343114 adds 76cd9e1a31a0 [X86][Btver2] Add uops counter for exegesis reports adds fe5197ada296 [PowerPC] [NFC] Refactor code for printing register operands adds 51ad98a36588 [COFF] Add missing Requires x86 to fix buildbot adds 7d96f08c7773 Improve diagnostics range reporting. adds 537253988134 [clang-tidy] use CHECK-NOTES in tests for bugprone-forward [...] adds f2f1220c0514 [clang-tidy] use CHECK-NOTES in tests for bugprone-use-after-move adds efc78e69693d [X86][Btver2] TZCNT instructions take 2uops not 1 adds 629837acfacc [clang-tidy] use CHECK-NOTES in tests for bugprone suspici [...] adds 0984051d9b23 [Sparc] Add support for the partial write PSR instruction adds 06ab8f26bfb8 [Sparc] Add unimp alias adds f7927bf316fe [Lex] TokenConcatenation now takes const Preprocessor adds 0fb92b0c48af Revert untintentionally commited changes adds 59eb772362d5 [OpenCL] Improve extension-version.cl and to_addr_builtin. [...] adds 6e1075e2999b [llvm-exegesis] Fix PR39096. adds 63725141a660 [AArch64][v8.5A] Add FRINT[32,64][Z,X] instructions adds 597852007d19 [Sparc] Remove the support for builtin setjmp/longjmp adds cb9468ece1f4 [AArch64][v8.5A] Add speculation barrier to AArch64 instru [...] adds 1aafada812de [IslAst] Fix InParallelFor nesting. adds 78ff42780c0c [ARM][v8.5A] Add speculation barrier to ARM & Thumb instru [...] adds 0c0ee6e015ac [AArch64][v8.5A] Add prediction invalidation instructions [...] adds 6300beb04a34 The llvm-exegesis output file is a html file not a txt file. adds ed43db23b048 [AArch64][v8.5A] Add Armv8.5-A "DC CVADP" instruction adds 9c4e947161f9 [AArch64][v8.5A] Add Armv8.5-A random number instructions adds d98ff484dc46 [AArch64][v8.5A] Add speculation restriction system registers adds dee872f194fb [AArch64][v8.5A] Test optional Armv8.5-A random number extension adds 13530d3070b8 Tell whether file/folder for include completions. adds d45395cae0dd [InstCombine] add tests for FP sign-bit cmp optimization w [...] adds 23ef65a31967 [clangd] Make IncludeInserter less slow. NFC adds e2d9155968e8 [Tooling] Get rid of uses of llvm::Twine::str which is slow. NFC adds aff19c15cb5e [AArch64][v8.5A] Add Branch Target Identification instructions adds 4475e2a470d1 [WPD] Fix incorrect devirtualization after indirect call p [...] adds 0ffc2c848b55 [X86][Btver2] BLSI/BLSMSK/BLSR instructions take 2uops not [...] adds dd5ce95dad97 [InstCombine] Without infinites, fold (C / X) < 0.0 --> (X < 0) adds 49c1caaf4bc2 [AArch64][v8.5A] Add speculation barriers SSBB and PSSBB adds 8b619ee8e15d [OpenMP] Improve search for libomptarget-nvptx adds 68594ad81d18 [AArch64] Refactor immediate details out of add/sub tblgen [...] adds 7fca178b6ba9 [Sparc] EXPENSIVE_CHECKS now passes all machine verifier e [...] adds 442672a074c3 [X86] Split BT and BTC/BTR/BTS scheduler classes adds d13bd4c0921f [X86][Btver2] BTC/BTR/BTS instructions take 2uops not 1 adds 981944c90fb6 Revert r343192 as an ubsan build is currently failing adds 38caf2550c64 Revert r343193 together with r343192 adds 3c5e1c821e2b Introduce completionItemKind capability support. adds efd4e04aa492 [X86][Btver2] (V)MPSADBW instructions take 3uops not 1 adds 906f015c7e37 [analyzer] Highlight nodes which have error reports in the [...] adds 78ea0b9bcbda Fix greedy FileCheck expression in test/Driver/mips-abi.c adds b3d67a743af1 [X86] Remove BT/BTC/BTR/BTS rr/ri overrides adds 3f63f30ece6c Add an interactive mode to BSD archive parser. adds 544a79b489f4 Fixes for GDB remote packet disassembler: adds 89eafde03f99 [ScalarizeMaskedMemIntrin] Don't emit 'icmp eq i1 %x, 1' t [...] adds 6318a6243c37 [compiler-rt] [builtins] Restore tests from r342917 (disab [...] adds 9707b1307dcf [sanitizer] Introduce a new SizeClassMap with minimal amou [...] adds a353bd5a2f5c [clangd] Add more tracing to index queries. NFC adds 17d2f2947d99 [clangd] Initial supoprt for cross-namespace global code c [...] adds 780d8603fbfb [AMDGPU] Fold copy (copy vgpr) adds adb88347949c [compiler-rt][ubsan][NFC] Slight test cleanup in preparati [...] adds be4d202c8404 [clang][ubsan][NFC] Slight test cleanup in preparation for D50901 adds 019c8bf4951f [sanitizer] Disable failing Android test after D52371 adds 58c54e7a5aad [OpenMP] Make default distribute schedule for NVPTX target [...] adds 782b84d12832 AMDGPU/NFC: Simplify VOP_MAC_F16/F32 adds 00eb18442b93 [lli] Fix ArgV setup bug when running in -jit-kind=orc-lazy mode. adds a08a82d39163 [ORC] LastKey needs to be protected to prevent data races. adds 2bc5b9d85628 [ORC] Coalesce all of ORC's symbol renaming / linkage-prom [...] adds 733f399ddb41 Test commit. NFC adds 96a1454465df AMDGPU: Split VOP2Inst into VOP2Inst_e32/e64/sdwa adds 8f8f51dafca5 [OpenMP] Make default parallel for schedule in NVPTX targe [...] adds 816384779b35 [ORC] Lock ThreadSafeContext during Module destructing in [...] adds 3bf03f083073 [ORC] Make LocalIndirectStubsManager's operations thread-safe. adds a337eec5f158 NFC: Fix some darwin linker warnings introduced in r338385 adds c52ef693f40e AMDGPU: Split HasExt into HasExtDPP/SDWA/SDWA9 adds fa09fc854912 [WebAssembly] Add --[no]-export-dynamic to replace --expor [...] adds c9ce7a5f39b1 [ORC] Add definition for IRLayer::setCloneToNewContextOnEm [...] adds 053ea06914fe [ScalarizeMaskedMemIntrin] Cleanup comments. NFC adds a82089e91c6e [ScalarizeMaskedMemIntrin] Remove some temporary variables [...] adds 6a3c26b52f6d [ScalarizeMaskedMemIntrin] Add dedicated IR only tests for [...] adds 22589ff5d889 [ScalarizeMaskedMemIntrin] Handle the case where the mask [...] adds 745b5ffc5932 [ScalarizeMaskedMemIntrin] When expanding masked loads, st [...] adds b3e85005755b [ScalarizeMaskedMemIntrin] Add some IR only test cases for [...] adds 0b81fac420b8 [ScalarizeMaskedMemIntrin] When expanding masked gathers, [...] adds 553a7cee0f07 WebAssembly: Rename GetSignature to GetLibcallSignature [NFC] adds 2f1865a462b9 [analyzer] Hotfix for the bug in exploded graph printing adds ae88691b9a93 [ScalarizeMaskedMemIntrin] Use cast instead of dyn_cast ch [...] adds e3dd0218674b [ScalarizeMaskedMemIntrin] Ensure the mask is a vector of [...] adds bb15c838af2e [cxx2a] P0624R2: Lambdas with no capture-default are defau [...] adds 8c26b8c6426f [XRay] Add LD_LIBRARY_PATH to env variables for Unit Tests adds 1c160f068fd2 [X86] Add the test case from PR38986. adds bdc09736b1ee [XRay] Fix argv0-log-file-name.cc race when tests are exec [...] adds 79060e58e893 [ScalarizeMaskedMemIntrin] Add test cases for masked store [...] adds 0f8225a1e444 [ScalarizeMaskedMemIntrin] Fix the alignment calculation f [...] adds 2aabe1e28220 [cxx2a] P0641R2: (Some) type mismatches on defaulted funct [...] adds 6af07e81e6e5 [ORC] Lock ThreadSafeContext during module destruction in [...] adds dc7d1e34966f [ORC] Add a const version of ThreadSafeModule::getModule(). adds 13bdd271378e [ORC] clang-format the ThreadSafeModule code. adds a0d99b389ae0 [XRay] Guard local variables with `static` and struct with [...] adds 18b8d4e7a52e merge-request.sh: Add 7.0 metabug adds e956a994c2c3 [pdb] Simplify the code by replacing a few string conversi [...] adds 8603757eb82d [lldb] Remove an assertion in RichManglingContext::GetBuff [...] adds dcbf2450ed0a Handle dependent class template names in class template ar [...] adds f8e3fa0f06bc [ScalarizeMaskedMemIntrin] Use MinAlign to calculate align [...] adds 22fb019d9db4 [XRay] Fix fdr-thread-order.cc when current directory cont [...] adds 26725acf2177 Test commit. NFC. adds a09f502a7eea [CodeGen] fix broken successor probability in MBB dump adds 12e2986adbaa [PDB] Handle `char` as a builtin type adds d2d4854e5887 [X86][BtVer2] Fix PHMINPOS schedule resources typo adds 93b21edfdd60 [ARM][v8.5A] Add speculation barriers SSBB and PSSBB adds cabec6ff962a Remove extra whitespace. NFC. (test commit) adds 537172cff2ad [ARM] Allow execute only code on Cortex-m23 adds eb8db536ae40 [ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k adds 0fa18f04bfe2 [ARM] Alter test to account for change to armv6k default CPU adds 3b204378fe5e [ClangFormat] 'try' of function-try-block doesn't obey Bra [...] adds 2d3fd448c5cf [docs] Fix links in Clangd documentation adds 28ed7674e36a [llvm-mca] Teach how to track zero registers in class Regi [...] adds 9b5626b4ae31 [LoopInterchange] Turn into a loop pass. adds 9f7570b9aa7f [ARM] Prevent DSP and SIM32 being set for v6m adds c99ed357e9e4 Revert r343308: [LoopInterchange] Turn into a loop pass. adds f2d8a1938272 [X86][Btver2] Fix BSF/BSR schedule adds 93dbd2e1f5c4 [llvm-mca] Remove redundant namespace prefixes. NFC No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 26 +- clang-tools-extra/clangd/ClangdLSPServer.h | 2 + clang-tools-extra/clangd/CodeComplete.cpp | 56 +++- clang-tools-extra/clangd/CodeComplete.h | 7 + clang-tools-extra/clangd/Diagnostics.cpp | 11 + clang-tools-extra/clangd/Headers.cpp | 12 +- clang-tools-extra/clangd/Headers.h | 6 +- clang-tools-extra/clangd/Protocol.cpp | 51 +++ clang-tools-extra/clangd/Protocol.h | 80 +++-- clang-tools-extra/clangd/index/Index.h | 6 + clang-tools-extra/clangd/index/MemIndex.cpp | 11 +- clang-tools-extra/clangd/index/Merge.cpp | 17 +- clang-tools-extra/clangd/index/dex/Dex.cpp | 11 + clang-tools-extra/clangd/tool/ClangdMain.cpp | 10 + clang-tools-extra/docs/clangd.rst | 6 +- .../bugprone-forward-declaration-namespace.cpp | 44 +-- .../bugprone-suspicious-enum-usage-strict.cpp | 20 +- .../clang-tidy/bugprone-suspicious-enum-usage.cpp | 4 +- .../test/clang-tidy/bugprone-use-after-move.cpp | 220 ++++++------- .../unittests/clangd/ClangdUnitTests.cpp | 12 +- .../unittests/clangd/CodeCompleteTests.cpp | 72 ++++ clang-tools-extra/unittests/clangd/DexTests.cpp | 11 + clang/include/clang/AST/DeclCXX.h | 14 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 15 + clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Lex/TokenConcatenation.h | 4 +- clang/lib/AST/DeclCXX.cpp | 18 + clang/lib/Basic/Targets/ARM.cpp | 2 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 12 + clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 23 ++ clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 10 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 8 + clang/lib/Driver/CMakeLists.txt | 2 +- clang/lib/Driver/Driver.cpp | 2 +- clang/lib/Driver/ToolChains/Cuda.cpp | 20 +- .../ToolChains/{RISCV.cpp => RISCVToolchain.cpp} | 4 +- .../ToolChains/{RISCV.h => RISCVToolchain.h} | 8 +- clang/lib/Format/UnwrappedLineParser.cpp | 2 + clang/lib/Lex/TokenConcatenation.cpp | 4 +- clang/lib/Sema/SemaDeclCXX.cpp | 62 +++- clang/lib/Sema/SemaExpr.cpp | 11 + clang/lib/Sema/SemaInit.cpp | 5 +- clang/lib/Sema/TreeTransform.h | 2 +- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 92 ++++-- clang/lib/Tooling/Inclusions/HeaderIncludes.cpp | 9 +- .../test/CXX/class.derived/class.abstract/p16.cpp | 4 +- .../dcl.fct.def/dcl.fct.def.default/p1.cpp | 51 ++- clang/test/CXX/drs/dr6xx.cpp | 4 +- clang/test/CXX/special/class.copy/p12-0x.cpp | 2 +- clang/test/CXX/special/class.copy/p23-cxx11.cpp | 2 +- clang/test/CXX/special/class.ctor/p5-0x.cpp | 2 +- clang/test/CXX/special/class.dtor/p5-0x.cpp | 2 +- .../catch-implicit-integer-conversions-basics.c | 16 - ...implicit-integer-truncations-basics-negatives.c | 58 ++++ .../catch-implicit-integer-truncations-basics.c | 16 - .../CodeGen/catch-implicit-integer-truncations.c | 63 +--- clang/test/Driver/aarch64-rand.c | 13 + clang/test/Driver/arm-cortex-cpus.c | 4 +- clang/test/Driver/mips-abi.c | 6 +- clang/test/Driver/openmp-offload-gpu.c | 21 ++ ...arget_teams_distribute_parallel_for_codegen.cpp | 14 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 14 +- clang/test/Preprocessor/arm-acle-6.4.c | 7 + clang/test/SemaCUDA/implicit-member-target.cu | 2 +- clang/test/SemaCXX/cxx0x-deleted-default-ctor.cpp | 6 +- clang/test/SemaCXX/cxx17-compat.cpp | 29 +- .../cxx1z-class-template-argument-deduction.cpp | 7 + .../SemaCXX/cxx2a-lambda-default-ctor-assign.cpp | 37 +++ clang/test/SemaCXX/dr1301.cpp | 6 +- clang/test/SemaCXX/microsoft-dtor-lookup-cxx11.cpp | 4 +- clang/test/SemaOpenCL/extension-version.cl | 12 + clang/test/SemaOpenCL/to_addr_builtin.cl | 76 +++++ clang/test/SemaTemplate/exception-spec-crash.cpp | 4 +- clang/unittests/Format/FormatTest.cpp | 10 + clang/www/cxx_status.html | 4 +- .../sanitizer_allocator_size_class_map.h | 5 + .../tests/sanitizer_allocator_test.cc | 18 + compiler-rt/lib/xray/tests/CMakeLists.txt | 10 +- compiler-rt/lib/xray/xray_basic_logging.cc | 12 +- compiler-rt/lib/xray/xray_fdr_logging.cc | 5 +- .../test/builtins/Unit/compiler_rt_logb_test.c | 4 +- .../test/builtins/Unit/compiler_rt_logbf_test.c | 4 +- .../test/builtins/Unit/compiler_rt_logbl_test.c | 4 +- .../ImplicitConversion/integer-conversion.c | 332 ++++++++++++++++--- .../ImplicitConversion/integer-truncation.c | 363 ++++++++++++++++++--- .../xray/TestCases/Posix/argv0-log-file-name.cc | 2 +- .../test/xray/TestCases/Posix/fdr-thread-order.cc | 19 +- compiler-rt/test/xray/Unit/lit.site.cfg.in | 8 + .../unittests/lit.common.unit.configured.in | 1 + lld/test/COFF/pdb-debug-f.s | 1 + lld/test/wasm/alias.ll | 2 +- lld/test/wasm/archive-export.ll | 4 +- lld/test/wasm/call-indirect.ll | 2 +- lld/test/wasm/comdats.ll | 2 +- lld/test/wasm/compress-relocs.ll | 6 +- lld/test/wasm/cxx-mangling.ll | 4 +- lld/test/wasm/local-symbols.ll | 3 +- lld/test/wasm/locals-duplicate.test | 2 +- lld/test/wasm/lto/archive.ll | 2 +- lld/test/wasm/undefined-weak-call.ll | 2 +- lld/test/wasm/visibility-hidden.ll | 21 +- lld/test/wasm/weak-alias-overide.ll | 2 +- lld/test/wasm/weak-alias.ll | 2 +- lld/test/wasm/weak-symbols.ll | 15 +- lld/test/wasm/weak-undefined.ll | 11 +- lld/wasm/Config.h | 2 +- lld/wasm/Driver.cpp | 13 +- lld/wasm/Options.td | 19 +- lld/wasm/Symbols.cpp | 6 +- lldb/examples/python/bsd.py | 105 +++++- lldb/examples/python/gdbremote.py | 190 +++++++---- lldb/include/lldb/Core/RichManglingContext.h | 1 - lldb/lit/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp | 3 + lldb/lit/SymbolFile/PDB/ast-restore.test | 2 +- lldb/lit/SymbolFile/PDB/func-symbols.test | 2 +- lldb/lit/SymbolFile/PDB/typedefs.test | 5 +- .../Plugins/SymbolFile/DWARF/DWARFDefines.cpp | 4 +- .../source/Plugins/SymbolFile/DWARF/DWARFDefines.h | 2 +- .../source/Plugins/SymbolFile/PDB/PDBASTParser.cpp | 2 + lldb/unittests/Core/RichManglingContextTest.cpp | 23 ++ llvm/docs/CommandGuide/llvm-exegesis.rst | 2 +- llvm/include/llvm/Analysis/TypeMetadataUtils.h | 7 +- llvm/include/llvm/BinaryFormat/Dwarf.def | 15 +- llvm/include/llvm/BinaryFormat/Dwarf.h | 4 +- llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 3 +- .../include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h | 26 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.h | 32 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 4 +- .../llvm/ExecutionEngine/Orc/IndirectionUtils.h | 29 +- llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h | 1 + llvm/include/llvm/ExecutionEngine/Orc/Layer.h | 4 +- .../llvm/ExecutionEngine/Orc/ThreadSafeModule.h | 56 +++- llvm/include/llvm/MC/MCDwarf.h | 6 - llvm/include/llvm/MC/MCStreamer.h | 1 - llvm/include/llvm/Support/AArch64TargetParser.def | 1 + llvm/include/llvm/Support/ARMTargetParser.def | 5 +- llvm/include/llvm/Support/TargetParser.h | 1 + llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 23 +- llvm/lib/Analysis/TypeMetadataUtils.cpp | 42 ++- llvm/lib/BinaryFormat/Dwarf.cpp | 20 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp | 3 - llvm/lib/CodeGen/CFIInstrInserter.cpp | 1 - llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 - llvm/lib/CodeGen/MIRParser/MILexer.h | 1 - llvm/lib/CodeGen/MIRParser/MIParser.cpp | 4 - llvm/lib/CodeGen/MachineBasicBlock.cpp | 2 +- llvm/lib/CodeGen/MachineOperand.cpp | 5 - llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 266 +++++++-------- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 8 +- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 13 +- llvm/lib/DebugInfo/PDB/DIA/DIADataStream.cpp | 14 +- llvm/lib/DebugInfo/PDB/DIA/DIAEnumTables.cpp | 5 +- llvm/lib/DebugInfo/PDB/DIA/DIARawSymbol.cpp | 12 +- llvm/lib/DebugInfo/PDB/DIA/DIASourceFile.cpp | 14 +- llvm/lib/DebugInfo/PDB/DIA/DIATable.cpp | 17 +- llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp | 64 +--- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 44 +-- llvm/lib/ExecutionEngine/Orc/ThreadSafeModule.cpp | 8 +- llvm/lib/MC/MCAsmStreamer.cpp | 7 - llvm/lib/MC/MCDwarf.cpp | 4 - llvm/lib/MC/MCStreamer.cpp | 9 - llvm/lib/Target/AArch64/AArch64.td | 30 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 6 - llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 84 ++++- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 39 ++- llvm/lib/Target/AArch64/AArch64Subtarget.h | 14 + llvm/lib/Target/AArch64/AArch64SystemOperands.td | 64 ++++ .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 105 +++++- .../AArch64/Disassembler/AArch64Disassembler.cpp | 3 +- .../AArch64/InstPrinter/AArch64InstPrinter.cpp | 40 ++- .../AArch64/InstPrinter/AArch64InstPrinter.h | 3 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 2 +- llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | 14 + llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h | 16 + llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 14 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 8 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 9 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 80 +++-- llvm/lib/Target/AMDGPU/VOPInstructions.td | 22 +- llvm/lib/Target/ARM/ARM.td | 7 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 14 + llvm/lib/Target/ARM/ARMInstrThumb2.td | 14 + llvm/lib/Target/ARM/ARMSubtarget.cpp | 6 +- llvm/lib/Target/ARM/ARMSubtarget.h | 4 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 24 +- llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 15 + .../Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 37 +-- .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 27 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 41 +-- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 19 ++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 17 + llvm/lib/Target/PowerPC/PPCRegisterInfo.td | 8 +- llvm/lib/Target/Sparc/Sparc.td | 6 +- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 227 ------------- llvm/lib/Target/Sparc/SparcISelLowering.h | 12 - llvm/lib/Target/Sparc/SparcInstrAliases.td | 5 + llvm/lib/Target/Sparc/SparcInstrInfo.td | 47 +-- llvm/lib/Target/Sparc/SparcSubtarget.cpp | 1 + llvm/lib/Target/Sparc/SparcSubtarget.h | 2 + llvm/lib/Target/Sparc/SparcTargetMachine.h | 4 - .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 2 +- .../WebAssemblyRuntimeLibcallSignatures.cpp | 16 +- .../WebAssemblyRuntimeLibcallSignatures.h | 17 +- llvm/lib/Target/X86/X86InstrInfo.td | 12 +- llvm/lib/Target/X86/X86PfmCounters.td | 1 + llvm/lib/Target/X86/X86SchedBroadwell.td | 5 +- llvm/lib/Target/X86/X86SchedHaswell.td | 5 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 5 +- llvm/lib/Target/X86/X86SchedSkylakeClient.td | 5 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 5 +- llvm/lib/Target/X86/X86Schedule.td | 1 + llvm/lib/Target/X86/X86ScheduleAtom.td | 6 +- llvm/lib/Target/X86/X86ScheduleBtVer2.td | 16 +- llvm/lib/Target/X86/X86ScheduleSLM.td | 5 +- llvm/lib/Target/X86/X86ScheduleZnver1.td | 11 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 61 ++-- .../Transforms/InstCombine/InstCombineCompares.cpp | 55 ++++ llvm/test/CodeGen/AArch64/sign-return-address.ll | 22 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 27 ++ .../CodeGen/ARM/execute-only-big-stack-frame.ll | 2 + llvm/test/CodeGen/ARM/execute-only-section.ll | 1 + llvm/test/CodeGen/ARM/execute-only.ll | 1 + llvm/test/CodeGen/MIR/AArch64/cfi.mir | 2 - llvm/test/CodeGen/SPARC/sjlj.ll | 93 ------ llvm/test/CodeGen/X86/avx2-masked-gather.ll | 358 +++++++++----------- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 157 ++++----- .../CodeGen/X86/masked_gather_scatter_widen.ll | 42 +-- llvm/test/CodeGen/X86/masked_memop.ll | 97 +++--- llvm/test/CodeGen/X86/schedule-x86_64.ll | 24 +- llvm/test/CodeGen/X86/sse41-schedule.ll | 4 +- llvm/test/MC/AArch64/armv8.5a-bti-error.s | 12 + llvm/test/MC/AArch64/armv8.5a-bti.s | 37 +++ llvm/test/MC/AArch64/armv8.5a-frint-error.s | 52 +++ llvm/test/MC/AArch64/armv8.5a-frint.s | 92 ++++++ llvm/test/MC/AArch64/armv8.5a-persistent-memory.s | 7 + llvm/test/MC/AArch64/armv8.5a-predctrl-error.s | 20 ++ llvm/test/MC/AArch64/armv8.5a-predctrl.s | 18 + llvm/test/MC/AArch64/armv8.5a-rand-error.s | 17 + llvm/test/MC/AArch64/armv8.5a-rand.s | 14 + llvm/test/MC/AArch64/armv8.5a-specctrl.s | 11 + llvm/test/MC/AArch64/armv8.5a-specrestrict-error.s | 10 + llvm/test/MC/AArch64/armv8.5a-specrestrict.s | 69 ++++ llvm/test/MC/AArch64/basic-a64-instructions.s | 4 +- .../MC/AArch64/{csdb.s => speculation-barriers.s} | 7 +- llvm/test/MC/ARM/armv8.5a-specctrl-error-thumb.s | 6 + llvm/test/MC/ARM/armv8.5a-specctrl-error.s | 5 + llvm/test/MC/ARM/armv8.5a-specctrl.s | 15 + llvm/test/MC/ARM/basic-arm-instructions.s | 4 +- llvm/test/MC/ARM/basic-thumb2-instructions.s | 4 +- llvm/test/MC/ARM/csdb-errors.s | 6 - llvm/test/MC/ARM/csdb.s | 8 - llvm/test/MC/ARM/speculation-barriers-errors.s | 34 ++ llvm/test/MC/ARM/speculation-barriers.s | 22 ++ llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt | 18 + .../MC/Disassembler/AArch64/armv8.5a-dataproc.txt | 99 +++++- .../AArch64/armv8.5a-persistent-memory.txt | 7 + .../MC/Disassembler/AArch64/armv8.5a-predctrl.txt | 15 + .../test/MC/Disassembler/AArch64/armv8.5a-rand.txt | 12 + .../MC/Disassembler/AArch64/armv8.5a-specctrl.txt | 9 + .../Disassembler/AArch64/armv8.5a-specrestrict.txt | 52 +++ .../AArch64/basic-a64-instructions.txt | 2 - .../AArch64/{csdb.txt => speculation-barriers.txt} | 7 +- .../Disassembler/ARM/armv8.5a-specctrl-thumb.txt | 9 + .../test/MC/Disassembler/ARM/armv8.5a-specctrl.txt | 9 + .../MC/Disassembler/ARM/basic-arm-instructions.txt | 4 +- llvm/test/MC/Disassembler/ARM/thumb2.txt | 4 +- llvm/test/MC/Sparc/leon-pwrpsr-instruction.s | 10 + llvm/test/MC/Sparc/sparc-misc-instructions.s | 8 + llvm/test/Other/X86/mbb-dump.ll | 25 ++ llvm/test/ThinLTO/X86/devirt-after-icp.ll | 148 +++++++++ llvm/test/Transforms/InstCombine/fcmp.ll | 91 ++++++ .../X86/expand-masked-gather.ll | 63 ++++ .../X86/expand-masked-load.ll | 119 +++++++ .../X86/expand-masked-store.ll | 59 ++++ .../analysis-inconsistencies-uops-backwards.test | 28 ++ .../X86/analysis-inconsistencies-uops.test | 28 ++ .../llvm-mca/X86/BtVer2/clear-super-register-1.s | 36 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 12 +- .../tools/llvm-mca/X86/BtVer2/resources-bmi1.s | 32 +- .../tools/llvm-mca/X86/BtVer2/resources-sse41.s | 12 +- .../tools/llvm-mca/X86/BtVer2/resources-x86_64.s | 86 ++--- llvm/tools/lli/lli.cpp | 6 +- llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 53 ++- .../llvm-mca/include/HardwareUnits/RegisterFile.h | 34 +- llvm/tools/llvm-mca/include/Instruction.h | 25 +- .../llvm-mca/lib/HardwareUnits/RegisterFile.cpp | 51 ++- .../llvm-mca/lib/HardwareUnits/ResourceManager.cpp | 12 +- .../lib/HardwareUnits/RetireControlUnit.cpp | 2 +- llvm/tools/llvm-mca/lib/InstrBuilder.cpp | 21 +- llvm/tools/llvm-mca/lib/Instruction.cpp | 4 +- llvm/tools/llvm-mca/lib/Pipeline.cpp | 12 +- llvm/tools/llvm-mca/lib/Stages/DispatchStage.cpp | 10 +- llvm/tools/llvm-mca/lib/Stages/ExecuteStage.cpp | 6 +- llvm/tools/llvm-mca/llvm-mca.cpp | 2 +- llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 13 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 81 ++--- .../ExecutionEngine/Orc/ThreadSafeModuleTest.cpp | 6 +- llvm/unittests/Support/TargetParserTest.cpp | 9 +- llvm/utils/release/merge-request.sh | 3 + polly/include/polly/CodeGen/IslAst.h | 6 +- polly/lib/CodeGen/IslAst.cpp | 38 +-- polly/test/ScheduleOptimizer/SIMDInParallelFor.ll | 65 ++++ .../full_partial_tile_separation.ll | 4 + 305 files changed, 5242 insertions(+), 2404 deletions(-) rename clang/lib/Driver/ToolChains/{RISCV.cpp => RISCVToolchain.cpp} (98%) rename clang/lib/Driver/ToolChains/{RISCV.h => RISCVToolchain.h} (88%) create mode 100644 clang/test/CodeGen/catch-implicit-integer-truncations-basics-ne [...] create mode 100644 clang/test/Driver/aarch64-rand.c create mode 100644 clang/test/SemaCXX/cxx2a-lambda-default-ctor-assign.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir delete mode 100644 llvm/test/CodeGen/SPARC/sjlj.ll create mode 100644 llvm/test/MC/AArch64/armv8.5a-bti-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-bti.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-frint-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-frint.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-persistent-memory.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-predctrl-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-predctrl.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-rand-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-rand.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specctrl.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specrestrict-error.s create mode 100644 llvm/test/MC/AArch64/armv8.5a-specrestrict.s rename llvm/test/MC/AArch64/{csdb.s => speculation-barriers.s} (52%) create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl-error-thumb.s create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl-error.s create mode 100644 llvm/test/MC/ARM/armv8.5a-specctrl.s delete mode 100644 llvm/test/MC/ARM/csdb-errors.s delete mode 100644 llvm/test/MC/ARM/csdb.s create mode 100644 llvm/test/MC/ARM/speculation-barriers-errors.s create mode 100644 llvm/test/MC/ARM/speculation-barriers.s create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-persistent-memory.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-predctrl.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-rand.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-specctrl.txt create mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-specrestrict.txt rename llvm/test/MC/Disassembler/AArch64/{csdb.txt => speculation-barriers.txt} (50%) create mode 100644 llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl-thumb.txt create mode 100644 llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl.txt create mode 100644 llvm/test/MC/Sparc/leon-pwrpsr-instruction.s create mode 100644 llvm/test/MC/Sparc/sparc-misc-instructions.s create mode 100644 llvm/test/Other/X86/mbb-dump.ll create mode 100644 llvm/test/ThinLTO/X86/devirt-after-icp.ll create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked [...] create mode 100644 llvm/test/tools/llvm-exegesis/X86/analysis-inconsistencies-uops [...] create mode 100644 llvm/test/tools/llvm-exegesis/X86/analysis-inconsistencies-uops.test create mode 100644 polly/test/ScheduleOptimizer/SIMDInParallelFor.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[llvm] branch master updated (ab5d6ab2dea -> 965ed082b4d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from ab5d6ab2dea [X86][Btver2] Fix BSF/BSR schedule new 965ed082b4d [llvm-mca] Remove redundant namespace prefixes. NFC The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp | 6 +++--- .../llvm-mca/lib/HardwareUnits/ResourceManager.cpp | 12 ++++++------ .../lib/HardwareUnits/RetireControlUnit.cpp | 2 +- tools/llvm-mca/lib/InstrBuilder.cpp | 21 ++++++++++----------- tools/llvm-mca/lib/Instruction.cpp | 4 ++-- tools/llvm-mca/lib/Pipeline.cpp | 12 ++++++------ tools/llvm-mca/lib/Stages/DispatchStage.cpp | 10 +++++----- tools/llvm-mca/lib/Stages/ExecuteStage.cpp | 6 +++--- 8 files changed, 36 insertions(+), 37 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits September 2018