Tcwg-commits August 2019

tcwg-commits@lists.linaro.org

6 participants
13798 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/gnu-release-aarch64-spec2k6-Os updated (beafaed1 -> 71803560)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-aarch64-spec2k6-Os in repository toolchain/ci/base-artifacts. discards beafaed1 0: update: binutils-gcc-glibc: 0 new 71803560 0: update: glibc-2d3fefd7ce64ac1015701c96916fffacc073a877: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (beafaed1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 175 +- 02-prepare_abe/console.log | 398 +- 03-build_abe-binutils/console.log | 10841 ++-- 04-build_abe-stage1/console.log | 13481 +++-- 05-build_abe-linux/console.log | 79 +- 06-build_abe-glibc/console.log | 20959 ++++---- 07-build_abe-stage2/console.log | 40233 ++++++++------- 09-benchmark/benchmark-start.log | 2 +- 09-benchmark/benchmark.log | 39 +- 09-benchmark/console.log | 112 +- 10-check_regression/console.log | 5906 ++- 11-update_baseline/console.log | 6428 ++- console.log | 99020 +++++++++++++++++++----------------- jenkins/manifest.sh | 10 +- results-full.csv | 2068 + results.csv | 266 +- results_id | 2 +- 17 files changed, 105511 insertions(+), 94508 deletions(-) create mode 100644 results-full.csv -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (a69e90512d9d -> 6e625a1a3f47)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/linux. from a69e90512d9d Merge tag 'xfs-5.3-fixes-2' of git://git.kernel.org/pub/sc [...] adds 05b439711f6f drm/ast: Fixed reboot test may cause system hanged adds db1231ddc046 drm/nouveau: Only recalculate PBN/VCPI on mode/connector changes adds 17b6d2d52854 drm/amdgpu: fix gfx9 soft recovery adds 31ec0dd38085 drm/amd/display: use kvmalloc for dc_state (v2) adds e1b4ce25dbc9 drm/scheduler: use job count instead of peek adds 2f62c5d6ed0a Merge tag 'drm-fixes-5.3-2019-08-14' of git://people.freed [...] adds eac4471d0882 drm/i915: Use after free in error path in intel_vgpu_creat [...] adds daa37200d489 Merge tag 'gvt-fixes-2019-08-13' of https://github.com/int [...] adds a85abd5d45ad Merge tag 'drm-intel-fixes-2019-08-15' of git://anongit.fr [...] adds ec037ac244c0 Merge tag 'drm-fixes-2019-08-16' of git://anongit.freedesk [...] adds de768ce45466 ALSA: hda - Apply workaround for another AMD chip 1022:1487 adds cfef67f016e4 ALSA: hda - Fix a memory leak bug adds 190d03814eb3 ALSA: hda/realtek - Add quirk for HP Envy x360 adds 401714d9534a ALSA: hda - Let all conexant codec enter D3 when rebooting adds 871b90660277 ALSA: hda - Add a generic reboot_notify adds daac07156b33 ALSA: usb-audio: Fix an OOB bug in parse_audio_mixer_unit adds 19bce474c45b ALSA: usb-audio: Fix a stack buffer overflow bug in check_ [...] adds cfa0bb2aef99 Merge tag 'sound-5.3-rc5' of git://git.kernel.org/pub/scm/ [...] adds f0414087a1b9 dmaengine: dw-edma: fix unnecessary stack usage adds 756c3ef93492 dmaengine: dw-edma: fix __iomem type confusion adds 6f4722b1d1eb dmaengine: dw-edma: fix endianess confusion adds 5d6fb560729a dmaengine: ste_dma40: fix unneeded variable warning adds d105ef8120dd dmaengine: tegra210-adma: Fix unused function warnings adds 39c71a5b8212 dmaengine: stm32-mdma: Fix a possible null-pointer derefer [...] adds d555c34338ca omap-dma/omap_vout_vrfb: fix off-by-one fi value adds 9da5bb24bb36 Merge tag 'dmaengine-fix-5.3-rc5' of git://git.infradead.o [...] adds accd2dd72c8f PCI/ASPM: Add pcie_aspm_enabled() adds 4eaefe8c621c nvme-pci: Allow PCI bus-level PM to be used if ASPM is disabled adds e61a41256edf cpufreq: dev_pm_qos_update_request() can return 1 on success adds 600f5badb78c cpufreq: schedutil: Don't skip freq update when limits change adds a3ee2477c45f Merge branch 'pm-cpufreq' adds 2d63ba3e41db Merge tag 'pm-5.3-rc5' of git://git.kernel.org/pub/scm/lin [...] adds 5717fe5ab38f arm64: cpufeature: Don't treat granule sizes as strict adds b6143d10d23e arm64: ftrace: Ensure module ftrace trampoline is coherent [...] adds b7e7c85dc7b0 Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/li [...] adds cd8869f4cb25 xtensa: add missing isync to the cpu_reset TLB code adds 6e625a1a3f47 Merge tag 'xtensa-20190816' of git://github.com/jcmvbkbc/l [...] No new revisions were added by this update. Summary of changes: arch/arm64/kernel/cpufeature.c | 14 ++++++++--- arch/arm64/kernel/ftrace.c | 22 ++++++++++------- arch/xtensa/kernel/setup.c | 1 + drivers/cpufreq/cpufreq.c | 2 +- drivers/dma/dw-edma/dw-edma-core.h | 2 +- drivers/dma/dw-edma/dw-edma-pcie.c | 18 +++++++------- drivers/dma/dw-edma/dw-edma-v0-core.c | 34 +++++++++++-------------- drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 29 +++++++++++----------- drivers/dma/ste_dma40.c | 4 +-- drivers/dma/stm32-mdma.c | 2 +- drivers/dma/tegra210-adma.c | 4 +-- drivers/dma/ti/omap-dma.c | 4 +-- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 11 +++++---- drivers/gpu/drm/ast/ast_main.c | 5 +++- drivers/gpu/drm/ast/ast_mode.c | 2 +- drivers/gpu/drm/ast/ast_post.c | 2 +- drivers/gpu/drm/i915/gvt/scheduler.c | 4 +-- drivers/gpu/drm/nouveau/dispnv50/disp.c | 22 ++++++++++------- drivers/gpu/drm/scheduler/sched_entity.c | 4 +-- drivers/media/platform/omap/omap_vout_vrfb.c | 3 +-- drivers/nvme/host/pci.c | 13 +++++++--- drivers/pci/pcie/aspm.c | 20 +++++++++++++++ include/linux/pci.h | 2 ++ kernel/sched/cpufreq_schedutil.c | 14 ++++++++--- sound/pci/hda/hda_generic.c | 21 +++++++++++++++- sound/pci/hda/hda_generic.h | 1 + sound/pci/hda/hda_intel.c | 3 +++ sound/pci/hda/patch_conexant.c | 15 +---------- sound/pci/hda/patch_realtek.c | 12 ++------- sound/usb/mixer.c | 37 ++++++++++++++++++++++------ 31 files changed, 202 insertions(+), 127 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (6e1ac424742 -> a560bbf7a03)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project. from 6e1ac424742 [ARM] Correct register for narrowing and widening MVE loads [...] adds 6897f993144 [libcxxabi] __cxa_guard_require: test guard byte with != 0 [...] adds 9da4989c523 [X86] Remove unused include. NFCI. adds 3ccee5f7c40 [AArch64InstrInfo] Stop getInstSizeInBytes returning non-ze [...] adds 213edc34922 [X86][SSE] Add shuffled load tests from PR16739 adds 4c78b788250 [lldb][NFC] Allow for-ranges on StringList adds fa06e95898b [RISCV] Convert registers from unsigned to Register adds 1051f4f9bf8 Revert rL369112 : [X86][SSE] Add shuffled load tests from PR16739 adds 429aa7c1e65 [X86][SSE] Add shuffled load tests from PR16739 adds 16244fccfe6 [InstCombine] Shift amount reassociation in bittest: trunc- [...] adds b782e61e471 [ARM] MVE sext of a load is free adds 5f865ecf06c [TextAPI] Update reader to be supported by lib/Object adds 05e9c2ac2e1 [InstCombine] Simplify pow(2.0, itofp(y)) to ldexp(1.0, y) adds 2d3ebeb8139 [lld][Hexagon]Support HEX_32 when building shared objects adds f28e1128d9e Relanding r368987 [AArch64] Change location of frame-record [...] adds b46131e5c3a [clang-doc] Fix records in global namespace adds ac83aab035f [Hexagon] Generate min/max instructions for 64-bit vectors adds e03f6a16317 [CodeGen/Analysis] Intrinsic llvm.assume should not block t [...] adds 3a8c6987714 [X86] Alphabetize pass initialization definitions. NFCI. adds 144903310f5 [SLP] add tests for PR16739; NFC adds 7ca1e0c825e [ELF][Hexagon] Replace R_HEXAGON_GOT with R_GOTPLT adds ea0ace75e03 Fix llvm-config support for CMake build-mode-style builds adds 7e106445efd [ADT] Remove llvm::make_unique utility. adds 1d254f3dae6 [SLPVectorizer] Make the scheduler aware of the TreeEntry o [...] adds 19301d75f08 Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning [...] adds 2632c677f85 [AArch64InstrInfo] Stop getInstSizeInBytes returning non-ze [...] adds 8ff1b7de4da [X86] combineExtractWithShuffle - handle extract(truncate(x), 0) adds c809230a692 [AArch64][GlobalISel] Lower G_SHUFFLE_VECTOR with 1 elt src [...] adds 63b78b678bc [X86] resolveTargetShuffleInputs - add DemandedElts variant. NFCI. adds b1cb9fd1aaf [WebAssembly] Forbid use of EM_ASM with setjmp/longjmp adds 187c63f1453 Escape % in printf format string. adds 3550da79ecd [clang-doc] Redesign of generated HTML files adds 39eb2324f7e [InstCombine] canonicalize a scalar-select-of-vectors to ve [...] adds 9bb9a0c10b2 [ORC] Remove some stray debugging output accidentally left [...] adds fe6dbadc0d5 [Attributor] Introduce initialize calls and move code to ke [...] adds 66cf87e2909 [Attributor][NFC] Introduce aliases for call site attributes adds 234eda563df [Attributor] Towards a more structured deduction pattern adds 2e3ed4a852d Stop abusing SuppressAllDiagnostics when speculatively dete [...] adds 217ff1e4456 [OPENMP5.0]Diagnose global variables in lambda not marked a [...] adds f4cf3b95933 [ARM] push LR before __gnu_mcount_nc adds 856608c30a8 [Test Commit] Fix typo in diagtool.rst adds 2d957cfe02a Revert "[ARM] push LR before __gnu_mcount_nc" adds 8191585b36e [TSan] Don't guard #include <xpc/xpc.h> adds a17d1d22504 [X86] Use Register/MCRegister in more places in X86 adds 250aafa2c4a [X86] Support -mlong-double-80 adds 3af3f1e8e25 [Utility] Reimplement RegularExpression on top of llvm::Regex adds f4bdbea02ff [RWMutex] Simplify availability check adds 6dedc78d9dd [Attributor] Add all missing attribute definitions/symbols adds 8341a847a22 [CodeGenPrepare] fix RUN line settings adds ac67414618d [clang-format] Fix the bug that joins template closer and > or >> adds 17cb9185363 [CaptureTracking] Allow null to be in either icmp operand adds cbaf1fdea2d [Attributor] Fix: Make sure we set the changed flag adds f72d9b1c97b [Attributor] Fix: Do not partially resolve returned calls. adds 87869b398db [doc] Fix some minor formatting issues. adds eaff844fe95 [ARM] Preserve liveness in ARMConstantIslands. adds 97176bd2bce [InstCombine][NFC] Revisit tests in reuse-constant-from-sel [...] adds 4a9b747bfb5 [TSan] Add interceptors for os_unfair_lock adds 0c2f26d6640 Revert "[TSan] Don't guard #include <xpc/xpc.h>" adds 515ad8fe4ac [InstCombine][NFC] reuse-constant-from-select-in-icmp.ll - [...] adds d0797ece464 Revert [X86] SimplifyDemandedVectorElts - attempt to recomb [...] adds acceedb15f5 [CodeGenPrepare] Fix use-after-free adds 7da81b5e4d2 [llvm-readobj] Fallback to PT_NOTE if file doesn't have sections adds 0dd9494d470 Revert "[X86] Support -mlong-double-80" adds 8e2837e549d [ORC] Re-introduce self-dependence accidentally dropped fro [...] adds 57ec292ab80 [AArch64][GlobalISel] Fix an assertion during G_UNMERGE sel [...] adds 16fa8b09702 Reland "[ARM] push LR before __gnu_mcount_nc" adds a53ad0e157d Revert r367891 - "[InstCombine] combine mul+shl separated by zext" adds 43c8b19546a Add LLDB dataformatters for llvm::StringRef and lldb_privat [...] adds 0b5ecef299f [llvm-readobj] Unwrap the value first to avoid the error adds 69cef325a33 Simplify code (NFC). adds edf504f5038 [Fuchsia] Create the VMO during initialization, not during exit adds f92109dc01b [MemorySSA] Loop passes should mark MSSA preserved when available. adds ee6700f6976 [clang-doc] Fix casting not working in gcc 5.4.0 adds c0d70bca0f9 [X86] Support -mlong-double-80 adds d5d79dfd563 [ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI adds 93c7a4a47cc Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning [...] adds 26295676a44 Revert Revert [AArch64InstrInfo] Stop getInstSizeInBytes re [...] adds a560bbf7a03 [ELF] Replace local variable hasExportDynamic with config-> [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-doc/HTMLGenerator.cpp | 231 +++-- clang-tools-extra/clang-doc/Representation.cpp | 10 +- clang-tools-extra/clang-doc/Representation.h | 5 +- clang-tools-extra/clang-doc/Serialize.cpp | 20 +- .../assets/clang-doc-default-stylesheet.css | 996 ++++++++++++++++++--- clang-tools-extra/clang-doc/assets/index.js | 16 +- clang-tools-extra/clang-doc/tool/ClangDocMain.cpp | 5 + clang-tools-extra/docs/clang-doc.rst | 1 + .../test/clang-doc/single-file-public.cpp | 14 +- .../unittests/clang-doc/HTMLGeneratorTest.cpp | 347 +++---- .../unittests/clang-doc/SerializeTest.cpp | 110 ++- clang/docs/CommandGuide/diagtool.rst | 2 +- clang/docs/LanguageExtensions.rst | 14 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 + clang/include/clang/Driver/Options.td | 9 +- clang/lib/Basic/Targets/ARM.cpp | 2 +- clang/lib/Driver/ToolChains/Clang.cpp | 9 +- clang/lib/Format/TokenAnnotator.cpp | 2 + clang/lib/Parse/ParseExpr.cpp | 6 +- clang/lib/Sema/Sema.cpp | 4 +- clang/lib/Sema/SemaOpenMP.cpp | 48 +- clang/test/Driver/mlong-double-128.c | 6 +- clang/test/Frontend/gnu-mcount.c | 2 +- clang/test/OpenMP/declare_target_messages.cpp | 17 +- clang/unittests/Format/FormatTest.cpp | 5 +- .../lib/profile/InstrProfilingPlatformFuchsia.c | 93 +- compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp | 53 ++ compiler-rt/test/tsan/Darwin/os_unfair_lock.c | 30 + libcxxabi/src/cxa_guard_impl.h | 2 +- lld/ELF/Arch/Hexagon.cpp | 9 +- lld/ELF/Arch/PPC64.cpp | 1 + lld/ELF/Driver.cpp | 7 +- lld/ELF/InputSection.cpp | 2 - lld/ELF/Relocations.cpp | 8 +- lld/ELF/Relocations.h | 1 - lld/test/ELF/hexagon-shared.s | 25 +- lld/test/ELF/ppc64-reloc-rel.s | 58 ++ lld/test/ELF/ppc64-relocs.s | 81 +- .../lldb/Breakpoint/BreakpointResolverFileRegex.h | 2 +- .../lldb/Breakpoint/BreakpointResolverName.h | 2 +- lldb/include/lldb/Core/AddressResolverName.h | 2 +- lldb/include/lldb/Interpreter/OptionValueRegex.h | 4 +- lldb/include/lldb/Utility/CompletionRequest.h | 4 +- lldb/include/lldb/Utility/RegularExpression.h | 139 +-- lldb/include/lldb/Utility/StringList.h | 12 +- .../Breakpoint/BreakpointResolverFileRegex.cpp | 9 +- lldb/source/Breakpoint/BreakpointResolverName.cpp | 4 +- lldb/source/Breakpoint/WatchpointOptions.cpp | 5 +- lldb/source/Commands/CommandObjectApropos.cpp | 6 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 12 +- lldb/source/Commands/CommandObjectCommands.cpp | 6 +- lldb/source/Commands/CommandObjectFrame.cpp | 6 +- lldb/source/Commands/CommandObjectMultiword.cpp | 4 +- lldb/source/Commands/CommandObjectType.cpp | 8 +- lldb/source/Core/AddressResolverName.cpp | 4 +- lldb/source/Core/Disassembler.cpp | 25 +- lldb/source/Host/common/Socket.cpp | 36 +- lldb/source/Interpreter/CommandObject.cpp | 2 +- .../Interpreter/CommandObjectRegexCommand.cpp | 9 +- lldb/source/Interpreter/OptionArgParser.cpp | 36 +- lldb/source/Interpreter/OptionValueRegex.cpp | 9 +- .../Disassembler/llvm/DisassemblerLLVMC.cpp | 7 +- .../RenderScriptRuntime/RenderScriptRuntime.cpp | 18 +- .../Process/Utility/DynamicRegisterInfo.cpp | 113 ++- .../DarwinLog/StructuredDataDarwinLog.cpp | 7 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 20 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 41 +- lldb/source/Symbol/ObjectFile.cpp | 17 +- lldb/source/Symbol/Variable.cpp | 12 +- lldb/source/Target/ThreadPlanStepInRange.cpp | 29 +- lldb/source/Utility/Args.cpp | 4 +- lldb/source/Utility/RegularExpression.cpp | 147 +-- lldb/source/Utility/StringList.cpp | 5 +- lldb/unittests/Editline/EditlineTest.cpp | 8 +- lldb/unittests/Utility/CMakeLists.txt | 3 +- lldb/unittests/Utility/NameMatchesTest.cpp | 4 +- lldb/unittests/Utility/RegularExpressionTest.cpp | 65 ++ lldb/unittests/Utility/StringListTest.cpp | 18 + llvm/include/llvm/ADT/STLExtras.h | 35 - llvm/include/llvm/IR/IntrinsicsARM.td | 5 + llvm/include/llvm/IR/PatternMatch.h | 6 + llvm/include/llvm/Support/RWMutex.h | 16 +- llvm/include/llvm/TextAPI/MachO/TextAPIReader.h | 5 +- llvm/lib/Analysis/CaptureTracking.cpp | 12 +- llvm/lib/CodeGen/Analysis.cpp | 6 +- llvm/lib/CodeGen/BranchRelaxation.cpp | 2 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 3 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 18 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 2 - llvm/lib/Support/RWMutex.cpp | 2 +- .../lib/Target/AArch64/AArch64CallingConvention.td | 30 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 79 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 10 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 4 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 5 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 21 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 31 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 44 + llvm/lib/Target/ARM/ARMISelLowering.h | 2 + llvm/lib/Target/ARM/ARMInstrInfo.td | 6 + llvm/lib/Target/ARM/ARMInstrThumb.td | 7 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 15 + llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 61 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonPatterns.td | 89 +- llvm/lib/Target/Hexagon/HexagonPatternsHVX.td | 32 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 65 +- .../RISCV/Disassembler/RISCVDisassembler.cpp | 19 +- .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 3 +- .../RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 3 +- llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp | 10 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 24 +- llvm/lib/Target/RISCV/RISCVFrameLowering.h | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 24 +- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp | 6 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 24 + llvm/lib/Target/X86/AsmParser/X86Operand.h | 2 +- .../Target/X86/MCTargetDesc/X86MCTargetDesc.cpp | 28 +- llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h | 7 +- llvm/lib/Target/X86/X86.h | 2 +- llvm/lib/Target/X86/X86FixupBWInsts.cpp | 10 +- llvm/lib/Target/X86/X86FixupLEAs.cpp | 7 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 12 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 42 +- llvm/lib/Target/X86/X86ISelLowering.h | 1 - llvm/lib/Target/X86/X86InstrInfo.cpp | 16 +- llvm/lib/Target/X86/X86InstrInfo.h | 2 +- llvm/lib/Target/X86/X86RegisterInfo.cpp | 4 +- llvm/lib/TextAPI/MachO/TextStub.cpp | 8 +- llvm/lib/Transforms/IPO/Attributor.cpp | 868 +++++++++++------- .../Transforms/InstCombine/InstCombineCompares.cpp | 75 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 27 + .../Transforms/InstCombine/InstCombineShifts.cpp | 15 +- llvm/lib/Transforms/Scalar/LICM.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopInstSimplify.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopRotation.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp | 4 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 2 +- .../lib/Transforms/Utils/EntryExitInstrumenter.cpp | 2 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 54 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 250 ++++-- llvm/test/Analysis/CostModel/ARM/cast.ll | 12 +- .../AArch64/GlobalISel/legalize-shuffle-vector.mir | 26 + .../CodeGen/AArch64/GlobalISel/select-unmerge.mir | 17 + .../AArch64/aarch64-dynamic-stack-layout.ll | 124 +-- llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir | 24 +- .../CodeGen/AArch64/addsub-constant-folding.ll | 72 +- llvm/test/CodeGen/AArch64/alloca.ll | 13 +- .../AArch64/arm64-alloca-frame-pointer-offset.ll | 4 +- .../CodeGen/AArch64/branch-relax-block-size.mir | 80 ++ llvm/test/CodeGen/AArch64/cgp-usubo.ll | 12 +- llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll | 1 + llvm/test/CodeGen/AArch64/irg_sp_tagp.ll | 2 +- .../AArch64/regress-w29-reserved-with-fp.ll | 2 +- .../CodeGen/AArch64/reverse-csr-restore-seq.mir | 6 +- llvm/test/CodeGen/AArch64/seh-finally.ll | 8 +- llvm/test/CodeGen/AArch64/shadow-call-stack.ll | 2 +- .../CodeGen/AArch64/sink-copy-for-shrink-wrap.ll | 2 +- .../CodeGen/AArch64/spill-stack-realignment.mir | 4 +- llvm/test/CodeGen/AArch64/sponentry.ll | 4 +- llvm/test/CodeGen/AArch64/stack-guard-reassign.ll | 2 +- llvm/test/CodeGen/AArch64/stack-guard-vaarg.ll | 2 +- ...old-masked-merge-scalar-constmask-innerouter.ll | 16 +- ...asked-merge-scalar-constmask-interleavedbits.ll | 16 +- ...merge-scalar-constmask-interleavedbytehalves.ll | 16 +- ...unfold-masked-merge-scalar-constmask-lowhigh.ll | 16 +- .../unfold-masked-merge-scalar-variablemask.ll | 16 +- .../AArch64/unreachable-emergency-spill-slot.mir | 6 +- llvm/test/CodeGen/AArch64/win64_vararg.ll | 70 +- llvm/test/CodeGen/AArch64/wineh-frame5.mir | 20 +- llvm/test/CodeGen/AArch64/wineh-frame7.mir | 12 +- .../CodeGen/AArch64/wineh-try-catch-realign.ll | 12 +- llvm/test/CodeGen/AArch64/wineh-try-catch.ll | 36 +- llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir | 4 +- llvm/test/CodeGen/ARM/constant-island-movwt.mir | 8 + llvm/test/CodeGen/ARM/gnu_mcount_nc.ll | 41 + llvm/test/CodeGen/Hexagon/isel-minmax-v64bit.ll | 202 +++++ llvm/test/CodeGen/Hexagon/isel-vselect-v4i8.ll | 2 +- .../CodeGen/X86/avx512-intrinsics-fast-isel.ll | 16 +- llvm/test/CodeGen/X86/load-partial.ll | 162 ++++ llvm/test/CodeGen/X86/shrink_vmul.ll | 202 ++--- llvm/test/CodeGen/X86/tailcall-assume.ll | 15 + llvm/test/CodeGen/X86/vec_smulo.ll | 152 ++-- llvm/test/CodeGen/X86/vec_umulo.ll | 140 +-- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 18 +- .../CodeGenPrepare/sink-shift-and-trunc.ll | 19 +- .../Transforms/EntryExitInstrumenter/mcount.ll | 4 +- llvm/test/Transforms/FunctionAttrs/align.ll | 32 +- .../Transforms/FunctionAttrs/noalias_returned.ll | 10 +- llvm/test/Transforms/FunctionAttrs/nocapture.ll | 14 + llvm/test/Transforms/InstCombine/pow_fp_int.ll | 63 ++ .../reuse-constant-from-select-in-icmp.ll | 48 +- .../InstCombine/select-extractelement.ll | 14 +- ...reassociation-in-bittest-with-truncation-shl.ll | 80 +- llvm/test/Transforms/InstCombine/shift.ll | 14 +- .../Transforms/SLPVectorizer/X86/load-merge.ll | 68 ++ llvm/test/tools/llvm-readobj/gnu-notes.test | 38 +- llvm/tools/llvm-config/llvm-config.cpp | 13 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 43 +- llvm/unittests/ADT/IteratorTest.cpp | 2 +- .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 1 + llvm/unittests/TextAPI/TextStubV1Tests.cpp | 72 +- llvm/unittests/TextAPI/TextStubV2Tests.cpp | 72 +- llvm/unittests/TextAPI/TextStubV3Tests.cpp | 69 +- llvm/utils/lldbDataFormatters.py | 23 + 207 files changed, 5025 insertions(+), 2586 deletions(-) create mode 100644 compiler-rt/test/tsan/Darwin/os_unfair_lock.c create mode 100644 lld/test/ELF/ppc64-reloc-rel.s create mode 100644 lldb/unittests/Utility/RegularExpressionTest.cpp create mode 100644 llvm/test/CodeGen/AArch64/branch-relax-block-size.mir create mode 100644 llvm/test/CodeGen/ARM/gnu_mcount_nc.ll create mode 100644 llvm/test/CodeGen/Hexagon/isel-minmax-v64bit.ll create mode 100644 llvm/test/CodeGen/X86/tailcall-assume.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (dc4fbb78 -> 75dcc3bf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards dc4fbb78 0: update: llvm-linux: 17870 new 75dcc3bf 0: update: llvm-linux: 17870 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (dc4fbb78) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 102 +- 02-build_llvm/console.log | 12050 +++++++++++++++++------------------ 03-build_linux/console.log | 832 ++- 05-check_regression/console.log | 8 +- 06-update_baseline/console.log | 28 - console.log | 13020 +++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- 7 files changed, 12995 insertions(+), 13059 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (a69e90512d9d -> 6e625a1a3f47)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/linux. from a69e90512d9d Merge tag 'xfs-5.3-fixes-2' of git://git.kernel.org/pub/sc [...] adds 05b439711f6f drm/ast: Fixed reboot test may cause system hanged adds db1231ddc046 drm/nouveau: Only recalculate PBN/VCPI on mode/connector changes adds 17b6d2d52854 drm/amdgpu: fix gfx9 soft recovery adds 31ec0dd38085 drm/amd/display: use kvmalloc for dc_state (v2) adds e1b4ce25dbc9 drm/scheduler: use job count instead of peek adds 2f62c5d6ed0a Merge tag 'drm-fixes-5.3-2019-08-14' of git://people.freed [...] adds eac4471d0882 drm/i915: Use after free in error path in intel_vgpu_creat [...] adds daa37200d489 Merge tag 'gvt-fixes-2019-08-13' of https://github.com/int [...] adds a85abd5d45ad Merge tag 'drm-intel-fixes-2019-08-15' of git://anongit.fr [...] adds ec037ac244c0 Merge tag 'drm-fixes-2019-08-16' of git://anongit.freedesk [...] adds de768ce45466 ALSA: hda - Apply workaround for another AMD chip 1022:1487 adds cfef67f016e4 ALSA: hda - Fix a memory leak bug adds 190d03814eb3 ALSA: hda/realtek - Add quirk for HP Envy x360 adds 401714d9534a ALSA: hda - Let all conexant codec enter D3 when rebooting adds 871b90660277 ALSA: hda - Add a generic reboot_notify adds daac07156b33 ALSA: usb-audio: Fix an OOB bug in parse_audio_mixer_unit adds 19bce474c45b ALSA: usb-audio: Fix a stack buffer overflow bug in check_ [...] adds cfa0bb2aef99 Merge tag 'sound-5.3-rc5' of git://git.kernel.org/pub/scm/ [...] adds f0414087a1b9 dmaengine: dw-edma: fix unnecessary stack usage adds 756c3ef93492 dmaengine: dw-edma: fix __iomem type confusion adds 6f4722b1d1eb dmaengine: dw-edma: fix endianess confusion adds 5d6fb560729a dmaengine: ste_dma40: fix unneeded variable warning adds d105ef8120dd dmaengine: tegra210-adma: Fix unused function warnings adds 39c71a5b8212 dmaengine: stm32-mdma: Fix a possible null-pointer derefer [...] adds d555c34338ca omap-dma/omap_vout_vrfb: fix off-by-one fi value adds 9da5bb24bb36 Merge tag 'dmaengine-fix-5.3-rc5' of git://git.infradead.o [...] adds accd2dd72c8f PCI/ASPM: Add pcie_aspm_enabled() adds 4eaefe8c621c nvme-pci: Allow PCI bus-level PM to be used if ASPM is disabled adds e61a41256edf cpufreq: dev_pm_qos_update_request() can return 1 on success adds 600f5badb78c cpufreq: schedutil: Don't skip freq update when limits change adds a3ee2477c45f Merge branch 'pm-cpufreq' adds 2d63ba3e41db Merge tag 'pm-5.3-rc5' of git://git.kernel.org/pub/scm/lin [...] adds 5717fe5ab38f arm64: cpufeature: Don't treat granule sizes as strict adds b6143d10d23e arm64: ftrace: Ensure module ftrace trampoline is coherent [...] adds b7e7c85dc7b0 Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/li [...] adds cd8869f4cb25 xtensa: add missing isync to the cpu_reset TLB code adds 6e625a1a3f47 Merge tag 'xtensa-20190816' of git://github.com/jcmvbkbc/l [...] No new revisions were added by this update. Summary of changes: arch/arm64/kernel/cpufeature.c | 14 ++++++++--- arch/arm64/kernel/ftrace.c | 22 ++++++++++------- arch/xtensa/kernel/setup.c | 1 + drivers/cpufreq/cpufreq.c | 2 +- drivers/dma/dw-edma/dw-edma-core.h | 2 +- drivers/dma/dw-edma/dw-edma-pcie.c | 18 +++++++------- drivers/dma/dw-edma/dw-edma-v0-core.c | 34 +++++++++++-------------- drivers/dma/dw-edma/dw-edma-v0-debugfs.c | 29 +++++++++++----------- drivers/dma/ste_dma40.c | 4 +-- drivers/dma/stm32-mdma.c | 2 +- drivers/dma/tegra210-adma.c | 4 +-- drivers/dma/ti/omap-dma.c | 4 +-- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 11 +++++---- drivers/gpu/drm/ast/ast_main.c | 5 +++- drivers/gpu/drm/ast/ast_mode.c | 2 +- drivers/gpu/drm/ast/ast_post.c | 2 +- drivers/gpu/drm/i915/gvt/scheduler.c | 4 +-- drivers/gpu/drm/nouveau/dispnv50/disp.c | 22 ++++++++++------- drivers/gpu/drm/scheduler/sched_entity.c | 4 +-- drivers/media/platform/omap/omap_vout_vrfb.c | 3 +-- drivers/nvme/host/pci.c | 13 +++++++--- drivers/pci/pcie/aspm.c | 20 +++++++++++++++ include/linux/pci.h | 2 ++ kernel/sched/cpufreq_schedutil.c | 14 ++++++++--- sound/pci/hda/hda_generic.c | 21 +++++++++++++++- sound/pci/hda/hda_generic.h | 1 + sound/pci/hda/hda_intel.c | 3 +++ sound/pci/hda/patch_conexant.c | 15 +---------- sound/pci/hda/patch_realtek.c | 12 ++------- sound/usb/mixer.c | 37 ++++++++++++++++++++++------ 31 files changed, 202 insertions(+), 127 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (8c2c5f5045b -> a560bbf7a03)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/llvm-project. from 8c2c5f5045b [ARM] Don't pretend we know how to generate MVE VLDn adds 6a75061e36f [X86] Add test case for future MULFIX DAG combine folds. NFC adds 9dddd26e31a [DAGCombiner] Add simple folds for SMULFIX/UMULFIX/SMULFIXSAT adds 403e85cbc56 Revert [CodeGen] Do the Simple Early Return in block-placem [...] adds 427762f03d7 [clangd] suppress -Wparentheses warning: suggest parenthese [...] adds 15fb2a73f9a [x86] add tests for fdiv with variable operands; NFC adds 5dcec7ce7ae [x86] fix fdiv test; NFC adds 6e1ac424742 [ARM] Correct register for narrowing and widening MVE loads [...] adds 6897f993144 [libcxxabi] __cxa_guard_require: test guard byte with != 0 [...] adds 9da4989c523 [X86] Remove unused include. NFCI. adds 3ccee5f7c40 [AArch64InstrInfo] Stop getInstSizeInBytes returning non-ze [...] adds 213edc34922 [X86][SSE] Add shuffled load tests from PR16739 adds 4c78b788250 [lldb][NFC] Allow for-ranges on StringList adds fa06e95898b [RISCV] Convert registers from unsigned to Register adds 1051f4f9bf8 Revert rL369112 : [X86][SSE] Add shuffled load tests from PR16739 adds 429aa7c1e65 [X86][SSE] Add shuffled load tests from PR16739 adds 16244fccfe6 [InstCombine] Shift amount reassociation in bittest: trunc- [...] adds b782e61e471 [ARM] MVE sext of a load is free adds 5f865ecf06c [TextAPI] Update reader to be supported by lib/Object adds 05e9c2ac2e1 [InstCombine] Simplify pow(2.0, itofp(y)) to ldexp(1.0, y) adds 2d3ebeb8139 [lld][Hexagon]Support HEX_32 when building shared objects adds f28e1128d9e Relanding r368987 [AArch64] Change location of frame-record [...] adds b46131e5c3a [clang-doc] Fix records in global namespace adds ac83aab035f [Hexagon] Generate min/max instructions for 64-bit vectors adds e03f6a16317 [CodeGen/Analysis] Intrinsic llvm.assume should not block t [...] adds 3a8c6987714 [X86] Alphabetize pass initialization definitions. NFCI. adds 144903310f5 [SLP] add tests for PR16739; NFC adds 7ca1e0c825e [ELF][Hexagon] Replace R_HEXAGON_GOT with R_GOTPLT adds ea0ace75e03 Fix llvm-config support for CMake build-mode-style builds adds 7e106445efd [ADT] Remove llvm::make_unique utility. adds 1d254f3dae6 [SLPVectorizer] Make the scheduler aware of the TreeEntry o [...] adds 19301d75f08 Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning [...] adds 2632c677f85 [AArch64InstrInfo] Stop getInstSizeInBytes returning non-ze [...] adds 8ff1b7de4da [X86] combineExtractWithShuffle - handle extract(truncate(x), 0) adds c809230a692 [AArch64][GlobalISel] Lower G_SHUFFLE_VECTOR with 1 elt src [...] adds 63b78b678bc [X86] resolveTargetShuffleInputs - add DemandedElts variant. NFCI. adds b1cb9fd1aaf [WebAssembly] Forbid use of EM_ASM with setjmp/longjmp adds 187c63f1453 Escape % in printf format string. adds 3550da79ecd [clang-doc] Redesign of generated HTML files adds 39eb2324f7e [InstCombine] canonicalize a scalar-select-of-vectors to ve [...] adds 9bb9a0c10b2 [ORC] Remove some stray debugging output accidentally left [...] adds fe6dbadc0d5 [Attributor] Introduce initialize calls and move code to ke [...] adds 66cf87e2909 [Attributor][NFC] Introduce aliases for call site attributes adds 234eda563df [Attributor] Towards a more structured deduction pattern adds 2e3ed4a852d Stop abusing SuppressAllDiagnostics when speculatively dete [...] adds 217ff1e4456 [OPENMP5.0]Diagnose global variables in lambda not marked a [...] adds f4cf3b95933 [ARM] push LR before __gnu_mcount_nc adds 856608c30a8 [Test Commit] Fix typo in diagtool.rst adds 2d957cfe02a Revert "[ARM] push LR before __gnu_mcount_nc" adds 8191585b36e [TSan] Don't guard #include <xpc/xpc.h> adds a17d1d22504 [X86] Use Register/MCRegister in more places in X86 adds 250aafa2c4a [X86] Support -mlong-double-80 adds 3af3f1e8e25 [Utility] Reimplement RegularExpression on top of llvm::Regex adds f4bdbea02ff [RWMutex] Simplify availability check adds 6dedc78d9dd [Attributor] Add all missing attribute definitions/symbols adds 8341a847a22 [CodeGenPrepare] fix RUN line settings adds ac67414618d [clang-format] Fix the bug that joins template closer and > or >> adds 17cb9185363 [CaptureTracking] Allow null to be in either icmp operand adds cbaf1fdea2d [Attributor] Fix: Make sure we set the changed flag adds f72d9b1c97b [Attributor] Fix: Do not partially resolve returned calls. adds 87869b398db [doc] Fix some minor formatting issues. adds eaff844fe95 [ARM] Preserve liveness in ARMConstantIslands. adds 97176bd2bce [InstCombine][NFC] Revisit tests in reuse-constant-from-sel [...] adds 4a9b747bfb5 [TSan] Add interceptors for os_unfair_lock adds 0c2f26d6640 Revert "[TSan] Don't guard #include <xpc/xpc.h>" adds 515ad8fe4ac [InstCombine][NFC] reuse-constant-from-select-in-icmp.ll - [...] adds d0797ece464 Revert [X86] SimplifyDemandedVectorElts - attempt to recomb [...] adds acceedb15f5 [CodeGenPrepare] Fix use-after-free adds 7da81b5e4d2 [llvm-readobj] Fallback to PT_NOTE if file doesn't have sections adds 0dd9494d470 Revert "[X86] Support -mlong-double-80" adds 8e2837e549d [ORC] Re-introduce self-dependence accidentally dropped fro [...] adds 57ec292ab80 [AArch64][GlobalISel] Fix an assertion during G_UNMERGE sel [...] adds 16fa8b09702 Reland "[ARM] push LR before __gnu_mcount_nc" adds a53ad0e157d Revert r367891 - "[InstCombine] combine mul+shl separated by zext" adds 43c8b19546a Add LLDB dataformatters for llvm::StringRef and lldb_privat [...] adds 0b5ecef299f [llvm-readobj] Unwrap the value first to avoid the error adds 69cef325a33 Simplify code (NFC). adds edf504f5038 [Fuchsia] Create the VMO during initialization, not during exit adds f92109dc01b [MemorySSA] Loop passes should mark MSSA preserved when available. adds ee6700f6976 [clang-doc] Fix casting not working in gcc 5.4.0 adds c0d70bca0f9 [X86] Support -mlong-double-80 adds d5d79dfd563 [ELF][PPC] Fix getRelExpr for R_PPC64_REL16_HI adds 93c7a4a47cc Revert [AArch64InstrInfo] Stop getInstSizeInBytes returning [...] adds 26295676a44 Revert Revert [AArch64InstrInfo] Stop getInstSizeInBytes re [...] adds a560bbf7a03 [ELF] Replace local variable hasExportDynamic with config-> [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-doc/HTMLGenerator.cpp | 231 +++-- clang-tools-extra/clang-doc/Representation.cpp | 10 +- clang-tools-extra/clang-doc/Representation.h | 5 +- clang-tools-extra/clang-doc/Serialize.cpp | 20 +- .../assets/clang-doc-default-stylesheet.css | 996 ++++++++++++++++++--- clang-tools-extra/clang-doc/assets/index.js | 16 +- clang-tools-extra/clang-doc/tool/ClangDocMain.cpp | 5 + clang-tools-extra/clangd/ClangdLSPServer.cpp | 2 +- clang-tools-extra/docs/clang-doc.rst | 1 + .../test/clang-doc/single-file-public.cpp | 14 +- .../unittests/clang-doc/HTMLGeneratorTest.cpp | 347 +++---- .../unittests/clang-doc/SerializeTest.cpp | 110 ++- clang/docs/CommandGuide/diagtool.rst | 2 +- clang/docs/LanguageExtensions.rst | 14 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 + clang/include/clang/Driver/Options.td | 9 +- clang/lib/Basic/Targets/ARM.cpp | 2 +- clang/lib/Driver/ToolChains/Clang.cpp | 9 +- clang/lib/Format/TokenAnnotator.cpp | 2 + clang/lib/Parse/ParseExpr.cpp | 6 +- clang/lib/Sema/Sema.cpp | 4 +- clang/lib/Sema/SemaOpenMP.cpp | 48 +- clang/test/Driver/mlong-double-128.c | 6 +- clang/test/Frontend/gnu-mcount.c | 2 +- clang/test/OpenMP/declare_target_messages.cpp | 17 +- clang/unittests/Format/FormatTest.cpp | 5 +- .../lib/profile/InstrProfilingPlatformFuchsia.c | 93 +- compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp | 53 ++ compiler-rt/test/tsan/Darwin/os_unfair_lock.c | 30 + libcxxabi/src/cxa_guard_impl.h | 2 +- lld/ELF/Arch/Hexagon.cpp | 9 +- lld/ELF/Arch/PPC64.cpp | 1 + lld/ELF/Driver.cpp | 7 +- lld/ELF/InputSection.cpp | 2 - lld/ELF/Relocations.cpp | 8 +- lld/ELF/Relocations.h | 1 - lld/test/ELF/hexagon-shared.s | 25 +- lld/test/ELF/ppc64-reloc-rel.s | 58 ++ lld/test/ELF/ppc64-relocs.s | 81 +- .../lldb/Breakpoint/BreakpointResolverFileRegex.h | 2 +- .../lldb/Breakpoint/BreakpointResolverName.h | 2 +- lldb/include/lldb/Core/AddressResolverName.h | 2 +- lldb/include/lldb/Interpreter/OptionValueRegex.h | 4 +- lldb/include/lldb/Utility/CompletionRequest.h | 4 +- lldb/include/lldb/Utility/RegularExpression.h | 139 +-- lldb/include/lldb/Utility/StringList.h | 12 +- .../Breakpoint/BreakpointResolverFileRegex.cpp | 9 +- lldb/source/Breakpoint/BreakpointResolverName.cpp | 4 +- lldb/source/Breakpoint/WatchpointOptions.cpp | 5 +- lldb/source/Commands/CommandObjectApropos.cpp | 6 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 12 +- lldb/source/Commands/CommandObjectCommands.cpp | 6 +- lldb/source/Commands/CommandObjectFrame.cpp | 6 +- lldb/source/Commands/CommandObjectMultiword.cpp | 4 +- lldb/source/Commands/CommandObjectType.cpp | 8 +- lldb/source/Core/AddressResolverName.cpp | 4 +- lldb/source/Core/Disassembler.cpp | 25 +- lldb/source/Host/common/Socket.cpp | 36 +- lldb/source/Interpreter/CommandObject.cpp | 2 +- .../Interpreter/CommandObjectRegexCommand.cpp | 9 +- lldb/source/Interpreter/OptionArgParser.cpp | 36 +- lldb/source/Interpreter/OptionValueRegex.cpp | 9 +- .../Disassembler/llvm/DisassemblerLLVMC.cpp | 7 +- .../RenderScriptRuntime/RenderScriptRuntime.cpp | 18 +- .../Process/Utility/DynamicRegisterInfo.cpp | 113 ++- .../DarwinLog/StructuredDataDarwinLog.cpp | 7 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 20 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 41 +- lldb/source/Symbol/ObjectFile.cpp | 17 +- lldb/source/Symbol/Variable.cpp | 12 +- lldb/source/Target/ThreadPlanStepInRange.cpp | 29 +- lldb/source/Utility/Args.cpp | 4 +- lldb/source/Utility/RegularExpression.cpp | 147 +-- lldb/source/Utility/StringList.cpp | 5 +- lldb/unittests/Editline/EditlineTest.cpp | 8 +- lldb/unittests/Utility/CMakeLists.txt | 3 +- lldb/unittests/Utility/NameMatchesTest.cpp | 4 +- lldb/unittests/Utility/RegularExpressionTest.cpp | 65 ++ lldb/unittests/Utility/StringListTest.cpp | 18 + llvm/include/llvm/ADT/STLExtras.h | 35 - llvm/include/llvm/IR/IntrinsicsARM.td | 5 + llvm/include/llvm/IR/PatternMatch.h | 6 + llvm/include/llvm/Support/RWMutex.h | 16 +- llvm/include/llvm/TextAPI/MachO/TextAPIReader.h | 5 +- llvm/lib/Analysis/CaptureTracking.cpp | 12 +- llvm/lib/CodeGen/Analysis.cpp | 6 +- llvm/lib/CodeGen/BranchRelaxation.cpp | 2 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 3 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 18 +- llvm/lib/CodeGen/MachineBlockPlacement.cpp | 37 - llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 27 + llvm/lib/ExecutionEngine/Orc/Core.cpp | 2 - llvm/lib/Support/RWMutex.cpp | 2 +- .../lib/Target/AArch64/AArch64CallingConvention.td | 30 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 79 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 10 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 4 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 5 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 3 +- llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 27 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 21 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 31 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 44 + llvm/lib/Target/ARM/ARMISelLowering.h | 2 + llvm/lib/Target/ARM/ARMInstrInfo.td | 6 + llvm/lib/Target/ARM/ARMInstrThumb.td | 7 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 15 + llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 25 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 61 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonPatterns.td | 89 +- llvm/lib/Target/Hexagon/HexagonPatternsHVX.td | 32 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 65 +- .../RISCV/Disassembler/RISCVDisassembler.cpp | 19 +- .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 3 +- .../RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 3 +- llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp | 10 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 24 +- llvm/lib/Target/RISCV/RISCVFrameLowering.h | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 24 +- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp | 6 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 24 + llvm/lib/Target/X86/AsmParser/X86Operand.h | 2 +- .../Target/X86/MCTargetDesc/X86MCTargetDesc.cpp | 28 +- llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h | 7 +- llvm/lib/Target/X86/X86.h | 2 +- llvm/lib/Target/X86/X86FixupBWInsts.cpp | 10 +- llvm/lib/Target/X86/X86FixupLEAs.cpp | 7 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 12 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 42 +- llvm/lib/Target/X86/X86ISelLowering.h | 1 - llvm/lib/Target/X86/X86InstrInfo.cpp | 16 +- llvm/lib/Target/X86/X86InstrInfo.h | 2 +- llvm/lib/Target/X86/X86RegisterInfo.cpp | 4 +- llvm/lib/TextAPI/MachO/TextStub.cpp | 8 +- llvm/lib/Transforms/IPO/Attributor.cpp | 868 +++++++++++------- .../Transforms/InstCombine/InstCombineCompares.cpp | 75 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 27 + .../Transforms/InstCombine/InstCombineShifts.cpp | 15 +- llvm/lib/Transforms/Scalar/LICM.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopInstSimplify.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopRotation.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp | 4 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 2 +- .../lib/Transforms/Utils/EntryExitInstrumenter.cpp | 2 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 54 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 250 ++++-- llvm/test/Analysis/CostModel/ARM/cast.ll | 12 +- .../AArch64/GlobalISel/legalize-shuffle-vector.mir | 26 + .../CodeGen/AArch64/GlobalISel/select-unmerge.mir | 17 + .../AArch64/aarch64-dynamic-stack-layout.ll | 124 +-- llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir | 24 +- .../CodeGen/AArch64/addsub-constant-folding.ll | 72 +- llvm/test/CodeGen/AArch64/alloca.ll | 13 +- .../AArch64/arm64-alloca-frame-pointer-offset.ll | 4 +- .../CodeGen/AArch64/branch-relax-block-size.mir | 80 ++ llvm/test/CodeGen/AArch64/cgp-usubo.ll | 12 +- llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll | 1 + llvm/test/CodeGen/AArch64/irg_sp_tagp.ll | 2 +- .../AArch64/regress-w29-reserved-with-fp.ll | 2 +- .../CodeGen/AArch64/reverse-csr-restore-seq.mir | 6 +- llvm/test/CodeGen/AArch64/seh-finally.ll | 8 +- llvm/test/CodeGen/AArch64/shadow-call-stack.ll | 2 +- .../CodeGen/AArch64/sink-copy-for-shrink-wrap.ll | 2 +- .../CodeGen/AArch64/spill-stack-realignment.mir | 4 +- llvm/test/CodeGen/AArch64/sponentry.ll | 4 +- llvm/test/CodeGen/AArch64/stack-guard-reassign.ll | 2 +- llvm/test/CodeGen/AArch64/stack-guard-vaarg.ll | 2 +- ...old-masked-merge-scalar-constmask-innerouter.ll | 16 +- ...asked-merge-scalar-constmask-interleavedbits.ll | 16 +- ...merge-scalar-constmask-interleavedbytehalves.ll | 16 +- ...unfold-masked-merge-scalar-constmask-lowhigh.ll | 16 +- .../unfold-masked-merge-scalar-variablemask.ll | 16 +- .../AArch64/unreachable-emergency-spill-slot.mir | 6 +- llvm/test/CodeGen/AArch64/win64_vararg.ll | 70 +- llvm/test/CodeGen/AArch64/wineh-frame5.mir | 20 +- llvm/test/CodeGen/AArch64/wineh-frame7.mir | 12 +- .../CodeGen/AArch64/wineh-try-catch-realign.ll | 12 +- llvm/test/CodeGen/AArch64/wineh-try-catch.ll | 36 +- llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir | 4 +- llvm/test/CodeGen/ARM/constant-island-movwt.mir | 8 + llvm/test/CodeGen/ARM/gnu_mcount_nc.ll | 41 + llvm/test/CodeGen/Hexagon/isel-minmax-v64bit.ll | 202 +++++ llvm/test/CodeGen/Hexagon/isel-vselect-v4i8.ll | 2 +- llvm/test/CodeGen/PowerPC/block-placement.mir | 12 +- llvm/test/CodeGen/Thumb2/mve-stack.ll | 281 ++++++ .../CodeGen/X86/avx512-intrinsics-fast-isel.ll | 16 +- llvm/test/CodeGen/X86/load-partial.ll | 162 ++++ llvm/test/CodeGen/X86/mulfix_combine.ll | 118 +++ llvm/test/CodeGen/X86/recip-fastmath.ll | 192 ++++ llvm/test/CodeGen/X86/shrink_vmul.ll | 202 ++--- llvm/test/CodeGen/X86/tailcall-assume.ll | 15 + llvm/test/CodeGen/X86/vec_smulo.ll | 152 ++-- llvm/test/CodeGen/X86/vec_umulo.ll | 140 +-- llvm/test/CodeGen/X86/vector-mulfix-legalize.ll | 110 +-- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 18 +- .../CodeGenPrepare/sink-shift-and-trunc.ll | 19 +- .../Transforms/EntryExitInstrumenter/mcount.ll | 4 +- llvm/test/Transforms/FunctionAttrs/align.ll | 32 +- .../Transforms/FunctionAttrs/noalias_returned.ll | 10 +- llvm/test/Transforms/FunctionAttrs/nocapture.ll | 14 + llvm/test/Transforms/InstCombine/pow_fp_int.ll | 63 ++ .../reuse-constant-from-select-in-icmp.ll | 48 +- .../InstCombine/select-extractelement.ll | 14 +- ...reassociation-in-bittest-with-truncation-shl.ll | 80 +- llvm/test/Transforms/InstCombine/shift.ll | 14 +- .../Transforms/SLPVectorizer/X86/load-merge.ll | 68 ++ llvm/test/tools/llvm-readobj/gnu-notes.test | 38 +- llvm/tools/llvm-config/llvm-config.cpp | 13 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 43 +- llvm/unittests/ADT/IteratorTest.cpp | 2 +- .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 1 + llvm/unittests/TextAPI/TextStubV1Tests.cpp | 72 +- llvm/unittests/TextAPI/TextStubV2Tests.cpp | 72 +- llvm/unittests/TextAPI/TextStubV3Tests.cpp | 69 +- llvm/utils/lldbDataFormatters.py | 23 + 218 files changed, 5742 insertions(+), 2703 deletions(-) create mode 100644 compiler-rt/test/tsan/Darwin/os_unfair_lock.c create mode 100644 lld/test/ELF/ppc64-reloc-rel.s create mode 100644 lldb/unittests/Utility/RegularExpressionTest.cpp create mode 100644 llvm/test/CodeGen/AArch64/branch-relax-block-size.mir create mode 100644 llvm/test/CodeGen/ARM/gnu_mcount_nc.ll create mode 100644 llvm/test/CodeGen/Hexagon/isel-minmax-v64bit.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-stack.ll create mode 100644 llvm/test/CodeGen/X86/mulfix_combine.ll create mode 100644 llvm/test/CodeGen/X86/tailcall-assume.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (f477407a -> 2b3857f6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards f477407a 0: update: llvm-linux: all new 2b3857f6 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f477407a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 18 +- 02-build_llvm/console.log | 12067 ++++++++++++++++++------------------ 03-build_linux/console.log | 698 +-- 04-boot_linux/console.log | 2 +- console.log | 12785 ++++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- 6 files changed, 12801 insertions(+), 12783 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO updated (2d3fefd7ce -> 23ef51a50a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO in repository toolchain/ci/glibc. from 2d3fefd7ce posix: Fix large mmap64 offset for mips64n32 (BZ#24699) adds 23ef51a50a alpha: Do not redefine __NR_shmat or __NR_osf_shmat No new revisions were added by this update. Summary of changes: ChangeLog | 7 +++++++ sysdeps/unix/sysv/linux/alpha/kernel-features.h | 6 ++++-- sysdeps/unix/sysv/linux/alpha/sysdep.h | 4 +++- 3 files changed, 14 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO updated (b600815a7a8 -> 62dfdc3edb2)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO in repository toolchain/ci/gcc. from b600815a7a8 Daily bump. adds 6eea1136dd7 Daily bump. adds 548022ac77a Daily bump. adds 6f128e321a9 Daily bump. adds ff983ca0442 Daily bump. adds 52be732635a PR fortran/91414 Improve initialization of PRNG adds e3bb1364453 2013-08-13 Thomas Koenig <tkoenig(a)gcc.gnu.org> adds b030d5f50c3 Daily bump. adds 95585237f76 [Darwin, testsuite] Fix instantiate2 fail. adds 5381234eeca [Darwin] Fix lto options. adds b10e7de4d0a Daily bump. adds dc70c2bcd43 PR c++/91436 fix C++ dialect for std::make_unique fix-it hint adds 3bc19f14c5f Daily bump. adds a38ca4597ce * test_summary: Do not escape "=". adds efd854893e7 [darwin, ppc] Backport 270480 fix for speculation barrier insns adds 2cc51a1bf15 [darwin, ppc] backport Fix .machine directive in vecsave asm. adds 62dfdc3edb2 Daily bump. No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 4 ++ contrib/test_summary | 2 +- gcc/ChangeLog | 17 ++++++++ gcc/DATESTAMP | 2 +- gcc/config/darwin.h | 2 +- gcc/config/rs6000/rs6000.md | 11 +++-- gcc/cp/ChangeLog | 9 ++++ gcc/cp/name-lookup.c | 4 +- gcc/fortran/ChangeLog | 7 ++++ gcc/fortran/frontend-passes.c | 5 +++ gcc/testsuite/ChangeLog | 24 +++++++++++ gcc/testsuite/g++.dg/ext/instantiate2.C | 3 +- .../g++.dg/lookup/missing-std-include-5.C | 1 + .../g++.dg/lookup/missing-std-include-6.C | 9 ---- .../g++.dg/lookup/missing-std-include-8.C | 9 ++++ gcc/testsuite/gfortran.dg/do_subscript_5.f90 | 20 +++++++++ libgcc/ChangeLog | 7 ++++ libgcc/config/rs6000/darwin-vecsave.S | 8 +++- libgfortran/ChangeLog | 10 +++++ libgfortran/intrinsics/random.c | 49 +++++++++------------- 20 files changed, 153 insertions(+), 50 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/do_subscript_5.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO updated (a244011f30 -> 87cae35265)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO in repository toolchain/ci/binutils-gdb. from a244011f30 Automatic date update in version.in adds f870d8d0c8 Automatic date update in version.in adds 01f7b61d41 Automatic date update in version.in adds d3a33b07fa Automatic date update in version.in adds dc0c1219b2 Automatic date update in version.in adds ff97da8abe Automatic date update in version.in adds 7fe7d5d979 Automatic date update in version.in adds 3fa38ff7e5 Automatic date update in version.in adds 87cae35265 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

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Tcwg-commits August 2019