Tcwg-commits September 2019

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (f6398fb72c9 -> 63f6066b53d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/llvm-project. from f6398fb72c9 [aarch64] add def-pats for dot product adds 1b7b4b467f0 [SelectionDAG][Mips][Sparc] Don't allow SimplifyDemandedBit [...] adds eff88e42f78 [libTooling] Add `ifBound`, `elseBranch` RangeSelector comb [...] adds 330014843ce Doxygenify comments. adds c2bda3e422a [MTE] Handle MTE instructions in AArch64LoadStoreOptimizer. adds 081eebc58fc [NFC][InstCombine] Fixup newly-added tests adds 951cd32f4ba Reland '[analyzer][MallocChecker][NFC] Document and reorgan [...] adds 2d2850ff09b [www] Turn 'Clang 9' boxes green in C++ status pages now Cl [...] adds 7dab840fd4f Fix MSVC "not all control paths return a value" warning. NFCI. adds e065e5f12a7 [NFC][PowerPC] Refactor classifyGlobalReference adds 60a6f31dde4 Fix -Wdocumentation warning. NFCI. adds 96be6f485c7 Fix a documentation error adds c139d1e2810 [Mips] Remove immarg test for intrinsics that no longer hav [...] adds 6a234677f49 Can't pass .dSYM directory to llvm-objdump -dsym= (and erro [...] adds 830909b97a9 Ensure AtomicExpr goes through SEMA checking after TreeTransform adds 949a126438b [docs] Update structure-aware-fuzzing link. adds ce7cfbccc63 [lldb] Process formatters in reverse-chronological order adds 72a3d8597da Revert "[MachinePipeliner] Improve the TargetInstrInfo API [...] adds 216be996d68 [NFC][PowerPC] Consolidate testing of common linkage symbols adds 0ae02fd71a3 Unwind: avoid warning about unused typedef adds 01a3080960e [Docs] Move topics to new categories adds 2e0c95edfe0 [AddressSanitizer] Don't dereference dyn_cast<ConstantInt> [...] adds 63ddbc2fbc3 [PPC] PPCLoopPreIncPrep - silence static analyzer null dere [...] adds eacbe1cccc4 [Docs] Add a custom sidebar to doc pages adds 4a58936716e Fix missed case of switching getConstant to getTargetConsta [...] adds 819c1651f72 [SystemZ] Support z15 processor name adds 48b40834dc5 [SystemZ] Support z15 processor name adds 397a686762e Fix assertion failure when constant evaluation of a switch [...] adds 6c0894b58ac Remove outdated FIXME. adds f118852046a [SampleFDO] Expose an interface to return the size of a sec [...] adds 2f32e5d84d3 [Inliner] Remove incorrect early exit during switch cost co [...] adds e021d690943 dotest.py: bugfix: test filters with -f do not work on Python3 adds 7d6a95cf83f prepare_binding_Python: print readable errors if SWIG fails adds 7ac1039957f [GlobalISel] Defer setting HasCalls on MachineFrameInfo to [...] adds 172e8a7a5de [clang-scan-deps] strip the --serialize-diagnostics argument adds 2f6a52816fc [clang-tidy] Add check for classes missing -hash ⚠️ adds c96d5545f0c gn build: Merge r372445 adds 3e6590c4517 Support for 64-bit PC-relative relocations for X86_64 adds 6541c7988b8 Improve -Wtautological-overlap-compare adds bd7f2354ccb LiveIntervals: Add missing operator!= for segments adds eb6eb694e42 AMDGPU/GlobalISel: Allow selection of scalar min/max adds d98d3ea9fe3 avr targetinfo: remove unneeded dep on MC adds 27a80391718 Revert assertion added by r372394 adds 4c05de8c1d1 Merge and improve code that detects same value in comparisons. adds 77297f0761d Fix bad APInt compare. adds 10793e791f5 [Clang Interpreter] Fixed Bug 43362, build failure on GCC adds 4fa12ac92ce [X86] Add test case to show failure to fold load with getma [...] adds 04682939eb7 [X86] Use sse_load_f32/f64 and timm in patterns for memory [...] adds 88270475515 Stop tracking atexit/__cxa_atexit/pthread_atfork allocation [...] adds 5fe1e55d354 Avoid memory leak in ASan test adds 1b58389428e Add __lsan::ScopedInterceptorDisabler for strerror(3) adds c90fda6abe8 Attempt to fix a windows buildbot failure adds 8a74eca398a [MachinePipeliner] Improve the TargetInstrInfo API analyzeL [...] adds 3bb56fa4789 Revert "[SampleFDO] Expose an interface to return the size [...] adds fae979bc682 [AArch64][GlobalISel] Make <4 x s32> G_ASHR and G_LSHR legal. adds a59a886832b [AArch64][GlobalISel] Selection support for G_ASHR of <2 x s64> adds 9c7d599dec9 [AArch64][GlobalISel] Implement selection for G_SHL of <2 x i64> adds 854b0f0f003 [NFC][X86] Adjust check prefixes in bmi.ll (PR43381) adds 75d2c269211 [Docs] Updates sidebar links adds e75c6b6d48d [Docs] Bug fix for document not included in toctree adds 9ec71175063 [Support] Add a DataExtractor constructor that takes ArrayR [...] adds 63f6066b53d [Attributor] Implement "norecurse" function attribute deduction No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/objc/CMakeLists.txt | 1 + .../clang-tidy/objc/MissingHashCheck.cpp | 62 + .../clang-tidy/objc/MissingHashCheck.h | 35 + .../clang-tidy/objc/ObjCTidyModule.cpp | 3 + clang-tools-extra/docs/ReleaseNotes.rst | 6 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../docs/clang-tidy/checks/objc-missing-hash.rst | 16 + .../test/clang-tidy/objc-missing-hash.m | 68 ++ clang/docs/ReleaseNotes.rst | 6 +- clang/include/clang/AST/Expr.h | 5 + clang/include/clang/Sema/Sema.h | 3 + clang/include/clang/Tooling/ArgumentsAdjusters.h | 4 + .../clang/Tooling/Refactoring/RangeSelector.h | 9 + clang/lib/AST/Expr.cpp | 106 ++ clang/lib/AST/ExprConstant.cpp | 31 +- clang/lib/AST/Interp/InterpStack.cpp | 1 + clang/lib/Analysis/CFG.cpp | 77 +- clang/lib/Analysis/ReachableCode.cpp | 2 +- clang/lib/Basic/Targets/SystemZ.cpp | 2 +- clang/lib/Sema/SemaCUDA.cpp | 1 - clang/lib/Sema/SemaChecking.cpp | 101 +- clang/lib/Sema/SemaExpr.cpp | 31 +- clang/lib/Sema/TreeTransform.h | 13 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 1183 ++++++++++++-------- clang/lib/Tooling/ArgumentsAdjusters.cpp | 16 + clang/lib/Tooling/Refactoring/RangeSelector.cpp | 24 + clang/test/AST/atomic-expr.cpp | 19 + clang/test/Analysis/array-struct-region.cpp | 6 + clang/test/Analysis/cfg.cpp | 21 + .../ClangScanDeps/Inputs/strip_diag_serialize.json | 7 + clang/test/ClangScanDeps/strip_diag_serialize.cpp | 11 + .../test/CodeGen/builtins-systemz-vector3-error.c | 2 +- clang/test/CodeGen/builtins-systemz-vector3.c | 2 +- .../test/CodeGen/builtins-systemz-zvector3-error.c | 2 +- clang/test/CodeGen/builtins-systemz-zvector3.c | 4 +- clang/test/CodeGen/systemz-abi-vector.c | 2 + clang/test/CodeGen/systemz-abi.c | 2 + clang/test/CodeGen/target-data.c | 2 + clang/test/Driver/systemz-march.c | 2 + clang/test/Misc/target-invalid-cpu-note.c | 2 +- clang/test/Preprocessor/predefined-arch-macros.c | 3 + clang/test/Sema/warn-overlap.c | 31 + clang/test/Sema/warn-unreachable.c | 2 +- clang/test/SemaCXX/compare-cxx2a.cpp | 6 + clang/test/SemaCXX/constant-expression-cxx2a.cpp | 13 + clang/test/SemaCXX/self-comparison.cpp | 82 ++ clang/test/SemaCXX/warn-unreachable.cpp | 5 +- clang/tools/clang-scan-deps/ClangScanDeps.cpp | 2 + clang/unittests/Tooling/RangeSelectorTest.cpp | 54 + clang/www/cxx_dr_status.html | 24 +- clang/www/cxx_status.html | 30 +- clang/www/make_cxx_dr_status | 3 - compiler-rt/lib/asan/asan_interceptors.cpp | 49 +- compiler-rt/lib/asan/asan_interceptors.h | 12 + compiler-rt/lib/lsan/lsan_interceptors.cpp | 54 + .../sanitizer_common_interceptors.inc | 6 + .../sanitizer_platform_interceptors.h | 4 + compiler-rt/test/asan/TestCases/inline.cpp | 1 + libunwind/src/AddressSpace.hpp | 6 +- .../lldb/DataFormatters/FormattersContainer.h | 62 +- lldb/include/lldb/Symbol/Variable.h | 75 +- lldb/include/lldb/Utility/RegularExpression.h | 4 - .../TestDataFormatterAdv.py | 7 + lldb/scripts/Python/prepare_binding_Python.py | 10 +- lldb/source/Symbol/Variable.cpp | 15 +- .../Python/module/unittest2/unittest2/loader.py | 2 +- llvm/docs/LibFuzzer.rst | 2 +- llvm/docs/ProgrammingDocumentation.rst | 9 - llvm/docs/SubsystemDocumentation.rst | 5 - llvm/docs/UserGuides.rst | 9 - llvm/docs/_templates/indexsidebar.html | 15 +- llvm/docs/conf.py | 11 +- llvm/docs/index.rst | 28 +- llvm/include/llvm/CodeGen/LiveInterval.h | 4 + llvm/include/llvm/IR/IntrinsicsMips.td | 16 +- llvm/include/llvm/Support/DataExtractor.h | 5 + llvm/include/llvm/TextAPI/MachO/InterfaceFile.h | 2 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 49 +- llvm/lib/Analysis/InlineCost.cpp | 13 - llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 18 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 3 - llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 + llvm/lib/Object/RelocationResolver.cpp | 2 + llvm/lib/Support/Host.cpp | 2 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 10 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 8 +- .../Target/AArch64/AArch64LoadStoreOptimizer.cpp | 130 ++- llvm/lib/Target/AMDGPU/SOPInstructions.td | 8 +- llvm/lib/Target/AVR/TargetInfo/LLVMBuild.txt | 4 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 20 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 9 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 10 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 15 +- llvm/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp | 2 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 13 +- llvm/lib/Target/PowerPC/PPCSubtarget.h | 5 +- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZProcessors.td | 3 +- llvm/lib/Target/SystemZ/SystemZSchedule.td | 2 +- ...temZScheduleArch13.td => SystemZScheduleZ15.td} | 64 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +- llvm/lib/Target/X86/X86InstrAVX512.td | 7 +- llvm/lib/TextAPI/MachO/Platform.cpp | 3 +- llvm/lib/Transforms/IPO/Attributor.cpp | 41 +- .../Instrumentation/AddressSanitizer.cpp | 4 +- llvm/test/Analysis/CostModel/SystemZ/fp-cast.ll | 36 +- llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll | 22 +- .../Analysis/CostModel/SystemZ/logic-miscext3.ll | 24 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 1 - .../AArch64/GlobalISel/legalize-vector-shift.mir | 78 ++ .../AArch64/GlobalISel/select-vector-shift.mir | 59 + .../AArch64/GlobalISel/tail-call-no-save-fp-lr.ll | 20 + llvm/test/CodeGen/AArch64/ldst-opt-mte.mir | 285 +++++ llvm/test/CodeGen/AArch64/stgp.ll | 2 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir | 15 +- .../PowerPC/CompareEliminationSpillIssue.ll | 2 +- llvm/test/CodeGen/PowerPC/csr-split.ll | 2 +- llvm/test/CodeGen/PowerPC/ctrloop-shortLoops.ll | 14 +- llvm/test/CodeGen/PowerPC/elf-common.ll | 45 + llvm/test/CodeGen/PowerPC/expand-isel.ll | 4 +- llvm/test/CodeGen/PowerPC/f128-aggregates.ll | 2 +- llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll | 16 +- .../CodeGen/PowerPC/ppc64-pre-inc-no-extra-phi.ll | 2 +- llvm/test/CodeGen/PowerPC/pr32140.ll | 8 +- llvm/test/CodeGen/PowerPC/pr36068.ll | 2 +- llvm/test/CodeGen/PowerPC/pr39815.ll | 4 +- llvm/test/CodeGen/PowerPC/sms-simple.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequs.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigess.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigeuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigeui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigeull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigeus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigtus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesilesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesilesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesilesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiless.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesileuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesileui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesileull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesileus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiltus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesinesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesinesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesinesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiness.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesineuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesineui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesineull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesineus.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequs.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgess.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtus.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslllesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslllesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslllesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllless.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllnesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllneull.ll | 2 +- llvm/test/CodeGen/PowerPC/zext-and-cmp.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-01.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-02.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-03.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-06.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-07.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-08.mir | 4 +- llvm/test/CodeGen/SystemZ/ctpop-02.ll | 4 +- llvm/test/CodeGen/SystemZ/not-01.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-bswap-01.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-02.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-03.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-04.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-05.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-06.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-07.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-conv-03.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-eswap-01.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-eswap-02.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-intrinsics-03.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll | 4 +- llvm/test/CodeGen/X86/avx512-intrinsics.ll | 16 + llvm/test/CodeGen/X86/bmi.ll | 4 +- .../CodeGen/X86/isel-blendi-gettargetconstant.ll | 19 + .../SystemZ/{insns-arch13.txt => insns-z15.txt} | 4 +- .../SystemZ/{insn-bad-arch13.s => insn-bad-z15.s} | 4 +- .../{insn-good-arch13.s => insn-good-z15.s} | 4 +- llvm/test/Transforms/FunctionAttrs/norecurse.ll | 108 +- llvm/test/Transforms/FunctionAttrs/willreturn.ll | 43 +- llvm/test/Transforms/Inline/X86/switch.ll | 160 +++ ...add-of-negative-is-non-zero-and-no-underflow.ll | 8 +- ...egative-or-zero-is-non-zero-and-no-underflow.ll | 8 +- llvm/test/Verifier/Mips/intrinsic-immarg.ll | 82 -- llvm/tools/llvm-objdump/MachODump.cpp | 31 +- llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 8 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 24 +- .../clang-tools-extra/clang-tidy/objc/BUILD.gn | 1 + 251 files changed, 3159 insertions(+), 1294 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/objc/MissingHashCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/objc/MissingHashCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/objc-missing-hash.rst create mode 100644 clang-tools-extra/test/clang-tidy/objc-missing-hash.m create mode 100644 clang/test/AST/atomic-expr.cpp create mode 100644 clang/test/ClangScanDeps/Inputs/strip_diag_serialize.json create mode 100644 clang/test/ClangScanDeps/strip_diag_serialize.cpp rename llvm/lib/Target/SystemZ/{SystemZScheduleArch13.td => SystemZScheduleZ15.td} (97%) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/tail-call-no-save-fp-lr.ll create mode 100644 llvm/test/CodeGen/AArch64/ldst-opt-mte.mir create mode 100644 llvm/test/CodeGen/PowerPC/elf-common.ll create mode 100644 llvm/test/CodeGen/X86/isel-blendi-gettargetconstant.ll rename llvm/test/MC/Disassembler/SystemZ/{insns-arch13.txt => insns-z15.txt} (99%) rename llvm/test/MC/SystemZ/{insn-bad-arch13.s => insn-bad-z15.s} (99%) rename llvm/test/MC/SystemZ/{insn-good-arch13.s => insn-good-z15.s} (99%) create mode 100644 llvm/test/Transforms/Inline/X86/switch.ll delete mode 100644 llvm/test/Verifier/Mips/intrinsic-immarg.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (dd647563 -> 69e1e549)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards dd647563 2: update: llvm-linux: 18918 new 69e1e549 2: update: llvm-linux: 18918 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (dd647563) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12282 ++++++++++++++++++----------------- 03-build_linux/console.log | 758 ++- 05-check_regression/console.log | 8 +- 06-update_baseline/console.log | 66 +- console.log | 13334 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 13332 insertions(+), 13344 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allnoconfig updated (a8f5e932a09 -> 582c542e2a9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allnoconfig in repository toolchain/ci/gcc. from a8f5e932a09 Fix PR88751 adds 138f21df88e * config/pa/pa.c (pa_trampoline_init): Remove spurious ext [...] adds f0286c8907c Daily bump. adds 582c542e2a9 2019-09-21 Paul Thomas <pault(a)gcc.gnu.org> No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 5 ++ gcc/DATESTAMP | 2 +- gcc/config/pa/pa.c | 2 +- gcc/fortran/ChangeLog | 10 ++++ gcc/fortran/expr.c | 77 +++++++++++++++++------------- gcc/testsuite/ChangeLog | 6 +++ gcc/testsuite/gfortran.dg/associate_49.f90 | 34 +++++++++++++ 7 files changed, 101 insertions(+), 35 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/associate_49.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allnoconfig updated (ba25741d -> 510f999d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allnoconfig in repository toolchain/ci/base-artifacts. discards ba25741d 0: update: binutils-gcc-linux: boot new 510f999d 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ba25741d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-prepare_abe/console.log | 420 +- 03-build_abe-binutils/console.log | 11005 ++++++++------- 04-build_abe-stage1/console.log | 13843 +++++++++---------- 05-build_linux/console.log | 630 +- 06-boot_linux/console.log | 4 +- 07-check_regression/console.log | 8 +- 08-update_baseline/console.log | 25 - console.log | 26151 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 10 files changed, 26128 insertions(+), 26182 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig updated (f6398fb72c9 -> 63f6066b53d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project. from f6398fb72c9 [aarch64] add def-pats for dot product adds 1b7b4b467f0 [SelectionDAG][Mips][Sparc] Don't allow SimplifyDemandedBit [...] adds eff88e42f78 [libTooling] Add `ifBound`, `elseBranch` RangeSelector comb [...] adds 330014843ce Doxygenify comments. adds c2bda3e422a [MTE] Handle MTE instructions in AArch64LoadStoreOptimizer. adds 081eebc58fc [NFC][InstCombine] Fixup newly-added tests adds 951cd32f4ba Reland '[analyzer][MallocChecker][NFC] Document and reorgan [...] adds 2d2850ff09b [www] Turn 'Clang 9' boxes green in C++ status pages now Cl [...] adds 7dab840fd4f Fix MSVC "not all control paths return a value" warning. NFCI. adds e065e5f12a7 [NFC][PowerPC] Refactor classifyGlobalReference adds 60a6f31dde4 Fix -Wdocumentation warning. NFCI. adds 96be6f485c7 Fix a documentation error adds c139d1e2810 [Mips] Remove immarg test for intrinsics that no longer hav [...] adds 6a234677f49 Can't pass .dSYM directory to llvm-objdump -dsym= (and erro [...] adds 830909b97a9 Ensure AtomicExpr goes through SEMA checking after TreeTransform adds 949a126438b [docs] Update structure-aware-fuzzing link. adds ce7cfbccc63 [lldb] Process formatters in reverse-chronological order adds 72a3d8597da Revert "[MachinePipeliner] Improve the TargetInstrInfo API [...] adds 216be996d68 [NFC][PowerPC] Consolidate testing of common linkage symbols adds 0ae02fd71a3 Unwind: avoid warning about unused typedef adds 01a3080960e [Docs] Move topics to new categories adds 2e0c95edfe0 [AddressSanitizer] Don't dereference dyn_cast<ConstantInt> [...] adds 63ddbc2fbc3 [PPC] PPCLoopPreIncPrep - silence static analyzer null dere [...] adds eacbe1cccc4 [Docs] Add a custom sidebar to doc pages adds 4a58936716e Fix missed case of switching getConstant to getTargetConsta [...] adds 819c1651f72 [SystemZ] Support z15 processor name adds 48b40834dc5 [SystemZ] Support z15 processor name adds 397a686762e Fix assertion failure when constant evaluation of a switch [...] adds 6c0894b58ac Remove outdated FIXME. adds f118852046a [SampleFDO] Expose an interface to return the size of a sec [...] adds 2f32e5d84d3 [Inliner] Remove incorrect early exit during switch cost co [...] adds e021d690943 dotest.py: bugfix: test filters with -f do not work on Python3 adds 7d6a95cf83f prepare_binding_Python: print readable errors if SWIG fails adds 7ac1039957f [GlobalISel] Defer setting HasCalls on MachineFrameInfo to [...] adds 172e8a7a5de [clang-scan-deps] strip the --serialize-diagnostics argument adds 2f6a52816fc [clang-tidy] Add check for classes missing -hash ⚠️ adds c96d5545f0c gn build: Merge r372445 adds 3e6590c4517 Support for 64-bit PC-relative relocations for X86_64 adds 6541c7988b8 Improve -Wtautological-overlap-compare adds bd7f2354ccb LiveIntervals: Add missing operator!= for segments adds eb6eb694e42 AMDGPU/GlobalISel: Allow selection of scalar min/max adds d98d3ea9fe3 avr targetinfo: remove unneeded dep on MC adds 27a80391718 Revert assertion added by r372394 adds 4c05de8c1d1 Merge and improve code that detects same value in comparisons. adds 77297f0761d Fix bad APInt compare. adds 10793e791f5 [Clang Interpreter] Fixed Bug 43362, build failure on GCC adds 4fa12ac92ce [X86] Add test case to show failure to fold load with getma [...] adds 04682939eb7 [X86] Use sse_load_f32/f64 and timm in patterns for memory [...] adds 88270475515 Stop tracking atexit/__cxa_atexit/pthread_atfork allocation [...] adds 5fe1e55d354 Avoid memory leak in ASan test adds 1b58389428e Add __lsan::ScopedInterceptorDisabler for strerror(3) adds c90fda6abe8 Attempt to fix a windows buildbot failure adds 8a74eca398a [MachinePipeliner] Improve the TargetInstrInfo API analyzeL [...] adds 3bb56fa4789 Revert "[SampleFDO] Expose an interface to return the size [...] adds fae979bc682 [AArch64][GlobalISel] Make <4 x s32> G_ASHR and G_LSHR legal. adds a59a886832b [AArch64][GlobalISel] Selection support for G_ASHR of <2 x s64> adds 9c7d599dec9 [AArch64][GlobalISel] Implement selection for G_SHL of <2 x i64> adds 854b0f0f003 [NFC][X86] Adjust check prefixes in bmi.ll (PR43381) new 75d2c269211 [Docs] Updates sidebar links new e75c6b6d48d [Docs] Bug fix for document not included in toctree new 9ec71175063 [Support] Add a DataExtractor constructor that takes ArrayR [...] new 63f6066b53d [Attributor] Implement "norecurse" function attribute deduction The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clang-tidy/objc/CMakeLists.txt | 1 + .../clang-tidy/objc/MissingHashCheck.cpp | 62 + .../clang-tidy/objc/MissingHashCheck.h | 35 + .../clang-tidy/objc/ObjCTidyModule.cpp | 3 + clang-tools-extra/docs/ReleaseNotes.rst | 6 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../docs/clang-tidy/checks/objc-missing-hash.rst | 16 + .../test/clang-tidy/objc-missing-hash.m | 68 ++ clang/docs/ReleaseNotes.rst | 6 +- clang/include/clang/AST/Expr.h | 5 + clang/include/clang/Sema/Sema.h | 3 + clang/include/clang/Tooling/ArgumentsAdjusters.h | 4 + .../clang/Tooling/Refactoring/RangeSelector.h | 9 + clang/lib/AST/Expr.cpp | 106 ++ clang/lib/AST/ExprConstant.cpp | 31 +- clang/lib/AST/Interp/InterpStack.cpp | 1 + clang/lib/Analysis/CFG.cpp | 77 +- clang/lib/Analysis/ReachableCode.cpp | 2 +- clang/lib/Basic/Targets/SystemZ.cpp | 2 +- clang/lib/Sema/SemaCUDA.cpp | 1 - clang/lib/Sema/SemaChecking.cpp | 101 +- clang/lib/Sema/SemaExpr.cpp | 31 +- clang/lib/Sema/TreeTransform.h | 13 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 1183 ++++++++++++-------- clang/lib/Tooling/ArgumentsAdjusters.cpp | 16 + clang/lib/Tooling/Refactoring/RangeSelector.cpp | 24 + clang/test/AST/atomic-expr.cpp | 19 + clang/test/Analysis/array-struct-region.cpp | 6 + clang/test/Analysis/cfg.cpp | 21 + .../ClangScanDeps/Inputs/strip_diag_serialize.json | 7 + clang/test/ClangScanDeps/strip_diag_serialize.cpp | 11 + .../test/CodeGen/builtins-systemz-vector3-error.c | 2 +- clang/test/CodeGen/builtins-systemz-vector3.c | 2 +- .../test/CodeGen/builtins-systemz-zvector3-error.c | 2 +- clang/test/CodeGen/builtins-systemz-zvector3.c | 4 +- clang/test/CodeGen/systemz-abi-vector.c | 2 + clang/test/CodeGen/systemz-abi.c | 2 + clang/test/CodeGen/target-data.c | 2 + clang/test/Driver/systemz-march.c | 2 + clang/test/Misc/target-invalid-cpu-note.c | 2 +- clang/test/Preprocessor/predefined-arch-macros.c | 3 + clang/test/Sema/warn-overlap.c | 31 + clang/test/Sema/warn-unreachable.c | 2 +- clang/test/SemaCXX/compare-cxx2a.cpp | 6 + clang/test/SemaCXX/constant-expression-cxx2a.cpp | 13 + clang/test/SemaCXX/self-comparison.cpp | 82 ++ clang/test/SemaCXX/warn-unreachable.cpp | 5 +- clang/tools/clang-scan-deps/ClangScanDeps.cpp | 2 + clang/unittests/Tooling/RangeSelectorTest.cpp | 54 + clang/www/cxx_dr_status.html | 24 +- clang/www/cxx_status.html | 30 +- clang/www/make_cxx_dr_status | 3 - compiler-rt/lib/asan/asan_interceptors.cpp | 49 +- compiler-rt/lib/asan/asan_interceptors.h | 12 + compiler-rt/lib/lsan/lsan_interceptors.cpp | 54 + .../sanitizer_common_interceptors.inc | 6 + .../sanitizer_platform_interceptors.h | 4 + compiler-rt/test/asan/TestCases/inline.cpp | 1 + libunwind/src/AddressSpace.hpp | 6 +- .../lldb/DataFormatters/FormattersContainer.h | 62 +- lldb/include/lldb/Symbol/Variable.h | 75 +- lldb/include/lldb/Utility/RegularExpression.h | 4 - .../TestDataFormatterAdv.py | 7 + lldb/scripts/Python/prepare_binding_Python.py | 10 +- lldb/source/Symbol/Variable.cpp | 15 +- .../Python/module/unittest2/unittest2/loader.py | 2 +- llvm/docs/LibFuzzer.rst | 2 +- llvm/docs/ProgrammingDocumentation.rst | 9 - llvm/docs/SubsystemDocumentation.rst | 5 - llvm/docs/UserGuides.rst | 9 - llvm/docs/_templates/indexsidebar.html | 15 +- llvm/docs/conf.py | 11 +- llvm/docs/index.rst | 28 +- llvm/include/llvm/CodeGen/LiveInterval.h | 4 + llvm/include/llvm/IR/IntrinsicsMips.td | 16 +- llvm/include/llvm/Support/DataExtractor.h | 5 + llvm/include/llvm/TextAPI/MachO/InterfaceFile.h | 2 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 49 +- llvm/lib/Analysis/InlineCost.cpp | 13 - llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 18 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 3 - llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 + llvm/lib/Object/RelocationResolver.cpp | 2 + llvm/lib/Support/Host.cpp | 2 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 10 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 8 +- .../Target/AArch64/AArch64LoadStoreOptimizer.cpp | 130 ++- llvm/lib/Target/AMDGPU/SOPInstructions.td | 8 +- llvm/lib/Target/AVR/TargetInfo/LLVMBuild.txt | 4 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 20 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 9 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 10 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 15 +- llvm/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp | 2 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 13 +- llvm/lib/Target/PowerPC/PPCSubtarget.h | 5 +- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZProcessors.td | 3 +- llvm/lib/Target/SystemZ/SystemZSchedule.td | 2 +- ...temZScheduleArch13.td => SystemZScheduleZ15.td} | 64 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +- llvm/lib/Target/X86/X86InstrAVX512.td | 7 +- llvm/lib/TextAPI/MachO/Platform.cpp | 3 +- llvm/lib/Transforms/IPO/Attributor.cpp | 41 +- .../Instrumentation/AddressSanitizer.cpp | 4 +- llvm/test/Analysis/CostModel/SystemZ/fp-cast.ll | 36 +- llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll | 22 +- .../Analysis/CostModel/SystemZ/logic-miscext3.ll | 24 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 1 - .../AArch64/GlobalISel/legalize-vector-shift.mir | 78 ++ .../AArch64/GlobalISel/select-vector-shift.mir | 59 + .../AArch64/GlobalISel/tail-call-no-save-fp-lr.ll | 20 + llvm/test/CodeGen/AArch64/ldst-opt-mte.mir | 285 +++++ llvm/test/CodeGen/AArch64/stgp.ll | 2 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir | 15 +- .../PowerPC/CompareEliminationSpillIssue.ll | 2 +- llvm/test/CodeGen/PowerPC/csr-split.ll | 2 +- llvm/test/CodeGen/PowerPC/ctrloop-shortLoops.ll | 14 +- llvm/test/CodeGen/PowerPC/elf-common.ll | 45 + llvm/test/CodeGen/PowerPC/expand-isel.ll | 4 +- llvm/test/CodeGen/PowerPC/f128-aggregates.ll | 2 +- llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll | 16 +- .../CodeGen/PowerPC/ppc64-pre-inc-no-extra-phi.ll | 2 +- llvm/test/CodeGen/PowerPC/pr32140.ll | 8 +- llvm/test/CodeGen/PowerPC/pr36068.ll | 2 +- llvm/test/CodeGen/PowerPC/pr39815.ll | 4 +- llvm/test/CodeGen/PowerPC/sms-simple.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesieqss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesiequs.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesigesc.ll | 2 +- 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llvm/test/CodeGen/PowerPC/testComparesineus.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqsc.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqsi.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslleqss.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllequs.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgess.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgeus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllgtus.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslllesc.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslllesi.ll | 2 +- llvm/test/CodeGen/PowerPC/testCompareslllesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllless.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleull.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllleus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltsll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltuc.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltui.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllltus.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllnesll.ll | 2 +- llvm/test/CodeGen/PowerPC/testComparesllneull.ll | 2 +- llvm/test/CodeGen/PowerPC/zext-and-cmp.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-01.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-02.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-03.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-06.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-07.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-08.mir | 4 +- llvm/test/CodeGen/SystemZ/ctpop-02.ll | 4 +- llvm/test/CodeGen/SystemZ/not-01.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-bswap-01.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-02.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-03.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-04.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-05.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-06.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-07.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-conv-03.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-eswap-01.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-eswap-02.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-intrinsics-03.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll | 4 +- llvm/test/CodeGen/X86/avx512-intrinsics.ll | 16 + llvm/test/CodeGen/X86/bmi.ll | 4 +- .../CodeGen/X86/isel-blendi-gettargetconstant.ll | 19 + .../SystemZ/{insns-arch13.txt => insns-z15.txt} | 4 +- .../SystemZ/{insn-bad-arch13.s => insn-bad-z15.s} | 4 +- .../{insn-good-arch13.s => insn-good-z15.s} | 4 +- llvm/test/Transforms/FunctionAttrs/norecurse.ll | 108 +- llvm/test/Transforms/FunctionAttrs/willreturn.ll | 43 +- llvm/test/Transforms/Inline/X86/switch.ll | 160 +++ ...add-of-negative-is-non-zero-and-no-underflow.ll | 8 +- ...egative-or-zero-is-non-zero-and-no-underflow.ll | 8 +- llvm/test/Verifier/Mips/intrinsic-immarg.ll | 82 -- llvm/tools/llvm-objdump/MachODump.cpp | 31 +- llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 8 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 24 +- .../clang-tools-extra/clang-tidy/objc/BUILD.gn | 1 + 251 files changed, 3159 insertions(+), 1294 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/objc/MissingHashCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/objc/MissingHashCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/objc-missing-hash.rst create mode 100644 clang-tools-extra/test/clang-tidy/objc-missing-hash.m create mode 100644 clang/test/AST/atomic-expr.cpp create mode 100644 clang/test/ClangScanDeps/Inputs/strip_diag_serialize.json create mode 100644 clang/test/ClangScanDeps/strip_diag_serialize.cpp rename llvm/lib/Target/SystemZ/{SystemZScheduleArch13.td => SystemZScheduleZ15.td} (97%) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/tail-call-no-save-fp-lr.ll create mode 100644 llvm/test/CodeGen/AArch64/ldst-opt-mte.mir create mode 100644 llvm/test/CodeGen/PowerPC/elf-common.ll create mode 100644 llvm/test/CodeGen/X86/isel-blendi-gettargetconstant.ll rename llvm/test/MC/Disassembler/SystemZ/{insns-arch13.txt => insns-z15.txt} (99%) rename llvm/test/MC/SystemZ/{insn-bad-arch13.s => insn-bad-z15.s} (99%) rename llvm/test/MC/SystemZ/{insn-good-arch13.s => insn-good-z15.s} (99%) create mode 100644 llvm/test/Transforms/Inline/X86/switch.ll delete mode 100644 llvm/test/Verifier/Mips/intrinsic-immarg.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig updated (bd44e051 -> d800b526)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/base-artifacts. discards bd44e051 0: update: llvm-linux: boot new d800b526 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (bd44e051) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12216 +++++++++++++++++----------------- 03-build_linux/console.log | 690 +- 04-boot_linux/console.log | 480 +- 05-check_regression/console.log | 8 +- 06-update_baseline/console.log | 8 +- console.log | 13622 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13620 insertions(+), 13632 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os updated (a132a2c305 -> afbf970cae)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os in repository toolchain/ci/glibc. from a132a2c305 alpha: force old OSF1 syscalls for getegid, geteuid and getp [...] adds afbf970cae Fix RISC-V vfork build with Linux 5.3 kernel headers. No new revisions were added by this update. Summary of changes: ChangeLog | 7 +++++++ sysdeps/unix/sysv/linux/riscv/vfork.S | 5 ++++- 2 files changed, 11 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os updated (54d8ebfdc04 -> 9f485a09ea1)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os in repository toolchain/ci/gcc. from 54d8ebfdc04 Daily bump. adds d96a167ef38 Daily bump. adds fa72c1670f5 Fix PR88751 adds 72d1e902421 [Darwin, X86, testsuite] Fix PR81058. adds 392a16fd4d6 * config/pa/pa.c (pa_trampoline_init): Remove spurious ext [...] adds 9f485a09ea1 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 14 ++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/pa/pa.c | 2 +- gcc/ira.c | 9 ++++++++- gcc/testsuite/ChangeLog | 11 +++++++++++ gcc/testsuite/gcc.target/i386/avx512bw-vpmovswb-1.c | 1 + gcc/testsuite/gcc.target/i386/avx512bw-vpmovuswb-1.c | 1 + gcc/testsuite/gcc.target/i386/avx512bw-vpmovwb-1.c | 1 + 8 files changed, 38 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os updated (91937123 -> 981687b8)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os in repository toolchain/ci/base-artifacts. discards 91937123 0: update: binutils-gcc-glibc: 0 new 981687b8 0: update: binutils-gcc-glibc: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (91937123) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/gnu-release-arm-spec [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 137 +- 02-prepare_abe/console.log | 412 +- 03-build_abe-binutils/console.log | 6836 +- .../console.log | 14264 +-- 05-build_abe-linux/console.log | 292 +- 06-build_abe-glibc/console.log | 21296 +++-- .../console.log | 46338 +++++---- 09-benchmark/benchmark-start.log | 2 +- 09-benchmark/benchmark.log | 14 +- 09-benchmark/console.log | 190 +- 10-check_regression/console.log | 2189 +- 10-check_regression/results.log | 4695 +- 11-update_baseline/console.log | 983 +- 11-update_baseline/results.log | 4709 +- console.log | 92749 +++++++++---------- jenkins/manifest.sh | 16 +- results-0.csv | 3762 +- results-1.csv | 3718 +- results-full.csv | 4000 +- results.csv | 241 +- results_id | 2 +- 21 files changed, 103309 insertions(+), 103536 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-O2_LTO updated (a132a2c305 -> afbf970cae)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-O2_LTO in repository toolchain/ci/glibc. from a132a2c305 alpha: force old OSF1 syscalls for getegid, geteuid and getp [...] adds afbf970cae Fix RISC-V vfork build with Linux 5.3 kernel headers. No new revisions were added by this update. Summary of changes: ChangeLog | 7 +++++++ sysdeps/unix/sysv/linux/riscv/vfork.S | 5 ++++- 2 files changed, 11 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

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