Tcwg-commits January 2020

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12654 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allyesconfig updated (4e0c1a4e -> 037c7e55)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allyesconfig in repository toolchain/ci/base-artifacts. discards 4e0c1a4e 0: update: binutils-gcc-linux: all new 037c7e55 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4e0c1a4e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ne [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 226 +- 02-prepare_abe/console.log | 408 +- 03-build_abe-binutils/console.log | 11576 +++++------ 04-build_abe-stage1/console.log | 20156 +++++++++---------- 05-build_linux/console.log | 6050 +++--- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 36 +- 08-update_baseline/console.log | 16 +- console.log | 38550 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 10 files changed, 38547 insertions(+), 38487 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (2821e26f3a0a -> d5226fa6dbae)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/linux. from 2821e26f3a0a Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm adds a45ea48e2bcd afs: Fix characters allowed into cell names adds d0cb50185ae9 do_last(): fetch directory ->i_mode and ->i_uid before it' [...] adds b1b298914f3a Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux [...] adds 0e2209629fec scsi: fnic: do not queue commands during fwreset adds 04060db41178 scsi: RDMA/isert: Fix a recently introduced regression rel [...] adds 54343d951838 Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/lin [...] adds b72053072c0b block: allow partitions on host aware zone devices adds 9dbca1608709 Merge tag 'block-5.5-2020-01-26' of git://git.kernel.dk/li [...] adds 73e08e711d9c Revert "io_uring: only allow submit from owning task" adds ebe10026210f io_uring: don't cancel all work on process exit adds 5cf9ad0e6b16 Merge tag 'io_uring-5.5-2020-01-26' of git://git.kernel.dk [...] adds d5226fa6dbae Linux 5.5 No new revisions were added by this update. Summary of changes: Makefile | 2 +- block/partition-generic.c | 26 ++++++++++++++++++++++---- drivers/infiniband/ulp/isert/ib_isert.c | 12 ------------ drivers/scsi/fnic/fnic_scsi.c | 3 +++ drivers/scsi/sd.c | 9 +++++---- drivers/target/iscsi/iscsi_target.c | 6 +++--- fs/afs/cell.c | 11 ++++++++++- fs/io_uring.c | 10 ---------- fs/namei.c | 17 ++++++++++------- include/linux/genhd.h | 12 ++++++++++++ 10 files changed, 66 insertions(+), 42 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (70389be7a02 -> 59d690850ee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 70389be7a02 [ELF][PPC32] Support range extension thunks with addends adds 66f93071cdf AMDGPU/GlobalISel: Clean-up code around ISel for Intrinsics. adds 4a5f9d9faf7 [TargetLowering] Respect recursive depth in SimplifyDemande [...] adds 4aea70ed329 [FPEnv] Extended FPOptions with new attributes adds 1a81b296cda [X86][SSE] combineCommutableSHUFP - permilps(shufps(load(), [...] adds 377e86d12eb [X86][AVX] Add tests showing combineCommutableSHUFP failure [...] adds ae21e37eb43 [mlir][spirv] Add spv.GroupNonUniformElect and spv.GroupNon [...] adds 60d541e1b9d [mlir][spirv] Relax verification to allow flexible placement adds 91d6655a296 [mlir][spirv] NFC: expose builtin func op conversion pattern adds 09f9deaff20 [mlir][spirv] NFC: simplify load/store builder call sites adds 8d6884a15e8 [mlir][spirv] Create builtin variable in nearest symbol table adds cc034a58832 [IR] masked gather/scatter alignment should be set adds f29204d3888 NFC: Implement AST node skipping in ParentMapContext adds 5043962dd31 [Concepts] Fix parsing of scope specifier in compound-requi [...] adds fa19d67a2a2 [X86][AVX] Extend combineCommutableSHUFP to handle v8f32 an [...] adds f99ef5455aa [InstCombine] Add extra shift(c1,add(c2,y)) tests for PR15141 adds 31019dfdf54 [NFC][MCA] Re-autogenerate all check lines in all X86 MCA tests adds 76fcf900d58 [X86][BdVer2] Polish LEA instruction scheduling info adds 0e0c65264ae [libunwind] Fix building standalone after c48974ffd7d1676 adds a8d096aff6b [Concepts] Add missing null check to transformConstructor adds 29e411b3d6a [mlir] Expose getNearestSymbolTable as SymbolTable class method adds 9c24fca2a33 [Concepts] Fix incorrect TemplateArgs for introduction of l [...] adds 17b8f96d65e [FPEnv] Divide macro INSTRUCTION into INSTRUCTION and DAG_I [...] adds 59d690850ee [NFC] Fix typo in Clang docs No new revisions were added by this update. Summary of changes: clang/docs/LibASTMatchersReference.html | 2 +- clang/include/clang/AST/ParentMapContext.h | 2 +- clang/include/clang/AST/Stmt.h | 4 +- clang/include/clang/Basic/LangOptions.h | 48 +- clang/include/clang/Sema/Sema.h | 14 +- clang/lib/AST/ParentMapContext.cpp | 97 +++- clang/lib/Parse/ParseExprCXX.cpp | 26 +- clang/lib/Parse/ParseStmt.cpp | 4 +- clang/lib/Sema/SemaAttr.cpp | 8 + clang/lib/Sema/SemaTemplate.cpp | 6 +- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 7 +- clang/lib/Sema/TreeTransform.h | 4 +- clang/test/Parser/cxx2a-abbreviated-templates.cpp | 19 + clang/test/Parser/cxx2a-concepts-requires-expr.cpp | 24 +- .../Parser/cxx2a-placeholder-type-constraint.cpp | 37 +- .../SemaTemplate/instantiate-requires-clause.cpp | 7 + libunwind/CMakeLists.txt | 2 +- llvm/docs/LangRef.rst | 6 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 2 +- llvm/include/llvm/IR/ConstrainedOps.def | 100 ++-- llvm/include/llvm/IR/IRBuilder.h | 4 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 4 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 2 +- llvm/lib/IR/IntrinsicInst.cpp | 6 +- llvm/lib/IR/Verifier.cpp | 19 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 76 ++- llvm/lib/Target/X86/X86ScheduleBdVer2.td | 36 +- llvm/test/Assembler/auto_upgrade_intrinsics.ll | 2 +- llvm/test/CodeGen/X86/oddshuffles.ll | 68 ++- llvm/test/CodeGen/X86/vec_insert-5.ll | 24 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 11 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 23 + llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll | 11 + .../Transforms/InstCombine/masked_intrinsics.ll | 2 +- llvm/test/Transforms/InstCombine/shift-add.ll | 61 ++- .../test/tools/llvm-mca/X86/BdVer2/resources-lea.s | 542 ++++++++++----------- .../X86/BdVer2/vbroadcast-operand-latency.s | 22 +- .../tools/llvm-mca/X86/Generic/resources-clzero.s | 4 +- .../tools/llvm-mca/X86/Znver1/resources-clzero.s | 4 +- llvm/test/tools/llvm-mca/X86/bextr-read-after-ld.s | 12 + llvm/test/tools/llvm-mca/X86/bzhi-read-after-ld.s | 10 + llvm/test/tools/llvm-mca/X86/read-after-ld-1.s | 4 +- llvm/test/tools/llvm-mca/X86/read-after-ld-2.s | 83 ++-- .../tools/llvm-mca/X86/scheduler-queue-usage.s | 7 +- .../test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s | 40 +- .../llvm-mca/X86/variable-blend-read-after-ld-2.s | 1 - mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 64 ++- mlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h | 14 +- .../mlir/Dialect/SPIRV/SPIRVNonUniformOps.td | 115 ++++- mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td | 12 +- mlir/include/mlir/IR/SymbolTable.h | 4 + .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 8 +- .../StandardToSPIRV/ConvertStandardToSPIRVPass.cpp | 41 +- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 90 +++- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 170 ++++++- .../SPIRV/Transforms/LowerABIAttributesPass.cpp | 4 +- mlir/lib/IR/SymbolTable.cpp | 36 +- .../SPIRV/Serialization/non-uniform-ops.mlir | 22 + mlir/test/Dialect/SPIRV/control-flow-ops.mlir | 35 +- mlir/test/Dialect/SPIRV/non-uniform-ops.mlir | 79 ++- mlir/test/Dialect/SPIRV/structure-ops.mlir | 43 +- 68 files changed, 1543 insertions(+), 741 deletions(-) create mode 100644 clang/test/Parser/cxx2a-abbreviated-templates.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (1a473397 -> f0a3f5b4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 1a473397 0: update: llvm-linux: boot new f0a3f5b4 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1a473397) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 123 +- 02-build_llvm/console.log | 12684 +++++++++++++++++------------------ 03-build_linux/console.log | 754 +-- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 29 - console.log | 13596 +++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- 8 files changed, 13565 insertions(+), 13641 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (70389be7a02 -> 59d690850ee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/llvm-project. from 70389be7a02 [ELF][PPC32] Support range extension thunks with addends adds 66f93071cdf AMDGPU/GlobalISel: Clean-up code around ISel for Intrinsics. adds 4a5f9d9faf7 [TargetLowering] Respect recursive depth in SimplifyDemande [...] adds 4aea70ed329 [FPEnv] Extended FPOptions with new attributes adds 1a81b296cda [X86][SSE] combineCommutableSHUFP - permilps(shufps(load(), [...] adds 377e86d12eb [X86][AVX] Add tests showing combineCommutableSHUFP failure [...] adds ae21e37eb43 [mlir][spirv] Add spv.GroupNonUniformElect and spv.GroupNon [...] adds 60d541e1b9d [mlir][spirv] Relax verification to allow flexible placement adds 91d6655a296 [mlir][spirv] NFC: expose builtin func op conversion pattern adds 09f9deaff20 [mlir][spirv] NFC: simplify load/store builder call sites adds 8d6884a15e8 [mlir][spirv] Create builtin variable in nearest symbol table adds cc034a58832 [IR] masked gather/scatter alignment should be set adds f29204d3888 NFC: Implement AST node skipping in ParentMapContext adds 5043962dd31 [Concepts] Fix parsing of scope specifier in compound-requi [...] adds fa19d67a2a2 [X86][AVX] Extend combineCommutableSHUFP to handle v8f32 an [...] adds f99ef5455aa [InstCombine] Add extra shift(c1,add(c2,y)) tests for PR15141 adds 31019dfdf54 [NFC][MCA] Re-autogenerate all check lines in all X86 MCA tests adds 76fcf900d58 [X86][BdVer2] Polish LEA instruction scheduling info adds 0e0c65264ae [libunwind] Fix building standalone after c48974ffd7d1676 adds a8d096aff6b [Concepts] Add missing null check to transformConstructor adds 29e411b3d6a [mlir] Expose getNearestSymbolTable as SymbolTable class method adds 9c24fca2a33 [Concepts] Fix incorrect TemplateArgs for introduction of l [...] adds 17b8f96d65e [FPEnv] Divide macro INSTRUCTION into INSTRUCTION and DAG_I [...] adds 59d690850ee [NFC] Fix typo in Clang docs No new revisions were added by this update. Summary of changes: clang/docs/LibASTMatchersReference.html | 2 +- clang/include/clang/AST/ParentMapContext.h | 2 +- clang/include/clang/AST/Stmt.h | 4 +- clang/include/clang/Basic/LangOptions.h | 48 +- clang/include/clang/Sema/Sema.h | 14 +- clang/lib/AST/ParentMapContext.cpp | 97 +++- clang/lib/Parse/ParseExprCXX.cpp | 26 +- clang/lib/Parse/ParseStmt.cpp | 4 +- clang/lib/Sema/SemaAttr.cpp | 8 + clang/lib/Sema/SemaTemplate.cpp | 6 +- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 7 +- clang/lib/Sema/TreeTransform.h | 4 +- clang/test/Parser/cxx2a-abbreviated-templates.cpp | 19 + clang/test/Parser/cxx2a-concepts-requires-expr.cpp | 24 +- .../Parser/cxx2a-placeholder-type-constraint.cpp | 37 +- .../SemaTemplate/instantiate-requires-clause.cpp | 7 + libunwind/CMakeLists.txt | 2 +- llvm/docs/LangRef.rst | 6 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 2 +- llvm/include/llvm/IR/ConstrainedOps.def | 100 ++-- llvm/include/llvm/IR/IRBuilder.h | 4 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 4 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 2 +- llvm/lib/IR/IntrinsicInst.cpp | 6 +- llvm/lib/IR/Verifier.cpp | 19 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 76 ++- llvm/lib/Target/X86/X86ScheduleBdVer2.td | 36 +- llvm/test/Assembler/auto_upgrade_intrinsics.ll | 2 +- llvm/test/CodeGen/X86/oddshuffles.ll | 68 ++- llvm/test/CodeGen/X86/vec_insert-5.ll | 24 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 11 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 23 + llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll | 11 + .../Transforms/InstCombine/masked_intrinsics.ll | 2 +- llvm/test/Transforms/InstCombine/shift-add.ll | 61 ++- .../test/tools/llvm-mca/X86/BdVer2/resources-lea.s | 542 ++++++++++----------- .../X86/BdVer2/vbroadcast-operand-latency.s | 22 +- .../tools/llvm-mca/X86/Generic/resources-clzero.s | 4 +- .../tools/llvm-mca/X86/Znver1/resources-clzero.s | 4 +- llvm/test/tools/llvm-mca/X86/bextr-read-after-ld.s | 12 + llvm/test/tools/llvm-mca/X86/bzhi-read-after-ld.s | 10 + llvm/test/tools/llvm-mca/X86/read-after-ld-1.s | 4 +- llvm/test/tools/llvm-mca/X86/read-after-ld-2.s | 83 ++-- .../tools/llvm-mca/X86/scheduler-queue-usage.s | 7 +- .../test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s | 40 +- .../llvm-mca/X86/variable-blend-read-after-ld-2.s | 1 - mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 64 ++- mlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h | 14 +- .../mlir/Dialect/SPIRV/SPIRVNonUniformOps.td | 115 ++++- mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td | 12 +- mlir/include/mlir/IR/SymbolTable.h | 4 + .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 8 +- .../StandardToSPIRV/ConvertStandardToSPIRVPass.cpp | 41 +- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 90 +++- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 170 ++++++- .../SPIRV/Transforms/LowerABIAttributesPass.cpp | 4 +- mlir/lib/IR/SymbolTable.cpp | 36 +- .../SPIRV/Serialization/non-uniform-ops.mlir | 22 + mlir/test/Dialect/SPIRV/control-flow-ops.mlir | 35 +- mlir/test/Dialect/SPIRV/non-uniform-ops.mlir | 79 ++- mlir/test/Dialect/SPIRV/structure-ops.mlir | 43 +- 68 files changed, 1543 insertions(+), 741 deletions(-) create mode 100644 clang/test/Parser/cxx2a-abbreviated-templates.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (966c5ffc -> 579517be)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 966c5ffc 0: update: llvm-linux: 16 new 579517be 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (966c5ffc) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 22 +- 02-build_llvm/console.log | 12668 +++++++++++++++++------------------ 03-build_linux/console.log | 856 +-- 05-check_regression/console.log | 46 +- 06-update_baseline/console.log | 10 +- console.log | 13602 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 7 files changed, 13607 insertions(+), 13607 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allmodconfig updated (6f8ad14521e -> b39efdbcfcb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allmodconfig in repository toolchain/ci/llvm-project. from 6f8ad14521e [ELF][PPC32] Support canonical PLT adds f15b60b3a2a [ELF][PPC32] Support range extension thunks with addends adds 27f93515c68 [docs][mips] 10.0 Release notes adds 73a91477f70 [Concepts] Fix parsing of scope specifier in compound-requi [...] adds b07b82777b9 [Concepts] Add missing null check to transformConstructor adds b39efdbcfcb [Concepts] Fix incorrect TemplateArgs for introduction of l [...] No new revisions were added by this update. Summary of changes: clang/docs/ReleaseNotes.rst | 3 + clang/lib/Parse/ParseExprCXX.cpp | 26 ++----- clang/lib/Sema/SemaTemplate.cpp | 6 +- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 7 +- clang/test/Parser/cxx2a-abbreviated-templates.cpp | 19 +++++ clang/test/Parser/cxx2a-concepts-requires-expr.cpp | 24 +++--- .../Parser/cxx2a-placeholder-type-constraint.cpp | 37 +++++---- .../SemaTemplate/instantiate-requires-clause.cpp | 7 ++ lld/ELF/Arch/PPC.cpp | 10 +-- lld/ELF/Relocations.cpp | 21 ++---- lld/ELF/Thunks.cpp | 45 ++++++++++- lld/docs/ReleaseNotes.rst | 8 ++ lld/test/ELF/ppc32-long-thunk.s | 87 ++++++++++++++++++++++ llvm/docs/ReleaseNotes.rst | 18 ++++- 14 files changed, 243 insertions(+), 75 deletions(-) create mode 100644 clang/test/Parser/cxx2a-abbreviated-templates.cpp create mode 100644 lld/test/ELF/ppc32-long-thunk.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allmodconfig updated (33ba9943 -> 88926990)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards 33ba9943 2: update: llvm-linux: all new 88926990 2: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (33ba9943) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 12676 ++++++++-------- 03-build_linux/console.log | 17492 +++++++++++----------- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 100 +- console.log | 30464 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 8 files changed, 30469 insertions(+), 30469 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (2f45a93edfe -> 59d690850ee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/llvm-project. from 2f45a93edfe [Support] `const`ify a method; NFC adds 70389be7a02 [ELF][PPC32] Support range extension thunks with addends adds 66f93071cdf AMDGPU/GlobalISel: Clean-up code around ISel for Intrinsics. adds 4a5f9d9faf7 [TargetLowering] Respect recursive depth in SimplifyDemande [...] adds 4aea70ed329 [FPEnv] Extended FPOptions with new attributes adds 1a81b296cda [X86][SSE] combineCommutableSHUFP - permilps(shufps(load(), [...] adds 377e86d12eb [X86][AVX] Add tests showing combineCommutableSHUFP failure [...] adds ae21e37eb43 [mlir][spirv] Add spv.GroupNonUniformElect and spv.GroupNon [...] adds 60d541e1b9d [mlir][spirv] Relax verification to allow flexible placement adds 91d6655a296 [mlir][spirv] NFC: expose builtin func op conversion pattern adds 09f9deaff20 [mlir][spirv] NFC: simplify load/store builder call sites adds 8d6884a15e8 [mlir][spirv] Create builtin variable in nearest symbol table adds cc034a58832 [IR] masked gather/scatter alignment should be set adds f29204d3888 NFC: Implement AST node skipping in ParentMapContext adds 5043962dd31 [Concepts] Fix parsing of scope specifier in compound-requi [...] adds fa19d67a2a2 [X86][AVX] Extend combineCommutableSHUFP to handle v8f32 an [...] adds f99ef5455aa [InstCombine] Add extra shift(c1,add(c2,y)) tests for PR15141 adds 31019dfdf54 [NFC][MCA] Re-autogenerate all check lines in all X86 MCA tests adds 76fcf900d58 [X86][BdVer2] Polish LEA instruction scheduling info adds 0e0c65264ae [libunwind] Fix building standalone after c48974ffd7d1676 adds a8d096aff6b [Concepts] Add missing null check to transformConstructor adds 29e411b3d6a [mlir] Expose getNearestSymbolTable as SymbolTable class method adds 9c24fca2a33 [Concepts] Fix incorrect TemplateArgs for introduction of l [...] adds 17b8f96d65e [FPEnv] Divide macro INSTRUCTION into INSTRUCTION and DAG_I [...] adds 59d690850ee [NFC] Fix typo in Clang docs No new revisions were added by this update. Summary of changes: clang/docs/LibASTMatchersReference.html | 2 +- clang/include/clang/AST/ParentMapContext.h | 2 +- clang/include/clang/AST/Stmt.h | 4 +- clang/include/clang/Basic/LangOptions.h | 48 +- clang/include/clang/Sema/Sema.h | 14 +- clang/lib/AST/ParentMapContext.cpp | 97 +++- clang/lib/Parse/ParseExprCXX.cpp | 26 +- clang/lib/Parse/ParseStmt.cpp | 4 +- clang/lib/Sema/SemaAttr.cpp | 8 + clang/lib/Sema/SemaTemplate.cpp | 6 +- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 7 +- clang/lib/Sema/TreeTransform.h | 4 +- clang/test/Parser/cxx2a-abbreviated-templates.cpp | 19 + clang/test/Parser/cxx2a-concepts-requires-expr.cpp | 24 +- .../Parser/cxx2a-placeholder-type-constraint.cpp | 37 +- .../SemaTemplate/instantiate-requires-clause.cpp | 7 + libunwind/CMakeLists.txt | 2 +- lld/ELF/Arch/PPC.cpp | 10 +- lld/ELF/Relocations.cpp | 21 +- lld/ELF/Thunks.cpp | 45 +- lld/test/ELF/ppc32-long-thunk.s | 87 ++++ llvm/docs/LangRef.rst | 6 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 2 +- llvm/include/llvm/IR/ConstrainedOps.def | 100 ++-- llvm/include/llvm/IR/IRBuilder.h | 4 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 4 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 2 +- llvm/lib/IR/IntrinsicInst.cpp | 6 +- llvm/lib/IR/Verifier.cpp | 19 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 76 ++- llvm/lib/Target/X86/X86ScheduleBdVer2.td | 36 +- llvm/test/Assembler/auto_upgrade_intrinsics.ll | 2 +- llvm/test/CodeGen/X86/oddshuffles.ll | 68 ++- llvm/test/CodeGen/X86/vec_insert-5.ll | 24 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 11 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 23 + llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll | 11 + .../Transforms/InstCombine/masked_intrinsics.ll | 2 +- llvm/test/Transforms/InstCombine/shift-add.ll | 61 ++- .../test/tools/llvm-mca/X86/BdVer2/resources-lea.s | 542 ++++++++++----------- .../X86/BdVer2/vbroadcast-operand-latency.s | 22 +- .../tools/llvm-mca/X86/Generic/resources-clzero.s | 4 +- .../tools/llvm-mca/X86/Znver1/resources-clzero.s | 4 +- llvm/test/tools/llvm-mca/X86/bextr-read-after-ld.s | 12 + llvm/test/tools/llvm-mca/X86/bzhi-read-after-ld.s | 10 + llvm/test/tools/llvm-mca/X86/read-after-ld-1.s | 4 +- llvm/test/tools/llvm-mca/X86/read-after-ld-2.s | 83 ++-- .../tools/llvm-mca/X86/scheduler-queue-usage.s | 7 +- .../test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s | 40 +- .../llvm-mca/X86/variable-blend-read-after-ld-2.s | 1 - mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 64 ++- mlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h | 14 +- .../mlir/Dialect/SPIRV/SPIRVNonUniformOps.td | 115 ++++- mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td | 12 +- mlir/include/mlir/IR/SymbolTable.h | 4 + .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 8 +- .../StandardToSPIRV/ConvertStandardToSPIRVPass.cpp | 41 +- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 90 +++- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 170 ++++++- .../SPIRV/Transforms/LowerABIAttributesPass.cpp | 4 +- mlir/lib/IR/SymbolTable.cpp | 36 +- .../SPIRV/Serialization/non-uniform-ops.mlir | 22 + mlir/test/Dialect/SPIRV/control-flow-ops.mlir | 35 +- mlir/test/Dialect/SPIRV/non-uniform-ops.mlir | 79 ++- mlir/test/Dialect/SPIRV/structure-ops.mlir | 43 +- 72 files changed, 1683 insertions(+), 764 deletions(-) create mode 100644 clang/test/Parser/cxx2a-abbreviated-templates.cpp create mode 100644 lld/test/ELF/ppc32-long-thunk.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (9099a794 -> 0dcd41eb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards 9099a794 0: update: llvm-linux: boot new 0dcd41eb 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9099a794) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 168 +- 02-build_llvm/console.log | 12684 +++++++++++++++---------------- 03-build_linux/console.log | 1939 ++--- 04-boot_linux/console.log | 406 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 10 +- console.log | 15209 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 8 files changed, 15213 insertions(+), 15215 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

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Tcwg-commits January 2020