Tcwg-commits January 2020

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[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (d96d875ef5dd -> 131701c697e8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/linux. from d96d875ef5dd Merge tag 'fixes_for_v5.5-rc8' of git://git.kernel.org/pub [...] adds 1292e972fff2 io_uring: fix compat for IORING_REGISTER_FILES_UPDATE adds dbab40bdb42c Merge tag 'io_uring-5.5-2020-01-22' of git://git.kernel.dk [...] adds 7713e62c8623 hwmon: (nct7802) Fix voltage limits to wrong registers adds e51a7dda2998 hwmon: (nct7802) Fix non-working alarm on voltages adds cf3ca1877574 hwmon: (adt7475) Make volt2reg return same reg as reg2volt input adds 3bf8bdcf3bad hwmon: (core) Do not use device managed functions for memo [...] adds 1b4e677f86c7 Merge tag 'hwmon-for-v5.5-rc8' of git://git.kernel.org/pub [...] adds 90a8e82d3ca8 leds: gpio: Fix uninitialized gpio label for fwnode based probe adds 22cb0a76e005 leds-as3645a: Drop fwnode reference on ignored node adds 2424415d25a7 led: max77650: add of_match table adds 30d57d55abd7 ledtrig-pattern: fix email address quoting in MODULE_AUTHOR() adds 51eb5a24de91 leds: rb532: cleanup whitespace adds 43108c72cf1d leds: lm3532: add pointer to documentation and fix typo adds 131701c697e8 Merge tag 'leds-5.5-rc8' of git://git.kernel.org/pub/scm/l [...] No new revisions were added by this update. Summary of changes: drivers/hwmon/adt7475.c | 5 ++- drivers/hwmon/hwmon.c | 68 ++++++++++++++++++------------ drivers/hwmon/nct7802.c | 75 +++++++++++++++++++++++++++++++--- drivers/leds/leds-as3645a.c | 3 +- drivers/leds/leds-gpio.c | 10 ++++- drivers/leds/leds-lm3532.c | 3 +- drivers/leds/leds-max77650.c | 7 ++++ drivers/leds/leds-rb532.c | 1 - drivers/leds/trigger/ledtrig-pattern.c | 4 +- fs/io_uring.c | 4 +- include/uapi/linux/io_uring.h | 3 +- 11 files changed, 140 insertions(+), 43 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (97d000da2e6 -> 15ac7277143)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 97d000da2e6 [ORC] Fix the LLJITWithObjectCache example to address chang [...] adds 2e25d75aaa2 [AArch64][GlobalISel] Fix llvm.returnaddress(0) selection w [...] adds c9a39a896c9 [lldb] Add a display name to ClangASTContext instances adds 3a906a9f4e6 [VE] i<N> and fp32/64 arguments, return values and constants adds de51559fa68 [Concepts] Fix incorrect recovery in TryAnnotateTypeConstraint adds a133cbaad5b [clang][index] Index the injected class name types. adds 3593b5b3e9c [llvm-as] Fix assembling of index with multiple summaries s [...] adds 5d4e8997571 [clangd] Handle the missing injectedClassNameType in targetDecl. adds 935729e4c63 Change the googlemock link adds 0157a74bec3 [lldb] Fix an asan error from 27df2d9f556c adds 7984b47401f [mlir][orc] unbreak MLIR ExecutionEngine after ORC changes adds 45538b5fb28 [Concepts] Fix bug when referencing function parameters in [...] adds c04b9ba5958 [ARM][MVE] Clear MaskedInsts vector adds eaa594f4ec5 [llvm-readobj] - Rewrite gnuhash.test test to stop using pr [...] adds 1d549e68d4a [Doc] Update requirements for masked load/store adds 5be8b2ec4a0 [llvm-exegesis] Serial snippet: Restrict the set of back-to [...] adds 889a4f55c91 [lldb] s/lldb/%lldb in two tests adds 0957233320e [Alignment][NFC] Use Align with CreateMaskedStore adds e57a9abc4b0 [Concepts] Placeholder constraints and abbreviated templates adds 67d4c9924c1 Add support for (expressing) vscale. adds 7b81c3f8793 Revert "[Concepts] Fix bug when referencing function parame [...] adds 9570f1e5a61 [clangd] Do not duplicate TemplatedDecls in findExplicitReferences adds e727f39ec0b [LLD][ELF][ARM] Don't apply --fix-cortex-a8 to relocatable links. adds cdcc4f2a44b [AArch64][SVE] Add intrinsic for non-faulting loads adds c42fe24754f [lld/ELF] PR44498: Support input filename in double quote adds 3d7177acd75 [lldb/DWARF] Remove one more auto-dwo method adds 201c646b2b9 Remove extra ';' to fix Wpedantic. NFCI. adds 963f2681869 [X86][SSE] combineExtractWithShuffle - pull out repeated ex [...] adds 178562fb352 [mlir] Enable specifying verify on OpInterface adds 4460cb5bcd7 [mlir][spirv] Add lowering for composite std.constant. adds ecc7dae50c4 Extend misc-misplaced-const to detect using declarations as [...] adds 2accdb6ae19 [llvm-mca][NFC] Regenerate tests @HEAD. adds c784e5451b2 Use SelectionDAG::getShiftAmountConstant(). NFCI. adds 80656fd7aef [SelectionDAG] getShiftAmountConstant - assert the type is [...] adds c0f53ed8066 [InstCombine] add tests for fneg+fadd; NFC adds 64e95282012 AMDGPU: Fix missing immarg on llvm.amdgcn.interp.mov adds b94d3b9b77a AMDGPU/GlobalISel: RegBankSelect interp intrinsics adds e3b15ed376f Revert "Extend misc-misplaced-const to detect using declara [...] adds 4481eefbe84 [ASTImporter] Properly delete decls from SavedImportPaths adds 9c928649a08 AMDGPU: Fix interaction of tfe and d16 adds a722cbf77cc AMDGPU/GlobalISel: Handle atomic_inc/atomic_dec adds 70096ca111e AMDGPU/GlobalISel: Fix RegbankSelect for llvm.amdgcn.fmul.legacy adds e0f0d0e55cc [MachineScheduler] Allow clustering mem ops with complex addresses adds 4cf16efe497 [AArch64][SVE] Add patterns for unpredicated load/store to [...] adds 0b83e14804c [ARM] MVE Gather Scatter cost model tests. NFC adds e9c198278e2 [ARM] Basic gather scatter cost model adds dc69265eea8 [VE] setcc isel patterns adds 0ade2abdb01 [InstCombine] fneg(X + C) --> -C - X adds 968561bcdc3 Unconditionally enable lvalue function designators; NFC adds a174f0da62f AMDGPU/GlobalISel: Add pre-legalize combiner pass adds bcd91778fe7 AMDGPU: Do binop of select of constant fold in AMDGPUCodeGe [...] adds 2fe500ab5bb AMDGPU: Look through casted selects to constant fold bin ops adds e93e1b621c4 AMDGPU: Fix typo adds 83b67526d5c [VE] select and selectcc patterns adds 9dc9f7ca145 [lldb/Target] Sort CMakeLists (NFC) adds e3d352c5411 AMDGPU/GlobalISel: Fold constant offset vector extract indexes adds 04a151710e8 [mlir] Swap use of to_vector() with lookupValues() in LLVMI [...] adds 3524d4412cf AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT adds d1dbb5e4718 AMDGPU/GlobalISel: Select G_INSERT_VECTOR_ELT adds 3215f7c7a81 [compiler-rt] [builtins] Fix clear_cache_test to work with [...] adds 349f6bb873d [gn build] (manually) port a174f0da62f adds 52ec7379adf AMDGPU/GlobalISel: Fold add of constant into G_INSERT_VECTOR_ELT adds a14aa7dabde [X86][SSE] combineExtractWithShuffle - extract(bictcast(sca [...] adds 0cb274de397 [RISCV] Support ABI checking with per function target-features adds bb562d1af0e AMDGPU/GlobalISel: Keep G_BITCAST out of waterfall loop adds 0bf434ccd56 AMDGPU: Fix element size assertion adds a8ff6c0b097 [AArch64] Add test for DWARF return address signing adds ddbc728828c [PGO][PGSO] Update BFI in CodeGenPrepare::optimizeSelectInst. adds dd09ec1208b AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp8 adds c05f23e409a AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp adds fb8a3d18340 Regenerate test/CodeGen/ARM/vext.ll. NFC. adds 2d0fcf786c5 Precommit NFC part of DAGCombiner change. NFC. adds 45a4aaea7fd [NFC][XCOFF] Refactor Csect creation into TargetLoweringObjectFile adds 1192d7b2547 AMDGPU/GlobalISel: Handle 16-bank LDS llvm.amdgcn.interp.p1.f16 adds 300997c41a0 [AArch64] Don't rename registers with pseudo defs in Ld/St opt. adds fd98eccf984 [gn build] [win] produce symbolized stack frames in release [...] adds dfe9f130e07 Revert "Unconditionally enable lvalue function designators; NFC" adds 990acd450cf [scudo][standalone] Reduce Android region sizes to 128MB adds 5114d55dde4 [Flang] add some cmake code to allow for out-of-tree buildi [...] adds bfcfa53c3df Revert "[gn build] [win] produce symbolized stack frames in [...] adds cd470717d15 Revert "[DA][TTI][AMDGPU] Add option to select GPUDA with TTI" adds 58991ba7737 [ARM] Mark MVE loads/store as not having side effects adds 5340434c94c [X86][SSE] combineExtractWithShuffle - extract(bitcast(broa [...] adds 635cbef5056 [CMake][Fuchsia] Disable in-process cc1 adds 1e4764e1032 Add a comment about when we can remove this construct; NFC. adds c2a250e1c43 [Concepts] Fix bug when referencing function parameters in [...] adds 8f21acbf52b [gn build] reformat all build files again adds 90cfbb81674 Add LLVM_VALUE_FUNCTION to Optional::map(); NFC adds 1b8eab179db AMDGPU/R600: Emit rodata in text segment adds eec36909c18 [mlir] Add baseAttr to TypedArrayAttrBase. adds efb130fc930 [LoopDeletion] Teach LoopDeletion to preserve MemorySSA if [...] adds 8edf037aebd Add a bit of documentation on attribute spellings that were [...] adds 84c5f196370 Extend misc-misplaced-const to detect using declarations as [...] adds 38c68047b04 [SVE] Pass Scalable argument to VectorType::get in Bitcode Reader adds 363d27c871f [x86] fold vperm2x128 to concat of 128-bit high half vectors adds 8ded83ff7e0 [llvm-cov] Add support for -skip-functions to lcov adds 15f1d5d1442 [libFuzzer] Add INFO output when LLVMFuzzerCustomMutator is found. adds 7dc49f77ee5 R600: Fix failing testcase adds 89c8866c041 Convert AssertTrue( A == B) to AssertEqual(A, B) in TestObj [...] adds 31662e67e08 [lldb/Util] Fix lldb-repro now it doesn't take a path to lldb adds 536612df4b4 [lldb/Test] Use lit's capabilities to skip lldb-repro tests. adds 8401698fb57 [lldb/Reproducer] Correctly instrument enum values adds 90f58eaeff5 [ODRHash] Factor out functionality for CXXRecord ODR diagno [...] adds ed80c86c885 [PatternMatch] Add m_APInt/m_APFloat matchers accepting undef adds 68d7f06092e Clang] Fix expansion of response files in -Wp after integra [...] adds 9aa816a816b [PowerPC] Collect some CallLowering arguments into a struct. [NFC] adds efba7ed05e5 [PatternMatch] Make m_c_ICmp swap the predicate (PR42801) adds f55b033c028 [TestStdModuleSysroot] Only run locally. adds 5bb8d28e61c [mlir][Linalg] Add tensor support to Linalg EDSC Builders adds 16b9410caa3 [X86] Cast to __v4hi instead of __m64 in the implementation [...] adds 80c34f94acd [InstCombine] Add test for PR44529; NFC adds 0b83c5a78fa [InstCombine] Combine neg of shl of sub (PR44529) adds b32013baec1 [www] Update cxx_status page to list changes on the Clang 1 [...] adds 4c2b0a63661 [lldb/Utility] Don't forward directories to the file collector adds 6ae61f7675d [lldb/Test] Skip script interpreter tests reading from stdi [...] adds 6baf31b7c1e [LoopIdiomRecognize] Reduce variable scope. [NFCI] adds b5b6126d97e [IndVarSimplify] Cleanup spaces and reduce variable scope [NFCI] adds 1f45914b428 Embed a zero-length /dev/null in darwin-debug for the speci [...] adds 0e9374e3740 [nfc][libomptarget] Remove SHARED annotation from local variables adds df839cfda09 [cmake] Fix clang builds with BUILD_SHARED=ON and CLANG_LIN [...] adds 4751e4f8c24 Revert "[cmake] Fix clang builds with BUILD_SHARED=ON and C [...] adds c4144caf9b8 [lldb/Reproducer] Disable buffering of stdout during replay adds adc4faf532b [IndVarSimplify] Teach IndVarSimplify to preserve MemorySSA. adds 39ae86ab72d [AArch64TTI] AArch64 supports NT vector stores through STNP. adds 83a093b8ecc [lldb/Reproducer] Mark some driver tests as unsupported fo [...] adds d42baff45d9 Replace old-style cast of null pointer with nullptr adds 9be5c135388 [lldb/Test] Add check-lldb-repro target adds 9b5a9f2fab1 [lldb/Test] Fix type in add_lit_testsuite adds 48490e3247a [lldb/Docs] Document testing strategies for the reproducers adds 3f5976c97db [RISCV] Fix evaluating %pcrel_lo against global and weak symbols adds cf2b498d284 [llvm/Transforms] Fix warning: private field 'MSSA' is not used adds ddfe8751b16 [test] Fix lld/test/ELF/riscv-pcrel-hilo-error.s after D73211 adds f14f2a85680 [LV] Fix predication for branches with matching true and fa [...] adds 4d14772f5c2 AMDGPU/GlobalISel: Remove redundant or patterns adds e0502563778 AMDGPU/GlobalISel: Fix generated wave64 checks adds 45f630d729e [libcxx] [test] Don't assert that moved-from containers wit [...] adds 53a28bd8917 [LICM] NFC. Remove AST caching infrastructure adds 5e017c12d22 [DWARF] Allow empty address range tables. adds dcff3961c2d [DWARF] Return Error from DWARFDebugArangeSet::extract(). adds d6f39cfed06 [DWARF] Make dwarf::getUnitLengthFieldByteSize() constexpr. NFC. adds a0f367f792a [DWARF] Make dwarf::getDwarfOffsetByteSize() a free function. NFC. adds 6332990721d [DWARF] Support DWARF64 in DWARFDebugArangeSet. adds ed9851a0a68 [DWARF] Better detect errors in Address Range Tables. adds 1b15965932c [gn build] Port dcff3961c2d adds 15ac7277143 Fix build bot failures. No new revisions were added by this update. Summary of changes: .../bugprone/ReservedIdentifierCheck.cpp | 2 +- .../clang-tidy/misc/MisplacedConstCheck.cpp | 38 +- clang-tools-extra/clangd/FindTarget.cpp | 12 + .../clangd/unittests/FindTargetTests.cpp | 66 +- .../clang-tidy/checks/misc-misplaced-const.rst | 21 +- .../clang-tidy/checkers/misc-misplaced-const.c | 6 +- .../clang-tidy/checkers/misc-misplaced-const.cpp | 58 +- clang/cmake/caches/Fuchsia-stage2.cmake | 1 + clang/docs/InternalsManual.rst | 12 +- clang/include/clang/AST/ASTContext.h | 7 +- clang/include/clang/AST/ASTNodeTraverser.h | 4 +- clang/include/clang/AST/DeclTemplate.h | 43 +- clang/include/clang/AST/PropertiesBase.td | 2 + clang/include/clang/AST/RecursiveASTVisitor.h | 14 +- clang/include/clang/AST/TemplateBase.h | 7 +- clang/include/clang/AST/Type.h | 74 +- clang/include/clang/AST/TypeLoc.h | 138 +- clang/include/clang/AST/TypeProperties.td | 11 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 2 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 12 +- clang/include/clang/Driver/Driver.h | 2 +- clang/include/clang/Sema/DeclSpec.h | 72 +- clang/include/clang/Sema/Scope.h | 6 + clang/include/clang/Sema/ScopeInfo.h | 20 +- clang/include/clang/Sema/Sema.h | 47 +- clang/lib/AST/ASTContext.cpp | 152 +- clang/lib/AST/ASTImporter.cpp | 22 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 26 +- clang/lib/AST/DeclTemplate.cpp | 45 +- clang/lib/AST/ODRHash.cpp | 7 + clang/lib/AST/TemplateBase.cpp | 2 +- clang/lib/AST/TextNodeDumper.cpp | 5 + clang/lib/AST/Type.cpp | 36 +- clang/lib/AST/TypeLoc.cpp | 95 + clang/lib/AST/TypePrinter.cpp | 29 +- clang/lib/CodeGen/CGBuiltin.cpp | 25 +- clang/lib/Headers/xmmintrin.h | 4 +- clang/lib/Index/IndexTypeSourceInfo.cpp | 5 + clang/lib/Parse/ParseCXXInlineMethods.cpp | 4 +- clang/lib/Parse/ParseDecl.cpp | 73 +- clang/lib/Parse/ParseDeclCXX.cpp | 2 + clang/lib/Parse/ParseTemplate.cpp | 10 +- clang/lib/Parse/ParseTentative.cpp | 21 + clang/lib/Parse/Parser.cpp | 24 + clang/lib/Sema/DeclSpec.cpp | 9 + clang/lib/Sema/Sema.cpp | 15 + clang/lib/Sema/SemaDecl.cpp | 39 +- clang/lib/Sema/SemaDeclCXX.cpp | 47 + clang/lib/Sema/SemaLambda.cpp | 3 +- clang/lib/Sema/SemaTemplate.cpp | 190 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 77 +- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 16 +- clang/lib/Sema/SemaType.cpp | 229 +- clang/lib/Sema/TreeTransform.h | 137 +- clang/lib/Serialization/ASTReader.cpp | 1439 +++++++------ clang/lib/Serialization/ASTReaderDecl.cpp | 22 +- clang/lib/Serialization/ASTWriter.cpp | 12 + clang/lib/Serialization/ASTWriterDecl.cpp | 4 + .../AST/ast-dump-record-definition-data-json.cpp | 57 +- clang/test/CXX/dcl/dcl.fct/p17.cpp | 260 +++ .../CXX/dcl/dcl.spec/dcl.type/dcl.spec.auto/p6.cpp | 44 + .../expr.prim.lambda.closure/p3.cpp | 6 +- clang/test/CXX/temp/temp.param/p10-2a.cpp | 25 +- clang/test/Driver/Wp-args.c | 10 + .../Parser/cxx2a-placeholder-type-constraint.cpp | 26 + clang/test/SemaCXX/cxx1y-generic-lambdas.cpp | 2 +- .../SemaTemplate/instantiate-requires-clause.cpp | 10 + .../ms-delayed-default-template-args.cpp | 3 +- clang/tools/driver/driver.cpp | 22 +- clang/unittests/Index/IndexTests.cpp | 21 + clang/www/cxx_dr_status.html | 8 +- clang/www/cxx_status.html | 38 +- clang/www/make_cxx_dr_status | 12 +- compiler-rt/lib/fuzzer/FuzzerDriver.cpp | 5 +- .../lib/scudo/standalone/allocator_config.h | 8 +- compiler-rt/test/builtins/Unit/clear_cache_test.c | 47 +- compiler-rt/test/fuzzer/fuzzer-custommutator.test | 2 + libcxx/src/locale.cpp | 4 +- .../associative/map/map.cons/move_assign.pass.cpp | 2 +- .../multimap/multimap.cons/move_assign.pass.cpp | 2 +- .../multiset/multiset.cons/move_assign.pass.cpp | 2 +- .../associative/set/set.cons/move_assign.pass.cpp | 2 +- .../sequences/vector.bool/assign_move.pass.cpp | 2 +- lld/Common/Strings.cpp | 26 +- lld/ELF/Driver.cpp | 3 +- lld/ELF/LinkerScript.h | 2 +- lld/ELF/ScriptParser.cpp | 17 +- lld/ELF/SymbolTable.cpp | 2 +- lld/include/lld/Common/Strings.h | 46 +- lld/test/ELF/arm-fix-cortex-a8-recognize.s | 10 + lld/test/ELF/linkerscript/filename-spec.s | 4 +- lld/test/ELF/riscv-pcrel-hilo-error.s | 6 + lldb/docs/resources/reproducers.rst | 25 + lldb/include/lldb/Host/FileSystem.h | 1 + lldb/include/lldb/Symbol/ClangASTContext.h | 15 +- .../lldb/Utility/ReproducerInstrumentation.h | 11 +- .../sysroot/TestStdModuleSysroot.py | 1 + .../comp_dir_symlink/TestCompDirSymLink.py | 20 +- .../lang/objc/objc-stepping/TestObjCStepping.py | 54 +- lldb/source/Host/common/FileSystem.cpp | 12 +- lldb/source/Host/posix/FileSystemPosix.cpp | 2 +- .../ExpressionParser/Clang/ClangASTSource.cpp | 97 +- .../Clang/ClangExpressionParser.cpp | 3 +- .../Clang/ClangModulesDeclVendor.cpp | 4 +- .../ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp | 7 +- .../AppleObjCTypeEncodingParser.cpp | 7 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp | 2 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 3 - .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 88 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 7 + lldb/source/Symbol/ClangASTContext.cpp | 19 +- lldb/source/Target/CMakeLists.txt | 4 +- lldb/source/Utility/ReproducerInstrumentation.cpp | 5 + lldb/test/Shell/CMakeLists.txt | 14 + lldb/test/Shell/Driver/LocalLLDBInit.test | 2 + lldb/test/Shell/Driver/TestCore.test | 2 + lldb/test/Shell/Driver/TestFile.test | 2 + lldb/test/Shell/Driver/TestRepl.test | 2 + .../ObjectFile/ELF/PT_LOAD-overlap-PT_TLS.yaml | 2 +- .../ObjectFile/ELF/PT_TLS-overlap-PT_LOAD.yaml | 2 +- lldb/test/Shell/Process/TestEnvironment.test | 1 + lldb/test/Shell/Quit/TestQuitExitCode-30.test | 1 + lldb/test/Shell/Quit/TestQuitExitCode30.test | 1 + lldb/test/Shell/Quit/TestQuitExitCodeHexA.test | 1 + lldb/test/Shell/Reproducer/lit.local.cfg | 2 +- .../test/Shell/ScriptInterpreter/Lua/bindings.test | 2 + .../Lua/convenience_variables.test | 1 + .../Shell/ScriptInterpreter/Python/crashlog.test | 1 + .../Python/scripted_breakpoint.test | 1 + lldb/test/Shell/lit.cfg.py | 2 +- lldb/tools/darwin-debug/CMakeLists.txt | 2 +- lldb/unittests/Symbol/TestClangASTContext.cpp | 13 +- .../SymbolFile/DWARF/DWARFASTParserClangTests.cpp | 2 +- .../TestingSupport/Symbol/ClangTestUtils.h | 3 +- lldb/utils/lldb-repro/lldb-repro.py | 14 +- llvm/docs/LangRef.rst | 33 +- llvm/docs/TestingGuide.rst | 2 +- llvm/include/llvm/ADT/Optional.h | 2 +- .../llvm/Analysis/LegacyDivergenceAnalysis.h | 3 +- llvm/include/llvm/Analysis/MemoryLocation.h | 7 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 6 - .../llvm/Analysis/TargetTransformInfoImpl.h | 2 - llvm/include/llvm/BinaryFormat/Dwarf.h | 19 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 2 - llvm/include/llvm/CodeGen/ISDOpcodes.h | 5 + llvm/include/llvm/CodeGen/SelectionDAG.h | 7 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 22 +- .../llvm/CodeGen/TargetLoweringObjectFileImpl.h | 9 + .../llvm/DebugInfo/DWARF/DWARFDebugArangeSet.h | 9 +- llvm/include/llvm/IR/Constants.h | 4 + llvm/include/llvm/IR/IRBuilder.h | 12 +- llvm/include/llvm/IR/Intrinsics.td | 5 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 8 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- llvm/include/llvm/IR/PatternMatch.h | 96 +- llvm/include/llvm/MC/MCAsmBackend.h | 8 + llvm/include/llvm/MC/MCFixupKindInfo.h | 5 +- llvm/include/llvm/MC/MCObjectFileInfo.h | 6 + llvm/include/llvm/Support/Compiler.h | 3 +- .../include/llvm/Target/TargetLoweringObjectFile.h | 21 + llvm/include/llvm/Target/TargetSelectionDAG.td | 1 + llvm/include/llvm/Transforms/Utils/LoopUtils.h | 7 +- llvm/lib/Analysis/ConstantFolding.cpp | 3 +- llvm/lib/Analysis/InstructionSimplify.cpp | 6 - llvm/lib/Analysis/LegacyDivergenceAnalysis.cpp | 9 +- llvm/lib/Analysis/Loads.cpp | 4 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 4 - llvm/lib/Analysis/ValueTracking.cpp | 4 - llvm/lib/AsmParser/LLParser.cpp | 11 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 12 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 25 + llvm/lib/CodeGen/MachineScheduler.cpp | 69 +- llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 30 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 37 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 8 + llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 1 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 27 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 10 + .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 1 + llvm/lib/CodeGen/TargetInstrInfo.cpp | 12 + llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 30 + llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 7 +- llvm/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp | 216 +- llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp | 6 +- llvm/lib/IR/AutoUpgrade.cpp | 9 +- llvm/lib/IR/IRBuilder.cpp | 14 +- llvm/lib/MC/MCAssembler.cpp | 7 + llvm/lib/MC/MCObjectFileInfo.cpp | 7 + llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 39 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 129 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 4 + llvm/lib/Target/AArch64/AArch64InstrFormats.td | 2 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++ llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 202 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 7 + .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 10 - llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 1 - llvm/lib/Target/AMDGPU/CMakeLists.txt | 3 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 153 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 131 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 16 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 20 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 13 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 2 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 61 + llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 3 + llvm/lib/Target/ARM/MVETailPredication.cpp | 1 + llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 13 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 9 +- llvm/lib/Target/Lanai/LanaiInstrInfo.cpp | 13 +- llvm/lib/Target/Lanai/LanaiInstrInfo.h | 9 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 82 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 266 ++- llvm/lib/Target/PowerPC/PPCISelLowering.h | 38 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 13 + .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 97 +- .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | 14 +- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp | 69 +- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h | 7 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 14 + llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp | 11 +- llvm/lib/Target/VE/VECallingConv.td | 30 +- llvm/lib/Target/VE/VEISelLowering.cpp | 21 +- llvm/lib/Target/VE/VEISelLowering.h | 6 + llvm/lib/Target/VE/VEInstrFormats.td | 4 +- llvm/lib/Target/VE/VEInstrInfo.cpp | 8 +- llvm/lib/Target/VE/VEInstrInfo.td | 590 +++++- llvm/lib/Target/VE/VERegisterInfo.cpp | 36 +- llvm/lib/Target/VE/VERegisterInfo.td | 52 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 80 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 10 +- llvm/lib/Target/X86/X86InstrInfo.h | 9 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 8 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 5 - .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 56 +- .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstructionCombining.cpp | 17 + .../Transforms/Instrumentation/MemorySanitizer.cpp | 11 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 103 +- llvm/lib/Transforms/Scalar/LICM.cpp | 117 +- llvm/lib/Transforms/Scalar/LoopDeletion.cpp | 22 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 8 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 37 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 8 +- .../CostModel/ARM/mve-gather-scatter-cost.ll | 511 +++++ .../thinlto-multiple-summaries-for-guid.ll | 12 + llvm/test/Bitcode/vscale-round-trip.ll | 49 + .../AArch64/GlobalISel/select-returnaddr.ll | 16 + .../sign-return-address-cfi-negate-ra-state.ll | 35 + llvm/test/CodeGen/AArch64/spillfill-sve.ll | 189 ++ .../test/CodeGen/AArch64/stp-opt-with-renaming.mir | 33 + .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 182 ++ llvm/test/CodeGen/AArch64/sve-vscale.ll | 200 ++ .../CodeGen/AMDGPU/GlobalISel/extractelement.ll | 194 +- .../CodeGen/AMDGPU/GlobalISel/insertelement.ll | 2181 ++++++++++++++++++++ .../GlobalISel/inst-select-extract-vector-elt.mir | 72 +- .../GlobalISel/inst-select-insert-vector-elt.mir | 626 ++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 8 +- .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll | 1824 ++++++++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll | 1928 +++++++++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll | 116 ++ .../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll | 72 + .../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp8.ll | 1 + .../GlobalISel/regbankselect-amdgcn.atomic.dec.mir | 80 - .../GlobalISel/regbankselect-amdgcn.atomic.inc.mir | 80 - .../regbankselect-amdgcn.fmul.legacy.mir | 66 + .../GlobalISel/regbankselect-amdgcn.interp.mov.mir | 39 + .../regbankselect-amdgcn.interp.p1.f16.mir | 43 + .../GlobalISel/regbankselect-amdgcn.interp.p1.mir | 79 + .../regbankselect-amdgcn.interp.p2.f16.mir | 49 + .../GlobalISel/regbankselect-amdgcn.interp.p2.mir | 48 + .../regbankselect-extract-vector-elt.mir | 112 +- .../GlobalISel/regbankselect-insert-vector-elt.mir | 165 +- .../amdgpu-codegenprepare-fold-binop-select.ll | 494 +++++ llvm/test/CodeGen/AMDGPU/dagcombine-select.ll | 21 +- llvm/test/CodeGen/AMDGPU/global-constant.ll | 6 + llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll | 410 ++++ .../CodeGen/AMDGPU/r600-constant-array-fixup.ll | 6 +- .../CodeGen/AMDGPU/select-fabs-fneg-extract.ll | 4 +- llvm/test/CodeGen/ARM/vext.ll | 42 +- .../CodeGen/RISCV/subtarget-features-std-ext.ll | 11 +- .../Thumb2/LowOverheadLoops/clear-maskedinsts.ll | 145 ++ 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clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.spec.auto/p6.cpp create mode 100644 clang/test/Parser/cxx2a-placeholder-type-constraint.cpp create mode 100644 llvm/lib/Target/AMDGPU/AMDGPUCombine.td create mode 100644 llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp create mode 100644 llvm/test/Analysis/CostModel/ARM/mve-gather-scatter-cost.ll create mode 100644 llvm/test/Assembler/thinlto-multiple-summaries-for-guid.ll create mode 100644 llvm/test/Bitcode/vscale-round-trip.ll create mode 100644 llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll create mode 100644 llvm/test/CodeGen/AArch64/spillfill-sve.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-vscale.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir create mode 100644 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5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (5cd3ba79 -> 4a059fc4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 5cd3ba79 0: update: llvm-linux: boot new 4a059fc4 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5cd3ba79) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 78 +- 02-build_llvm/console.log | 12518 +++++++++++++++++------------------ 03-build_linux/console.log | 740 +-- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 13344 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 13352 insertions(+), 13348 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (d96d875ef5dd -> 131701c697e8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/linux. from d96d875ef5dd Merge tag 'fixes_for_v5.5-rc8' of git://git.kernel.org/pub [...] adds 1292e972fff2 io_uring: fix compat for IORING_REGISTER_FILES_UPDATE adds dbab40bdb42c Merge tag 'io_uring-5.5-2020-01-22' of git://git.kernel.dk [...] adds 7713e62c8623 hwmon: (nct7802) Fix voltage limits to wrong registers adds e51a7dda2998 hwmon: (nct7802) Fix non-working alarm on voltages adds cf3ca1877574 hwmon: (adt7475) Make volt2reg return same reg as reg2volt input adds 3bf8bdcf3bad hwmon: (core) Do not use device managed functions for memo [...] adds 1b4e677f86c7 Merge tag 'hwmon-for-v5.5-rc8' of git://git.kernel.org/pub [...] adds 90a8e82d3ca8 leds: gpio: Fix uninitialized gpio label for fwnode based probe adds 22cb0a76e005 leds-as3645a: Drop fwnode reference on ignored node adds 2424415d25a7 led: max77650: add of_match table adds 30d57d55abd7 ledtrig-pattern: fix email address quoting in MODULE_AUTHOR() adds 51eb5a24de91 leds: rb532: cleanup whitespace adds 43108c72cf1d leds: lm3532: add pointer to documentation and fix typo adds 131701c697e8 Merge tag 'leds-5.5-rc8' of git://git.kernel.org/pub/scm/l [...] No new revisions were added by this update. Summary of changes: drivers/hwmon/adt7475.c | 5 ++- drivers/hwmon/hwmon.c | 68 ++++++++++++++++++------------ drivers/hwmon/nct7802.c | 75 +++++++++++++++++++++++++++++++--- drivers/leds/leds-as3645a.c | 3 +- drivers/leds/leds-gpio.c | 10 ++++- drivers/leds/leds-lm3532.c | 3 +- drivers/leds/leds-max77650.c | 7 ++++ drivers/leds/leds-rb532.c | 1 - drivers/leds/trigger/ledtrig-pattern.c | 4 +- fs/io_uring.c | 4 +- include/uapi/linux/io_uring.h | 3 +- 11 files changed, 140 insertions(+), 43 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (10502831581 -> 92bea423c29)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/gcc. from 10502831581 Update update_web_docs_svn references in sourcebuild.texi. adds c75199b716e Add error messages for missing methods of awaitable class adds 6ac6529e155 Add error check on return value of build_co_await adds 5a8ea165926 libgo: update to Go1.14beta1 adds a38979d9d7a openmp: Teach omp_code_to_statement about rest of OpenMP st [...] adds 44a9d801a70 openmp: Fix up !$omp target parallel handling adds c892d8f58f6 i386: Fix up -fdollars-in-identifiers with identifiers star [...] adds f96af171bee contrib: script to create a new vendor branch adds 5f32f9cf13f Smart relaxation of TOP N counter. adds d80f0a8dc9c aarch64: Fix aarch64_expand_subvti constant handling [PR93335] adds 2b85c088220 tree-optimization/93381 fix integer offsetting in points-to [...] adds cb17653866c Extend r279588 to g++.dg/ext/sve-sizeless-1.C adds 998faa15e9c Fix gcc.target/aarch64/sve/sel_3.c for big-endian targets adds 9c4fb56578e Skip gcc.target/aarch64/sve/tls_preserve* for emultls targets adds 7491c17fe01 Fix TOP N counter update. adds 7c46e71d016 cfgexpand: Update partition size when merging variables adds bf91504dc23 Fix a couple of memory leaks in the C++ frontend adds 15ed55eabb0 PR c++/93324 - ICE with -Wall on constexpr if. adds e1fd040884a PR c++/92907 - noexcept does not consider "const" in member [...] adds 68cbbe7cdc7 runtime: call runtime_nanotime1, not runtime_nanotime adds 75038aa6aa5 analyzer: introduce namespace to avoid ODR clashes (PR 93307) adds da7cf663b75 analyzer: testsuite fixes for alloca, getpass, and setjmp ( [...] adds fd9982bb005 analyzer: fix setjmp handling with -g (PR 93378) adds 597e403d6db analyzer: fix usage of "_setjmp" in test for PR 93378 adds 9085381f193 Allow tree-ssa.exp to be run by itself adds d9637168812 c-family: Remove location parm from unsafe_conversion_p. adds 55b7df8bfb1 c-family: Fix problems with blender and PPC from PR 40752 patch. adds 26afdf50706 internal/syscall/unix: use getrandom_linux_generic.go on arm64be adds 9e16359ce8d runtime: for Solaris, add osinit, and drop duplicate getncpu adds 4857e6f343c Daily bump. adds 83b0448980f Revert "Allow tree-ssa.exp to be run by itself" and move so [...] adds 41fe06f89f9 Fix patchable-function-entry on arc adds c9c8aef474f analyzer: fix build with --enable-checking=release adds 591b59ebfcd analyzer: fix ICE due to sm-state origin being purged (PR 93382) adds 92bea423c29 gotest: explicitly skip type descriptors No new revisions were added by this update. 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libgo/go/syscall/sock_cloexec_linux.go create mode 100644 libgo/go/syscall/sockcmsg_dragonfly.go create mode 100644 libgo/go/syscall/sockcmsg_unix_other.go create mode 100644 libgo/go/syscall/syscall_freebsd_arm64.go create mode 100644 libgo/go/syscall/syscall_linux_riscv64.go create mode 100644 libgo/go/syscall/tables_js.go delete mode 100644 libgo/go/syscall/tables_nacljs.go create mode 100644 libgo/go/syscall/time_fake.go create mode 100644 libgo/go/syscall/time_nofake.go create mode 100644 libgo/go/testing/iotest/logger_test.go create mode 100644 libgo/go/testing/iotest/reader_test.go create mode 100644 libgo/go/testing/iotest/writer_test.go create mode 100644 libgo/go/testing/panic_test.go create mode 100644 libgo/misc/cgo/test/issue31891.c delete mode 100644 libgo/misc/cgo/test/issue8945.go create mode 100644 libgo/misc/cgo/testcarchive/testdata/libgo7/sink.go create mode 100644 libgo/misc/cgo/testcarchive/testdata/main7.c delete mode 100644 libgo/misc/cgo/testgodefs/test.bash create mode 100644 libgo/misc/cgo/testgodefs/testgodefs_test.go -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (c48acf6f26 -> 403d1bd91d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/binutils-gdb. from c48acf6f26 PR25417, Fix minor typos adds abc489c64a PowerPC64 TLS optimization fix adds 9e7028aa1e PowerPC64 __tls_get_addr_desc adds a804e4760a PowerPC64 tls_get_addr_desc static support adds 6a462ad49e x86-64: Skip GNU2 TLS tests only without compiler support adds be4c5e58bd x86: Always disallow double word suffix with word general register adds b7dcc42dfd MSP430: Fix simulator execution of RRUX instruction adds 3401347452 Automatic date update in version.in adds 403d1bd91d RISC-V: Change -march parsing. No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 67 +++ bfd/elf64-ppc.c | 577 +++++++++++++++++---- bfd/elf64-ppc.h | 3 + bfd/elfnn-riscv.c | 146 +++--- bfd/elfxx-riscv.c | 213 ++++++-- bfd/elfxx-riscv.h | 17 + bfd/version.h | 2 +- gas/ChangeLog | 28 + gas/config/tc-i386.c | 24 +- gas/config/tc-ppc.c | 5 +- gas/testsuite/gas/i386/general.l | 12 +- gas/testsuite/gas/i386/general.s | 6 +- gas/testsuite/gas/i386/inval.l | 7 + gas/testsuite/gas/i386/inval.s | 4 + gas/testsuite/gas/riscv/march-fail-s-with-version | 2 + ...-with-version.d => march-fail-s-with-version.d} | 1 + .../gas/riscv/march-fail-s-with-version.l | 2 + .../gas/riscv/{march-ok-s.d => march-fail-s.d} | 1 + gas/testsuite/gas/riscv/march-fail-s.l | 2 + .../gas/riscv/{march-ok-sx.d => march-fail-sx.d} | 3 +- gas/testsuite/gas/riscv/march-fail-sx.l | 2 + ld/ChangeLog | 39 ++ ld/emultempl/ppc64elf.em | 20 +- ld/ld.texi | 23 +- ld/testsuite/ld-powerpc/powerpc.exp | 33 ++ ld/testsuite/ld-powerpc/tlsdesc.d | 68 +++ ld/testsuite/ld-powerpc/tlsdesc.s | 8 + ld/testsuite/ld-powerpc/tlsdesc.wf | 50 ++ ld/testsuite/ld-powerpc/tlsdesc2.d | 69 +++ ld/testsuite/ld-powerpc/tlsdesc2.wf | 49 ++ ld/testsuite/ld-powerpc/tlsdesc3.d | 38 ++ ld/testsuite/ld-powerpc/tlsdesc3.wf | 43 ++ ld/testsuite/ld-powerpc/tlsdesc4.d | 46 ++ ld/testsuite/ld-powerpc/tlsdesc4.s | 18 + ld/testsuite/ld-powerpc/tlsdesc4.wf | 49 ++ ld/testsuite/ld-powerpc/tlsexenors.d | 106 ++++ ld/testsuite/ld-powerpc/tlsexenors.r | 113 ++++ ld/testsuite/ld-powerpc/tlsexers.d | 104 ++++ ld/testsuite/ld-powerpc/tlsexers.r | 112 ++++ ld/testsuite/ld-powerpc/tlsexetocnors.d | 90 ++++ ld/testsuite/ld-powerpc/tlsexetocrs.d | 88 ++++ ld/testsuite/ld-powerpc/tlsexetocrs.r | 113 ++++ ld/testsuite/ld-powerpc/tlsopt6.d | 86 +++ ld/testsuite/ld-powerpc/tlsopt6.wf | 49 ++ ld/testsuite/ld-x86-64/tls.exp | 4 +- sim/msp430/ChangeLog | 5 + sim/msp430/msp430-sim.c | 6 +- sim/testsuite/sim/msp430/ChangeLog | 4 + sim/testsuite/sim/msp430/rrux.s | 14 + 49 files changed, 2331 insertions(+), 240 deletions(-) create mode 100644 gas/testsuite/gas/riscv/march-fail-s-with-version rename gas/testsuite/gas/riscv/{march-ok-s-with-version.d => march-fail-s-with-ver [...] create mode 100644 gas/testsuite/gas/riscv/march-fail-s-with-version.l rename gas/testsuite/gas/riscv/{march-ok-s.d => march-fail-s.d} (75%) create mode 100644 gas/testsuite/gas/riscv/march-fail-s.l rename gas/testsuite/gas/riscv/{march-ok-sx.d => march-fail-sx.d} (56%) create mode 100644 gas/testsuite/gas/riscv/march-fail-sx.l create mode 100644 ld/testsuite/ld-powerpc/tlsdesc.d create mode 100644 ld/testsuite/ld-powerpc/tlsdesc.s create mode 100644 ld/testsuite/ld-powerpc/tlsdesc.wf create mode 100644 ld/testsuite/ld-powerpc/tlsdesc2.d create mode 100644 ld/testsuite/ld-powerpc/tlsdesc2.wf create mode 100644 ld/testsuite/ld-powerpc/tlsdesc3.d create mode 100644 ld/testsuite/ld-powerpc/tlsdesc3.wf create mode 100644 ld/testsuite/ld-powerpc/tlsdesc4.d create mode 100644 ld/testsuite/ld-powerpc/tlsdesc4.s create mode 100644 ld/testsuite/ld-powerpc/tlsdesc4.wf create mode 100644 ld/testsuite/ld-powerpc/tlsexenors.d create mode 100644 ld/testsuite/ld-powerpc/tlsexenors.r create mode 100644 ld/testsuite/ld-powerpc/tlsexers.d create mode 100644 ld/testsuite/ld-powerpc/tlsexers.r create mode 100644 ld/testsuite/ld-powerpc/tlsexetocnors.d create mode 100644 ld/testsuite/ld-powerpc/tlsexetocrs.d create mode 100644 ld/testsuite/ld-powerpc/tlsexetocrs.r create mode 100644 ld/testsuite/ld-powerpc/tlsopt6.d create mode 100644 ld/testsuite/ld-powerpc/tlsopt6.wf create mode 100644 sim/testsuite/sim/msp430/rrux.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (1aadca01 -> cdd4c05f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 1aadca01 0: update: binutils-gcc-linux: all new cdd4c05f 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1aadca01) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ma [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 394 +- 03-build_abe-binutils/console.log | 11473 +++++------ 04-build_abe-stage1/console.log | 20146 +++++++++---------- 05-build_linux/console.log | 6004 +++--- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 38188 ++++++++++++++++++------------------ jenkins/manifest.sh | 16 +- 10 files changed, 38203 insertions(+), 38154 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allyesconfig updated (138451c771a -> ba92233ce22)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-project. from 138451c771a [StackColoring] Remap FixedStackPseudoSourceValue frame ind [...] adds 3cce3790072 [HIP] use GetProgramPath for executable discovery adds 54acc20e6da [PATCH] Reland [Clang] Un-break scan-build after integrated [...] adds 050e1a3c268 [AArch64] Don't rename registers with pseudo defs in Ld/St opt. adds 7adf83beece [InstCombine] Fix worklist management in DSE (PR44552) adds b5cdee9bdce [PGO][PGSO] Update BFI in CodeGenPrepare::optimizeSelectInst. adds 1f98c2b586e [clang-tidy] Disable Checks on If constexpr statements in t [...] adds d64ca7abe19 [SLP] Add a test showing miscompilation in AltOpcode support adds 029140ee1ca [SLP] Don't allow Div/Rem as alternate opcodes adds 6c9da109c9c [mlir] Fix compilation with VS2019. adds 3e429b691ec [cmake] Fix clang builds with BUILD_SHARED=ON and CLANG_LIN [...] adds ba92233ce22 Revert "[cmake] Fix clang builds with BUILD_SHARED=ON and C [...] No new revisions were added by this update. Summary of changes: .../clang-tidy/bugprone/BranchCloneCheck.cpp | 3 +- .../readability/BracesAroundStatementsCheck.cpp | 5 +- ...bugprone-branch-clone-if-constexpr-template.cpp | 58 +++++++++ ...es-around-statements-constexpr-if-templates.cpp | 48 ++++++++ clang/lib/Driver/Compilation.cpp | 2 +- clang/lib/Driver/Job.cpp | 2 +- clang/lib/Driver/ToolChains/HIP.cpp | 23 ++-- clang/test/Driver/cc-print-options.c | 3 +- clang/test/Driver/cuda-simple.cu | 4 +- clang/test/Driver/offloading-interoperability.c | 4 +- clang/test/Driver/option-aliases.c | 4 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 1 + .../Target/AArch64/AArch64LoadStoreOptimizer.cpp | 13 +++ .../InstCombine/InstCombineLoadStoreAlloca.cpp | 7 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 18 ++- .../test/CodeGen/AArch64/stp-opt-with-renaming.mir | 33 ++++++ llvm/test/CodeGen/X86/cmov-into-branch.ll | 25 ++++ llvm/test/Transforms/InstCombine/pr44552.ll | 59 ++++++++++ .../SLPVectorizer/X86/no_alternate_divrem.ll | 129 +++++++++++++++++++++ mlir/include/mlir/IR/Attributes.h | 7 +- 20 files changed, 416 insertions(+), 32 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-branch-clon [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/readability-braces-a [...] create mode 100644 llvm/test/Transforms/InstCombine/pr44552.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allyesconfig updated (a934aba9 -> df95dc57)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards a934aba9 0: update: llvm-linux: all new df95dc57 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a934aba9) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 14 +- 02-build_llvm/console.log | 12554 ++++++++++++++--------------- 03-build_linux/console.log | 3626 ++++----- 04-boot_linux/console.log | 6 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 10 +- console.log | 16231 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 16211 insertions(+), 16240 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig updated (d96d875ef5dd -> 131701c697e8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-defconfig in repository toolchain/ci/linux. from d96d875ef5dd Merge tag 'fixes_for_v5.5-rc8' of git://git.kernel.org/pub [...] adds 1292e972fff2 io_uring: fix compat for IORING_REGISTER_FILES_UPDATE adds dbab40bdb42c Merge tag 'io_uring-5.5-2020-01-22' of git://git.kernel.dk [...] adds 7713e62c8623 hwmon: (nct7802) Fix voltage limits to wrong registers adds e51a7dda2998 hwmon: (nct7802) Fix non-working alarm on voltages adds cf3ca1877574 hwmon: (adt7475) Make volt2reg return same reg as reg2volt input adds 3bf8bdcf3bad hwmon: (core) Do not use device managed functions for memo [...] adds 1b4e677f86c7 Merge tag 'hwmon-for-v5.5-rc8' of git://git.kernel.org/pub [...] adds 90a8e82d3ca8 leds: gpio: Fix uninitialized gpio label for fwnode based probe adds 22cb0a76e005 leds-as3645a: Drop fwnode reference on ignored node adds 2424415d25a7 led: max77650: add of_match table adds 30d57d55abd7 ledtrig-pattern: fix email address quoting in MODULE_AUTHOR() adds 51eb5a24de91 leds: rb532: cleanup whitespace adds 43108c72cf1d leds: lm3532: add pointer to documentation and fix typo adds 131701c697e8 Merge tag 'leds-5.5-rc8' of git://git.kernel.org/pub/scm/l [...] No new revisions were added by this update. Summary of changes: drivers/hwmon/adt7475.c | 5 ++- drivers/hwmon/hwmon.c | 68 ++++++++++++++++++------------ drivers/hwmon/nct7802.c | 75 +++++++++++++++++++++++++++++++--- drivers/leds/leds-as3645a.c | 3 +- drivers/leds/leds-gpio.c | 10 ++++- drivers/leds/leds-lm3532.c | 3 +- drivers/leds/leds-max77650.c | 7 ++++ drivers/leds/leds-rb532.c | 1 - drivers/leds/trigger/ledtrig-pattern.c | 4 +- fs/io_uring.c | 4 +- include/uapi/linux/io_uring.h | 3 +- 11 files changed, 140 insertions(+), 43 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

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Tcwg-commits January 2020