Tcwg-commits January 2020

tcwg-commits@lists.linaro.org

5 participants
12654 discussions

[gcc] branch master updated (3c9e580511e7 -> c292cfe539cd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 3c9e580511e7 [AArch64] effective_target for aarch64 f64mm asm new 65be83b5ac04 ipa-profile.c: reset call_sums state within ipa-profile.c [...] new c292cfe539cd [AArch64] PR92424: Fix -fpatchable-function-entry=N,M with BTI The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 16 ++++ gcc/config/aarch64/aarch64.c | 31 +++++++ gcc/config/aarch64/aarch64.h | 1 + gcc/ipa-profile.c | 3 + gcc/testsuite/ChangeLog | 7 ++ gcc/testsuite/gcc.target/aarch64/pr92424-1.c | 122 +++++++++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/pr92424-2.c | 12 +++ gcc/testsuite/gcc.target/aarch64/pr92424-3.c | 12 +++ 8 files changed, 204 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/pr92424-3.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[gcc] branch master updated (28307164dfed -> 3c9e580511e7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 28307164dfed Fix updating of call_stmt_site_hash new 3c9e580511e7 [AArch64] effective_target for aarch64 f64mm asm The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 16 ++++++++++++++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c | 1 + gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c | 1 + gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c | 1 + gcc/testsuite/lib/target-supports.exp | 3 ++- 13 files changed, 29 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[gcc] branch master updated (8158a4640819 -> 28307164dfed)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 8158a4640819 PR c++/91476 - anon-namespace reference temp clash between TUs. new 28307164dfed Fix updating of call_stmt_site_hash The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 7 +++++++ gcc/cgraph.c | 32 ++++++++++++++++++++++++++++++-- gcc/ipa.c | 9 ++++++--- 3 files changed, 43 insertions(+), 5 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (a5d8a40617d -> b31f80231df)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/gcc. from a5d8a40617d Align __patchable_function_entries to POINTER_SIZE [PR93194] adds 414231ba789 PR testsuite/92829 - several -Wstringop-overflow test case [...] adds 45d06a4045b Fix PR 93242: patchable-function-entry broken on MIPS adds 3a43459715e [AArch64] Set jump-align=4 for neoversen1 adds 09e0ad6253f Update OpenACC tests for amdgcn adds bc559d6a018 Update GCC zh_TW.po. adds c784f162049 libstdc++: Fix recent documentation changes adds 2df76cd6895 Daily bump. adds e0a5b313c1a RISC-V: Disallow regrenme if the TO register never used bef [...] adds b313d3c49c2 Fix false warning messages about missing return in coroutine. adds 7d593fd672e Add runtime ISA check for amdgcn offloading adds 51e010b5f75 powerpc: Fix ICE with fp conditional move (PR target/93073) adds f0aec864383 [PATCH, GCC/ARM] Fix clear_operation_p uninitialised variable adds 6fc2f933731 Change recursive prepare_block_for_update to use a worklist adds 01e9f1812c7 tree-optimization/92328 fix value-number with bogus type adds b31f80231df Fortran] PR93309 – permit repeated 'implicit none(external)' No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 47 ++++++++ gcc/DATESTAMP | 2 +- gcc/config/aarch64/aarch64.c | 2 +- gcc/config/arm/arm.c | 13 +- gcc/config/riscv/riscv-protos.h | 2 + gcc/config/riscv/riscv.c | 13 ++ gcc/config/riscv/riscv.h | 2 + gcc/config/rs6000/rs6000.c | 5 + gcc/cp/ChangeLog | 5 + gcc/cp/coroutines.cc | 7 ++ gcc/fortran/ChangeLog | 8 ++ gcc/fortran/interface.c | 10 +- gcc/fortran/symbol.c | 3 - gcc/po/ChangeLog | 4 + gcc/po/zh_TW.po | 17 +-- gcc/targhooks.c | 2 +- gcc/testsuite/ChangeLog | 31 +++++ .../g++.dg/coroutines/co-return-warning-1.C | 48 ++++++++ gcc/testsuite/g++.dg/warn/Wstringop-overflow-4.C | 16 ++- gcc/testsuite/gcc.dg/Wstringop-overflow-25.c | 14 ++- gcc/testsuite/gcc.dg/torture/pr92328.c | 29 +++++ gcc/testsuite/gcc.target/powerpc/pr93073.c | 16 +++ gcc/testsuite/gcc.target/riscv/pr93304.c | 19 +++ .../gfortran.dg/external_implicit_none_2.f90 | 28 +++++ gcc/tree-into-ssa.c | 59 ++++++++-- gcc/tree-ssa-sccvn.c | 43 ++++--- libgomp/ChangeLog | 30 +++++ libgomp/plugin/plugin-gcn.c | 131 ++++++++++++++++++++- .../libgomp.oacc-c-c++-common/loop-auto-1.c | 3 + .../libgomp.oacc-c-c++-common/loop-dim-default.c | 9 ++ .../libgomp.oacc-c-c++-common/loop-gwv-1.c | 17 ++- .../libgomp.oacc-c-c++-common/loop-red-gwv-1.c | 20 ++-- .../libgomp.oacc-c-c++-common/loop-red-v-1.c | 6 +- .../libgomp.oacc-c-c++-common/loop-red-v-2.c | 6 +- .../libgomp.oacc-c-c++-common/loop-red-w-1.c | 7 +- .../libgomp.oacc-c-c++-common/loop-red-w-2.c | 7 +- .../libgomp.oacc-c-c++-common/loop-red-wv-1.c | 10 +- .../testsuite/libgomp.oacc-c-c++-common/loop-v-1.c | 7 +- .../testsuite/libgomp.oacc-c-c++-common/loop-w-1.c | 7 +- .../libgomp.oacc-c-c++-common/loop-wv-1.c | 10 +- .../libgomp.oacc-c-c++-common/parallel-dims.c | 42 ++++++- .../libgomp.oacc-c-c++-common/routine-gwv-1.c | 15 ++- .../libgomp.oacc-c-c++-common/routine-v-1.c | 7 +- .../libgomp.oacc-c-c++-common/routine-w-1.c | 7 +- .../libgomp.oacc-c-c++-common/routine-wv-1.c | 10 +- .../libgomp.oacc-c-c++-common/routine-wv-2.c | 5 + libstdc++-v3/ChangeLog | 7 ++ libstdc++-v3/doc/html/api.html | 2 +- libstdc++-v3/doc/html/faq.html | 28 ++--- libstdc++-v3/doc/html/index.html | 4 +- .../doc/html/manual/appendix_contributing.html | 12 +- libstdc++-v3/doc/html/manual/appendix_gpl.html | 2 +- libstdc++-v3/doc/html/manual/index.html | 2 +- .../doc/html/manual/source_code_style.html | 3 + libstdc++-v3/doc/html/manual/status.html | 14 +-- .../doc/html/manual/using_concurrency.html | 2 +- libstdc++-v3/doc/xml/faq.xml | 18 ++- .../doc/xml/manual/appendix_contributing.xml | 7 +- libstdc++-v3/doc/xml/manual/spine.xml | 1 + 59 files changed, 741 insertions(+), 162 deletions(-) create mode 100644 gcc/testsuite/g++.dg/coroutines/co-return-warning-1.C create mode 100644 gcc/testsuite/gcc.dg/torture/pr92328.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr93073.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr93304.c create mode 100644 gcc/testsuite/gfortran.dg/external_implicit_none_2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (b9ca1af69e -> b4654b109b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/binutils-gdb. from b9ca1af69e Don't touch r11 in __tls_get_addr stub adds 14470f0755 x86-64: Fix TLSDESC relaxation for x32 adds 26916852e1 Updated translations for various binutils sub-directories adds 53570fbcca Automatic date update in version.in adds c906a69a1f x86: VCVTNEPS2BF16{X,Y} should permit broadcasting adds c006a730e9 x86: improve handling of insns with ambiguous operand sizes adds 1a0351246a x86: replace adhoc ambiguous operand checking for CRC32 adds 0c27188999 Fix step-over-syscall.exp failure adds 1ab139e5be Add more debugging output to aarch64_displaced_step_fixup adds f0c702d4b8 Convert an int flag variable to bool adds e3ed17f393 x86: testsuite adjustments after commit 1a0351246a5c adds b4654b109b pr23900-1.d: Also check PT_GNU_PROPERTY program header No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 19 + bfd/elf64-x86-64.c | 100 +- bfd/po/pt.po | 3366 ++++++------ bfd/po/ru.po | 3364 ++++++------ bfd/po/uk.po | 3367 ++++++------ bfd/version.h | 2 +- binutils/ChangeLog | 5 + binutils/po/pt.po | 4073 +++++++------- binutils/po/uk.po | 4069 +++++++------- gas/ChangeLog | 89 + gas/config/tc-i386.c | 141 +- gas/doc/c-i386.texi | 25 + gas/po/uk.po | 6903 +++++++++++++----------- gas/testsuite/gas/i386/avx512_bf16_vl.d | 4 + gas/testsuite/gas/i386/avx512_bf16_vl.s | 4 + gas/testsuite/gas/i386/bundle.s | 2 +- gas/testsuite/gas/i386/i386.exp | 3 + gas/testsuite/gas/i386/ilp32/x32-tls.d | 2 + gas/testsuite/gas/i386/ilp32/x32-tls.s | 2 + gas/testsuite/gas/i386/ilp32/x86-64-nops.d | 2 - gas/testsuite/gas/i386/inval-crc32.l | 8 +- gas/testsuite/gas/i386/inval-crc32.s | 2 + gas/testsuite/gas/i386/lock-1.s | 20 +- gas/testsuite/gas/i386/nops.d | 1 - gas/testsuite/gas/i386/nops.s | 1 - gas/testsuite/gas/i386/noreg16.d | 80 + gas/testsuite/gas/i386/noreg16.l | 116 + gas/testsuite/gas/i386/noreg16.s | 79 + gas/testsuite/gas/i386/noreg32.d | 90 + gas/testsuite/gas/i386/noreg32.l | 126 + gas/testsuite/gas/i386/noreg32.s | 89 + gas/testsuite/gas/i386/noreg64.d | 92 + gas/testsuite/gas/i386/noreg64.l | 137 + gas/testsuite/gas/i386/noreg64.s | 91 + gas/testsuite/gas/i386/opcode.s | 4 +- gas/testsuite/gas/i386/sse-noavx.d | 1 - gas/testsuite/gas/i386/sse-noavx.s | 1 - gas/testsuite/gas/i386/sse3.s | 2 +- gas/testsuite/gas/i386/x86-64-avx-scalar.s | 4 +- gas/testsuite/gas/i386/x86-64-avx.s | 4 +- gas/testsuite/gas/i386/x86-64-avx512_bf16_vl.d | 4 + gas/testsuite/gas/i386/x86-64-avx512_bf16_vl.s | 4 + gas/testsuite/gas/i386/x86-64-bundle.s | 2 +- gas/testsuite/gas/i386/x86-64-intel64.d | 1 + gas/testsuite/gas/i386/x86-64-intel64.s | 3 +- gas/testsuite/gas/i386/x86-64-inval-crc32.l | 14 +- gas/testsuite/gas/i386/x86-64-inval-crc32.s | 2 + gas/testsuite/gas/i386/x86-64-lock-1.s | 20 +- gas/testsuite/gas/i386/x86-64-nops.d | 2 - gas/testsuite/gas/i386/x86-64-nops.s | 2 - gas/testsuite/gas/i386/x86-64-opcode.d | 1 + gas/testsuite/gas/i386/x86-64-opcode.s | 67 +- gas/testsuite/gas/i386/x86-64-ptwrite-intel.d | 1 - gas/testsuite/gas/i386/x86-64-ptwrite.d | 1 - gas/testsuite/gas/i386/x86-64-ptwrite.s | 1 - gas/testsuite/gas/i386/x86-64-simd-intel.d | 2 - gas/testsuite/gas/i386/x86-64-simd-suffix.d | 2 - gas/testsuite/gas/i386/x86-64-simd.d | 2 - gas/testsuite/gas/i386/x86-64-simd.s | 2 - gas/testsuite/gas/i386/x86-64-sse-noavx.d | 1 - gas/testsuite/gas/i386/x86-64-sse-noavx.s | 1 - gas/testsuite/gas/i386/x86-64-sse2avx.s | 4 +- gas/testsuite/gas/i386/x86-64-sse3.s | 2 +- gas/testsuite/gas/i386/x86-64-suffix-intel.d | 2 - gas/testsuite/gas/i386/x86-64-suffix.d | 2 - gas/testsuite/gas/i386/x86-64-suffix.s | 2 - gdb/ChangeLog | 20 + gdb/aarch64-tdep.c | 48 +- gold/ChangeLog | 4 + gold/po/uk.po | 310 +- gprof/ChangeLog | 8 + gprof/po/de.po | 52 +- gprof/po/pt_BR.po | 54 +- gprof/po/ru.po | 48 +- gprof/po/tr.po | 52 +- gprof/po/uk.po | 50 +- ld/ChangeLog | 30 + ld/po/pt_BR.po | 6268 ++++++++------------- ld/po/uk.po | 6232 ++++++++------------- ld/testsuite/ld-elf/pr23900-1.d | 10 +- ld/testsuite/ld-x86-64/pr25416-1.s | 13 + ld/testsuite/ld-x86-64/pr25416-1a.d | 16 + ld/testsuite/ld-x86-64/pr25416-1b.d | 15 + ld/testsuite/ld-x86-64/pr25416-2.s | 13 + ld/testsuite/ld-x86-64/pr25416-2a.d | 16 + ld/testsuite/ld-x86-64/pr25416-2b.d | 15 + ld/testsuite/ld-x86-64/pr25416-3.d | 16 + ld/testsuite/ld-x86-64/pr25416-3.s | 15 + ld/testsuite/ld-x86-64/pr25416-4.d | 16 + ld/testsuite/ld-x86-64/pr25416-4.s | 15 + ld/testsuite/ld-x86-64/pr25416-5a.c | 33 + ld/testsuite/ld-x86-64/pr25416-5b.s | 52 + ld/testsuite/ld-x86-64/pr25416-5c.s | 56 + ld/testsuite/ld-x86-64/pr25416-5d.s | 19 + ld/testsuite/ld-x86-64/pr25416-5e.s | 23 + ld/testsuite/ld-x86-64/x86-64.exp | 112 + opcodes/ChangeLog | 18 + opcodes/i386-opc.tbl | 6 +- opcodes/i386-tbl.h | 14 +- opcodes/po/de.po | 804 +-- opcodes/po/pt_BR.po | 804 +-- opcodes/po/uk.po | 804 +-- 102 files changed, 21738 insertions(+), 20980 deletions(-) create mode 100644 gas/testsuite/gas/i386/noreg16.l create mode 100644 gas/testsuite/gas/i386/noreg32.l create mode 100644 gas/testsuite/gas/i386/noreg64.l create mode 100644 ld/testsuite/ld-x86-64/pr25416-1.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-1a.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-1b.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-2.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-2a.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-2b.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-3.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-3.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-4.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-4.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-5a.c create mode 100644 ld/testsuite/ld-x86-64/pr25416-5b.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-5c.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-5d.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-5e.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (97d8609 -> 605f91e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 97d8609 0: update: binutils-gcc-linux: all new 605f91e 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (97d8609) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 222 +- 02-prepare_abe/console.log | 442 +- 03-build_abe-binutils/console.log | 11948 +++++++------ 04-build_abe-stage1/console.log | 15829 ++++++++--------- 05-build_linux/console.log | 6086 +++---- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 16 +- console.log | 34555 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 10 files changed, 34557 insertions(+), 34567 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (def9d2780727 -> d96d875ef5dd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/linux. from def9d2780727 Linux 5.5-rc7 adds 394440d46941 reiserfs: fix handling of -EOPNOTSUPP in reiserfs_for_each_xattr adds d96d875ef5dd Merge tag 'fixes_for_v5.5-rc8' of git://git.kernel.org/pub [...] No new revisions were added by this update. Summary of changes: fs/reiserfs/xattr.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (da9c93f330e -> f651c402a22)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project. from da9c93f330e [InstSimplify] fold select of vector constants that include [...] adds 65bab53afb8 [lldb][NFC] Add test for iterator invalidation during code [...] adds 5f6dfa800e0 [ms] [llvm-ml] Add placeholder for llvm-ml, based on llvm-mc adds b10a0eb04ad [ARM][MVE][Intrinsics] Take abs() of VMINNMAQ, VMAXNMAQ int [...] adds 46b9563cf68 [Alignment][NFC] Use Align with CreateElementUnorderedAtomicMemCpy adds 03c2a59cd69 [libomptarget] Implement smid for amdgcn adds 6ccebe00444 Fix build - removing legacy target reference. adds 24b7b99b7d6 [llvm-exegesis][NFC] Disassociate snippet generators from b [...] adds 9ecfaad7573 [gn build] Port 24b7b99b7d6 adds 7bee94410ce [InstCombine] form copysign from select of FP constants (PR44153) adds abd0ab389ee [FileCheck] Clean and improve unit tests adds 7fee4fed4c7 Add support for Linux/Musl ABI adds 3de9a5db629 [clangd] Avoid redundant testcases in rename unittest, NFC. adds 4c9d6914453 clang-format: [JS] fix `??` opreator wrapping. adds 366356361cf [OPENMP]Fix PR44578: crash in target construct with capture [...] adds a81e0442bdb [FileCheck] Make Match unittest more flexible adds 9c06c10fbae [SelectionDAG] GetDemandedBits - fallback to SimplifyMultip [...] adds a42c3eb599c [clang-tidy] Add check for CERT-OOP57-CPP adds 0a71ac8494d [gn build] Port a42c3eb599c adds b37f6d3af10 [llvm-exegesis] Remove unused variable after D72928 adds 67420f1b0e9 [lldb/Util] Add a utility to run transparently capture and [...] adds a17ad3592ff [lldb/Test] Check that attribute exists before comparing its value adds ea99c099634 [OpenMP] affinity little fix for FreeBSD adds 04de24e690d [lldb/IOHandler] Improve synchronization between IO handlers. adds fb3d9153c01 [clangd] Fix DocumentOutline for concepts adds d053b7a2978 [lldb/Docs] Add lldb-x86_64-fedora to the CI page adds f6418d72f57 AMDGPU/GlobalISel: Add documentation for RegisterBankInfo adds b70e4efb75b [mlir] Generalize broadcastable trait operands adds 2e42cc7a50e [NFC] small rename of private member in InlineCost.cpp adds fdb9cc7dc56 Fix printer for llvm.addressof symbol name that need escaping adds c12a5917d2f [Hexagon] Add support for Hexagon/HVX v67 ISA adds 8615eeb4556 AMDGPU: Partially merge indirect register write handling adds 9b13b4a0e3a AMDGPU: Prepare to use scalar register indexing adds 317fdcd09ae AMDGPU: Cleanup and generate 64-bit div tests adds c81fe34718d [lld][ELF] Don't apply --fix-cortex-a53-843419 to relocatab [...] adds d232c215669 [AsmPrinter] Don't emit __patchable_function_entries entry [...] adds edd4398f4cd Revert "PR17164: Change clang's default behavior from -flax [...] adds e5823bf806c AMDGPU: Don't create weird sized integers adds 385fb337de9 AMDGPU: Generate test checks adds fa40b41168f Revert "[libc++] Optimize / partially inline basic_string c [...] adds d1da63664f4 [lld][RISCV] Print error when encountering R_RISCV_ALIGN adds e446322f73f [llvm-objcopy][ELF] Allow setting SHF_EXCLUDE flag for ELF [...] adds c72aa27f917 AMDDGPU/GlobalISel: Fix RegBankSelect for llvm.amdgcn.ps.live adds 38bdb94120b [clangd] Fix rename for explicit destructor calls adds b16f82ad3b0 Revert "[MachO] Add a test for detecting reserved unit length." adds 5721483b642 [AMDGPU] Fix -Wunused-variable after e5823bf806ca9fa6f87583 [...] adds 02c1321139d [MC] Improve a report_fatal_error adds e15fb06e2d0 [RISCV] Pass target-abi via module flag metadata adds a80291ce10b Revert "[AMDGPU] Invert the handling of skip insertion." adds 65f6ee618e7 [gn build] Port a80291ce10b adds fffea2842d2 [MLIR] LLVM Dialect: add llvm.cmpxchg and improve llvm.atom [...] adds ff9877ce34b [ARM][MVE] Enable masked scatter adds 6b4f86f65f1 Reapply: [MachO] Add a test for detecting reserved unit length. adds dbd0ad33668 [LLD][ELF] Add support for INPUT_SECTION_FLAGS adds a672f579a2f Regenerate rotated uxt tests adds 8d2e6bdbe14 [TargetLowering] SimplifyDemandedBits - Pull out InDemanded [...] adds d6f4cfdbd79 [llvm-exegesis] Add support for AVX512 explicit rounding operands. adds 5f5f4785648 [DAG] Fold extract_vector_elt (scalar_to_vector), K to unde [...] adds 89e6601fb15 [llvm-readelf][llvm-readobj] - Fix the indentation when pri [...] adds bc29069dc40 [analyzer] Enable PlacementNewChecker by default adds 4e8116f4692 [ELF] Refactor uses of getInputSections to improve efficiency NFC adds 1f7b95d038e [lldb][NFC] Convert LLDB_LOGF to LLDB_LOG in ClangASTSource.cpp adds 87632b9e061 [llvm-exegesis] Fix support for LEA64_32r. adds 9a52ea5cf9c Create a gpu.module operation for the GPU Dialect. adds 3f9b6b270f8 [lldb] Use llvm::stable_sort in Line adds bc8a1ab26fb [Alignment][NFC] Use Align with CreateMaskedLoad adds 295aea80789 [llvm-readobj] - Remove rpath.test. adds 139771f8b02 [Alignment][NFC] Use Align with CreateElementUnorderedAtomi [...] adds 5181c67febc AMDGPU/GlobalISel: Add some baseline tests for unmerge lega [...] adds fccd0da5ee6 [clang-tidy] New check: bugprone-misplaced-pointer-arithmet [...] adds 65a31a97b45 [gn build] Port fccd0da5ee6 adds 18a96fd573b [lldb/DWARF] Fix a leak in line table construction adds 5e70f4bdc15 [lldb/breakpad] Use new line table constructor adds 651fa669a23 [TargetLowering] SimplifyDemandedBits ANY_EXTEND/ANY_EXTEND [...] adds f651c402a22 [clangd] Capture the missing injected class names in findEx [...] No new revisions were added by this update. Summary of changes: .../clang-tidy/bugprone/BugproneTidyModule.cpp | 3 + .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../MisplacedPointerArithmeticInAllocCheck.cpp | 105 + .../MisplacedPointerArithmeticInAllocCheck.h | 36 + .../clang-tidy/cert/CERTTidyModule.cpp | 3 + clang-tools-extra/clang-tidy/cert/CMakeLists.txt | 1 + .../cert/NonTrivialTypesLibcMemoryCallsCheck.cpp | 152 + .../cert/NonTrivialTypesLibcMemoryCallsCheck.h | 41 + clang-tools-extra/clangd/FindSymbols.cpp | 7 +- clang-tools-extra/clangd/FindTarget.cpp | 11 + clang-tools-extra/clangd/refactor/Rename.cpp | 2 +- .../clangd/unittests/FindSymbolsTests.cpp | 9 + .../clangd/unittests/FindTargetTests.cpp | 92 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 74 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 2 +- clang-tools-extra/docs/ReleaseNotes.rst | 13 + ...prone-misplaced-pointer-arithmetic-in-alloc.rst | 25 + .../docs/clang-tidy/checks/cert-oop57-cpp.rst | 40 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 2 + ...ugprone-misplaced-pointer-arithmetic-in-alloc.c | 56 + ...prone-misplaced-pointer-arithmetic-in-alloc.cpp | 53 + .../test/clang-tidy/checkers/cert-oop57-cpp.cpp | 90 + clang/docs/CommandGuide/clang.rst | 11 +- clang/include/clang/Basic/BuiltinsHexagon.def | 10 +- clang/include/clang/Basic/BuiltinsHexagonDep.def | 31 + clang/include/clang/Basic/LangOptions.def | 2 +- clang/include/clang/Basic/arm_mve.td | 6 +- clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Sema/Sema.h | 3 +- .../clang/StaticAnalyzer/Checkers/Checkers.td | 12 +- clang/lib/Basic/Targets/Hexagon.cpp | 28 +- clang/lib/Basic/Targets/Hexagon.h | 1 + clang/lib/CodeGen/CGBuiltin.cpp | 19 +- clang/lib/CodeGen/CodeGenModule.cpp | 7 + clang/lib/Format/FormatTokenLexer.cpp | 5 +- clang/lib/Sema/SemaExpr.cpp | 6 +- clang/lib/Sema/SemaOpenMP.cpp | 28 +- clang/test/Analysis/placement-new-user-defined.cpp | 2 +- clang/test/Analysis/placement-new.cpp | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c | 14 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c | 14 +- clang/test/CodeGen/builtins-hexagon-v67-audio.c | 134 + clang/test/CodeGen/builtins-hexagon-v67.c | 50 + clang/test/CodeGen/riscv-metadata.c | 14 + clang/test/Driver/hexagon-toolchain-elf.c | 8 + clang/test/Headers/altivec-header.c | 2 +- clang/test/Headers/arm-neon-header.c | 2 +- clang/test/Headers/x86-intrinsics-headers.c | 2 +- clang/test/Headers/x86intrin-2.c | 4 +- clang/test/Headers/x86intrin.c | 2 +- clang/test/OpenMP/target_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_messages.cpp | 8 + .../test/OpenMP/target_parallel_depend_codegen.cpp | 4 +- .../OpenMP/target_parallel_for_depend_codegen.cpp | 4 +- .../target_parallel_for_simd_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_simd_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_teams_depend_codegen.cpp | 4 +- .../target_teams_distribute_depend_codegen.cpp | 4 +- ...eams_distribute_parallel_for_depend_codegen.cpp | 4 +- ...distribute_parallel_for_simd_depend_codegen.cpp | 4 +- ...target_teams_distribute_simd_depend_codegen.cpp | 4 +- clang/test/Preprocessor/hexagon-predefines.c | 10 + clang/test/Sema/vector-assign.c | 12 +- clang/test/Sema/vector-cast.c | 23 +- clang/test/Sema/vector-ops.c | 3 +- clang/unittests/Format/FormatTestJS.cpp | 5 + libcxx/include/string | 21 +- lld/ELF/Arch/RISCV.cpp | 9 +- lld/ELF/Driver.cpp | 3 +- lld/ELF/LinkerScript.cpp | 11 +- lld/ELF/LinkerScript.h | 10 +- lld/ELF/OutputSections.cpp | 13 +- lld/ELF/OutputSections.h | 3 +- lld/ELF/ScriptParser.cpp | 97 +- lld/test/ELF/aarch64-cortex-a53-843419-recognize.s | 8 + lld/test/ELF/input-section-flags-diag1.test | 13 + lld/test/ELF/input-section-flags-diag2.test | 13 + lld/test/ELF/input-section-flags-diag3.test | 13 + lld/test/ELF/input-section-flags-keep.s | 27 + lld/test/ELF/input-section-flags.s | 115 + lld/test/ELF/riscv-reloc-align.s | 12 + .../MachOTests/MachONormalizedFileToAtomsTests.cpp | 7 +- lldb/docs/resources/bots.rst | 1 + lldb/include/lldb/Core/Debugger.h | 2 + lldb/include/lldb/Symbol/LineTable.h | 8 +- .../completion-crash-invalid-iterator}/Makefile | 0 .../TestInvalidIteratorCompletionCrash.py | 21 + .../completion-crash-invalid-iterator/main.cpp | 22 + .../breakpoint_callback_command_source}/Makefile | 0 .../TestBreakpointCallbackCommandSource.py | 35 + .../breakpoint_callback_command_source/main.c | 4 + .../breakpoint_callback_command_source/source.lldb | 1 + lldb/source/Core/Debugger.cpp | 73 +- .../ExpressionParser/Clang/ClangASTSource.cpp | 330 +- .../SymbolFile/Breakpad/SymbolFileBreakpad.cpp | 15 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 11 +- .../Plugins/SymbolFile/PDB/SymbolFilePDB.cpp | 4 +- lldb/source/Symbol/LineTable.cpp | 22 +- lldb/test/Shell/Reproducer/lit.local.cfg | 4 + lldb/test/Shell/helper/toolchain.py | 22 +- lldb/test/Shell/lit.cfg.py | 12 +- lldb/utils/CMakeLists.txt | 1 + lldb/utils/lldb-repro/CMakeLists.txt | 4 + lldb/utils/lldb-repro/lldb-repro.py | 60 + llvm/docs/CommandGuide/llvm-objcopy.rst | 1 + llvm/include/llvm/Analysis/VectorUtils.h | 1 + llvm/include/llvm/BinaryFormat/ELF.h | 20 +- llvm/include/llvm/IR/IRBuilder.h | 89 +- llvm/include/llvm/IR/IntrinsicsHexagonDep.td | 86 + llvm/lib/Analysis/InlineCost.cpp | 11 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 10 +- llvm/lib/IR/AutoUpgrade.cpp | 9 +- llvm/lib/IR/IRBuilder.cpp | 28 +- llvm/lib/MC/ELFObjectWriter.cpp | 2 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 2 + llvm/lib/Target/AMDGPU/AMDGPU.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 63 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 - llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 - llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 67 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 5 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 37 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 62 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 10 +- .../Target/AMDGPU/SIRemoveShortExecBranches.cpp | 158 - llvm/lib/Target/AMDGPU/SOPInstructions.td | 15 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 20 - llvm/lib/Target/ARM/ARMInstrMVE.td | 3 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 4 +- llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 198 +- .../Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 3 + llvm/lib/Target/Hexagon/Hexagon.td | 20 + llvm/lib/Target/Hexagon/HexagonArch.h | 37 + llvm/lib/Target/Hexagon/HexagonDepArch.h | 38 +- llvm/lib/Target/Hexagon/HexagonDepArch.td | 24 +- llvm/lib/Target/Hexagon/HexagonDepDecoders.inc | 44 +- llvm/lib/Target/Hexagon/HexagonDepIICHVX.td | 493 +- llvm/lib/Target/Hexagon/HexagonDepIICScalar.td | 7439 +++++++++++++------- llvm/lib/Target/Hexagon/HexagonDepITypes.h | 87 +- llvm/lib/Target/Hexagon/HexagonDepITypes.td | 87 +- llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td | 6145 +++++++++------- llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td | 6023 ++++++++++------ llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 59 + llvm/lib/Target/Hexagon/HexagonDepMappings.td | 11 +- llvm/lib/Target/Hexagon/HexagonDepMask.h | 2821 ++++++++ llvm/lib/Target/Hexagon/HexagonDepOperands.td | 188 +- llvm/lib/Target/Hexagon/HexagonDepTimingClasses.h | 200 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 181 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 159 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 1 + llvm/lib/Target/Hexagon/HexagonInstrFormats.td | 103 +- llvm/lib/Target/Hexagon/HexagonInstrFormatsV5.td | 86 - .../Target/Hexagon/HexagonMachineFunctionInfo.h | 12 + llvm/lib/Target/Hexagon/HexagonPatterns.td | 30 +- llvm/lib/Target/Hexagon/HexagonPseudo.td | 12 +- llvm/lib/Target/Hexagon/HexagonSchedule.td | 25 +- llvm/lib/Target/Hexagon/HexagonScheduleV67.td | 39 + llvm/lib/Target/Hexagon/HexagonSubtarget.cpp | 20 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 25 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 8 + .../Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h | 8 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 65 +- .../Hexagon/MCTargetDesc/HexagonShuffler.cpp | 1 + .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 45 + .../Transforms/Instrumentation/MemorySanitizer.cpp | 5 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 11 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 6 +- llvm/test/CMakeLists.txt | 1 + .../AArch64/patchable-function-entry-bti.ll | 13 +- .../CodeGen/AArch64/patchable-function-entry.ll | 27 +- .../AMDGPU/GlobalISel/divergent-control-flow.ll | 11 +- .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 734 ++ .../GlobalISel/regbankselect-amdgcn.ps.live.mir | 17 + .../AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll | 3227 +++++---- .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 104 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 312 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 2 +- llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | 5 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 9 +- llvm/test/CodeGen/AMDGPU/call-skip.ll | 9 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 49 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 15 +- llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll | 8 +- llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll | 2 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 21 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 11 +- llvm/test/CodeGen/AMDGPU/else.ll | 3 +- llvm/test/CodeGen/AMDGPU/hoist-cond.ll | 2 +- .../test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir | 2 +- llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir | 2 +- .../CodeGen/AMDGPU/insert-skips-ignored-insts.mir | 2 +- .../CodeGen/AMDGPU/insert-skips-kill-uncond.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 4 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 29 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 6 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 3 +- llvm/test/CodeGen/AMDGPU/ret_jump.ll | 23 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 1165 +++ .../AMDGPU/{sdivrem64.ll => sdivrem64.r600.ll} | 56 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll | 2 + .../si-lower-control-flow-unreachable-block.ll | 10 +- llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir | 2 +- .../CodeGen/AMDGPU/skip-branch-taildup-ret.mir | 2 +- llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll | 7 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 13 +- llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll | 2 +- llvm/test/CodeGen/AMDGPU/srem64.ll | 1232 ++++ .../stack-pointer-offset-relative-frameindex.ll | 3 +- .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 5 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 1201 ++++ .../AMDGPU/{udivrem64.ll => udivrem64.r600.ll} | 64 +- llvm/test/CodeGen/AMDGPU/uniform-cfg.ll | 2 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 2 + llvm/test/CodeGen/AMDGPU/urem64.ll | 978 +++ llvm/test/CodeGen/AMDGPU/valu-i1.ll | 42 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 16 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 5 +- llvm/test/CodeGen/ARM/uxt_rot.ll | 129 +- llvm/test/CodeGen/Hexagon/df-min-max.ll | 67 + llvm/test/CodeGen/Hexagon/fminmax-v67.ll | 45 + llvm/test/CodeGen/Hexagon/fmul-v67.ll | 52 + llvm/test/CodeGen/Hexagon/intrinsics-v67.ll | 285 + llvm/test/CodeGen/Hexagon/swp-sigma.ll | 3 +- llvm/test/CodeGen/Hexagon/vacopy.ll | 39 + llvm/test/CodeGen/Hexagon/vararg-deallocate-sp.ll | 13 + llvm/test/CodeGen/Hexagon/vararg-linux-abi.ll | 93 + llvm/test/CodeGen/Hexagon/vararg.ll | 97 + llvm/test/CodeGen/Hexagon/vararg_align_check.ll | 186 + llvm/test/CodeGen/Hexagon/vararg_double_onstack.ll | 214 + llvm/test/CodeGen/Hexagon/vararg_named.ll | 211 + llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll | 55 +- .../test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll | 14 +- .../test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll | 14 +- .../CodeGen/Thumb2/mve-scatter-ind16-scaled.ll | 181 + .../CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll | 460 ++ .../CodeGen/Thumb2/mve-scatter-ind32-scaled.ll | 240 + .../CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll | 419 ++ .../CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll | 540 ++ llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll | 633 ++ llvm/test/CodeGen/X86/patchable-function-entry.ll | 33 +- llvm/test/CodeGen/X86/vector-sext.ll | 4 +- llvm/test/MC/Hexagon/extensions/v67_hvx.s | 2810 ++++++++ llvm/test/MC/Hexagon/v67.s | 4 + llvm/test/MC/Hexagon/v67_all.s | 10 + llvm/test/Transforms/InstCombine/select.ll | 24 +- .../tools/llvm-exegesis/X86/latency-LEA64_32r.s | 16 + llvm/test/tools/llvm-ml/basic.test | 4 + llvm/test/tools/llvm-ml/run.test | 3 + .../ELF/rename-section-flag-osproc-mask.test | 2 - .../ELF/rename-section-flag-preserved.test | 6 +- .../llvm-objcopy/ELF/rename-section-flag.test | 7 +- .../tools/llvm-objcopy/ELF/set-section-flags.test | 8 +- .../llvm-readobj/ELF/Inputs/rpath.exe.elf-x86_64 | Bin 5632 -> 0 bytes .../ELF/dynamic-tags-machine-specific.test | 192 +- llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test | 293 +- llvm/test/tools/llvm-readobj/ELF/rpath.test | 4 - llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp | 1 - llvm/tools/llvm-exegesis/lib/Analysis.cpp | 8 +- llvm/tools/llvm-exegesis/lib/CMakeLists.txt | 6 +- .../llvm-exegesis/lib/LatencyBenchmarkRunner.cpp | 56 + .../lib/{Latency.h => LatencyBenchmarkRunner.h} | 15 +- llvm/tools/llvm-exegesis/lib/Mips/Target.cpp | 2 +- .../lib/{Uops.cpp => ParallelSnippetGenerator.cpp} | 48 +- .../lib/{Uops.h => ParallelSnippetGenerator.h} | 28 +- llvm/tools/llvm-exegesis/lib/PowerPC/Target.cpp | 1 - .../{Latency.cpp => SerialSnippetGenerator.cpp} | 58 +- .../lib/{Latency.h => SerialSnippetGenerator.h} | 25 +- llvm/tools/llvm-exegesis/lib/Target.cpp | 18 +- llvm/tools/llvm-exegesis/lib/Target.h | 4 +- .../llvm-exegesis/lib/UopsBenchmarkRunner.cpp | 46 + llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.h | 38 + llvm/tools/llvm-exegesis/lib/X86/Target.cpp | 78 +- llvm/tools/llvm-ml/CMakeLists.txt | 14 + llvm/tools/llvm-ml/Disassembler.cpp | 203 + llvm/tools/llvm-ml/Disassembler.h | 37 + llvm/tools/llvm-ml/llvm-ml.cpp | 381 + llvm/tools/llvm-objcopy/CopyConfig.cpp | 5 +- llvm/tools/llvm-objcopy/CopyConfig.h | 3 +- llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 11 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 46 +- llvm/unittests/Support/FileCheckTest.cpp | 209 +- .../llvm-exegesis/Mips/SnippetGeneratorTest.cpp | 23 +- .../llvm-exegesis/X86/SnippetGeneratorTest.cpp | 52 +- .../llvm-exegesis/X86/SnippetRepetitorTest.cpp | 5 +- llvm/unittests/tools/llvm-exegesis/X86/TestBase.h | 2 +- .../clang-tools-extra/clang-tidy/bugprone/BUILD.gn | 1 + .../clang-tools-extra/clang-tidy/cert/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 - llvm/utils/gn/secondary/llvm/test/BUILD.gn | 1 + .../llvm/tools/llvm-exegesis/lib/BUILD.gn | 6 +- .../utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn | 15 + mlir/docs/Traits.md | 14 +- .../mlir/Conversion/GPUToCUDA/GPUToCUDAPass.h | 10 +- .../mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h | 7 +- .../mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h | 6 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 52 + mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 1 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 15 + mlir/include/mlir/Dialect/Traits.h | 31 +- mlir/include/mlir/IR/OpBase.td | 5 +- .../GPUToCUDA/ConvertKernelFuncToCubin.cpp | 21 +- .../GPUToCUDA/ConvertLaunchFuncToCudaCalls.cpp | 13 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 21 +- .../GPUToROCDL/LowerGpuOpsToROCDLOps.cpp | 12 +- mlir/lib/Conversion/GPUToSPIRV/CMakeLists.txt | 7 + .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 55 +- .../GPUToSPIRV/ConvertGPUToSPIRVPass.cpp | 15 +- mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.td | 22 + mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 55 +- .../lib/Dialect/GPU/Transforms/KernelOutlining.cpp | 22 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 197 +- mlir/lib/Dialect/Traits.cpp | 127 +- .../GPUToCUDA/lower-launch-func-to-cuda.mlir | 2 +- .../GPUToCUDA/lower-nvvm-kernel-to-cubin.mlir | 6 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 20 +- .../Conversion/GPUToNVVM/memory-attrbution.mlir | 8 +- mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir | 12 +- mlir/test/Conversion/GPUToSPIRV/builtins.mlir | 12 +- mlir/test/Conversion/GPUToSPIRV/if.mlir | 2 +- mlir/test/Conversion/GPUToSPIRV/load-store.mlir | 2 +- mlir/test/Conversion/GPUToSPIRV/loop.mlir | 2 +- mlir/test/Conversion/GPUToSPIRV/simple.mlir | 2 +- mlir/test/Dialect/GPU/invalid.mlir | 11 +- mlir/test/Dialect/GPU/ops.mlir | 2 +- mlir/test/Dialect/GPU/outlining.mlir | 2 +- mlir/test/Dialect/LLVMIR/global.mlir | 8 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 82 +- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 15 +- mlir/test/Dialect/traits.mlir | 8 +- mlir/test/Target/llvmir.mlir | 45 +- mlir/test/lib/TestDialect/TestOps.td | 4 +- mlir/tools/mlir-cuda-runner/mlir-cuda-runner.cpp | 2 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 12 +- .../libomptarget/deviceRTLs/amdgcn/CMakeLists.txt | 1 + .../deviceRTLs/amdgcn/src/amdgcn_smid.hip | 61 + openmp/runtime/src/kmp_affinity.h | 6 +- openmp/runtime/src/z_Linux_util.cpp | 4 +- 343 files changed, 35858 insertions(+), 11382 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/bugprone/MisplacedPointerArithmeti [...] create mode 100644 clang-tools-extra/clang-tidy/bugprone/MisplacedPointerArithmeti [...] create mode 100644 clang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCall [...] create mode 100644 clang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCall [...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone-misplaced-poi [...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/cert-oop57-cpp.rst create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-misplaced-p [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-misplaced-p [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/cert-oop57-cpp.cpp create mode 100644 clang/test/CodeGen/builtins-hexagon-v67-audio.c create mode 100644 clang/test/CodeGen/builtins-hexagon-v67.c create mode 100644 clang/test/CodeGen/riscv-metadata.c create mode 100644 lld/test/ELF/input-section-flags-diag1.test create mode 100644 lld/test/ELF/input-section-flags-diag2.test create mode 100644 lld/test/ELF/input-section-flags-diag3.test create mode 100644 lld/test/ELF/input-section-flags-keep.s create mode 100644 lld/test/ELF/input-section-flags.s create mode 100644 lld/test/ELF/riscv-reloc-align.s copy lldb/packages/Python/lldbsuite/test/{android/platform => commands/expression/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] copy lldb/packages/Python/lldbsuite/test/{commands/expression/entry-bp => function [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/ [...] create mode 100644 lldb/utils/lldb-repro/CMakeLists.txt create mode 100755 lldb/utils/lldb-repro/lldb-repro.py delete mode 100644 llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp create mode 100644 llvm/lib/Target/Hexagon/HexagonArch.h create mode 100644 llvm/lib/Target/Hexagon/HexagonDepMask.h delete mode 100644 llvm/lib/Target/Hexagon/HexagonInstrFormatsV5.td create mode 100644 llvm/lib/Target/Hexagon/HexagonScheduleV67.td create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir create mode 100644 llvm/test/CodeGen/AMDGPU/sdiv64.ll rename llvm/test/CodeGen/AMDGPU/{sdivrem64.ll => sdivrem64.r600.ll} (62%) create mode 100644 llvm/test/CodeGen/AMDGPU/srem64.ll create mode 100644 llvm/test/CodeGen/AMDGPU/udiv64.ll rename llvm/test/CodeGen/AMDGPU/{udivrem64.ll => udivrem64.r600.ll} (58%) create mode 100644 llvm/test/CodeGen/AMDGPU/urem64.ll create mode 100644 llvm/test/CodeGen/Hexagon/df-min-max.ll create mode 100644 llvm/test/CodeGen/Hexagon/fminmax-v67.ll create mode 100644 llvm/test/CodeGen/Hexagon/fmul-v67.ll create mode 100644 llvm/test/CodeGen/Hexagon/intrinsics-v67.ll create mode 100644 llvm/test/CodeGen/Hexagon/vacopy.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg-deallocate-sp.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg-linux-abi.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg_align_check.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg_double_onstack.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg_named.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind16-scaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind32-scaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll create mode 100644 llvm/test/MC/Hexagon/extensions/v67_hvx.s create mode 100644 llvm/test/MC/Hexagon/v67.s create mode 100644 llvm/test/MC/Hexagon/v67_all.s create mode 100644 llvm/test/tools/llvm-exegesis/X86/latency-LEA64_32r.s create mode 100644 llvm/test/tools/llvm-ml/basic.test create mode 100644 llvm/test/tools/llvm-ml/run.test delete mode 100644 llvm/test/tools/llvm-readobj/ELF/Inputs/rpath.exe.elf-x86_64 delete mode 100644 llvm/test/tools/llvm-readobj/ELF/rpath.test create mode 100644 llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.cpp copy llvm/tools/llvm-exegesis/lib/{Latency.h => LatencyBenchmarkRunner.h} (69%) rename llvm/tools/llvm-exegesis/lib/{Uops.cpp => ParallelSnippetGenerator.cpp} (82%) rename llvm/tools/llvm-exegesis/lib/{Uops.h => ParallelSnippetGenerator.h} (70%) rename llvm/tools/llvm-exegesis/lib/{Latency.cpp => SerialSnippetGenerator.cpp} (76%) rename llvm/tools/llvm-exegesis/lib/{Latency.h => SerialSnippetGenerator.h} (52%) create mode 100644 llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.cpp create mode 100644 llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.h create mode 100644 llvm/tools/llvm-ml/CMakeLists.txt create mode 100644 llvm/tools/llvm-ml/Disassembler.cpp create mode 100644 llvm/tools/llvm-ml/Disassembler.h create mode 100644 llvm/tools/llvm-ml/llvm-ml.cpp create mode 100644 llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn create mode 100644 mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.td create mode 100644 openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (eabe7dd -> be13291)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards eabe7dd 2: update: llvm-linux: 18251 new be13291 2: update: llvm-linux: 18251 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (eabe7dd) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 12668 ++++++++++++++++++----------------- 03-build_linux/console.log | 894 +-- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 52 +- console.log | 13782 +++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- 7 files changed, 13795 insertions(+), 13783 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allmodconfig updated (1967992 -> a779b3c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards 1967992 0: update: llvm-linux: all new a779b3c 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1967992) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12642 ++++++++-------- 03-build_linux/console.log | 16656 ++++++++++----------- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 16 +- console.log | 29546 +++++++++++++++++++------------------- jenkins/manifest.sh | 6 +- 8 files changed, 29547 insertions(+), 29551 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits January 2020