Tcwg-commits January 2020

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig updated (6bbd34118a -> a00805ef97)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig in repository toolchain/ci/binutils-gdb. from 6bbd34118a Automatic date update in version.in adds a00805ef97 This is a series of backports for binutils 2.33 which addres [...] No new revisions were added by this update. Summary of changes: gas/ChangeLog | 50 +++ gas/config/tc-arm.c | 81 +++-- gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.d | 7 + gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.s | 7 + gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.d | 8 + gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.s | 8 + gas/testsuite/gas/arm/crc-ext.d | 14 + gas/testsuite/gas/arm/crc-ext.s | 19 ++ gas/testsuite/gas/arm/fpu-rst.d | 2 + gas/testsuite/gas/arm/fpu-rst.l | 4 + gas/testsuite/gas/arm/fpu-rst.s | 17 + gas/testsuite/gas/arm/mve-arch-ext.d | 7 + gas/testsuite/gas/arm/mve-arch-ext.s | 6 + gas/testsuite/gas/arm/mve-ext.d | 8 + gas/testsuite/gas/arm/mve-ext.s | 4 + gas/testsuite/gas/arm/mvefp-ext.d | 8 + gas/testsuite/gas/arm/mvefp-ext.s | 5 + include/ChangeLog | 21 ++ include/opcode/arm.h | 35 +- opcodes/ChangeLog | 18 + opcodes/arm-dis.c | 493 ++++++++++++++-------------- 21 files changed, 536 insertions(+), 286 deletions(-) create mode 100644 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-1.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-fpu-mve-2.s create mode 100644 gas/testsuite/gas/arm/crc-ext.d create mode 100644 gas/testsuite/gas/arm/crc-ext.s create mode 100644 gas/testsuite/gas/arm/fpu-rst.d create mode 100644 gas/testsuite/gas/arm/fpu-rst.l create mode 100644 gas/testsuite/gas/arm/fpu-rst.s create mode 100644 gas/testsuite/gas/arm/mve-arch-ext.d create mode 100644 gas/testsuite/gas/arm/mve-arch-ext.s create mode 100644 gas/testsuite/gas/arm/mve-ext.d create mode 100644 gas/testsuite/gas/arm/mve-ext.s create mode 100644 gas/testsuite/gas/arm/mvefp-ext.d create mode 100644 gas/testsuite/gas/arm/mvefp-ext.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig updated (64b5cef -> 86de40a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig in repository toolchain/ci/base-artifacts. discards 64b5cef 0: update: binutils-gcc-linux: boot new 86de40a 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (64b5cef) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-prepare_abe/console.log | 434 +- 03-build_abe-binutils/console.log | 11115 ++++++------- 04-build_abe-stage1/console.log | 18264 +++++++++++---------- 05-build_linux/console.log | 728 +- 06-boot_linux/console.log | 484 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 10 +- console.log | 31265 ++++++++++++++++++------------------ jenkins/manifest.sh | 18 +- results | 2 +- 11 files changed, 31270 insertions(+), 31280 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tx1_Os_LTO/gnu-master-aarch64-spec2k6-Os_LTO updated (f5b7359952b -> 98d8f142132)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1_Os_LTO/gnu-master-aarch64-spec2k6-Os_LTO in repository toolchain/ci/gcc. from f5b7359952b re PR tree-optimization/90316 (large compile time increase [...] adds 1b5e2d7b907 dwarf2out.c (mem_loc_descriptor): Initialize int_mode. adds b744fc85f54 [libcpp] struct deps renaming adds 1d0b81c64c0 re PR tree-optimization/90328 (Wrong loop distribution with [...] adds 3bc104bdb4b re PR tree-optimization/88828 (Inefficient update of the fi [...] adds a37aba10107 This reverts commit r270894, as new testcase fails on arm a [...] adds 898758504fa re PR tree-optimization/90358 (526.blender_r train run does [...] adds 7c0b7150ed9 Append to target_gtfiles in order to fix Darwin bootstrap. adds fd661a34e53 re PR target/89221 (--enable-frame-pointer does not work as [...] adds cd0a831ce6d PR c++/90265 - ICE with generic lambda. adds 839c480a14f re PR target/89424 (__builtin_vec_ext_v1ti (v, i) results i [...] adds 3afd514bca6 re PR tree-optimization/88709 (Improve store-merging) adds e294835aed9 rs6000: rs6000_dbx_register_number for fp/ap/mq adds 7da118f12b9 rs6000: Delete PRE_GCC3_DWARF_FRAME_REGISTERS adds b56be669f0a rs6000: Remove TM regs adds c21ffa3e536 re PR fortran/90290 (-std=f2008 should reject non-constant [...] adds 3346313740b rs6000: Renumber the registers adds caa3bffa03a Daily bump. adds b65307e96ef Fix a typo in two_value_replacement function adds 03de2955128 Fix Solaris bootstrap: lto-common.c, lto-dump.c format mismatches adds fe26771191a re PR lto/90369 (error: could not unlink output file) adds 9edfa4c015a tree-ssa-alias.c (aliasing_component_refs_p): Continue look [...] adds bca0a3216de Check if Solaris ld supports -z relax=transtls adds 3cf8b3e341b re PR tree-optimization/90316 (large compile time increase [...] adds 9f708a84485 tree-vect-slp.c (vect_build_slp_tree_2): Bump size whenever [...] adds 7664eeb700d Fix bitmap registration of overheads. adds d7b6aee8cd3 [libcpp] Reimplement mkdeps data structures adds 530ec1acebc re PR tree-optimization/90316 (large compile time increase [...] adds fcd0566b03e tree-vect-stmts.c (vect_is_simple_cond): When vectype is no [...] adds 339197c7f32 Fix make install-gcc-specs with empty GCC_SPECS_FILES adds 99f12959890 Add test for std::hash<std::error_code> adds 2313938e75f Improve API docs for std::regex adds f4e678ef74b Make allocator propagation more consistent for operator+(ba [...] adds 73e828becf8 Fix incorrect DR numbers in libstdc++ manual adds 0a59215131c cfgexpand.c (asm_clobber_reg_is_valid): Reject clobbers out [...] adds a9fad8fe6c8 This patch adds support to vectorize sum of abslolute diffe [...] adds 2ed6d245f7b Resign as IA-64 maintainer. adds 61145d937ba [libcpp] Reimplement mkdeps data structures adds e9d2e7b8962 i386.md (cvt_mnemonic): New mode attribute. adds 5d30228e2b9 re PR middle-end/89765 (Multiple problems with vec-insert i [...] adds 76ddb9ebd9d rs6000: Remove reload leftovers adds 258195f165f A non-type template parm with a placeholder type is type-de [...] adds 7f16ac89313 PR c++/86485 - -Wmaybe-unused with empty class ?: adds f7f36e3dc10 PR c++/90171 - reorganize usual_deallocation_fn_p adds f61a12b3957 PR libstdc++/89102 implement new common_type rules (P0435R1 [...] adds c34d3fd3068 Improve API docs for <chrono> and <ratio> adds 0e7bd559e4e Improve API docs for std::pair adds 041aa6abe46 Improve API docs for Filesystem TS and Networking TS adds a88158bc4da Update .po files. adds f837b9c41a6 compiler: add an option to emit optimization diagnostics adds 8c4a4099743 Daily bump. adds d9b120ce89f compiler: don't add pointer twice to value method of direct [...] adds b65b77cc808 reflect: correctly handle direct interface typed receiver i [...] adds f7b7e5d0471 re PR tree-optimization/90356 (Missed optimization for vari [...] adds d486dbfbb30 re PR other/90381 (New test case gcc.dg/tree-ssa/pr88676-2. [...] adds 1927f64070c * standard.ads.h: New file. adds da2d30c199a Address compiler diagnostics in libgomp.oacc-c-c++-common/p [...] adds 4f0e90fae97 Enable support for bfloat16 which will be in Future Cooper Lake. adds 98d8f142132 re PR tree-optimization/90240 (ICE in try_improve_iv_set, a [...] No new revisions were added by this update. Summary of changes: ChangeLog | 4 + MAINTAINERS | 1 - gcc/ChangeLog | 310 +- gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 9 + gcc/ada/gcc-interface/Makefile.in | 5 +- gcc/ada/standard.ads.h | 84 + gcc/bitmap.c | 39 +- gcc/bitmap.h | 22 +- gcc/c-family/ChangeLog | 4 + gcc/c-family/c-opts.c | 7 +- gcc/cfgexpand.c | 9 + gcc/common/config/i386/i386-common.c | 25 +- gcc/config.gcc | 28 +- gcc/config/aarch64/aarch64-sve.md | 61 + gcc/config/aarch64/iterators.md | 3 + gcc/config/i386/avx512bf16intrin.h | 118 + gcc/config/i386/avx512bf16vlintrin.h | 183 + gcc/config/i386/cpuid.h | 3 + gcc/config/i386/driver-i386.c | 7 +- gcc/config/i386/i386-builtin-types.def | 26 + gcc/config/i386/i386-builtin.def | 29 + gcc/config/i386/i386-builtins.c | 4 +- gcc/config/i386/i386-c.c | 2 + gcc/config/i386/i386-expand.c | 24 + gcc/config/i386/i386-options.c | 14 +- gcc/config/i386/i386.c | 37 +- gcc/config/i386/i386.h | 3 + gcc/config/i386/i386.md | 40 +- gcc/config/i386/i386.opt | 5 + gcc/config/i386/immintrin.h | 4 + gcc/config/i386/sol2.h | 3 - gcc/config/i386/sse.md | 101 + gcc/config/i386/subst.md | 13 + gcc/config/rs6000/darwin.h | 21 +- gcc/config/rs6000/htm.md | 10 +- gcc/config/rs6000/predicates.md | 27 - gcc/config/rs6000/rs6000-c.c | 22 +- gcc/config/rs6000/rs6000-protos.h | 2 - gcc/config/rs6000/rs6000.c | 431 +- gcc/config/rs6000/rs6000.h | 302 +- gcc/config/rs6000/rs6000.md | 39 +- gcc/configure | 21 +- gcc/configure.ac | 16 +- gcc/cp/ChangeLog | 22 + gcc/cp/call.c | 144 +- gcc/cp/pt.c | 10 +- gcc/cp/typeck.c | 5 +- gcc/doc/invoke.texi | 7 +- gcc/dwarf2out.c | 2 +- gcc/fortran/ChangeLog | 5 + gcc/fortran/match.c | 17 +- gcc/gimple-ssa-store-merging.c | 141 +- gcc/go/ChangeLog | 8 + gcc/go/gccgo.texi | 5 + gcc/go/go-c.h | 1 + gcc/go/go-lang.c | 1 + gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/go.cc | 2 + gcc/go/gofrontend/gogo.cc | 1 + gcc/go/gofrontend/gogo.h | 13 + gcc/go/gofrontend/statements.cc | 4 + gcc/go/gofrontend/types.cc | 20 +- gcc/go/lang.opt | 4 + gcc/graphite-scop-detection.c | 6 +- gcc/lto-wrapper.c | 5 +- gcc/lto/ChangeLog | 6 + gcc/lto/lto-common.c | 5 +- gcc/lto/lto-dump.c | 3 +- gcc/match.pd | 22 + gcc/params.def | 5 + gcc/po/ChangeLog | 6 + gcc/po/be.po | 17980 +++++++------- gcc/po/da.po | 23109 +++++++++--------- gcc/po/de.po | 20747 ++++++++-------- gcc/po/el.po | 17951 +++++++------- gcc/po/es.po | 21318 ++++++++-------- gcc/po/fi.po | 20944 ++++++++-------- gcc/po/fr.po | 20767 ++++++++-------- gcc/po/hr.po | 15989 ++++++------ gcc/po/id.po | 24181 ++++++++++--------- gcc/po/ja.po | 23836 +++++++++--------- gcc/po/nl.po | 20344 ++++++++-------- gcc/po/ru.po | 21372 ++++++++-------- gcc/po/sr.po | 23743 +++++++++--------- gcc/po/sv.po | 21451 ++++++++-------- gcc/po/tr.po | 24112 +++++++++--------- gcc/po/uk.po | 16386 ++++++------- gcc/po/vi.po | 20739 ++++++++-------- gcc/po/zh_CN.po | 24061 +++++++++--------- gcc/po/zh_TW.po | 22834 ++++++++--------- gcc/testsuite/ChangeLog | 137 +- gcc/testsuite/g++.dg/cpp1y/lambda-generic-90265.C | 4 + gcc/testsuite/g++.dg/other/i386-2.C | 2 +- gcc/testsuite/g++.dg/other/i386-3.C | 2 +- gcc/testsuite/gcc.dg/store_merging_26.c | 36 + gcc/testsuite/gcc.dg/store_merging_27.c | 26 + gcc/testsuite/gcc.dg/store_merging_28.c | 44 + gcc/testsuite/gcc.dg/store_merging_29.c | 33 + gcc/testsuite/gcc.dg/torture/pr90328.c | 24 + gcc/testsuite/gcc.dg/tree-ssa/pr88676-2.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr90356-1.c | 23 + gcc/testsuite/gcc.dg/tree-ssa/pr90356-2.c | 8 + gcc/testsuite/gcc.dg/tree-ssa/pr90356-3.c | 6 + gcc/testsuite/gcc.dg/tree-ssa/pr90356-4.c | 6 + gcc/testsuite/gcc.target/aarch64/sve/sad_1.c | 28 + gcc/testsuite/gcc.target/i386/asm-1.c | 2 +- gcc/testsuite/gcc.target/i386/asm-7.c | 8 + .../gcc.target/i386/avx512bf16-vcvtne2ps2bf16-1.c | 19 + .../gcc.target/i386/avx512bf16-vcvtneps2bf16-1.c | 19 + .../gcc.target/i386/avx512bf16-vdpbf16ps-1.c | 19 + .../gcc.target/i386/avx512bf16-vdpbf16ps-2.c | 49 + .../i386/avx512bf16vl-vcvtne2ps2bf16-1.c | 29 + .../gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1.c | 27 + .../gcc.target/i386/avx512bf16vl-vdpbf16ps-1.c | 28 + gcc/testsuite/gcc.target/i386/builtin_target.c | 4 + gcc/testsuite/gcc.target/i386/pr62120.c | 4 +- gcc/testsuite/gcc.target/i386/pr88828-0.c | 27 + gcc/testsuite/gcc.target/i386/pr90358.c | 35 + gcc/testsuite/gcc.target/i386/sse-12.c | 2 +- gcc/testsuite/gcc.target/i386/sse-13.c | 2 +- gcc/testsuite/gcc.target/i386/sse-14.c | 2 +- gcc/testsuite/gcc.target/i386/sse-22.c | 4 +- gcc/testsuite/gcc.target/i386/sse-23.c | 2 +- .../powerpc/{vsx-builtin-13a.c => pr89424-0.c} | 62 +- gcc/testsuite/gcc.target/powerpc/pr89765-mc.c | 400 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-10c.c | 155 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-10d.c | 155 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-11c.c | 149 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-11d.c | 149 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-12c.c | 112 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-12d.c | 112 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-13a.c | 2 +- gcc/testsuite/gcc.target/powerpc/vsx-builtin-13b.c | 2 +- gcc/testsuite/gcc.target/powerpc/vsx-builtin-13c.c | 115 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-13d.c | 115 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-14c.c | 149 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-14d.c | 149 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-15c.c | 151 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-15d.c | 151 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-16c.c | 180 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-16d.c | 163 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-17c.c | 154 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-17d.c | 154 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-18c.c | 148 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-18d.c | 148 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-19c.c | 122 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-19d.c | 122 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-20a.c | 2 +- gcc/testsuite/gcc.target/powerpc/vsx-builtin-20b.c | 2 +- gcc/testsuite/gcc.target/powerpc/vsx-builtin-20c.c | 115 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-20d.c | 115 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-9c.c | 164 + gcc/testsuite/gcc.target/powerpc/vsx-builtin-9d.c | 164 + gcc/testsuite/gfortran.dg/graphite/pr90240.f | 18 + gcc/testsuite/gfortran.dg/pr90290.f90 | 7 + gcc/testsuite/go.dg/arrayclear.go | 20 + gcc/testsuite/go.dg/mapclear.go | 10 + gcc/tree-data-ref.c | 9 +- gcc/tree-data-ref.h | 2 +- gcc/tree-ssa-alias.c | 59 +- gcc/tree-ssa-alias.h | 8 +- gcc/tree-ssa-forwprop.c | 159 +- gcc/tree-ssa-loop-ivopts.c | 93 +- gcc/tree-ssa-pre.c | 28 +- gcc/tree-ssa-sccvn.c | 18 +- gcc/tree-ssa-scopedtables.c | 14 +- gcc/tree-vect-loop.c | 12 + gcc/tree-vect-slp.c | 42 +- gcc/tree-vect-stmts.c | 7 +- libcpp/ChangeLog | 31 + libcpp/directives.c | 2 +- libcpp/files.c | 10 +- libcpp/include/cpplib.h | 2 +- libcpp/include/mkdeps.h | 26 +- libcpp/init.c | 11 +- libcpp/internal.h | 2 +- libcpp/mkdeps.c | 514 +- libgcc/ChangeLog | 6 + libgcc/config/i386/cpuinfo.c | 6 +- libgcc/config/i386/cpuinfo.h | 3 +- libgo/go/reflect/value.go | 2 +- libgomp/ChangeLog | 5 + .../testsuite/libgomp.oacc-c-c++-common/pr87835.c | 5 +- libphobos/ChangeLog | 9 + libphobos/configure | 134 +- libphobos/configure.ac | 74 +- libphobos/m4/druntime/os.m4 | 14 +- libstdc++-v3/ChangeLog | 78 + libstdc++-v3/doc/doxygen/doxygroups.cc | 3 + libstdc++-v3/doc/xml/manual/intro.xml | 30 +- libstdc++-v3/include/bits/basic_string.h | 20 +- libstdc++-v3/include/bits/basic_string.tcc | 12 +- libstdc++-v3/include/bits/regex.h | 46 +- libstdc++-v3/include/bits/regex.tcc | 12 +- libstdc++-v3/include/bits/stl_pair.h | 65 +- libstdc++-v3/include/experimental/bits/fs_path.h | 2 + libstdc++-v3/include/experimental/bits/net.h | 34 +- libstdc++-v3/include/experimental/netfwd | 2 +- libstdc++-v3/include/std/chrono | 140 +- libstdc++-v3/include/std/ratio | 25 + libstdc++-v3/include/std/tuple | 8 + libstdc++-v3/include/std/type_traits | 102 +- .../testsuite/19_diagnostics/error_code/hash.cc | 50 + .../common_type/requirements/sfinae_friendly_1.cc | 6 +- .../20_util/duration/literals/range_neg.cc | 2 +- .../20_util/duration/requirements/typedefs_neg1.cc | 2 +- .../20_util/duration/requirements/typedefs_neg2.cc | 2 +- .../20_util/duration/requirements/typedefs_neg3.cc | 2 +- .../20_util/ratio/cons/cons_overflow_neg.cc | 6 +- .../20_util/ratio/operations/ops_overflow_neg.cc | 10 +- .../basic_string/allocator/char/operator_plus.cc | 151 + .../allocator/wchar_t/operator_plus.cc | 152 + 213 files changed, 208979 insertions(+), 202345 deletions(-) create mode 100644 gcc/ada/standard.ads.h create mode 100644 gcc/config/i386/avx512bf16intrin.h create mode 100644 gcc/config/i386/avx512bf16vlintrin.h create mode 100644 gcc/testsuite/g++.dg/cpp1y/lambda-generic-90265.C create mode 100644 gcc/testsuite/gcc.dg/store_merging_26.c create mode 100644 gcc/testsuite/gcc.dg/store_merging_27.c create mode 100644 gcc/testsuite/gcc.dg/store_merging_28.c create mode 100644 gcc/testsuite/gcc.dg/store_merging_29.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr90328.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr90356-1.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr90356-2.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr90356-3.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr90356-4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/sad_1.c create mode 100644 gcc/testsuite/gcc.target/i386/asm-7.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512bf16-vcvtne2ps2bf16-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512bf16-vcvtneps2bf16-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512bf16-vdpbf16ps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512bf16-vdpbf16ps-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512bf16vl-vcvtne2ps2bf16-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512bf16vl-vdpbf16ps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr88828-0.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90358.c copy gcc/testsuite/gcc.target/powerpc/{vsx-builtin-13a.c => pr89424-0.c} (52%) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr89765-mc.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-10c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-10d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-11c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-11d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-12c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-12d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-13c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-13d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-14c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-14d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-15c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-15d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-16c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-16d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-17c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-17d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-18c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-18d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-19c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-19d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-20c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-20d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-9c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-9d.c create mode 100644 gcc/testsuite/gfortran.dg/graphite/pr90240.f create mode 100644 gcc/testsuite/gfortran.dg/pr90290.f90 create mode 100644 gcc/testsuite/go.dg/arrayclear.go create mode 100644 gcc/testsuite/go.dg/mapclear.go create mode 100644 libstdc++-v3/testsuite/19_diagnostics/error_code/hash.cc create mode 100644 libstdc++-v3/testsuite/21_strings/basic_string/allocator/char/o [...] create mode 100644 libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_ [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tx1_Os_LTO/gnu-master-aarch64-spec2k6-Os_LTO updated (95ff9c1 -> 9798066)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1_Os_LTO/gnu-master-aarch64-spec2k6-Os_LTO in repository toolchain/ci/base-artifacts. from 95ff9c1 2: reset: gcc-f5b7359952b41c35007e5aa46f9995c9249d4c1b: 1 new 9798066 3: reset: gcc-98d8f142132ac670da2dc99cce530048343ab948: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 68 +- 02-prepare_abe/console.log | 6 +- 03-build_abe-binutils/console.log | 10741 ++-- 04-build_abe-stage1/console.log | 14761 +++-- 05-build_abe-linux/console.log | 308 +- 06-build_abe-glibc/console.log | 31758 +++++---- 07-build_abe-stage2/console.log | 36480 +++++------ 09-benchmark--Os_LTO/benchmark-start.log | 2 +- 09-benchmark--Os_LTO/benchmark.log | 4 +- 09-benchmark--Os_LTO/console.log | 146 +- 11-update_baseline/console.log | 4520 +- 11-update_baseline/extra-bisect-params | 2 +- 11-update_baseline/results-0.csv | 3432 +- 11-update_baseline/results-1.csv | 3390 +- 11-update_baseline/results-compare.csv | 17 +- 11-update_baseline/results-full.csv | 3608 +- 11-update_baseline/results.csv | 247 +- 11-update_baseline/results.log | 4158 +- console.log | 98836 ++++++++++++++--------------- jenkins/manifest.sh | 10 +- results_id | 2 +- 21 files changed, 106231 insertions(+), 106265 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (7e717b39905 -> 4e8116f4692)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig in repository toolchain/ci/llvm-project. from 7e717b39905 [AArch64][SVE] Extend int_aarch64_sve_ld1_gather_imm adds 8b2eb7c494b [mlir] Add in-dialect lowering of gpu.all_reduce. adds 01bfb366acf [llvm-profdata] Fix hint message since argument format has changed adds f3e73e88fdd [ARM,MVE] Fix confusing MC names for MVE VMINA/VMAXA insns. adds f63f5a228f3 [mlir] clarify LangRef wording around control flow in regions adds 22447a61d40 [lldb] Mark the implicit copy constructor as deleted when a [...] adds de34b54edce [SCEV] Swap guards estimation sequence. NFC adds da9c93f330e [InstSimplify] fold select of vector constants that include [...] adds 65bab53afb8 [lldb][NFC] Add test for iterator invalidation during code [...] adds 5f6dfa800e0 [ms] [llvm-ml] Add placeholder for llvm-ml, based on llvm-mc adds b10a0eb04ad [ARM][MVE][Intrinsics] Take abs() of VMINNMAQ, VMAXNMAQ int [...] adds 46b9563cf68 [Alignment][NFC] Use Align with CreateElementUnorderedAtomicMemCpy adds 03c2a59cd69 [libomptarget] Implement smid for amdgcn adds 6ccebe00444 Fix build - removing legacy target reference. adds 24b7b99b7d6 [llvm-exegesis][NFC] Disassociate snippet generators from b [...] adds 9ecfaad7573 [gn build] Port 24b7b99b7d6 adds 7bee94410ce [InstCombine] form copysign from select of FP constants (PR44153) adds abd0ab389ee [FileCheck] Clean and improve unit tests adds 7fee4fed4c7 Add support for Linux/Musl ABI adds 3de9a5db629 [clangd] Avoid redundant testcases in rename unittest, NFC. adds 4c9d6914453 clang-format: [JS] fix `??` opreator wrapping. adds 366356361cf [OPENMP]Fix PR44578: crash in target construct with capture [...] adds a81e0442bdb [FileCheck] Make Match unittest more flexible adds 9c06c10fbae [SelectionDAG] GetDemandedBits - fallback to SimplifyMultip [...] adds a42c3eb599c [clang-tidy] Add check for CERT-OOP57-CPP adds 0a71ac8494d [gn build] Port a42c3eb599c adds b37f6d3af10 [llvm-exegesis] Remove unused variable after D72928 adds 67420f1b0e9 [lldb/Util] Add a utility to run transparently capture and [...] adds a17ad3592ff [lldb/Test] Check that attribute exists before comparing its value adds ea99c099634 [OpenMP] affinity little fix for FreeBSD adds 04de24e690d [lldb/IOHandler] Improve synchronization between IO handlers. adds fb3d9153c01 [clangd] Fix DocumentOutline for concepts adds d053b7a2978 [lldb/Docs] Add lldb-x86_64-fedora to the CI page adds f6418d72f57 AMDGPU/GlobalISel: Add documentation for RegisterBankInfo adds b70e4efb75b [mlir] Generalize broadcastable trait operands adds 2e42cc7a50e [NFC] small rename of private member in InlineCost.cpp adds fdb9cc7dc56 Fix printer for llvm.addressof symbol name that need escaping adds c12a5917d2f [Hexagon] Add support for Hexagon/HVX v67 ISA adds 8615eeb4556 AMDGPU: Partially merge indirect register write handling adds 9b13b4a0e3a AMDGPU: Prepare to use scalar register indexing adds 317fdcd09ae AMDGPU: Cleanup and generate 64-bit div tests adds c81fe34718d [lld][ELF] Don't apply --fix-cortex-a53-843419 to relocatab [...] adds d232c215669 [AsmPrinter] Don't emit __patchable_function_entries entry [...] adds edd4398f4cd Revert "PR17164: Change clang's default behavior from -flax [...] adds e5823bf806c AMDGPU: Don't create weird sized integers adds 385fb337de9 AMDGPU: Generate test checks adds fa40b41168f Revert "[libc++] Optimize / partially inline basic_string c [...] adds d1da63664f4 [lld][RISCV] Print error when encountering R_RISCV_ALIGN adds e446322f73f [llvm-objcopy][ELF] Allow setting SHF_EXCLUDE flag for ELF [...] adds c72aa27f917 AMDDGPU/GlobalISel: Fix RegBankSelect for llvm.amdgcn.ps.live adds 38bdb94120b [clangd] Fix rename for explicit destructor calls adds b16f82ad3b0 Revert "[MachO] Add a test for detecting reserved unit length." adds 5721483b642 [AMDGPU] Fix -Wunused-variable after e5823bf806ca9fa6f87583 [...] adds 02c1321139d [MC] Improve a report_fatal_error adds e15fb06e2d0 [RISCV] Pass target-abi via module flag metadata adds a80291ce10b Revert "[AMDGPU] Invert the handling of skip insertion." adds 65f6ee618e7 [gn build] Port a80291ce10b adds fffea2842d2 [MLIR] LLVM Dialect: add llvm.cmpxchg and improve llvm.atom [...] adds ff9877ce34b [ARM][MVE] Enable masked scatter adds 6b4f86f65f1 Reapply: [MachO] Add a test for detecting reserved unit length. adds dbd0ad33668 [LLD][ELF] Add support for INPUT_SECTION_FLAGS adds a672f579a2f Regenerate rotated uxt tests adds 8d2e6bdbe14 [TargetLowering] SimplifyDemandedBits - Pull out InDemanded [...] adds d6f4cfdbd79 [llvm-exegesis] Add support for AVX512 explicit rounding operands. adds 5f5f4785648 [DAG] Fold extract_vector_elt (scalar_to_vector), K to unde [...] new 89e6601fb15 [llvm-readelf][llvm-readobj] - Fix the indentation when pri [...] new bc29069dc40 [analyzer] Enable PlacementNewChecker by default new 4e8116f4692 [ELF] Refactor uses of getInputSections to improve efficiency NFC The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clang-tidy/cert/CERTTidyModule.cpp | 3 + clang-tools-extra/clang-tidy/cert/CMakeLists.txt | 1 + .../cert/NonTrivialTypesLibcMemoryCallsCheck.cpp | 152 + .../cert/NonTrivialTypesLibcMemoryCallsCheck.h | 41 + clang-tools-extra/clangd/FindSymbols.cpp | 7 +- clang-tools-extra/clangd/FindTarget.cpp | 4 + clang-tools-extra/clangd/refactor/Rename.cpp | 2 +- .../clangd/unittests/FindSymbolsTests.cpp | 9 + .../clangd/unittests/FindTargetTests.cpp | 50 + clang-tools-extra/clangd/unittests/RenameTests.cpp | 64 +- clang-tools-extra/docs/ReleaseNotes.rst | 6 + .../docs/clang-tidy/checks/cert-oop57-cpp.rst | 40 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../test/clang-tidy/checkers/cert-oop57-cpp.cpp | 90 + clang/docs/CommandGuide/clang.rst | 11 +- clang/include/clang/Basic/BuiltinsHexagon.def | 10 +- clang/include/clang/Basic/BuiltinsHexagonDep.def | 31 + clang/include/clang/Basic/LangOptions.def | 2 +- clang/include/clang/Basic/arm_mve.td | 6 +- clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Sema/Sema.h | 3 +- .../clang/StaticAnalyzer/Checkers/Checkers.td | 12 +- clang/lib/Basic/Targets/Hexagon.cpp | 28 +- clang/lib/Basic/Targets/Hexagon.h | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 7 + clang/lib/Format/FormatTokenLexer.cpp | 5 +- clang/lib/Sema/SemaExpr.cpp | 6 +- clang/lib/Sema/SemaOpenMP.cpp | 28 +- clang/test/Analysis/placement-new-user-defined.cpp | 2 +- clang/test/Analysis/placement-new.cpp | 18 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c | 14 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c | 14 +- clang/test/CodeGen/builtins-hexagon-v67-audio.c | 134 + clang/test/CodeGen/builtins-hexagon-v67.c | 50 + clang/test/CodeGen/riscv-metadata.c | 14 + clang/test/Driver/hexagon-toolchain-elf.c | 8 + clang/test/Headers/altivec-header.c | 2 +- clang/test/Headers/arm-neon-header.c | 2 +- clang/test/Headers/x86-intrinsics-headers.c | 2 +- clang/test/Headers/x86intrin-2.c | 4 +- clang/test/Headers/x86intrin.c | 2 +- clang/test/OpenMP/target_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_messages.cpp | 8 + .../test/OpenMP/target_parallel_depend_codegen.cpp | 4 +- .../OpenMP/target_parallel_for_depend_codegen.cpp | 4 +- .../target_parallel_for_simd_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_simd_depend_codegen.cpp | 4 +- clang/test/OpenMP/target_teams_depend_codegen.cpp | 4 +- .../target_teams_distribute_depend_codegen.cpp | 4 +- ...eams_distribute_parallel_for_depend_codegen.cpp | 4 +- ...distribute_parallel_for_simd_depend_codegen.cpp | 4 +- ...target_teams_distribute_simd_depend_codegen.cpp | 4 +- clang/test/Preprocessor/hexagon-predefines.c | 10 + clang/test/Sema/vector-assign.c | 12 +- clang/test/Sema/vector-cast.c | 23 +- clang/test/Sema/vector-ops.c | 3 +- clang/unittests/Format/FormatTestJS.cpp | 5 + libcxx/include/string | 21 +- lld/ELF/Arch/RISCV.cpp | 9 +- lld/ELF/Driver.cpp | 3 +- lld/ELF/LinkerScript.cpp | 11 +- lld/ELF/LinkerScript.h | 10 +- lld/ELF/OutputSections.cpp | 13 +- lld/ELF/OutputSections.h | 3 +- lld/ELF/ScriptParser.cpp | 97 +- lld/test/ELF/aarch64-cortex-a53-843419-recognize.s | 8 + lld/test/ELF/input-section-flags-diag1.test | 13 + lld/test/ELF/input-section-flags-diag2.test | 13 + lld/test/ELF/input-section-flags-diag3.test | 13 + lld/test/ELF/input-section-flags-keep.s | 27 + lld/test/ELF/input-section-flags.s | 115 + lld/test/ELF/riscv-reloc-align.s | 12 + .../MachOTests/MachONormalizedFileToAtomsTests.cpp | 7 +- lldb/docs/resources/bots.rst | 1 + lldb/include/lldb/Core/Debugger.h | 2 + .../completion-crash-invalid-iterator}/Makefile | 0 .../TestInvalidIteratorCompletionCrash.py | 21 + .../completion-crash-invalid-iterator/main.cpp | 22 + .../completion-crash1/TestCompletionCrash1.py | 4 - .../commands/expression/completion-crash1/main.cpp | 12 - .../TestDeletingImplicitCopyConstructor.py} | 0 .../deleting-implicit-copy-constructor/main.cpp | 20 + .../breakpoint_callback_command_source}/Makefile | 0 .../TestBreakpointCallbackCommandSource.py | 35 + .../breakpoint_callback_command_source/main.c | 4 + .../breakpoint_callback_command_source/source.lldb | 1 + lldb/source/Core/Debugger.cpp | 73 +- lldb/source/Symbol/ClangASTContext.cpp | 13 + lldb/test/Shell/Reproducer/lit.local.cfg | 4 + lldb/test/Shell/helper/toolchain.py | 22 +- lldb/test/Shell/lit.cfg.py | 12 +- lldb/unittests/Symbol/TestClangASTContext.cpp | 86 + lldb/utils/CMakeLists.txt | 1 + lldb/utils/lldb-repro/CMakeLists.txt | 4 + lldb/utils/lldb-repro/lldb-repro.py | 60 + llvm/docs/CommandGuide/llvm-objcopy.rst | 1 + llvm/include/llvm/BinaryFormat/ELF.h | 20 +- llvm/include/llvm/IR/IRBuilder.h | 40 +- llvm/include/llvm/IR/IntrinsicsHexagonDep.td | 86 + llvm/lib/Analysis/InlineCost.cpp | 11 +- llvm/lib/Analysis/InstructionSimplify.cpp | 28 + llvm/lib/Analysis/ScalarEvolution.cpp | 8 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 5 +- llvm/lib/IR/IRBuilder.cpp | 2 +- llvm/lib/MC/ELFObjectWriter.cpp | 2 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 2 + llvm/lib/Target/AMDGPU/AMDGPU.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 63 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 - llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 - llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 67 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 5 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 37 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 62 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 10 +- .../Target/AMDGPU/SIRemoveShortExecBranches.cpp | 158 - llvm/lib/Target/AMDGPU/SOPInstructions.td | 15 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 20 - llvm/lib/Target/ARM/ARMInstrMVE.td | 15 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 4 +- llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 198 +- .../Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 3 + llvm/lib/Target/Hexagon/Hexagon.td | 20 + llvm/lib/Target/Hexagon/HexagonArch.h | 37 + llvm/lib/Target/Hexagon/HexagonDepArch.h | 38 +- llvm/lib/Target/Hexagon/HexagonDepArch.td | 24 +- llvm/lib/Target/Hexagon/HexagonDepDecoders.inc | 44 +- llvm/lib/Target/Hexagon/HexagonDepIICHVX.td | 493 +- llvm/lib/Target/Hexagon/HexagonDepIICScalar.td | 7439 +++++++++++++------- llvm/lib/Target/Hexagon/HexagonDepITypes.h | 87 +- llvm/lib/Target/Hexagon/HexagonDepITypes.td | 87 +- llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td | 6145 +++++++++------- llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td | 6023 ++++++++++------ llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 59 + llvm/lib/Target/Hexagon/HexagonDepMappings.td | 11 +- llvm/lib/Target/Hexagon/HexagonDepMask.h | 2821 ++++++++ llvm/lib/Target/Hexagon/HexagonDepOperands.td | 188 +- llvm/lib/Target/Hexagon/HexagonDepTimingClasses.h | 200 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 181 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 159 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 1 + llvm/lib/Target/Hexagon/HexagonInstrFormats.td | 103 +- llvm/lib/Target/Hexagon/HexagonInstrFormatsV5.td | 86 - .../Target/Hexagon/HexagonMachineFunctionInfo.h | 12 + llvm/lib/Target/Hexagon/HexagonPatterns.td | 30 +- llvm/lib/Target/Hexagon/HexagonPseudo.td | 12 +- llvm/lib/Target/Hexagon/HexagonSchedule.td | 25 +- llvm/lib/Target/Hexagon/HexagonScheduleV67.td | 39 + llvm/lib/Target/Hexagon/HexagonSubtarget.cpp | 20 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 25 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 8 + .../Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h | 8 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 65 +- .../Hexagon/MCTargetDesc/HexagonShuffler.cpp | 1 + .../Transforms/InstCombine/InstCombineSelect.cpp | 45 + llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 11 +- llvm/test/CMakeLists.txt | 1 + .../AArch64/patchable-function-entry-bti.ll | 13 +- .../CodeGen/AArch64/patchable-function-entry.ll | 27 +- .../AMDGPU/GlobalISel/divergent-control-flow.ll | 11 +- .../GlobalISel/regbankselect-amdgcn.ps.live.mir | 17 + .../AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll | 3227 +++++---- .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 104 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 312 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 2 +- llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | 5 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 9 +- llvm/test/CodeGen/AMDGPU/call-skip.ll | 9 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 49 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 15 +- llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll | 8 +- llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll | 2 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 21 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 11 +- llvm/test/CodeGen/AMDGPU/else.ll | 3 +- llvm/test/CodeGen/AMDGPU/hoist-cond.ll | 2 +- .../test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir | 2 +- llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir | 2 +- .../CodeGen/AMDGPU/insert-skips-ignored-insts.mir | 2 +- .../CodeGen/AMDGPU/insert-skips-kill-uncond.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 4 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 29 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 6 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 3 +- llvm/test/CodeGen/AMDGPU/ret_jump.ll | 23 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 1165 +++ .../AMDGPU/{sdivrem64.ll => sdivrem64.r600.ll} | 56 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll | 2 + .../si-lower-control-flow-unreachable-block.ll | 10 +- llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir | 2 +- .../CodeGen/AMDGPU/skip-branch-taildup-ret.mir | 2 +- llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll | 7 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 13 +- llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll | 2 +- llvm/test/CodeGen/AMDGPU/srem64.ll | 1232 ++++ .../stack-pointer-offset-relative-frameindex.ll | 3 +- .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 5 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 1201 ++++ .../AMDGPU/{udivrem64.ll => udivrem64.r600.ll} | 64 +- llvm/test/CodeGen/AMDGPU/uniform-cfg.ll | 2 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 2 + llvm/test/CodeGen/AMDGPU/urem64.ll | 978 +++ llvm/test/CodeGen/AMDGPU/valu-i1.ll | 42 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 16 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 5 +- llvm/test/CodeGen/ARM/uxt_rot.ll | 129 +- llvm/test/CodeGen/Hexagon/df-min-max.ll | 67 + llvm/test/CodeGen/Hexagon/fminmax-v67.ll | 45 + llvm/test/CodeGen/Hexagon/fmul-v67.ll | 52 + llvm/test/CodeGen/Hexagon/intrinsics-v67.ll | 285 + llvm/test/CodeGen/Hexagon/swp-sigma.ll | 3 +- llvm/test/CodeGen/Hexagon/vacopy.ll | 39 + llvm/test/CodeGen/Hexagon/vararg-deallocate-sp.ll | 13 + llvm/test/CodeGen/Hexagon/vararg-linux-abi.ll | 93 + llvm/test/CodeGen/Hexagon/vararg.ll | 97 + llvm/test/CodeGen/Hexagon/vararg_align_check.ll | 186 + llvm/test/CodeGen/Hexagon/vararg_double_onstack.ll | 214 + llvm/test/CodeGen/Hexagon/vararg_named.ll | 211 + llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll | 55 +- .../test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll | 14 +- .../test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll | 14 +- .../CodeGen/Thumb2/mve-scatter-ind16-scaled.ll | 181 + .../CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll | 460 ++ .../CodeGen/Thumb2/mve-scatter-ind32-scaled.ll | 240 + .../CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll | 419 ++ .../CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll | 540 ++ llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll | 633 ++ llvm/test/CodeGen/X86/patchable-function-entry.ll | 33 +- llvm/test/MC/Hexagon/extensions/v67_hvx.s | 2810 ++++++++ llvm/test/MC/Hexagon/v67.s | 4 + llvm/test/MC/Hexagon/v67_all.s | 10 + llvm/test/Transforms/InstCombine/select.ll | 24 +- llvm/test/Transforms/InstSimplify/select.ll | 9 +- llvm/test/tools/llvm-ml/basic.test | 4 + llvm/test/tools/llvm-ml/run.test | 3 + .../ELF/rename-section-flag-osproc-mask.test | 2 - .../ELF/rename-section-flag-preserved.test | 6 +- .../llvm-objcopy/ELF/rename-section-flag.test | 7 +- .../tools/llvm-objcopy/ELF/set-section-flags.test | 8 +- .../tools/llvm-profdata/text-format-errors.test | 2 +- .../ELF/dynamic-tags-machine-specific.test | 192 +- llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test | 293 +- llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp | 1 - llvm/tools/llvm-exegesis/lib/Analysis.cpp | 8 +- llvm/tools/llvm-exegesis/lib/CMakeLists.txt | 6 +- .../llvm-exegesis/lib/LatencyBenchmarkRunner.cpp | 56 + .../lib/{Latency.h => LatencyBenchmarkRunner.h} | 15 +- llvm/tools/llvm-exegesis/lib/Mips/Target.cpp | 2 +- .../lib/{Uops.cpp => ParallelSnippetGenerator.cpp} | 48 +- .../lib/{Uops.h => ParallelSnippetGenerator.h} | 28 +- llvm/tools/llvm-exegesis/lib/PowerPC/Target.cpp | 1 - .../{Latency.cpp => SerialSnippetGenerator.cpp} | 58 +- .../lib/{Latency.h => SerialSnippetGenerator.h} | 25 +- llvm/tools/llvm-exegesis/lib/Target.cpp | 18 +- llvm/tools/llvm-exegesis/lib/Target.h | 4 +- .../llvm-exegesis/lib/UopsBenchmarkRunner.cpp | 46 + llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.h | 38 + llvm/tools/llvm-exegesis/lib/X86/Target.cpp | 32 +- llvm/tools/llvm-ml/CMakeLists.txt | 14 + llvm/tools/llvm-ml/Disassembler.cpp | 203 + llvm/tools/llvm-ml/Disassembler.h | 37 + llvm/tools/llvm-ml/llvm-ml.cpp | 381 + llvm/tools/llvm-objcopy/CopyConfig.cpp | 5 +- llvm/tools/llvm-objcopy/CopyConfig.h | 3 +- llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 11 +- llvm/tools/llvm-profdata/llvm-profdata.cpp | 4 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 46 +- llvm/unittests/Support/FileCheckTest.cpp | 209 +- .../llvm-exegesis/Mips/SnippetGeneratorTest.cpp | 23 +- .../llvm-exegesis/X86/SnippetGeneratorTest.cpp | 52 +- .../llvm-exegesis/X86/SnippetRepetitorTest.cpp | 5 +- llvm/unittests/tools/llvm-exegesis/X86/TestBase.h | 2 +- .../clang-tools-extra/clang-tidy/cert/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 - llvm/utils/gn/secondary/llvm/test/BUILD.gn | 1 + .../llvm/tools/llvm-exegesis/lib/BUILD.gn | 6 +- .../utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn | 15 + mlir/docs/LangRef.md | 14 +- mlir/docs/Traits.md | 14 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 10 + mlir/include/mlir/Dialect/GPU/Passes.h | 6 + mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 1 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 15 + mlir/include/mlir/Dialect/Traits.h | 31 +- mlir/include/mlir/IR/Block.h | 3 + mlir/include/mlir/IR/OpBase.td | 5 +- mlir/lib/Dialect/GPU/CMakeLists.txt | 1 + .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 373 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 197 +- mlir/lib/Dialect/Traits.cpp | 127 +- mlir/lib/IR/Block.cpp | 7 + mlir/test/Dialect/GPU/all-reduce.mlir | 183 + mlir/test/Dialect/LLVMIR/global.mlir | 8 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 82 +- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 15 +- mlir/test/Dialect/traits.mlir | 8 +- mlir/test/Target/llvmir.mlir | 45 +- mlir/test/lib/TestDialect/TestOps.td | 4 +- mlir/test/lib/Transforms/CMakeLists.txt | 2 + mlir/test/lib/Transforms/TestAllReduceLowering.cpp | 32 + mlir/tools/mlir-tblgen/RewriterGen.cpp | 12 +- .../libomptarget/deviceRTLs/amdgcn/CMakeLists.txt | 1 + .../deviceRTLs/amdgcn/src/amdgcn_smid.hip | 61 + openmp/runtime/src/kmp_affinity.h | 6 +- openmp/runtime/src/z_Linux_util.cpp | 4 +- 310 files changed, 35016 insertions(+), 10985 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCall [...] create mode 100644 clang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCall [...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/cert-oop57-cpp.rst create mode 100644 clang-tools-extra/test/clang-tidy/checkers/cert-oop57-cpp.cpp create mode 100644 clang/test/CodeGen/builtins-hexagon-v67-audio.c create mode 100644 clang/test/CodeGen/builtins-hexagon-v67.c create mode 100644 clang/test/CodeGen/riscv-metadata.c create mode 100644 lld/test/ELF/input-section-flags-diag1.test create mode 100644 lld/test/ELF/input-section-flags-diag2.test create mode 100644 lld/test/ELF/input-section-flags-diag3.test create mode 100644 lld/test/ELF/input-section-flags-keep.s create mode 100644 lld/test/ELF/input-section-flags.s create mode 100644 lld/test/ELF/riscv-reloc-align.s copy lldb/packages/Python/lldbsuite/test/{android/platform => commands/expression/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/complet [...] copy lldb/packages/Python/lldbsuite/test/commands/{source/info/TestSourceInfo.py = [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/expression/deletin [...] copy lldb/packages/Python/lldbsuite/test/{commands/expression/entry-bp => function [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/breakpoint/ [...] create mode 100644 lldb/utils/lldb-repro/CMakeLists.txt create mode 100755 lldb/utils/lldb-repro/lldb-repro.py delete mode 100644 llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp create mode 100644 llvm/lib/Target/Hexagon/HexagonArch.h create mode 100644 llvm/lib/Target/Hexagon/HexagonDepMask.h delete mode 100644 llvm/lib/Target/Hexagon/HexagonInstrFormatsV5.td create mode 100644 llvm/lib/Target/Hexagon/HexagonScheduleV67.td create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir create mode 100644 llvm/test/CodeGen/AMDGPU/sdiv64.ll rename llvm/test/CodeGen/AMDGPU/{sdivrem64.ll => sdivrem64.r600.ll} (62%) create mode 100644 llvm/test/CodeGen/AMDGPU/srem64.ll create mode 100644 llvm/test/CodeGen/AMDGPU/udiv64.ll rename llvm/test/CodeGen/AMDGPU/{udivrem64.ll => udivrem64.r600.ll} (58%) create mode 100644 llvm/test/CodeGen/AMDGPU/urem64.ll create mode 100644 llvm/test/CodeGen/Hexagon/df-min-max.ll create mode 100644 llvm/test/CodeGen/Hexagon/fminmax-v67.ll create mode 100644 llvm/test/CodeGen/Hexagon/fmul-v67.ll create mode 100644 llvm/test/CodeGen/Hexagon/intrinsics-v67.ll create mode 100644 llvm/test/CodeGen/Hexagon/vacopy.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg-deallocate-sp.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg-linux-abi.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg_align_check.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg_double_onstack.ll create mode 100644 llvm/test/CodeGen/Hexagon/vararg_named.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind16-scaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind16-unscaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind32-scaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind32-unscaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-scatter-ptrs.ll create mode 100644 llvm/test/MC/Hexagon/extensions/v67_hvx.s create mode 100644 llvm/test/MC/Hexagon/v67.s create mode 100644 llvm/test/MC/Hexagon/v67_all.s create mode 100644 llvm/test/tools/llvm-ml/basic.test create mode 100644 llvm/test/tools/llvm-ml/run.test create mode 100644 llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.cpp copy llvm/tools/llvm-exegesis/lib/{Latency.h => LatencyBenchmarkRunner.h} (69%) rename llvm/tools/llvm-exegesis/lib/{Uops.cpp => ParallelSnippetGenerator.cpp} (82%) rename llvm/tools/llvm-exegesis/lib/{Uops.h => ParallelSnippetGenerator.h} (70%) rename llvm/tools/llvm-exegesis/lib/{Latency.cpp => SerialSnippetGenerator.cpp} (76%) rename llvm/tools/llvm-exegesis/lib/{Latency.h => SerialSnippetGenerator.h} (52%) create mode 100644 llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.cpp create mode 100644 llvm/tools/llvm-exegesis/lib/UopsBenchmarkRunner.h create mode 100644 llvm/tools/llvm-ml/CMakeLists.txt create mode 100644 llvm/tools/llvm-ml/Disassembler.cpp create mode 100644 llvm/tools/llvm-ml/Disassembler.h create mode 100644 llvm/tools/llvm-ml/llvm-ml.cpp create mode 100644 llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn create mode 100644 mlir/lib/Dialect/GPU/Transforms/AllReduceLowering.cpp create mode 100644 mlir/test/Dialect/GPU/all-reduce.mlir create mode 100644 mlir/test/lib/Transforms/TestAllReduceLowering.cpp create mode 100644 openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (4137a9c -> ba6e34d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 4137a9c 0: update: llvm-linux: boot new ba6e34d 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4137a9c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 12670 +++++++++++++++++------------------ 03-build_linux/console.log | 880 +-- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 10 +- console.log | 13732 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 8 files changed, 13743 insertions(+), 13731 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[glibc] branch release/2.29/master updated (ea6f2c3174 -> e0a0770bb4)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch release/2.29/master in repository glibc. from ea6f2c3174 misc/test-errno-linux: Handle EINVAL from quotactl new e0a0770bb4 riscv: Do not use __has_include__ The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 5 +++++ sysdeps/unix/sysv/linux/riscv/flush-icache.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[glibc] branch release/2.28/master updated (6578d89c17 -> 9ff61e9159)

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[gcc] branch master updated (01e9f1812c72 -> b31f80231df9)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 01e9f1812c72 tree-optimization/92328 fix value-number with bogus type new b31f80231df9 Fortran] PR93309 – permit repeated 'implicit none(external)' The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/fortran/ChangeLog | 8 +++++++ gcc/fortran/interface.c | 10 +++++++- gcc/fortran/symbol.c | 3 --- gcc/testsuite/ChangeLog | 5 ++++ .../gfortran.dg/external_implicit_none_2.f90 | 28 ++++++++++++++++++++++ 5 files changed, 50 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/external_implicit_none_2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (24b178184f2 -> f0aec864383)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/gcc. from 24b178184f2 contrib: New remotes structure for vendor and personal refs adds 991b91497fd debug/92763 keep DIEs that might be used in DW_TAG_inlined_ [...] adds 7387153ca14 aarch64: Remove parameter name and ATTRIBUTE_UNUSED adds 35e58efb7a8 [AArch64] Set SLOW_BYTE_ACCESS adds 1a2b60b581c x32: Add x32 support to -mtls-dialect=gnu2 adds e82ba180d66 [PATCH] PR Fortran/93263 Correct test case adds ad1a3914ae8 [PR 80005] Fix __has_include adds a5d8a40617d Align __patchable_function_entries to POINTER_SIZE [PR93194] adds 414231ba789 PR testsuite/92829 - several -Wstringop-overflow test case [...] adds 45d06a4045b Fix PR 93242: patchable-function-entry broken on MIPS adds 3a43459715e [AArch64] Set jump-align=4 for neoversen1 adds 09e0ad6253f Update OpenACC tests for amdgcn adds bc559d6a018 Update GCC zh_TW.po. adds c784f162049 libstdc++: Fix recent documentation changes adds 2df76cd6895 Daily bump. adds e0a5b313c1a RISC-V: Disallow regrenme if the TO register never used bef [...] adds b313d3c49c2 Fix false warning messages about missing return in coroutine. adds 7d593fd672e Add runtime ISA check for amdgcn offloading adds 51e010b5f75 powerpc: Fix ICE with fp conditional move (PR target/93073) adds f0aec864383 [PATCH, GCC/ARM] Fix clear_operation_p uninitialised variable No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 67 +++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 5 + gcc/c-family/c-cppbuiltin.c | 6 - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- gcc/config/aarch64/aarch64.c | 2 +- gcc/config/aarch64/aarch64.h | 10 +- gcc/config/arm/arm.c | 13 +- gcc/config/i386/i386.c | 31 ++++- gcc/config/i386/i386.md | 54 ++++----- gcc/config/riscv/riscv-protos.h | 2 + gcc/config/riscv/riscv.c | 13 ++ gcc/config/riscv/riscv.h | 2 + gcc/config/rs6000/rs6000.c | 5 + gcc/cp/ChangeLog | 5 + gcc/cp/coroutines.cc | 7 ++ gcc/dwarf2out.c | 9 +- gcc/po/ChangeLog | 4 + gcc/po/zh_TW.po | 17 +-- gcc/targhooks.c | 3 +- gcc/testsuite/ChangeLog | 47 ++++++++ .../g++.dg/coroutines/co-return-warning-1.C | 48 ++++++++ gcc/testsuite/g++.dg/cpp/pr80005.C | 24 ++++ gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C | 10 +- gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C | 10 +- gcc/testsuite/g++.dg/cpp2a/feat-cxx2a.C | 10 +- gcc/testsuite/g++.dg/debug/pr92763.C | 19 +++ gcc/testsuite/g++.dg/warn/Wstringop-overflow-4.C | 16 ++- gcc/testsuite/gcc.dg/Wstringop-overflow-25.c | 14 ++- gcc/testsuite/gcc.target/i386/pr93319-1a.c | 24 ++++ gcc/testsuite/gcc.target/i386/pr93319-1b.c | 7 ++ gcc/testsuite/gcc.target/i386/pr93319-1c.c | 7 ++ gcc/testsuite/gcc.target/i386/pr93319-1d.c | 7 ++ gcc/testsuite/gcc.target/powerpc/pr93073.c | 16 +++ gcc/testsuite/gcc.target/riscv/pr93304.c | 19 +++ gcc/testsuite/gfortran.dg/pr93263_1.f90 | 2 +- libcpp/ChangeLog | 29 ++++- libcpp/directives.c | 29 ++--- libcpp/expr.c | 32 +++-- libcpp/files.c | 27 +++-- libcpp/identifiers.c | 3 +- libcpp/include/cpplib.h | 2 +- libcpp/init.c | 14 ++- libcpp/internal.h | 20 +++- libcpp/pch.c | 4 +- libcpp/traditional.c | 8 +- libgomp/ChangeLog | 30 +++++ libgomp/plugin/plugin-gcn.c | 131 ++++++++++++++++++++- .../libgomp.oacc-c-c++-common/loop-auto-1.c | 3 + .../libgomp.oacc-c-c++-common/loop-dim-default.c | 9 ++ .../libgomp.oacc-c-c++-common/loop-gwv-1.c | 17 ++- .../libgomp.oacc-c-c++-common/loop-red-gwv-1.c | 20 ++-- .../libgomp.oacc-c-c++-common/loop-red-v-1.c | 6 +- .../libgomp.oacc-c-c++-common/loop-red-v-2.c | 6 +- .../libgomp.oacc-c-c++-common/loop-red-w-1.c | 7 +- .../libgomp.oacc-c-c++-common/loop-red-w-2.c | 7 +- .../libgomp.oacc-c-c++-common/loop-red-wv-1.c | 10 +- .../testsuite/libgomp.oacc-c-c++-common/loop-v-1.c | 7 +- .../testsuite/libgomp.oacc-c-c++-common/loop-w-1.c | 7 +- .../libgomp.oacc-c-c++-common/loop-wv-1.c | 10 +- .../libgomp.oacc-c-c++-common/parallel-dims.c | 42 ++++++- .../libgomp.oacc-c-c++-common/routine-gwv-1.c | 15 ++- .../libgomp.oacc-c-c++-common/routine-v-1.c | 7 +- .../libgomp.oacc-c-c++-common/routine-w-1.c | 7 +- .../libgomp.oacc-c-c++-common/routine-wv-1.c | 10 +- .../libgomp.oacc-c-c++-common/routine-wv-2.c | 5 + libstdc++-v3/ChangeLog | 7 ++ libstdc++-v3/doc/html/api.html | 2 +- libstdc++-v3/doc/html/faq.html | 28 ++--- libstdc++-v3/doc/html/index.html | 4 +- .../doc/html/manual/appendix_contributing.html | 12 +- libstdc++-v3/doc/html/manual/appendix_gpl.html | 2 +- libstdc++-v3/doc/html/manual/index.html | 2 +- .../doc/html/manual/source_code_style.html | 3 + libstdc++-v3/doc/html/manual/status.html | 14 +-- .../doc/html/manual/using_concurrency.html | 2 +- libstdc++-v3/doc/xml/faq.xml | 18 ++- .../doc/xml/manual/appendix_contributing.xml | 7 +- libstdc++-v3/doc/xml/manual/spine.xml | 1 + 79 files changed, 894 insertions(+), 271 deletions(-) create mode 100644 gcc/testsuite/g++.dg/coroutines/co-return-warning-1.C create mode 100644 gcc/testsuite/g++.dg/cpp/pr80005.C create mode 100644 gcc/testsuite/g++.dg/debug/pr92763.C create mode 100644 gcc/testsuite/gcc.target/i386/pr93319-1a.c create mode 100644 gcc/testsuite/gcc.target/i386/pr93319-1b.c create mode 100644 gcc/testsuite/gcc.target/i386/pr93319-1c.c create mode 100644 gcc/testsuite/gcc.target/i386/pr93319-1d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr93073.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr93304.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits January 2020