Tcwg-commits January 2020

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allnoconfig updated (b28326516ca -> 9aacec8331d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project. from b28326516ca Revert 9007f06af0e "Revert "Allow system header to provide [...] adds 9aacec8331d [ELF] Allow R_PLT_PC (R_PC) to a hidden undefined weak symbol No new revisions were added by this update. Summary of changes: lld/ELF/Relocations.cpp | 8 ++++++++ lld/test/ELF/weak-undef-hidden.s | 5 +++++ 2 files changed, 13 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allnoconfig updated (2fc1b823 -> 125e5338)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 2fc1b823 0: update: llvm-linux: boot new 125e5338 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (2fc1b823) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12610 +++++++++++++++++------------------ 03-build_linux/console.log | 874 ++- 05-check_regression/console.log | 10 +- console.log | 13714 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 6 files changed, 13716 insertions(+), 13720 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_ubsan updated (2588197b6c2 -> 472ef1d34bb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_ubsan in repository toolchain/ci/gcc. from 2588197b6c2 contrib: Verify the id to be printed is ancestor of the cor [...] adds 55c7ffae702 Fix uninitialized field in expand_operand. adds 7c6056d52ef Uninitialized padding in struct _dep. adds 2db99ef7896 Fix value numbering dealing with reverse byte order adds 1c2755a6a6b Fix spacing in a dump in value-prof.c. adds 545f5fad17f contrib: Check and if needed set user.name and user.email i [...] adds 8c197c851e7 [GCC][PATCH][AArch64]Add ACLE intrinsics for dot product (u [...] adds d916538965e libstdc++: Improve unordered containers == operator (PR 91263) adds f275d73a57f [GCC][PATCH][AArch64]Add ACLE intrinsics for bfdot for ARMv [...] adds 7aa4e0db959 gcc-git-customization.sh: avoid double expansion adds 66aae15b4ed gcc-git-customization.sh: Avoid double expansion adds e953433f089 [PATCH, GCC/ARM, 1/10] Fix -mcmse check in libgcc adds e27cf2e3726 [PATCH, GCC/ARM, 2/10] Add command line support for Armv8.1 [...] adds e0e4be48a98 [PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry functions adds 9722215a027 [PATCH, GCC/ARM, 4/10] Clear GPR with CLRM adds 0b1c7b27a7d [PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRM adds 2d924ca6203 [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscal [...] adds 1e4f3696a24 [PATCH, GCC/ARM, 7/10] Clear all VFP regs inline in hardflo [...] adds 0ab81d9cc73 [PATCH, GCC/ARM, 8/10] Do lazy store & load inline when cal [...] adds a464ffc2156 [PATCH, GCC/ARM, 9/10] Call nscall function with blxns adds 4747e2ccec9 [PATCH, GCC/ARM, 10/10] Enable -mcmse adds 7b4c373beb3 Add CLI and multilib support for Armv8.1-M Mainline MVE extensions adds 2e87b2f4121 [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 3ea9140170b [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 98d56ea8900 libstdc++: std::ctype fixes for recent versions of NetBSD adds f48c6014133 Fix noreorder symbol partitioning reversion. adds 801f5b96775 PR c++/93280 - ICE with aggregate assignment and DMI. adds f5b25e15165 Make profile estimation more precise adds 852f0ae8055 Fix ICE caused by swallowing a token in c_parser_consume_token adds b6a0ebd1920 Extern -param=max-predicted-iterations range. adds 1113de9499d Daily bump. adds 5194b51ed97 PR c++/93286 - ICE with __is_constructible and variadic template. adds f17f6127f8e contrib/gcc_update: Insert "tformat:" for git log --pretty= [...] adds 2b3534a3122 ChangeLog fixes. adds 40111910b0a testsuite: Unbreak compat.exp testing with alt compiler PR93294 adds dc9ba9d045d vect: Fix ICE in vectorizable_comparison PR93292 adds e4a5f73449d PATCH] Fortran: PR93263 -fno-automatic and RECURSIVE adds 507de5ee23e gimplifier: handle POLY_INT_CST-sized TARGET_EXPRs adds 865257c447c aarch64: Don't raise FE_INVALID for -__builtin_isgreater [PR93133] adds f788c2d66a6 Add PR number to change log adds e5e07b68187 [AArch64] Fix shrinkwrapping interactions with atomics (PR92692) adds 5f0303833d5 analyzer: fix handling of negative byte offsets (v2) (PR 93281) adds bf09d886a4b [PR93306] Short-circuit has_include adds c60a18f8056 c++: Fix deprecated attribute handling on templates (PR c++/93228) adds eff9c61dfb0 PR c++/92531 - ICE with noexcept(lambda). adds 6ed8c923325 [AArch64] Enable compare branch fusion adds 336e1b950db [AArch64] Enable CLI for Armv8.6-A f64mm adds 9ceec73fc0e [AArch64] [SVE] Implement svld1ro intrinsic. adds f1a7789d0f4 Fix g++ testsuite failure caused by std::is_pod deprecation adds 568f0f355f2 [AArch64] [Obvious] Correct pattern target requirement adds 2c2e9f7a5d4 gdbinit.in: make shorthands accept an explicit argument adds 0ba6a850b59 libstdc++: Fix freestanding build PR 92376) adds 6687d13a87c Rename acc_device_gcn to acc_device_radeon adds 925cef05b89 arm: Unbreak bootstrap adds 674dcc3f738 Fix up ChangeLog. adds 60d616b1f6d [GCC/ARM, 1/2] Add support for ASRL(reg) and LSLL(reg) inst [...] adds a968a40c4ee [GCC/ARM, 2/2] Add support for ASRL(imm), LSLL(imm) and LSR [...] adds 4c9e5b02f08 Add testcase of PR c++/92542, already fixed. adds 7e45138702a Add testcase of PR c++/92542, already fixed. adds 82033483fd7 PR90374 Zero width format specifiers. adds 07c86323a19 analyzer: prevent ICE on isnan (PR 93290) adds 92030203c1d Daily bump. adds e2947cfa2d1 PR93234 INQUIRE on pre-assigned files of ROUND and SIGN properties adds a22a86a18bd arm: fix rtl checking bootstrap (PR target/93312) adds 472ef1d34bb arm: Remove yet another unused variable. No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 15 + contrib/gcc-git-customization.sh | 65 ++- contrib/gcc_update | 2 +- gcc/ChangeLog | 390 +++++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 16 + gcc/analyzer/region-model.cc | 20 +- gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 6 +- gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.c | 45 +- gcc/config/aarch64/aarch64-c.c | 1 + gcc/config/aarch64/aarch64-option-extensions.def | 36 +- gcc/config/aarch64/aarch64-protos.h | 1 + gcc/config/aarch64/aarch64-simd-builtins.def | 10 + gcc/config/aarch64/aarch64-simd.md | 66 +++ gcc/config/aarch64/aarch64-sve-builtins-base.cc | 24 +- gcc/config/aarch64/aarch64-sve-builtins-base.def | 4 + gcc/config/aarch64/aarch64-sve-builtins-base.h | 1 + gcc/config/aarch64/aarch64-sve-builtins.cc | 6 +- gcc/config/aarch64/aarch64-sve.md | 14 + gcc/config/aarch64/aarch64.c | 66 ++- gcc/config/aarch64/aarch64.h | 17 +- gcc/config/aarch64/aarch64.md | 65 ++- gcc/config/aarch64/arm_neon.h | 134 +++++ gcc/config/aarch64/atomics.md | 20 +- gcc/config/aarch64/constraints.md | 25 + gcc/config/aarch64/iterators.md | 23 + gcc/config/aarch64/predicates.md | 16 + gcc/config/arm/arm-builtins.c | 33 +- gcc/config/arm/arm-cpus.in | 48 +- gcc/config/arm/arm-modes.def | 5 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm-simd-builtin-types.def | 2 + gcc/config/arm/arm-tables.opt | 2 +- gcc/config/arm/arm.c | 632 +++++++++++++++++---- gcc/config/arm/arm.h | 41 +- gcc/config/arm/arm.md | 94 ++- gcc/config/arm/arm_bf16.h | 41 ++ gcc/config/arm/arm_neon.h | 4 + gcc/config/arm/constraints.md | 7 +- gcc/config/arm/iterators.md | 22 +- gcc/config/arm/neon.md | 8 +- gcc/config/arm/predicates.md | 21 + gcc/config/arm/t-rmprofile | 17 +- gcc/config/arm/thumb2.md | 90 ++- gcc/config/arm/unspecs.md | 8 + gcc/config/arm/vfp.md | 161 ++++-- gcc/cp/ChangeLog | 22 + gcc/cp/init.c | 4 + gcc/cp/parser.c | 12 +- gcc/cp/pt.c | 91 ++- gcc/cp/typeck2.c | 3 - gcc/doc/analyzer.texi | 3 + gcc/doc/invoke.texi | 28 + gcc/fortran/ChangeLog | 8 + gcc/fortran/resolve.c | 3 +- gcc/gdbinit.in | 173 ++++-- gcc/gimplify.c | 6 +- gcc/ipa-fnsummary.c | 2 +- gcc/lto/ChangeLog | 6 + gcc/lto/lto-partition.c | 3 + gcc/optabs.h | 1 + gcc/params.opt | 2 +- gcc/predict.c | 102 ++-- gcc/profile-count.c | 9 + gcc/profile-count.h | 5 +- gcc/sched-deps.c | 1 + gcc/sched-int.h | 2 + gcc/testsuite/ChangeLog | 400 +++++++++++++ gcc/testsuite/c-c++-common/pr92833-1.c | 4 + gcc/testsuite/c-c++-common/pr92833-2.c | 4 + gcc/testsuite/c-c++-common/pr92833-3.c | 4 + gcc/testsuite/c-c++-common/pr92833-4.c | 7 + gcc/testsuite/g++.dg/abi/mangle-neon.C | 5 + gcc/testsuite/g++.dg/cpp0x/std-layout1.C | 1 + gcc/testsuite/g++.dg/cpp1y/attr-deprecated-3.C | 13 + gcc/testsuite/g++.dg/cpp1z/constexpr-lambda25.C | 7 + gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C | 13 + gcc/testsuite/g++.dg/ext/is_constructible4.C | 18 + gcc/testsuite/g++.dg/opt/pr93292.C | 18 + gcc/testsuite/g++.dg/pr92542.C | 15 + .../aarch64/sve/acle/general-c++/gimplify_1.C | 4 + .../g++.target/arm/bfloat_cpp_typecheck.C | 14 + gcc/testsuite/gcc.dg/analyzer/pr93290.c | 9 + gcc/testsuite/gcc.dg/torture/pr93133.c | 41 ++ .../aarch64/advsimd-intrinsics/bfdot-1.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-2.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-3.c | 28 + .../aarch64/advsimd-intrinsics/vdot-3-1.c | 136 +++++ .../aarch64/advsimd-intrinsics/vdot-3-2.c | 137 +++++ .../aarch64/advsimd-intrinsics/vdot-3-3.c | 31 + .../aarch64/advsimd-intrinsics/vdot-3-4.c | 31 + .../gcc.target/aarch64/pragma_cpp_predefs_2.c | 14 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c | 119 ++++ .../gcc.target/arm/armv8_1m-shift-imm-1.c | 27 + .../gcc.target/arm/armv8_1m-shift-reg-1.c | 20 + gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c | 118 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c | 16 + .../gcc.target/arm/bfloat16_scalar_typecheck.c | 219 +++++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c | 91 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 94 +++ .../gcc.target/arm/bfloat16_vector_typecheck_1.c | 263 +++++++++ .../gcc.target/arm/bfloat16_vector_typecheck_2.c | 252 ++++++++ gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c | 5 +- gcc/testsuite/gcc.target/arm/cmse/cmse-1.c | 18 +- gcc/testsuite/gcc.target/arm/cmse/cmse-14.c | 15 +- gcc/testsuite/gcc.target/arm/cmse/cmse-15.c | 7 +- gcc/testsuite/gcc.target/arm/cmse/cmse.exp | 43 +- .../gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c | 25 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c | 20 + .../arm/cmse/mainline/8_1m/bitfield-and-union.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-13.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/hard/cmse-13.c | 32 ++ .../arm/cmse/mainline/8_1m/hard/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/soft/cmse-13.c | 29 + .../arm/cmse/mainline/8_1m/soft/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/soft/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/soft/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c | 14 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/softfp/cmse-13.c | 28 + .../arm/cmse/mainline/8_1m/softfp/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/softfp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp/cmse-8.c | 27 + .../gcc.target/arm/cmse/mainline/8_1m/union-1.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/union-2.c | 27 + .../arm/cmse/mainline/{ => 8m}/bitfield-4.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-5.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-6.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-7.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-8.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-9.c | 2 +- .../cmse/mainline/{ => 8m}/bitfield-and-union.c | 2 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-13.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-5.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c | 10 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/union-1.c | 3 +- .../arm/cmse/mainline/{ => 8m}/union-2.c | 2 +- gcc/testsuite/gcc.target/arm/cmse/struct-1.c | 6 +- gcc/testsuite/gcc.target/arm/multilib.exp | 21 + gcc/testsuite/gfortran.dg/inquire_pre.f90 | 68 +++ gcc/testsuite/gfortran.dg/pr93263_1.f90 | 29 + gcc/testsuite/gfortran.dg/pr93263_2.f90 | 24 + gcc/testsuite/lib/c-compat.exp | 10 + gcc/testsuite/lib/target-supports.exp | 16 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-vect-stmts.c | 2 +- gcc/value-prof.c | 4 +- libcpp/ChangeLog | 6 + libcpp/expr.c | 34 +- libgcc/ChangeLog | 6 + libgcc/config/arm/t-arm | 2 +- libgfortran/ChangeLog | 14 + libgfortran/io/format.c | 4 +- libgfortran/io/unit.c | 16 +- libgfortran/io/write_float.def | 4 +- libgomp/ChangeLog | 25 + libgomp/config/accel/openacc.f90 | 4 +- libgomp/openacc.f90 | 4 +- libgomp/openacc.h | 2 +- libgomp/openacc_lib.h | 2 +- libgomp/testsuite/lib/libgomp.exp | 2 +- .../libgomp.oacc-c-c++-common/acc_prof-init-1.c | 2 +- .../libgomp.oacc-c-c++-common/acc_prof-kernels-1.c | 4 +- .../acc_prof-parallel-1.c | 12 +- .../libgomp.oacc-c-c++-common/asyncwait-nop-1.c | 2 +- libstdc++-v3/ChangeLog | 39 ++ libstdc++-v3/config/os/bsd/netbsd/ctype_base.h | 40 +- .../config/os/bsd/netbsd/ctype_configure_char.cc | 12 +- libstdc++-v3/config/os/bsd/netbsd/ctype_inline.h | 2 +- libstdc++-v3/include/bits/c++config | 5 +- libstdc++-v3/include/bits/hashtable.h | 7 + libstdc++-v3/include/bits/hashtable_policy.h | 127 ++--- libstdc++-v3/libsupc++/new_opa.cc | 15 + .../unordered_multiset/operators/1.cc | 56 ++ .../23_containers/unordered_set/operators/1.cc | 48 ++ 224 files changed, 8230 insertions(+), 677 deletions(-) create mode 100644 gcc/config/arm/arm_bf16.h create mode 100644 gcc/testsuite/c-c++-common/pr92833-1.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-2.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-3.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-4.c create mode 100644 gcc/testsuite/g++.dg/cpp1y/attr-deprecated-3.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/constexpr-lambda25.C create mode 100644 gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible4.C create mode 100644 gcc/testsuite/g++.dg/opt/pr93292.C create mode 100644 gcc/testsuite/g++.dg/pr92542.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/gimplify_1.C create mode 100644 gcc/testsuite/g++.target/arm/bfloat_cpp_typecheck.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr93290.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr93133.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c create mode 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gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-4.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-5.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-6.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-7.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-8.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-9.c (94%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-and-union.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-13.c (90%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-7.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-8.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-13.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-5.c (79%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c (65%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-1.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-2.c (96%) create mode 100644 gcc/testsuite/gfortran.dg/inquire_pre.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93263_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93263_2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_ubsan updated (f1270574 -> c45cef2a)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_ubsan in repository toolchain/ci/base-artifacts. discards f1270574 0: update: gcc-2588197b6c2175d7ef9f05a8636f58dfeab12b1d: 1 new c45cef2a 0: update: gcc-472ef1d34bbe510cec7f23bd637de021a99f67c5: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f1270574) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-master-aarch64-b [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 186 +- 02-prepare_abe/console.log | 434 +- 03-build_abe-bootstrap_ubsan/console.log | 77113 ++++++++++++++-------------- 05-check_regression/console.log | 4 +- 06-update_baseline/console.log | 4 +- console.log | 77773 +++++++++++++++-------------- jenkins/manifest.sh | 10 +- results | 2 +- 8 files changed, 77790 insertions(+), 77736 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-defconfig updated (b28326516ca -> 9aacec8331d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-defconfig in repository toolchain/ci/llvm-project. from b28326516ca Revert 9007f06af0e "Revert "Allow system header to provide [...] adds 9aacec8331d [ELF] Allow R_PLT_PC (R_PC) to a hidden undefined weak symbol No new revisions were added by this update. Summary of changes: lld/ELF/Relocations.cpp | 8 ++++++++ lld/test/ELF/weak-undef-hidden.s | 5 +++++ 2 files changed, 13 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-defconfig updated (23a3072d -> 1c9419ef)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-defconfig in repository toolchain/ci/base-artifacts. discards 23a3072d 0: update: llvm-linux: boot new 1c9419ef 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (23a3072d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12602 +++++++++++++++++----------------- 03-build_linux/console.log | 704 +- 04-boot_linux/console.log | 480 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 29 - console.log | 14045 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 14018 insertions(+), 14080 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig updated (f158d9197de -> 41fd95e6dbd)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig in repository toolchain/ci/gcc. from f158d9197de Fortran: PR93263 -fno-automatic and RECURSIVE adds 5c7938eb3f1 PR c++/93286 - ICE with __is_constructible and variadic template. adds 3815f211649 PR c++/92531 - ICE with noexcept(lambda). adds 41fd95e6dbd Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 12 ++++ gcc/cp/pt.c | 91 +++++++++++++++++++------ gcc/testsuite/g++.dg/cpp1z/constexpr-lambda25.C | 7 ++ gcc/testsuite/g++.dg/ext/is_constructible4.C | 18 +++++ 5 files changed, 108 insertions(+), 22 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1z/constexpr-lambda25.C create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible4.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig updated (43f209c984 -> 1e97453209)

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5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig updated (925d0297 -> 55f670f9)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allmodconfig in repository toolchain/ci/base-artifacts. discards 925d0297 0: update: binutils-gcc-linux: all new 55f670f9 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (925d0297) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 190 +- 02-prepare_abe/console.log | 379 +- 03-build_abe-binutils/console.log | 11080 +++++++------ 04-build_abe-stage1/console.log | 18053 +++++++++++---------- 05-build_linux/console.log | 966 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 10 +- console.log | 30711 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 30709 insertions(+), 30704 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allnoconfig updated (b28326516ca -> 9aacec8331d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-allnoconfig in repository toolchain/ci/llvm-project. from b28326516ca Revert 9007f06af0e "Revert "Allow system header to provide [...] adds 9aacec8331d [ELF] Allow R_PLT_PC (R_PC) to a hidden undefined weak symbol No new revisions were added by this update. Summary of changes: lld/ELF/Relocations.cpp | 8 ++++++++ lld/test/ELF/weak-undef-hidden.s | 5 +++++ 2 files changed, 13 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

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