Tcwg-commits January 2020

tcwg-commits@lists.linaro.org

5 participants
12654 discussions

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (d54d71b67e6 -> 73db4f6f11f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project. from d54d71b67e6 [clangd] Make output order of allTargetDecls deterministic adds d36b2649e5e [ELF] Optimization to LinkerScript::computeInputSections NFC adds c969335abdb Revert "[PHIEliminate] Move dbg values after phi and label" adds 4b6d9ac3926 Make lld cmake not compute commit revision twice adds cbaa32650a0 Removed an unused include from TypeLocVisitor.h adds 66c120f0256 [VectorUtils] Rework the Vector Function Database (VFDatabase). adds 4f5c65a5c80 try to unbreak build after 4b6d9ac392613 adds 2b81d3c6c6f [mlir][Linalg] Fix Linalg EDSC builders adds c24cf979608 [ARM][MVE] Enable extending gathers adds 15a6df52efa [lldb/DWARF/test] Freshen up debug_names tests adds 28bb43bdf80 [GlobalISel] Use more MachineIRBuilder helper methods adds 760b1751097 [ARM][LowOverheadLoops] Update liveness info adds 237fd943125 [Hexagon] Remove unnecessary case in StringSwitch, NFC adds fb9413cb84c Remove some SVN-specific code. adds 63f73545dd8 [GlobalISel] Pass MachineOperands into MachineIRBuilder hel [...] adds 885260d5d80 [GlobalISel] Don't arbitrarily limit a mask to 64 bits adds 7f5f6ff5476 [Hexagon] Add preprocessor test for hexagonv66 adds 9b2f3532c7f AMDGPU/GlobalISel: Select DS GWS intrinsics adds 81eaa3ddd06 [lldb][NFC] Delete TestDataFormatterObjCNSDate.py adds 1794158f90f [MC][test] Fix non-portable GNU diff option adds 4ca1ad85b7c AMDGPU/GlobalISel: Don't handle legacy buffer intrinsic adds 31458a9feec [llvm-exegesis][NFC] Refactor Mips tests fixtures into a ba [...] adds 6b357866496 [llvm-exegesis][mips] Add RegisterAliasingTest unit test adds bc413da0865 [Hexagon] Fix alignment info for __builtin_circ_lduh adds c29a9f64b78 [gn build] Port 6b357866496 adds 7acfda633f1 [llvm] Make new pass manager's OptimizationLevel a class adds 26646761e2b [lldb/Scripts] Remove swig_bot_lib/__init__.py adds 3478551bf3d [GVN] introduce GVNOptions to control GVN pass behavior adds 9b3254dbf9f [LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging adds d34e4152e3e [LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to [...] adds 81c67da0f20 remove an include that's unused after r347592 adds ee05138515a [lldb/test] Revert changes to debug-names-compressed.cpp adds cebba7ce395 [SystemZ] Avoid unnecessary conversions in vecintrin.h adds bed7626f04f [PowerPC][AIX] Make PIC the default relocation model for AIX adds 5caa1212957 [gn build] include revision information in lld --version output adds d51a15d86a2 [gn build] (manually) port bed7626f04f7 adds c87982b4670 Revert "[Loop Peeling] Add possibility to enable peeling on [...] adds 870094decfc [ELF] Decrease alignment of ThunkSection on 64-bit targets [...] adds 8ee2d168966 [Hexagon] Add a target feature to disable compound instructions adds c0d909a1b12 Delete control character from comment. (NFC) adds 20ca49b646b AMDGPU: Update tests to use modern buffer intrinsics adds 86d14ed766e TableGen: Remove dead code adds 03a592f18ba TableGen/GlobalISel: Fix srcvalue inputs adds 0d0fce42b0e GlobalISel: Preserve load/store metadata in IRTranslator adds d0943537e10 GlobalISel: Apply target MMO flags to atomics adds de4f88df97c AMDGPU: Remove IR section from MIR test adds a881fcafaa5 [clangd] Make define outline code action visible adds 0474fe465d8 [clangd] Print underlying type for decltypes in hover adds 61a89e17df4 [LegalizeDAG][Mips] Add an assert to protect a uint_to_fp i [...] adds 5f65065437c [Hexagon] Update autogeneated intrinsic information in LLVM adds be31a7b7eec GlobalISel: Move extension scalar narrowing to separate function adds a66d2817ca9 GlobalISel: Don't ignore requested ext narrowing type adds e12b840abfc AMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG adds 8945b23af59 AMDGPU: Update more tests to use modern buffer intrinsics adds ff1e3cad71e Don't run powerpc lit test case on other platforms. adds f5d98543b89 AMDGPU: Remove outdated comment adds 5f8e4121882 [lldb/test] Exted test for CMTime data formatter adds 59919c4d6b6 [libc++] Fix Windows DLL build for string. adds 39f746d8def [OpenMP][Tool] Fix memory leak and double-allocation adds d0b02aecacc Address redirect issue on Windows. adds 2d7a8cf9047 [ELF] -r: don't create .interp adds 6f3effbbf05 [Hexagon] Update autogenerated intrinsic info in clang adds 53b68e676fa Resubmit: [JumpThreading] Thread jumps through two basic blocks adds 1f2dad1fd57 [GVN] add GVN parameters parsing to new pass manager adds ecf0766cf14 [Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp adds 40514a7d7a3 [clangd] Add workaround for GCC5 host compilers. NFC. adds fc4e43ad618 [NFC] Remove unnecessary link components. adds c299d1981de scudo: Add initial memory tagging support. adds d5c6b8407c1 Factor out renaming logic from readability-identifier-naming adds cbc63fbdc43 [gn build] Port d5c6b8407c1 adds 8b321929483 [OPENMP]Avoid string concat where possible and use standard [...] adds 52b44902d05 [IR] fix crash in Constant::isElementWiseEqual() with FP types adds 3a05c3969c1 [WebAssembly] Track frame registers through VReg and local [...] adds 202446c639f Add BuiltinsHexagonDep.def to clang module map adds fa4112fffc6 [llvm-nm] Use `StringRef` over `const std::string &` params adds 91e758b7329 AMDGPU: Move permlane discard vdst_in optimization adds 3ef8cdf6660 AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine adds 80906d9d160 Revert "[WebAssembly] Track frame registers through VReg an [...] adds 6c4d3773340 lldb: xfail TestCrossDSOTailCalls.py and TestCrossObjectTai [...] adds 9050d0fb593 [libcxx] Temporarily switch back to pthread backend for Fuchsia adds 51b521c07a7 [lld][WebAssembly] Use a more meaningful name for stub functions adds 73f371c31d2 [mlir] NFC: Fix trivial typos adds a4a42160c44 [mlir] support translation of multidimensional vectors to LLVM IR adds 42b3c38903c [clangd][test] Disable a particular testcase in FindExplici [...] adds 9b549f26fab AMDGPU: Update clang test adds 25b542c61fe [OPENMP]Do not emit RTTI descriptor for NVPTX devices. adds b82d18e1e8e [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stor [...] adds de022a8824f [NFC] Fold isHugeExpression into hasHugeExpression and upda [...] adds 65eb74e94b4 PointerLikeTypeTraits: Standardize NumLowBitsAvailable on s [...] adds 933b4212566 [mlir] Add missing dependency on LinalgUtils adds fb5fafb23cc Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well. adds 1645f5e496b [gn build] replace llvm_allow_tardy_revision with llvm_appe [...] adds 40ac4221c30 Move static function to inline function - this fixes a conc [...] adds 1b1022b42ad Add back other PowerPC link components. adds 30a8865142a [FastISel] Lower `llvm.dbg.value(undef, ...` correctly. adds 8ef57f3e3f1 [xray] add --no-demangle cli opt for llvm-xray extract to o [...] adds 2671df9bd67 [lldb/Debugger] Rename ExecuteIOHandlers to RunIOHandlers (NFC) adds 7b0d58e339b Add testing for DW_OP_piece and fix a bug with small Scalar [...] adds f55ab6f90b7 Fix a buffer-size bug when the first DW_OP_piece is undefined adds 83f4c3af021 [modules] Do not cache invalid state for modules that we at [...] adds 6c26d8968ad Add back more link components. adds cef838e65f9 Revert "[RISCV] Support ABI checking with per function targ [...] adds b78e8e0d79c Add extra test file forgotten in 45d7080. adds ad83bed2411 [NFC][PowerPC] Remove unnecessary link components. adds 6a970135904 [mlir][spirv] Add implied capabilities and availability for [...] adds ccedb918bb3 [mlir][spirv] Use symbolize functions in enum attribute predicates adds 961174f8787 [mlir][spirv] Fix SPV_MM_Vulkan extension reqirements adds 051d330314c Avoid creating an immutable map in the Automaton class. adds 117d4f1900c AMDGPU: Add register classes to MUBUF load patterns adds 01a6cd471f0 Don't dump IR output from this test to stdout. adds 24fca5cd712 [lldb] add to gdb to lldb doc adds 25cf941275e [lldb/CMake] Set LLVM_HOST_TRIPLE from TARGET_TRIPLE in sta [...] adds 0d3d584f82f [docs][ORC] Update the "utilities" section, tidy intro and [...] adds d3d7666678a [lldb/CMake] Remove duplicate entry adds caee96031d3 [Transforms][RISCV] Remove a "using namespace llvm" from an [...] adds adef2f5324c [docs][ORC] Fix some RST errors in the ORCv2 doc. adds f6d6b98eec4 [docs][ORC] Try to fix 'title-level inconsistent' error in [...] adds 911a4c4dda9 [lldb/Test] Fix API tests for mutli-config generators adds e1f6b68d1fd [lldb/Cmake] Add a CMakeLists.txt to the utils directory... adds 9dbd395b9b8 [lldb] Remove ClangASTContext.h inclusion in Target.cpp adds 4df94d5b513 Revert "[clangd][test] Disable a particular testcase in Fin [...] adds 5ac610668a7 [lldb] Re-add NSDate formatter adds 0ab035ae504 Remove old Suversion release scripts adds 6b840834cd5 [lldb][NFC] Delete unused lldb/source/Plugins/LanguageRunti [...] adds d437fba8ef6 Reapply Allow system header to provide their own implementa [...] adds d293417931d Add __warn_memset_zero_len builtin as a workaround for glibc issue adds 0734fb21ed5 clang-format: [JS] Handle more keyword-named methods. adds 10b4aece528 Revert "Avoid creating an immutable map in the Automaton class." adds c3ab790c8f5 [lldb][NFC] Resynchronize Init/Terminate calls in SystemIni [...] adds 01ad4c83846 [LLD][ELF][ARM][AArch64] Only round up ThunkSection Size wh [...] adds fe3bb8ec968 [AArch64][SVE] Add ImmArg property to intrinsics with immediates adds 37fb3b33637 [AsmParser] Make generic directives and aliases case insensitive. adds 25afe91fd1b Fix Wparentheses warning. NFCI. adds f6111583508 [SelectionDAG] Better ISD::ANY_EXTEND/ISD::ANY_EXTEND_VECTO [...] adds 49edf9a509c [AArch64][SVE] Add break intrinsics adds f2d41ad0e7e [lldb] Add missing terminate calls to Python/Lua subsystems adds 791f132132b [lldb] Remove out of order OperatingSystemPython::Terminate [...] adds ea91758a3c4 [llvm-exegesis][mips] Add support for memory instructions adds 33463cfba2b clang-format: fix spacing in `operator const char*()` adds 9835cf15901 clang-format: [JS] pragmas for tslint, tsc. adds cc7cb05e9d7 [BasicBlock] fix looping in getPostdominatingDeoptimizeCall adds 37dfc64687a Revert "[mlir][ods] Support dialect specific content emissi [...] adds 267483ac709 [mlir][spirv] Support implied extensions and capabilities adds 42350cd893a [ARM][MVE] Tail Predicate IsSafeToRemove adds ffd3e1607db [IR] add unit test for Constant::isElementWiseEqual() for u [...] adds c1e159ef6eb [IR] fix Constant::isElementWiseEqual() to allow for all un [...] adds 42a0355816d Add `bugprone-reserved-identifier` adds 73db4f6f11f [gn build] Port 42a0355816d No new revisions were added by this update. Summary of changes: .../clang-tidy/bugprone/BugproneTidyModule.cpp | 3 + .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../bugprone/ReservedIdentifierCheck.cpp | 178 + .../clang-tidy/bugprone/ReservedIdentifierCheck.h | 57 + .../clang-tidy/cert/CERTTidyModule.cpp | 7 +- .../readability/IdentifierNamingCheck.cpp | 397 +- .../clang-tidy/readability/IdentifierNamingCheck.h | 76 +- .../clang-tidy/readability/QualifiedAutoCheck.cpp | 5 +- clang-tools-extra/clang-tidy/utils/CMakeLists.txt | 1 + .../clang-tidy/utils/RenamerClangTidyCheck.cpp | 422 + .../clang-tidy/utils/RenamerClangTidyCheck.h | 150 + clang-tools-extra/clangd/FindTarget.cpp | 1 + clang-tools-extra/clangd/Hover.cpp | 46 +- .../clangd/refactor/tweaks/DefineOutline.cpp | 2 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 51 + clang-tools-extra/docs/ReleaseNotes.rst | 13 + .../checks/bugprone-reserved-identifier.rst | 56 + .../docs/clang-tidy/checks/cert-dcl37-c.rst | 10 + .../docs/clang-tidy/checks/cert-dcl51-cpp.rst | 10 + .../system/system-header.h | 33 + .../bugprone-reserved-identifier/user-header.h | 58 + .../checkers/bugprone-reserved-identifier-c.c | 10 + .../bugprone-reserved-identifier-invert.cpp | 70 + .../checkers/bugprone-reserved-identifier.cpp | 206 + clang/include/clang/AST/CanonicalType.h | 2 +- clang/include/clang/AST/Decl.h | 3 + clang/include/clang/AST/DeclGroup.h | 2 +- clang/include/clang/AST/ExternalASTSource.h | 5 +- clang/include/clang/AST/TemplateName.h | 2 +- clang/include/clang/AST/Type.h | 6 +- clang/include/clang/AST/TypeLocVisitor.h | 1 - clang/include/clang/Basic/Builtins.def | 3 + clang/include/clang/Basic/BuiltinsHexagon.def | 1910 +---- clang/include/clang/Basic/BuiltinsHexagonDep.def | 1690 ++++ clang/include/clang/Basic/IdentifierTable.h | 6 +- clang/include/clang/Basic/SourceLocation.h | 2 +- clang/include/clang/CodeGen/ConstantInitFuture.h | 10 +- clang/include/clang/Sema/Ownership.h | 2 +- clang/include/clang/Sema/Sema.h | 1 - .../clang/Serialization/InMemoryModuleCache.h | 42 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/Decl.cpp | 8 + clang/lib/Basic/CMakeLists.txt | 4 +- clang/lib/Basic/Targets/Hexagon.cpp | 6 + clang/lib/Basic/Version.cpp | 35 +- clang/lib/CodeGen/BackendUtil.cpp | 10 +- clang/lib/CodeGen/CGBuiltin.cpp | 2 + clang/lib/CodeGen/CGExpr.cpp | 9 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 24 +- clang/lib/CodeGen/CodeGenModule.cpp | 9 +- clang/lib/Driver/ToolChains/Hexagon.cpp | 1 - clang/lib/Format/Format.cpp | 6 +- clang/lib/Format/TokenAnnotator.cpp | 15 +- clang/lib/Format/UnwrappedLineParser.cpp | 18 + clang/lib/Headers/vecintrin.h | 8 +- clang/lib/Sema/SemaChecking.cpp | 824 +- clang/lib/Serialization/ASTReader.cpp | 2 +- clang/lib/Serialization/ASTWriter.cpp | 2 +- clang/lib/Serialization/InMemoryModuleCache.cpp | 29 +- clang/lib/Serialization/ModuleManager.cpp | 11 +- clang/test/CodeGen/builtins-hexagon-circ.c | 2 +- clang/test/CodeGen/builtins.c | 7 + clang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c | 2 +- clang/test/CodeGen/hexagon-brev-store-elm.c | 2 +- clang/test/CodeGen/memcpy-nobuiltin.c | 15 + clang/test/CodeGen/memcpy-nobuiltin.inc | 19 + clang/test/CodeGenHIP/printf-aggregate.cpp | 2 +- clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl | 8 +- .../Modules/Inputs/implicit-invalidate-chain/A.h | 2 - .../Modules/Inputs/implicit-invalidate-chain/B.h | 2 - .../Modules/Inputs/implicit-invalidate-chain/C.h | 2 - .../implicit-invalidate-chain/module.modulemap | 3 - clang/test/Modules/implicit-invalidate-chain.c | 67 - .../OpenMP/nvptx_target_pure_deleted_codegen.cpp | 5 +- clang/test/Parser/explicit-bool.cpp | 62 + clang/test/Preprocessor/hexagon-predefines.c | 7 + clang/test/Sema/builtins-hexagon-v55.c | 16 +- clang/test/Sema/builtins-hexagon-v60.c | 15 +- clang/test/Sema/builtins-hexagon-v62.c | 14 +- clang/test/Sema/builtins-hvx-none.c | 17 +- clang/test/Sema/builtins-hvx-v60.c | 16 +- clang/test/Sema/builtins-hvx-v62.c | 15 +- clang/unittests/Format/FormatTest.cpp | 9 + clang/unittests/Format/FormatTestJS.cpp | 48 + clang/unittests/Frontend/FrontendActionTest.cpp | 6 +- .../Serialization/InMemoryModuleCacheTest.cpp | 38 +- .../lib/scudo/standalone/allocator_config.h | 4 +- compiler-rt/lib/scudo/standalone/combined.h | 140 +- compiler-rt/lib/scudo/standalone/common.h | 1 + compiler-rt/lib/scudo/standalone/linux.cpp | 8 + compiler-rt/lib/scudo/standalone/memtag.h | 231 + compiler-rt/lib/scudo/standalone/primary32.h | 4 + compiler-rt/lib/scudo/standalone/primary64.h | 24 +- .../lib/scudo/standalone/tests/combined_test.cpp | 102 +- .../lib/scudo/standalone/tests/primary_test.cpp | 4 + compiler-rt/lib/scudo/standalone/wrappers_c.inc | 8 + libcxx/include/__config | 3 +- libcxx/include/string | 1 + lld/CMakeLists.txt | 27 - lld/Common/CMakeLists.txt | 4 +- lld/ELF/LinkerScript.cpp | 8 +- lld/ELF/Relocations.cpp | 31 + lld/ELF/SyntheticSections.cpp | 11 +- lld/ELF/SyntheticSections.h | 4 + lld/ELF/Writer.cpp | 4 +- lld/include/lld/Common/Version.inc.in | 5 - lld/test/ELF/aarch64-call26-thunk.s | 10 +- .../ELF/aarch64-cortex-a53-843419-thunk-align.s | 74 + lld/test/ELF/aarch64-cortex-a53-843419-thunk.s | 13 +- lld/test/ELF/aarch64-jump26-thunk.s | 10 +- lld/test/ELF/aarch64-thunk-pi.s | 12 +- lld/test/ELF/aarch64-thunk-script.s | 18 +- lld/test/ELF/arm-fix-cortex-a8-thunk-align.s | 41 + lld/test/ELF/arm-fix-cortex-a8-thunk.s | 18 +- lld/test/ELF/dynamic-linker.s | 9 +- lld/test/ELF/ppc64-dtprel.s | 8 +- lld/test/ELF/ppc64-ifunc.s | 22 +- lld/test/ELF/ppc64-long-branch.s | 4 +- lld/test/ELF/ppc64-tls-gd.s | 18 +- lld/test/ELF/ppc64-toc-restore.s | 4 +- lld/test/wasm/signature-mismatch-export.ll | 2 +- lld/test/wasm/signature-mismatch.ll | 2 +- lld/wasm/SymbolTable.cpp | 2 +- lldb/CMakeLists.txt | 3 +- lldb/docs/use/map.rst | 32 + lldb/include/lldb/Core/Debugger.h | 2 +- .../TestDataFormatterObjCNSDate.py | 56 +- .../cmtime/TestDataFormatterCMTime.py | 16 +- .../data-formatter-objc/cmtime/main.m | 17 +- .../cross_dso/TestCrossDSOTailCalls.py | 3 +- .../cross_object/TestCrossObjectTailCalls.py | 3 +- .../test/lang/c/forward/TestForwardDeclaration.py | 2 +- lldb/scripts/swig_bot_lib/__init__.py | 0 lldb/source/API/SystemInitializerFull.cpp | 18 +- lldb/source/CMakeLists.txt | 4 +- lldb/source/Core/Debugger.cpp | 4 +- lldb/source/Expression/DWARFExpression.cpp | 24 +- lldb/source/Interpreter/CommandInterpreter.cpp | 2 +- .../Plugins/LanguageRuntime/Go/CMakeLists.txt | 11 - .../Plugins/ObjectFile/wasm/ObjectFileWasm.cpp | 23 + .../Plugins/ObjectFile/wasm/ObjectFileWasm.h | 291 +- lldb/source/Plugins/SymbolVendor/CMakeLists.txt | 1 + .../Plugins/SymbolVendor/wasm/CMakeLists.txt | 9 + .../Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp | 145 + .../Plugins/SymbolVendor/wasm/SymbolVendorWasm.h | 44 + lldb/source/Target/Target.cpp | 2 +- lldb/test/API/CMakeLists.txt | 1 - lldb/test/API/lit.site.cfg.py.in | 4 +- lldb/test/CMakeLists.txt | 4 + .../ObjectFile/wasm/unified-debug-sections.yaml | 85 + .../SymbolFile/DWARF/dwarf5-index-is-used.cpp | 2 +- .../SymbolFile/DWARF/dwarf5-partial-index.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-basic-function.cpp | 27 +- .../SymbolFile/DWARF/find-basic-namespace.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-basic-type.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-basic-variable.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-function-regex.cpp | 7 +- lldb/test/Shell/SymbolFile/DWARF/find-method.cpp | 10 +- .../Shell/SymbolFile/DWARF/find-variable-dwo.cpp | 11 +- .../Shell/SymbolFile/DWARF/find-variable-file.cpp | 11 +- lldb/tools/lldb-test/SystemInitializerTest.cpp | 45 +- lldb/unittests/Expression/DWARFExpressionTest.cpp | 28 +- lldb/utils/CMakeLists.txt | 2 + llvm/cmake/modules/LLVMConfig.cmake.in | 2 + llvm/docs/CMake.rst | 2 +- llvm/docs/ORCv2.rst | 187 +- llvm/include/llvm/ADT/IntervalMap.h | 2 +- llvm/include/llvm/ADT/PointerEmbeddedInt.h | 2 +- llvm/include/llvm/ADT/PointerIntPair.h | 3 +- .../llvm/Analysis/ScalarEvolutionExpressions.h | 2 +- llvm/include/llvm/Analysis/TargetLibraryInfo.h | 6 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 2 - llvm/include/llvm/Analysis/VectorUtils.h | 85 +- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 21 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 7 +- llvm/include/llvm/CodeGen/ReachingDefAnalysis.h | 24 +- llvm/include/llvm/CodeGen/TargetLowering.h | 21 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 19 +- llvm/include/llvm/IR/IntrinsicsHexagon.td | 6176 +------------- ...ntrinsicsHexagon.td => IntrinsicsHexagonDep.td} | 8383 ++++++++++---------- llvm/include/llvm/IR/Use.h | 4 +- llvm/include/llvm/Passes/PassBuilder.h | 54 +- llvm/include/llvm/Support/PointerLikeTypeTraits.h | 14 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 13 - llvm/include/llvm/Transforms/Scalar/GVN.h | 41 + .../include/llvm/Transforms/Scalar/JumpThreading.h | 5 + llvm/include/llvm/Transforms/Utils/SizeOpts.h | 16 +- llvm/lib/Analysis/GlobalsModRef.cpp | 2 +- llvm/lib/Analysis/LazyCallGraph.cpp | 8 +- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 2 +- llvm/lib/Analysis/ScalarEvolution.cpp | 16 +- llvm/lib/Analysis/VectorUtils.cpp | 1 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 94 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 393 +- llvm/lib/CodeGen/LivePhysRegs.cpp | 13 + llvm/lib/CodeGen/MachineVerifier.cpp | 23 +- llvm/lib/CodeGen/PHIElimination.cpp | 5 - llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 74 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 16 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 9 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 59 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 56 + llvm/lib/IR/BasicBlock.cpp | 9 +- llvm/lib/IR/Constants.cpp | 16 +- llvm/lib/LTO/LTOBackend.cpp | 8 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 1 - llvm/lib/MC/MCParser/AsmParser.cpp | 10 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 2 + llvm/lib/Passes/PassBuilder.cpp | 142 +- llvm/lib/Passes/PassRegistry.def | 6 +- llvm/lib/Target/AArch64/AArch64Combine.td | 9 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 76 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 14 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 4 +- .../Target/AArch64/AArch64PreLegalizerCombiner.cpp | 26 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 28 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 74 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 116 + llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 45 - llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 5 - llvm/lib/Target/AMDGPU/BUFInstructions.td | 18 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 18 - llvm/lib/Target/AMDGPU/VOP3Instructions.td | 46 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 58 +- llvm/lib/Target/ARM/ARMInstrThumb2.td | 1 + llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 375 +- llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 87 +- llvm/lib/Target/ARM/Utils/ARMBaseInfo.h | 16 - llvm/lib/Target/Hexagon/Hexagon.td | 31 +- llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 38 +- llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td | 32 +- llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 6067 +++++++------- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 12 +- llvm/lib/Target/Hexagon/HexagonPatterns.td | 25 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 2 + llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 7 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 12 - llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 14 - llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 4 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp | 11 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZISelLowering.h | 3 +- llvm/lib/Target/XCore/XCoreISelLowering.cpp | 2 +- llvm/lib/Target/XCore/XCoreISelLowering.h | 3 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 15 + llvm/lib/Transforms/Scalar/GVN.cpp | 40 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 234 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 20 +- llvm/lib/Transforms/Utils/InjectTLIMappings.cpp | 8 + llvm/lib/Transforms/Utils/LoopUnrollPeel.cpp | 6 +- llvm/lib/Transforms/Utils/ModuleUtils.cpp | 7 +- .../Vectorize/LoopVectorizationLegality.cpp | 29 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 32 +- .../AArch64/GlobalISel/combine-fconstant.mir | 73 + .../CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll | 2 +- .../GlobalISel/irtranslator-atomic-metadata.ll | 88 + .../GlobalISel/irtranslator-load-metadata.ll | 76 + .../GlobalISel/irtranslator-stackprotect-check.ll | 2 +- .../GlobalISel/irtranslator-store-metadata.ll | 52 + .../AArch64/GlobalISel/legalize-sext-zext-128.mir | 6 +- .../AArch64/GlobalISel/localizer-arm64-tti.ll | 2 +- .../CodeGen/AArch64/fastisel-debugvalue-undef.ll | 30 + .../AArch64/sve-intrinsics-pred-operations.ll | 97 + .../GlobalISel/irtranslator-function-args.ll | 16 +- .../CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir | 245 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 255 +- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 246 +- .../AMDGPU/GlobalISel/legalize-sext-inreg.mir | 1554 ++++ .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir | 298 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 246 +- .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 38 +- .../CodeGen/AMDGPU/GlobalISel/legalize-zext.mir | 272 +- .../GlobalISel/llvm.amdgcn.ds.gws.barrier.ll | 9 + .../AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.init.ll | 5 + .../GlobalISel/llvm.amdgcn.ds.gws.sema.br.ll | 5 + .../llvm.amdgcn.ds.gws.sema.release.all.ll | 8 + .../AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.v.ll | 5 + .../regbankselect-amdgcn-buffer-load.mir | 440 - llvm/test/CodeGen/AMDGPU/amdpal.ll | 4 +- .../CodeGen/AMDGPU/atomic_optimizations_buffer.ll | 45 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 12 +- .../CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 324 +- llvm/test/CodeGen/AMDGPU/else.ll | 6 +- llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll | 37 +- .../test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll | 36 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll | 44 +- llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll | 12 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 14 +- llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll | 12 +- .../AMDGPU/uniform-branch-intrinsic-cond.ll | 5 +- .../vgpr-descriptor-waterfall-loop-idom-update.ll | 7 +- .../AMDGPU/vgpr-spill-emergency-stack-slot.ll | 4 +- llvm/test/CodeGen/AMDGPU/wait.ll | 10 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 8 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 139 +- llvm/test/CodeGen/Hexagon/feature-compound.ll | 21 + .../Mips/GlobalISel/irtranslator/var_arg.ll | 8 +- llvm/test/CodeGen/Mips/uitofp.ll | 21 +- .../CodeGen/RISCV/subtarget-features-std-ext.ll | 11 +- .../CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir | 6 +- .../CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir | 4 +- .../Thumb2/LowOverheadLoops/disjoint-vcmp.mir | 95 +- .../LowOverheadLoops/dont-remove-loop-update.mir | 94 +- .../LowOverheadLoops/dont-remove-loop-update2.mir | 135 +- .../LowOverheadLoops/end-positive-offset.mir | 12 +- .../Thumb2/LowOverheadLoops/fast-fp-loops.ll | 11 +- .../Thumb2/LowOverheadLoops/incorrect-sub-16.mir | 165 + ...emove-loop-update3.mir => incorrect-sub-32.mir} | 102 +- .../Thumb2/LowOverheadLoops/incorrect-sub-8.mir | 166 + .../Thumb2/LowOverheadLoops/inloop-vpnot-1.mir | 6 +- .../Thumb2/LowOverheadLoops/inloop-vpnot-2.mir | 8 +- .../Thumb2/LowOverheadLoops/inloop-vpnot-3.mir | 8 +- .../Thumb2/LowOverheadLoops/inloop-vpsel-1.mir | 6 +- .../Thumb2/LowOverheadLoops/inloop-vpsel-2.mir | 6 +- .../CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll | 22 +- .../Thumb2/LowOverheadLoops/mov-after-dls.mir | 6 +- .../Thumb2/LowOverheadLoops/mov-lr-terminator.mir | 9 +- .../LowOverheadLoops/move-def-before-start.mir | 9 +- .../LowOverheadLoops/move-start-after-def.mir | 9 +- .../Thumb2/LowOverheadLoops/mve-tail-data-types.ll | 15 +- .../Thumb2/LowOverheadLoops/remove-elem-moves.mir | 323 + .../Thumb2/LowOverheadLoops/revert-while.mir | 6 +- .../Thumb2/LowOverheadLoops/safe-def-no-mov.mir | 8 +- .../CodeGen/Thumb2/LowOverheadLoops/size-limit.mir | 4 +- .../LowOverheadLoops/unsafe-cpsr-loop-use.mir | 9 +- .../Thumb2/LowOverheadLoops/unsafe-use-after.mir | 55 +- .../Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir | 70 +- .../Thumb2/LowOverheadLoops/vctp-in-vpt.mir | 60 +- ...dont-remove-loop-update3.mir => vctp-subi3.mir} | 90 +- ...dont-remove-loop-update2.mir => vctp-subri.mir} | 98 +- ...nt-remove-loop-update2.mir => vctp-subri12.mir} | 98 +- .../Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir | 11 +- .../Thumb2/LowOverheadLoops/vmldava_in_vpt.mir | 11 +- .../test/CodeGen/Thumb2/LowOverheadLoops/while.mir | 8 +- .../test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir | 26 +- .../CodeGen/Thumb2/mve-gather-ind16-unscaled.ll | 140 +- .../test/CodeGen/Thumb2/mve-gather-ind32-scaled.ll | 180 +- .../CodeGen/Thumb2/mve-gather-ind32-unscaled.ll | 350 +- llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll | 47 + .../x86_64-irtranslator-struct-return.ll | 38 +- .../X86/dbg-changes-codegen-phi-elimination.ll | 66 - llvm/test/MC/ARM/preserve-comments-arm.s | 2 +- .../test/MC/AsmParser/directive_case_insensitive.s | 16 + llvm/test/MC/AsmParser/preserve-comments.s | 2 +- llvm/test/Other/opt-O2-pipeline.ll | 2 + llvm/test/Other/opt-O3-pipeline.ll | 2 + llvm/test/Other/opt-Os-pipeline.ll | 2 + .../TableGen/GlobalISelEmitter-input-discard.td | 32 + llvm/test/Transforms/GVN/PRE/load-pre-align.ll | 1 + llvm/test/Transforms/GVN/PRE/local-pre.ll | 1 + llvm/test/Transforms/GVN/PRE/pre-basic-add.ll | 1 + llvm/test/Transforms/GVN/PRE/pre-gep-load.ll | 1 + llvm/test/Transforms/GVN/PRE/pre-load.ll | 1 + llvm/test/Transforms/GVN/PRE/pre-single-pred.ll | 1 + .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 80 +- .../Transforms/JumpThreading/thread-two-bbs1.ll | 59 + .../Transforms/JumpThreading/thread-two-bbs2.ll | 56 + .../Transforms/JumpThreading/thread-two-bbs3.ll | 39 + .../LoopPredication/unswitch-exit-loop.ll | 55 + llvm/test/Transforms/LoopUnroll/opt-levels.ll | 47 + .../Transforms/LoopUnroll/peel-loop-conditions.ll | 117 +- llvm/test/Transforms/LoopUnroll/peel-loop-nests.ll | 155 - .../test/Transforms/LoopUnrollAndJam/opt-levels.ll | 61 + .../extractvalue-no-scalarization-required.ll | 3 + .../StructurizeCFG/rebuild-ssa-infinite-loop.ll | 7 +- llvm/test/tools/llc/aix-pic-setting.ll | 9 + .../AArch64/extract-instrmap-aarch64-mangled.test | 14 + llvm/tools/llc/llc.cpp | 11 +- llvm/tools/llvm-exegesis/lib/Mips/Target.cpp | 51 + llvm/tools/llvm-nm/llvm-nm.cpp | 11 +- llvm/tools/llvm-xray/xray-extract.cpp | 10 +- llvm/unittests/ADT/PointerEmbeddedIntTest.cpp | 4 +- llvm/unittests/ADT/PointerIntPairTest.cpp | 32 +- llvm/unittests/Analysis/VectorFunctionABITest.cpp | 24 +- llvm/unittests/IR/ConstantsTest.cpp | 20 +- .../unittests/Target/PowerPC/AIXRelocModelTest.cpp | 39 + llvm/unittests/Target/PowerPC/CMakeLists.txt | 17 + .../llvm-exegesis/Mips/BenchmarkResultTest.cpp | 15 +- .../tools/llvm-exegesis/Mips/CMakeLists.txt | 1 + .../llvm-exegesis/Mips/RegisterAliasingTest.cpp | 74 + .../llvm-exegesis/Mips/SnippetGeneratorTest.cpp | 53 +- .../tools/llvm-exegesis/Mips/TargetTest.cpp | 19 +- llvm/unittests/tools/llvm-exegesis/Mips/TestBase.h | 42 + llvm/utils/GetRepositoryPath | 27 - llvm/utils/TableGen/GlobalISelEmitter.cpp | 4 + llvm/utils/gn/build/write_vcsrevision.gni | 12 +- llvm/utils/gn/build/write_vcsrevision.py | 53 +- .../clang-tools-extra/clang-tidy/bugprone/BUILD.gn | 1 + .../clang-tools-extra/clang-tidy/utils/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn | 4 +- llvm/utils/gn/secondary/lld/Common/BUILD.gn | 19 +- .../gn/secondary/lld/include/lld/Common/BUILD.gn | 10 +- llvm/utils/gn/secondary/llvm/unittests/BUILD.gn | 5 +- .../llvm/unittests/Target/PowerPC/BUILD.gn | 15 + .../unittests/tools/llvm-exegesis/Mips/BUILD.gn | 1 + llvm/utils/release/merge-git.sh | 91 - llvm/utils/release/merge.sh | 100 - llvm/utils/release/tag.sh | 145 - mlir/include/mlir/Dialect/SPIRV/CMakeLists.txt | 1 + .../mlir/Dialect/SPIRV/SPIRVAvailability.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td | 1099 ++- mlir/include/mlir/Dialect/SPIRV/SPIRVTypes.h | 20 +- mlir/include/mlir/Dialect/VectorOps/VectorOps.td | 2 +- mlir/include/mlir/EDSC/Builders.h | 13 + mlir/include/mlir/IR/Attributes.h | 4 +- mlir/include/mlir/IR/Function.h | 2 +- mlir/include/mlir/IR/Identifier.h | 2 +- mlir/include/mlir/IR/Location.h | 6 +- mlir/include/mlir/IR/Module.h | 2 +- mlir/include/mlir/IR/OperationSupport.h | 6 +- mlir/include/mlir/IR/Types.h | 2 +- mlir/include/mlir/IR/Value.h | 2 +- mlir/include/mlir/TableGen/Attribute.h | 1 + mlir/include/mlir/TableGen/ODSDialectHook.h | 42 - mlir/include/mlir/TableGen/Operator.h | 9 +- .../lib/Dialect/GPU/Transforms/MemoryPromotion.cpp | 2 +- mlir/lib/Dialect/Linalg/EDSC/Builders.cpp | 12 +- mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 1 + mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 16 +- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVTypes.cpp | 68 + mlir/lib/EDSC/Builders.cpp | 33 + mlir/lib/TableGen/Attribute.cpp | 7 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 71 +- mlir/test/Dialect/SPIRV/TestAvailability.cpp | 41 +- mlir/test/Dialect/SPIRV/availability.mlir | 4 +- mlir/test/Dialect/SPIRV/target-env.mlir | 84 +- mlir/test/EDSC/builder-api-test.cpp | 6 +- mlir/test/Target/llvmir-invalid.mlir | 10 +- mlir/test/Target/llvmir.mlir | 19 + mlir/test/lib/Transforms/CMakeLists.txt | 1 - mlir/test/lib/Transforms/TestLinalgTransforms.cpp | 1 - mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 37 +- mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp | 70 +- mlir/utils/spirv/define_inst.sh | 2 +- mlir/utils/spirv/gen_spirv_dialect.py | 136 +- openmp/tools/archer/ompt-tsan.cpp | 9 +- polly/include/polly/CodeGen/IslExprBuilder.h | 2 +- 446 files changed, 21463 insertions(+), 22108 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.h create mode 100644 clang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone-reserved-iden [...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/cert-dcl37-c.rst create mode 100644 clang-tools-extra/docs/clang-tidy/checks/cert-dcl51-cpp.rst create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/bugprone-rese [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/bugprone-rese [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-id [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-id [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-reserved-id [...] create mode 100644 clang/include/clang/Basic/BuiltinsHexagonDep.def create mode 100644 clang/test/CodeGen/memcpy-nobuiltin.c create mode 100644 clang/test/CodeGen/memcpy-nobuiltin.inc delete mode 100644 clang/test/Modules/Inputs/implicit-invalidate-chain/A.h delete mode 100644 clang/test/Modules/Inputs/implicit-invalidate-chain/B.h delete mode 100644 clang/test/Modules/Inputs/implicit-invalidate-chain/C.h delete mode 100644 clang/test/Modules/Inputs/implicit-invalidate-chain/module.modulemap delete mode 100644 clang/test/Modules/implicit-invalidate-chain.c create mode 100644 clang/test/Parser/explicit-bool.cpp create mode 100644 compiler-rt/lib/scudo/standalone/memtag.h create mode 100644 lld/test/ELF/aarch64-cortex-a53-843419-thunk-align.s create mode 100644 lld/test/ELF/arm-fix-cortex-a8-thunk-align.s delete mode 100644 lldb/scripts/swig_bot_lib/__init__.py delete mode 100644 lldb/source/Plugins/LanguageRuntime/Go/CMakeLists.txt create mode 100644 lldb/source/Plugins/SymbolVendor/wasm/CMakeLists.txt create mode 100644 lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp create mode 100644 lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.h create mode 100644 lldb/test/Shell/ObjectFile/wasm/unified-debug-sections.yaml create mode 100644 lldb/utils/CMakeLists.txt copy llvm/include/llvm/IR/{IntrinsicsHexagon.td => IntrinsicsHexagonDep.td} (76%) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/combine-fconstant.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-atomic-metadata.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-load-metadata.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll create mode 100644 llvm/test/CodeGen/AArch64/fastisel-debugvalue-undef.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.barrier.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.init.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.br.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.rel [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.v.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-buffer [...] create mode 100644 llvm/test/CodeGen/Hexagon/feature-compound.ll create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-16.mir copy llvm/test/CodeGen/Thumb2/LowOverheadLoops/{dont-remove-loop-update3.mir => in [...] create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-8.mir create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir rename llvm/test/CodeGen/Thumb2/LowOverheadLoops/{dont-remove-loop-update3.mir => [...] copy llvm/test/CodeGen/Thumb2/LowOverheadLoops/{dont-remove-loop-update2.mir => vc [...] copy llvm/test/CodeGen/Thumb2/LowOverheadLoops/{dont-remove-loop-update2.mir => vc [...] delete mode 100644 llvm/test/CodeGen/X86/dbg-changes-codegen-phi-elimination.ll create mode 100644 llvm/test/MC/AsmParser/directive_case_insensitive.s create mode 100644 llvm/test/TableGen/GlobalISelEmitter-input-discard.td create mode 100644 llvm/test/Transforms/JumpThreading/thread-two-bbs1.ll create mode 100644 llvm/test/Transforms/JumpThreading/thread-two-bbs2.ll create mode 100644 llvm/test/Transforms/JumpThreading/thread-two-bbs3.ll create mode 100644 llvm/test/Transforms/LoopPredication/unswitch-exit-loop.ll create mode 100644 llvm/test/Transforms/LoopUnroll/opt-levels.ll delete mode 100644 llvm/test/Transforms/LoopUnroll/peel-loop-nests.ll create mode 100644 llvm/test/Transforms/LoopUnrollAndJam/opt-levels.ll create mode 100644 llvm/test/tools/llc/aix-pic-setting.ll create mode 100644 llvm/test/tools/llvm-xray/AArch64/extract-instrmap-aarch64-mang [...] create mode 100644 llvm/unittests/Target/PowerPC/AIXRelocModelTest.cpp create mode 100644 llvm/unittests/Target/PowerPC/CMakeLists.txt create mode 100644 llvm/unittests/tools/llvm-exegesis/Mips/RegisterAliasingTest.cpp create mode 100644 llvm/unittests/tools/llvm-exegesis/Mips/TestBase.h delete mode 100755 llvm/utils/GetRepositoryPath create mode 100644 llvm/utils/gn/secondary/llvm/unittests/Target/PowerPC/BUILD.gn delete mode 100755 llvm/utils/release/merge-git.sh delete mode 100755 llvm/utils/release/merge.sh delete mode 100755 llvm/utils/release/tag.sh delete mode 100644 mlir/include/mlir/TableGen/ODSDialectHook.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (c938fdc3 -> 6c1f5db4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards c938fdc3 2: update: llvm-linux: 18251 new 6c1f5db4 2: update: llvm-linux: 18251 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c938fdc3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 154 +- 02-build_llvm/console.log | 12651 +++++++++++++++++------------------ 03-build_linux/console.log | 834 +-- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 6 +- console.log | 13647 +++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- 7 files changed, 13655 insertions(+), 13653 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (0bb3f83fdc4 -> f158d9197de)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/gcc. from 0bb3f83fdc4 Daily bump. adds 26b2838fc9b Daily bump. adds f158d9197de Fortran: PR93263 -fno-automatic and RECURSIVE No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/fortran/ChangeLog | 11 +++++++++++ gcc/fortran/resolve.c | 3 ++- gcc/testsuite/ChangeLog | 9 +++++++++ gcc/testsuite/gfortran.dg/pr93263_1.f90 | 29 +++++++++++++++++++++++++++++ gcc/testsuite/gfortran.dg/pr93263_2.f90 | 24 ++++++++++++++++++++++++ 6 files changed, 76 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/pr93263_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93263_2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (b6638ccf -> ea40ecad)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/base-artifacts. discards b6638ccf 0: update: binutils-gcc-linux: boot new ea40ecad 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b6638ccf) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-prepare_abe/console.log | 434 +- 03-build_abe-binutils/console.log | 10986 ++++++++------- 04-build_abe-stage1/console.log | 13700 +++++++++---------- 05-build_linux/console.log | 727 +- 06-boot_linux/console.log | 444 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 16 +- console.log | 26532 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- results | 2 +- 11 files changed, 26560 insertions(+), 26489 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (1c2755a6a6b -> 5f0303833d5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/gcc. from 1c2755a6a6b Fix spacing in a dump in value-prof.c. adds 545f5fad17f contrib: Check and if needed set user.name and user.email i [...] adds 8c197c851e7 [GCC][PATCH][AArch64]Add ACLE intrinsics for dot product (u [...] adds d916538965e libstdc++: Improve unordered containers == operator (PR 91263) adds f275d73a57f [GCC][PATCH][AArch64]Add ACLE intrinsics for bfdot for ARMv [...] adds 7aa4e0db959 gcc-git-customization.sh: avoid double expansion adds 66aae15b4ed gcc-git-customization.sh: Avoid double expansion adds e953433f089 [PATCH, GCC/ARM, 1/10] Fix -mcmse check in libgcc adds e27cf2e3726 [PATCH, GCC/ARM, 2/10] Add command line support for Armv8.1 [...] adds e0e4be48a98 [PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry functions adds 9722215a027 [PATCH, GCC/ARM, 4/10] Clear GPR with CLRM adds 0b1c7b27a7d [PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRM adds 2d924ca6203 [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscal [...] adds 1e4f3696a24 [PATCH, GCC/ARM, 7/10] Clear all VFP regs inline in hardflo [...] adds 0ab81d9cc73 [PATCH, GCC/ARM, 8/10] Do lazy store & load inline when cal [...] adds a464ffc2156 [PATCH, GCC/ARM, 9/10] Call nscall function with blxns adds 4747e2ccec9 [PATCH, GCC/ARM, 10/10] Enable -mcmse adds 7b4c373beb3 Add CLI and multilib support for Armv8.1-M Mainline MVE extensions adds 2e87b2f4121 [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 3ea9140170b [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 98d56ea8900 libstdc++: std::ctype fixes for recent versions of NetBSD adds f48c6014133 Fix noreorder symbol partitioning reversion. adds 801f5b96775 PR c++/93280 - ICE with aggregate assignment and DMI. adds f5b25e15165 Make profile estimation more precise adds 852f0ae8055 Fix ICE caused by swallowing a token in c_parser_consume_token adds b6a0ebd1920 Extern -param=max-predicted-iterations range. adds 1113de9499d Daily bump. adds 5194b51ed97 PR c++/93286 - ICE with __is_constructible and variadic template. adds f17f6127f8e contrib/gcc_update: Insert "tformat:" for git log --pretty= [...] adds 2b3534a3122 ChangeLog fixes. adds 40111910b0a testsuite: Unbreak compat.exp testing with alt compiler PR93294 adds dc9ba9d045d vect: Fix ICE in vectorizable_comparison PR93292 adds e4a5f73449d PATCH] Fortran: PR93263 -fno-automatic and RECURSIVE adds 507de5ee23e gimplifier: handle POLY_INT_CST-sized TARGET_EXPRs adds 865257c447c aarch64: Don't raise FE_INVALID for -__builtin_isgreater [PR93133] adds f788c2d66a6 Add PR number to change log adds e5e07b68187 [AArch64] Fix shrinkwrapping interactions with atomics (PR92692) adds 5f0303833d5 analyzer: fix handling of negative byte offsets (v2) (PR 93281) No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 15 + contrib/gcc-git-customization.sh | 65 ++- contrib/gcc_update | 2 +- gcc/ChangeLog | 271 +++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 9 + gcc/analyzer/region-model.cc | 10 +- gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 6 +- gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.c | 45 +- gcc/config/aarch64/aarch64-simd-builtins.def | 10 + gcc/config/aarch64/aarch64-simd.md | 66 +++ gcc/config/aarch64/aarch64.c | 36 +- gcc/config/aarch64/aarch64.h | 10 +- gcc/config/aarch64/aarch64.md | 64 ++- gcc/config/aarch64/arm_neon.h | 134 +++++ gcc/config/aarch64/atomics.md | 20 +- gcc/config/aarch64/iterators.md | 23 + gcc/config/arm/arm-builtins.c | 33 +- gcc/config/arm/arm-cpus.in | 48 +- gcc/config/arm/arm-modes.def | 5 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm-simd-builtin-types.def | 2 + gcc/config/arm/arm-tables.opt | 2 +- gcc/config/arm/arm.c | 623 +++++++++++++++++---- gcc/config/arm/arm.h | 41 +- gcc/config/arm/arm.md | 56 +- gcc/config/arm/arm_bf16.h | 41 ++ gcc/config/arm/arm_neon.h | 4 + gcc/config/arm/iterators.md | 22 +- gcc/config/arm/neon.md | 8 +- gcc/config/arm/predicates.md | 12 + gcc/config/arm/t-rmprofile | 17 +- gcc/config/arm/thumb2.md | 66 ++- gcc/config/arm/unspecs.md | 8 + gcc/config/arm/vfp.md | 162 ++++-- gcc/cp/ChangeLog | 10 + gcc/cp/init.c | 4 + gcc/cp/pt.c | 74 ++- gcc/cp/typeck2.c | 3 - gcc/doc/invoke.texi | 24 + gcc/fortran/ChangeLog | 8 + gcc/fortran/resolve.c | 3 +- gcc/gimplify.c | 6 +- gcc/ipa-fnsummary.c | 2 +- gcc/lto/ChangeLog | 6 + gcc/lto/lto-partition.c | 3 + gcc/params.opt | 2 +- gcc/predict.c | 102 ++-- gcc/profile-count.c | 9 + gcc/profile-count.h | 5 +- gcc/testsuite/ChangeLog | 345 ++++++++++++ gcc/testsuite/c-c++-common/pr92833-1.c | 4 + gcc/testsuite/c-c++-common/pr92833-2.c | 4 + gcc/testsuite/c-c++-common/pr92833-3.c | 4 + gcc/testsuite/c-c++-common/pr92833-4.c | 7 + gcc/testsuite/g++.dg/abi/mangle-neon.C | 5 + gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C | 13 + gcc/testsuite/g++.dg/ext/is_constructible4.C | 18 + gcc/testsuite/g++.dg/opt/pr93292.C | 18 + .../aarch64/sve/acle/general-c++/gimplify_1.C | 4 + .../g++.target/arm/bfloat_cpp_typecheck.C | 14 + gcc/testsuite/gcc.dg/torture/pr93133.c | 41 ++ .../aarch64/advsimd-intrinsics/bfdot-1.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-2.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-3.c | 28 + .../aarch64/advsimd-intrinsics/vdot-3-1.c | 136 +++++ .../aarch64/advsimd-intrinsics/vdot-3-2.c | 137 +++++ .../aarch64/advsimd-intrinsics/vdot-3-3.c | 31 + .../aarch64/advsimd-intrinsics/vdot-3-4.c | 31 + gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c | 118 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c | 16 + .../gcc.target/arm/bfloat16_scalar_typecheck.c | 219 ++++++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c | 91 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 94 ++++ .../gcc.target/arm/bfloat16_vector_typecheck_1.c | 263 +++++++++ .../gcc.target/arm/bfloat16_vector_typecheck_2.c | 252 +++++++++ gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c | 5 +- gcc/testsuite/gcc.target/arm/cmse/cmse-1.c | 18 +- gcc/testsuite/gcc.target/arm/cmse/cmse-14.c | 15 +- gcc/testsuite/gcc.target/arm/cmse/cmse-15.c | 7 +- gcc/testsuite/gcc.target/arm/cmse/cmse.exp | 43 +- .../gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c | 25 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c | 20 + .../arm/cmse/mainline/8_1m/bitfield-and-union.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-13.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/hard/cmse-13.c | 32 ++ .../arm/cmse/mainline/8_1m/hard/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/soft/cmse-13.c | 29 + .../arm/cmse/mainline/8_1m/soft/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/soft/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/soft/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c | 14 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/softfp/cmse-13.c | 28 + .../arm/cmse/mainline/8_1m/softfp/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/softfp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp/cmse-8.c | 27 + .../gcc.target/arm/cmse/mainline/8_1m/union-1.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/union-2.c | 27 + .../arm/cmse/mainline/{ => 8m}/bitfield-4.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-5.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-6.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-7.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-8.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-9.c | 2 +- .../cmse/mainline/{ => 8m}/bitfield-and-union.c | 2 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-13.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-5.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c | 10 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/union-1.c | 3 +- .../arm/cmse/mainline/{ => 8m}/union-2.c | 2 +- gcc/testsuite/gcc.target/arm/cmse/struct-1.c | 6 +- gcc/testsuite/gcc.target/arm/multilib.exp | 21 + gcc/testsuite/gfortran.dg/pr93263_1.f90 | 29 + gcc/testsuite/gfortran.dg/pr93263_2.f90 | 24 + gcc/testsuite/lib/c-compat.exp | 10 + gcc/testsuite/lib/target-supports.exp | 16 +- gcc/tree-vect-stmts.c | 2 +- libgcc/ChangeLog | 6 + libgcc/config/arm/t-arm | 2 +- libstdc++-v3/ChangeLog | 31 + libstdc++-v3/config/os/bsd/netbsd/ctype_base.h | 40 +- .../config/os/bsd/netbsd/ctype_configure_char.cc | 12 +- libstdc++-v3/config/os/bsd/netbsd/ctype_inline.h | 2 +- libstdc++-v3/include/bits/hashtable.h | 7 + libstdc++-v3/include/bits/hashtable_policy.h | 127 ++--- .../unordered_multiset/operators/1.cc | 56 ++ .../23_containers/unordered_set/operators/1.cc | 48 ++ 167 files changed, 6056 insertions(+), 529 deletions(-) create mode 100644 gcc/config/arm/arm_bf16.h create mode 100644 gcc/testsuite/c-c++-common/pr92833-1.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-2.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-3.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-4.c create mode 100644 gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible4.C create mode 100644 gcc/testsuite/g++.dg/opt/pr93292.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/gimplify_1.C create mode 100644 gcc/testsuite/g++.target/arm/bfloat_cpp_typecheck.C create mode 100644 gcc/testsuite/gcc.dg/torture/pr93133.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_typecheck.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_2.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-4.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-5.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-6.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-7.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-8.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-9.c (94%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-and-union.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-13.c (90%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-7.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-8.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-13.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-5.c (79%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c (65%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-1.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-2.c (96%) create mode 100644 gcc/testsuite/gfortran.dg/pr93263_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93263_2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (6d0be74bfa -> bf8e4b6c81)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/binutils-gdb. from 6d0be74bfa MSP430: Remove unused linker script template elf32msp430_3.sc adds 2da2eaf4ce [binutils][arm] PR25376 Change MVE into a CORE_HIGH feature adds 3112ed9799 Support for DWARF5 location lists entries adds 701adfb009 [gdb] Move ChangeLog entries to their right files adds 790f17188a Ensure proc-service symbols have default visibility (PR buil [...] adds e0cdfe3c14 Add type for $_tlb->process_environment_block->process_parameters adds 40c9409927 Fix some spelling errors. adds bf8e4b6c81 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gas/ChangeLog | 10 + gas/config/tc-arm.c | 13 +- gdb/ChangeLog | 30 +++ gdb/ChangeLog-1992 | 43 ---- gdb/ChangeLog-1993 | 52 ++--- gdb/ChangeLog-1995 | 3 - gdb/ChangeLog-1996 | 8 +- gdb/ChangeLog-1998 | 6 +- gdb/ChangeLog-1999 | 15 +- gdb/ChangeLog-2000 | 8 +- gdb/ChangeLog-2001 | 8 +- gdb/ChangeLog-2002 | 30 +-- gdb/ChangeLog-2003 | 10 +- gdb/ChangeLog-2004 | 8 +- gdb/ChangeLog-2005 | 1 - gdb/ChangeLog-2006 | 19 +- gdb/ChangeLog-2007 | 12 +- gdb/ChangeLog-2008 | 9 +- gdb/ChangeLog-2009 | 14 +- gdb/ChangeLog-2010 | 10 +- gdb/ChangeLog-2011 | 20 +- gdb/ChangeLog-2012 | 8 +- gdb/ChangeLog-2013 | 6 +- gdb/ChangeLog-2014 | 9 +- gdb/ChangeLog-2015 | 35 ++- gdb/ChangeLog-2016 | 4 +- gdb/ChangeLog-2017 | 19 +- gdb/ChangeLog-2018 | 56 ++--- gdb/ChangeLog-2019 | 74 +++--- gdb/btrace.c | 4 +- gdb/charset.c | 2 +- gdb/doc/ChangeLog | 217 ++++++++++++++++++ gdb/dwarf2loc.c | 39 ++++ gdb/nat/linux-btrace.c | 2 +- gdb/python/py-record-btrace.c | 2 +- gdb/record-btrace.c | 2 +- gdb/testsuite/ChangeLog | 15 ++ gdb/testsuite/ChangeLog-1993-2013 | 52 ++++- gdb/testsuite/lib/gdb.exp | 2 +- gdb/windows-tdep.c | 61 ++++- gdbsupport/gdb_proc_service.h | 29 +++ include/ChangeLog | 8 + include/opcode/arm.h | 7 +- opcodes/ChangeLog | 9 + opcodes/arm-dis.c | 471 +++++++++++++++++++------------------- 46 files changed, 898 insertions(+), 566 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (a02ea239 -> 4cf057f0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards a02ea239 0: update: binutils-gcc-linux: all new 4cf057f0 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a02ea239) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 162 +- 02-prepare_abe/console.log | 394 +- 03-build_abe-binutils/console.log | 11502 ++++++------ 04-build_abe-stage1/console.log | 15710 ++++++++--------- 05-build_linux/console.log | 6094 +++---- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 33864 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 10 files changed, 33899 insertions(+), 33847 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig updated (1c2755a6a6b -> 5f0303833d5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig in repository toolchain/ci/gcc. from 1c2755a6a6b Fix spacing in a dump in value-prof.c. adds 545f5fad17f contrib: Check and if needed set user.name and user.email i [...] adds 8c197c851e7 [GCC][PATCH][AArch64]Add ACLE intrinsics for dot product (u [...] adds d916538965e libstdc++: Improve unordered containers == operator (PR 91263) adds f275d73a57f [GCC][PATCH][AArch64]Add ACLE intrinsics for bfdot for ARMv [...] adds 7aa4e0db959 gcc-git-customization.sh: avoid double expansion adds 66aae15b4ed gcc-git-customization.sh: Avoid double expansion adds e953433f089 [PATCH, GCC/ARM, 1/10] Fix -mcmse check in libgcc adds e27cf2e3726 [PATCH, GCC/ARM, 2/10] Add command line support for Armv8.1 [...] adds e0e4be48a98 [PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry functions adds 9722215a027 [PATCH, GCC/ARM, 4/10] Clear GPR with CLRM adds 0b1c7b27a7d [PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRM adds 2d924ca6203 [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscal [...] adds 1e4f3696a24 [PATCH, GCC/ARM, 7/10] Clear all VFP regs inline in hardflo [...] adds 0ab81d9cc73 [PATCH, GCC/ARM, 8/10] Do lazy store & load inline when cal [...] adds a464ffc2156 [PATCH, GCC/ARM, 9/10] Call nscall function with blxns adds 4747e2ccec9 [PATCH, GCC/ARM, 10/10] Enable -mcmse adds 7b4c373beb3 Add CLI and multilib support for Armv8.1-M Mainline MVE extensions adds 2e87b2f4121 [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 3ea9140170b [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 98d56ea8900 libstdc++: std::ctype fixes for recent versions of NetBSD adds f48c6014133 Fix noreorder symbol partitioning reversion. adds 801f5b96775 PR c++/93280 - ICE with aggregate assignment and DMI. adds f5b25e15165 Make profile estimation more precise adds 852f0ae8055 Fix ICE caused by swallowing a token in c_parser_consume_token adds b6a0ebd1920 Extern -param=max-predicted-iterations range. adds 1113de9499d Daily bump. adds 5194b51ed97 PR c++/93286 - ICE with __is_constructible and variadic template. adds f17f6127f8e contrib/gcc_update: Insert "tformat:" for git log --pretty= [...] adds 2b3534a3122 ChangeLog fixes. adds 40111910b0a testsuite: Unbreak compat.exp testing with alt compiler PR93294 adds dc9ba9d045d vect: Fix ICE in vectorizable_comparison PR93292 adds e4a5f73449d PATCH] Fortran: PR93263 -fno-automatic and RECURSIVE adds 507de5ee23e gimplifier: handle POLY_INT_CST-sized TARGET_EXPRs adds 865257c447c aarch64: Don't raise FE_INVALID for -__builtin_isgreater [PR93133] adds f788c2d66a6 Add PR number to change log new e5e07b68187 [AArch64] Fix shrinkwrapping interactions with atomics (PR92692) new 5f0303833d5 analyzer: fix handling of negative byte offsets (v2) (PR 93281) The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: contrib/ChangeLog | 15 + contrib/gcc-git-customization.sh | 65 ++- contrib/gcc_update | 2 +- gcc/ChangeLog | 271 +++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 9 + gcc/analyzer/region-model.cc | 10 +- gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 6 +- gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.c | 45 +- gcc/config/aarch64/aarch64-simd-builtins.def | 10 + gcc/config/aarch64/aarch64-simd.md | 66 +++ gcc/config/aarch64/aarch64.c | 36 +- gcc/config/aarch64/aarch64.h | 10 +- gcc/config/aarch64/aarch64.md | 64 ++- gcc/config/aarch64/arm_neon.h | 134 +++++ gcc/config/aarch64/atomics.md | 20 +- gcc/config/aarch64/iterators.md | 23 + gcc/config/arm/arm-builtins.c | 33 +- gcc/config/arm/arm-cpus.in | 48 +- gcc/config/arm/arm-modes.def | 5 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm-simd-builtin-types.def | 2 + gcc/config/arm/arm-tables.opt | 2 +- gcc/config/arm/arm.c | 623 +++++++++++++++++---- gcc/config/arm/arm.h | 41 +- gcc/config/arm/arm.md | 56 +- gcc/config/arm/arm_bf16.h | 41 ++ gcc/config/arm/arm_neon.h | 4 + gcc/config/arm/iterators.md | 22 +- gcc/config/arm/neon.md | 8 +- gcc/config/arm/predicates.md | 12 + gcc/config/arm/t-rmprofile | 17 +- gcc/config/arm/thumb2.md | 66 ++- gcc/config/arm/unspecs.md | 8 + gcc/config/arm/vfp.md | 162 ++++-- gcc/cp/ChangeLog | 10 + gcc/cp/init.c | 4 + gcc/cp/pt.c | 74 ++- gcc/cp/typeck2.c | 3 - gcc/doc/invoke.texi | 24 + gcc/fortran/ChangeLog | 8 + gcc/fortran/resolve.c | 3 +- gcc/gimplify.c | 6 +- gcc/ipa-fnsummary.c | 2 +- gcc/lto/ChangeLog | 6 + gcc/lto/lto-partition.c | 3 + gcc/params.opt | 2 +- gcc/predict.c | 102 ++-- gcc/profile-count.c | 9 + gcc/profile-count.h | 5 +- gcc/testsuite/ChangeLog | 345 ++++++++++++ gcc/testsuite/c-c++-common/pr92833-1.c | 4 + gcc/testsuite/c-c++-common/pr92833-2.c | 4 + gcc/testsuite/c-c++-common/pr92833-3.c | 4 + gcc/testsuite/c-c++-common/pr92833-4.c | 7 + gcc/testsuite/g++.dg/abi/mangle-neon.C | 5 + gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C | 13 + gcc/testsuite/g++.dg/ext/is_constructible4.C | 18 + gcc/testsuite/g++.dg/opt/pr93292.C | 18 + .../aarch64/sve/acle/general-c++/gimplify_1.C | 4 + .../g++.target/arm/bfloat_cpp_typecheck.C | 14 + gcc/testsuite/gcc.dg/torture/pr93133.c | 41 ++ .../aarch64/advsimd-intrinsics/bfdot-1.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-2.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-3.c | 28 + .../aarch64/advsimd-intrinsics/vdot-3-1.c | 136 +++++ .../aarch64/advsimd-intrinsics/vdot-3-2.c | 137 +++++ .../aarch64/advsimd-intrinsics/vdot-3-3.c | 31 + .../aarch64/advsimd-intrinsics/vdot-3-4.c | 31 + gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c | 118 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c | 16 + .../gcc.target/arm/bfloat16_scalar_typecheck.c | 219 ++++++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c | 91 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 94 ++++ .../gcc.target/arm/bfloat16_vector_typecheck_1.c | 263 +++++++++ .../gcc.target/arm/bfloat16_vector_typecheck_2.c | 252 +++++++++ gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c | 5 +- gcc/testsuite/gcc.target/arm/cmse/cmse-1.c | 18 +- gcc/testsuite/gcc.target/arm/cmse/cmse-14.c | 15 +- gcc/testsuite/gcc.target/arm/cmse/cmse-15.c | 7 +- gcc/testsuite/gcc.target/arm/cmse/cmse.exp | 43 +- .../gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c | 25 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c | 20 + .../arm/cmse/mainline/8_1m/bitfield-and-union.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-13.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/hard/cmse-13.c | 32 ++ .../arm/cmse/mainline/8_1m/hard/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/soft/cmse-13.c | 29 + .../arm/cmse/mainline/8_1m/soft/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/soft/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/soft/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c | 14 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/softfp/cmse-13.c | 28 + .../arm/cmse/mainline/8_1m/softfp/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/softfp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp/cmse-8.c | 27 + .../gcc.target/arm/cmse/mainline/8_1m/union-1.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/union-2.c | 27 + .../arm/cmse/mainline/{ => 8m}/bitfield-4.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-5.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-6.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-7.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-8.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-9.c | 2 +- .../cmse/mainline/{ => 8m}/bitfield-and-union.c | 2 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-13.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-5.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c | 10 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/union-1.c | 3 +- .../arm/cmse/mainline/{ => 8m}/union-2.c | 2 +- gcc/testsuite/gcc.target/arm/cmse/struct-1.c | 6 +- gcc/testsuite/gcc.target/arm/multilib.exp | 21 + gcc/testsuite/gfortran.dg/pr93263_1.f90 | 29 + gcc/testsuite/gfortran.dg/pr93263_2.f90 | 24 + gcc/testsuite/lib/c-compat.exp | 10 + gcc/testsuite/lib/target-supports.exp | 16 +- gcc/tree-vect-stmts.c | 2 +- libgcc/ChangeLog | 6 + libgcc/config/arm/t-arm | 2 +- libstdc++-v3/ChangeLog | 31 + libstdc++-v3/config/os/bsd/netbsd/ctype_base.h | 40 +- .../config/os/bsd/netbsd/ctype_configure_char.cc | 12 +- libstdc++-v3/config/os/bsd/netbsd/ctype_inline.h | 2 +- libstdc++-v3/include/bits/hashtable.h | 7 + libstdc++-v3/include/bits/hashtable_policy.h | 127 ++--- .../unordered_multiset/operators/1.cc | 56 ++ .../23_containers/unordered_set/operators/1.cc | 48 ++ 167 files changed, 6056 insertions(+), 529 deletions(-) create mode 100644 gcc/config/arm/arm_bf16.h create mode 100644 gcc/testsuite/c-c++-common/pr92833-1.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-2.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-3.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-4.c create mode 100644 gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible4.C create mode 100644 gcc/testsuite/g++.dg/opt/pr93292.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/gimplify_1.C create mode 100644 gcc/testsuite/g++.target/arm/bfloat_cpp_typecheck.C create mode 100644 gcc/testsuite/gcc.dg/torture/pr93133.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_typecheck.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_2.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-4.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-5.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-6.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-7.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-8.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-9.c (94%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-and-union.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-13.c (90%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-7.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-8.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-13.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-5.c (79%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c (65%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-1.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-2.c (96%) create mode 100644 gcc/testsuite/gfortran.dg/pr93263_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93263_2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig updated (6d0be74bfa -> bd267fd1f9)

by git＠git.linaro.org

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig updated (1ef89751 -> ebabb397)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 1ef89751 0: update: binutils-gcc-linux: all new ebabb397 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1ef89751) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 442 +- 03-build_abe-binutils/console.log | 10891 ++++++------ 04-build_abe-stage1/console.log | 20148 +++++++++++----------- 05-build_linux/console.log | 738 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 32469 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 10 files changed, 32480 insertions(+), 32394 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits January 2020