Tcwg-commits January 2020

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[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_tk1/gnu-master-arm-spec2k6-O2_LTO updated (a8f0fc4e5f -> def9c08c94)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/gnu-master-arm-spec2k6-O2_LTO in repository toolchain/ci/glibc. from a8f0fc4e5f htl: Add internal version of __pthread_mutex_timedlock adds 791a08cf37 Update Translations adds 5177d85b0c Clear GL(dl_initfirst) when freeing its link_map memory [BZ# 25396] adds a332bd1518 elf: Add elf/tst-dlopenfail-2 [BZ #25396] adds a9ed2b2747 vcs-to-changelog: Add quirk for __nonnull adds def9c08c94 Revert outdated translations No new revisions were added by this update. Summary of changes: elf/Makefile | 9 +- elf/dl-close.c | 4 + elf/{tst-dlopenfail.c => tst-dlopenfail-2.c} | 40 +- .../tst-abi-fp64mod.c => elf/tst-dlopenfailmod3.c | 9 +- po/ca.po | 539 ++--- po/de.po | 140 +- po/fi.po | 316 +-- po/fr.po | 2100 +++++++++----------- po/hr.po | 169 +- po/ko.po | 218 +- po/ru.po | 20 +- po/sv.po | 144 +- po/tr.po | 1301 +++++------- po/vi.po | 118 +- po/zh_TW.po | 31 +- scripts/vcs_to_changelog/vcstocl_quirks.py | 2 + 16 files changed, 2167 insertions(+), 2993 deletions(-) copy elf/{tst-dlopenfail.c => tst-dlopenfail-2.c} (58%) copy sysdeps/mips/tst-abi-fp64mod.c => elf/tst-dlopenfailmod3.c (87%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tk1/gnu-master-arm-spec2k6-O2_LTO updated (ea1966e88ec -> f17f6127f8e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/gnu-master-arm-spec2k6-O2_LTO in repository toolchain/ci/gcc. from ea1966e88ec Remove invalid SSE2 ISA requirements in *movsf_internal. adds 2a0f6c61b4d libstdc++: Fix weakly_incrementable to allow __int128 (PR 93267) adds bc071d3a951 Fix ctz issues (PR93231) adds 7192b1ec124 PR c++/92871 - bad code with xvalue and GNU ?: extension. adds 596334fa040 PR c++/93257 - consteval void function. adds 299ddc61213 Revert "PR c++/33799 - destroy return value if local cleanu [...] adds 83fe2b92183 Fix "PR c++/91073 if constexpr no longer works directly wit [...] adds 49e9a9996ab analyzer: fix comment adds 5b6681201ae analyzer: add note about -fdump-ipa-analyzer to internal docs adds 03647d2e261 Daily bump. adds c35a3046247 PR93253 – Document BOZ changes, make it friendlier in legacy code adds 5c06093ce90 aarch64: Fix BE SVE mode punning involving floats adds 3b5757ea87a Work around array out of bounds warning in mkdeps adds f7dff7699fd PR tree-optimization/92429 do not fold when updating epilog [...] adds 2588197b6c2 contrib: Verify the id to be printed is ancestor of the cor [...] adds 55c7ffae702 Fix uninitialized field in expand_operand. adds 7c6056d52ef Uninitialized padding in struct _dep. adds 2db99ef7896 Fix value numbering dealing with reverse byte order adds 1c2755a6a6b Fix spacing in a dump in value-prof.c. adds 545f5fad17f contrib: Check and if needed set user.name and user.email i [...] adds 8c197c851e7 [GCC][PATCH][AArch64]Add ACLE intrinsics for dot product (u [...] adds d916538965e libstdc++: Improve unordered containers == operator (PR 91263) adds f275d73a57f [GCC][PATCH][AArch64]Add ACLE intrinsics for bfdot for ARMv [...] adds 7aa4e0db959 gcc-git-customization.sh: avoid double expansion adds 66aae15b4ed gcc-git-customization.sh: Avoid double expansion adds e953433f089 [PATCH, GCC/ARM, 1/10] Fix -mcmse check in libgcc adds e27cf2e3726 [PATCH, GCC/ARM, 2/10] Add command line support for Armv8.1 [...] adds e0e4be48a98 [PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry functions adds 9722215a027 [PATCH, GCC/ARM, 4/10] Clear GPR with CLRM adds 0b1c7b27a7d [PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRM adds 2d924ca6203 [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscal [...] adds 1e4f3696a24 [PATCH, GCC/ARM, 7/10] Clear all VFP regs inline in hardflo [...] adds 0ab81d9cc73 [PATCH, GCC/ARM, 8/10] Do lazy store & load inline when cal [...] adds a464ffc2156 [PATCH, GCC/ARM, 9/10] Call nscall function with blxns adds 4747e2ccec9 [PATCH, GCC/ARM, 10/10] Enable -mcmse adds 7b4c373beb3 Add CLI and multilib support for Armv8.1-M Mainline MVE extensions adds 2e87b2f4121 [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 3ea9140170b [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 98d56ea8900 libstdc++: std::ctype fixes for recent versions of NetBSD adds f48c6014133 Fix noreorder symbol partitioning reversion. adds 801f5b96775 PR c++/93280 - ICE with aggregate assignment and DMI. adds f5b25e15165 Make profile estimation more precise adds 852f0ae8055 Fix ICE caused by swallowing a token in c_parser_consume_token adds b6a0ebd1920 Extern -param=max-predicted-iterations range. adds 1113de9499d Daily bump. adds 5194b51ed97 PR c++/93286 - ICE with __is_constructible and variadic template. adds f17f6127f8e contrib/gcc_update: Insert "tformat:" for git log --pretty= [...] No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 21 + contrib/gcc-git-customization.sh | 67 ++- contrib/gcc_update | 2 +- gcc/ChangeLog | 269 +++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 4 + gcc/analyzer/engine.cc | 2 +- gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 6 +- gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.c | 45 +- gcc/config/aarch64/aarch64-simd-builtins.def | 10 + gcc/config/aarch64/aarch64-simd.md | 66 +++ gcc/config/aarch64/aarch64.c | 4 +- gcc/config/aarch64/arm_neon.h | 134 +++++ gcc/config/aarch64/iterators.md | 17 + gcc/config/arm/arm-builtins.c | 33 +- gcc/config/arm/arm-cpus.in | 48 +- gcc/config/arm/arm-modes.def | 5 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm-simd-builtin-types.def | 2 + gcc/config/arm/arm-tables.opt | 2 +- gcc/config/arm/arm.c | 623 +++++++++++++++++---- gcc/config/arm/arm.h | 41 +- gcc/config/arm/arm.md | 56 +- gcc/config/arm/arm_bf16.h | 41 ++ gcc/config/arm/arm_neon.h | 4 + gcc/config/arm/iterators.md | 22 +- gcc/config/arm/neon.md | 8 +- gcc/config/arm/predicates.md | 12 + gcc/config/arm/t-rmprofile | 17 +- gcc/config/arm/thumb2.md | 66 ++- gcc/config/arm/unspecs.md | 8 + gcc/config/arm/vfp.md | 162 ++++-- gcc/cp/ChangeLog | 37 ++ gcc/cp/call.c | 24 +- gcc/cp/constexpr.c | 3 +- gcc/cp/cp-tree.h | 15 +- gcc/cp/decl.c | 14 - gcc/cp/init.c | 4 + gcc/cp/parser.c | 26 +- gcc/cp/pt.c | 74 ++- gcc/cp/typeck.c | 9 - gcc/cp/typeck2.c | 3 - gcc/doc/analyzer.texi | 2 + gcc/doc/invoke.texi | 24 + gcc/fortran/ChangeLog | 12 + gcc/fortran/check.c | 7 +- gcc/fortran/gfortran.texi | 7 +- gcc/fortran/lang.opt | 2 +- gcc/fortran/primary.c | 2 +- gcc/ipa-fnsummary.c | 2 +- gcc/lto/ChangeLog | 6 + gcc/lto/lto-partition.c | 3 + gcc/optabs.h | 1 + gcc/params.opt | 2 +- gcc/predict.c | 102 ++-- gcc/profile-count.c | 9 + gcc/profile-count.h | 5 +- gcc/sched-deps.c | 1 + gcc/sched-int.h | 2 + gcc/testsuite/ChangeLog | 346 ++++++++++++ gcc/testsuite/c-c++-common/pr92833-1.c | 4 + gcc/testsuite/c-c++-common/pr92833-2.c | 4 + gcc/testsuite/c-c++-common/pr92833-3.c | 4 + gcc/testsuite/c-c++-common/pr92833-4.c | 7 + gcc/testsuite/g++.dg/abi/mangle-neon.C | 5 + gcc/testsuite/g++.dg/concepts/pr91073-1.C | 37 ++ gcc/testsuite/g++.dg/concepts/pr91073-2.C | 19 + gcc/testsuite/g++.dg/cpp2a/consteval-void1.C | 10 + gcc/testsuite/g++.dg/eh/return1.C | 2 +- gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C | 13 + gcc/testsuite/g++.dg/ext/is_constructible4.C | 18 + gcc/testsuite/g++.dg/ext/temp-extend1.C | 2 +- .../g++.target/arm/bfloat_cpp_typecheck.C | 14 + .../{gcc.target/aarch64 => gcc.dg}/pr90838.c | 15 +- gcc/testsuite/gcc.dg/pr93231.c | 35 ++ .../aarch64/advsimd-intrinsics/bfdot-1.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-2.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-3.c | 28 + .../aarch64/advsimd-intrinsics/vdot-3-1.c | 136 +++++ .../aarch64/advsimd-intrinsics/vdot-3-2.c | 137 +++++ .../aarch64/advsimd-intrinsics/vdot-3-3.c | 31 + .../aarch64/advsimd-intrinsics/vdot-3-4.c | 31 + gcc/testsuite/gcc.target/aarch64/pr90838.c | 2 +- gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c | 118 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c | 16 + .../gcc.target/arm/bfloat16_scalar_typecheck.c | 219 ++++++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c | 91 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 94 ++++ .../gcc.target/arm/bfloat16_vector_typecheck_1.c | 263 +++++++++ .../gcc.target/arm/bfloat16_vector_typecheck_2.c | 252 +++++++++ gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c | 5 +- gcc/testsuite/gcc.target/arm/cmse/cmse-1.c | 18 +- gcc/testsuite/gcc.target/arm/cmse/cmse-14.c | 15 +- gcc/testsuite/gcc.target/arm/cmse/cmse-15.c | 7 +- gcc/testsuite/gcc.target/arm/cmse/cmse.exp | 43 +- .../gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c | 25 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c | 20 + .../arm/cmse/mainline/8_1m/bitfield-and-union.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-13.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/hard/cmse-13.c | 32 ++ .../arm/cmse/mainline/8_1m/hard/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/soft/cmse-13.c | 29 + .../arm/cmse/mainline/8_1m/soft/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/soft/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/soft/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c | 14 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/softfp/cmse-13.c | 28 + .../arm/cmse/mainline/8_1m/softfp/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/softfp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp/cmse-8.c | 27 + .../gcc.target/arm/cmse/mainline/8_1m/union-1.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/union-2.c | 27 + .../arm/cmse/mainline/{ => 8m}/bitfield-4.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-5.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-6.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-7.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-8.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-9.c | 2 +- .../cmse/mainline/{ => 8m}/bitfield-and-union.c | 2 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-13.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-5.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c | 10 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/union-1.c | 3 +- .../arm/cmse/mainline/{ => 8m}/union-2.c | 2 +- gcc/testsuite/gcc.target/arm/cmse/struct-1.c | 6 +- gcc/testsuite/gcc.target/arm/multilib.exp | 21 + gcc/testsuite/gfortran.dg/boz_7.f90 | 2 +- gcc/testsuite/lib/target-supports.exp | 16 +- gcc/tree-ssa-forwprop.c | 27 +- gcc/tree-ssa-loop-niter.c | 7 +- gcc/tree-ssa-loop-niter.h | 2 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-vect-loop.c | 7 +- gcc/value-prof.c | 4 +- libcpp/mkdeps.c | 2 +- libgcc/ChangeLog | 6 + libgcc/config/arm/t-arm | 2 +- libstdc++-v3/ChangeLog | 50 ++ libstdc++-v3/config/os/bsd/netbsd/ctype_base.h | 40 +- .../config/os/bsd/netbsd/ctype_configure_char.cc | 12 +- libstdc++-v3/config/os/bsd/netbsd/ctype_inline.h | 2 +- libstdc++-v3/include/bits/hashtable.h | 7 + libstdc++-v3/include/bits/hashtable_policy.h | 127 ++--- libstdc++-v3/include/bits/iterator_concepts.h | 24 +- libstdc++-v3/include/bits/range_access.h | 15 +- libstdc++-v3/include/std/ranges | 16 +- .../unordered_multiset/operators/1.cc | 56 ++ .../23_containers/unordered_set/operators/1.cc | 48 ++ libstdc++-v3/testsuite/std/ranges/iota/93267.cc | 30 + .../testsuite/std/ranges/{ => iota}/iota_view.cc | 0 190 files changed, 6158 insertions(+), 577 deletions(-) create mode 100644 gcc/config/arm/arm_bf16.h create mode 100644 gcc/testsuite/c-c++-common/pr92833-1.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-2.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-3.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-4.c create mode 100644 gcc/testsuite/g++.dg/concepts/pr91073-1.C create mode 100644 gcc/testsuite/g++.dg/concepts/pr91073-2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/consteval-void1.C create mode 100644 gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible4.C create mode 100644 gcc/testsuite/g++.target/arm/bfloat_cpp_typecheck.C copy gcc/testsuite/{gcc.target/aarch64 => gcc.dg}/pr90838.c (75%) create mode 100644 gcc/testsuite/gcc.dg/pr93231.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_typecheck.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_2.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-4.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-5.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-6.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-7.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-8.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-9.c (94%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-and-union.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-13.c (90%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-7.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-8.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-13.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-5.c (79%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c (65%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-1.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-2.c (96%) create mode 100644 libstdc++-v3/testsuite/std/ranges/iota/93267.cc rename libstdc++-v3/testsuite/std/ranges/{ => iota}/iota_view.cc (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_tk1/gnu-master-arm-spec2k6-O2_LTO updated (0d1cc75df1 -> bf8e4b6c81)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/gnu-master-arm-spec2k6-O2_LTO in repository toolchain/ci/binutils-gdb. from 0d1cc75df1 Set the default page size of the PDP11 target to 8192 bytes. adds 8dc3273e0c Use get_thread_regcache instead of get_current_regcache in p [...] adds c12081a66b texi2pod.pl: import support for @t{...} from gcc adds c96d7e0462 Automatic date update in version.in adds 4814632e69 x86: VPEXTRQ/VPINSRQ are unavailable outside of 64-bit mode adds 9cf70a448b x86: add a few more missing VexWIG adds d0849eed78 x86: drop stale Vec_Imm4 related comment adds 45a4bb2010 x86: drop found_cpu_match local variable adds 0c3d948509 MSP430: Add input section rules for .upper sections to defau [...] adds 6d0be74bfa MSP430: Remove unused linker script template elf32msp430_3.sc adds 2da2eaf4ce [binutils][arm] PR25376 Change MVE into a CORE_HIGH feature adds 3112ed9799 Support for DWARF5 location lists entries adds 701adfb009 [gdb] Move ChangeLog entries to their right files adds 790f17188a Ensure proc-service symbols have default visibility (PR buil [...] adds e0cdfe3c14 Add type for $_tlb->process_environment_block->process_parameters adds 40c9409927 Fix some spelling errors. adds bf8e4b6c81 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- etc/ChangeLog | 4 + etc/texi2pod.pl | 1 + gas/ChangeLog | 21 + gas/config/tc-arm.c | 13 +- gas/config/tc-i386.c | 10 +- gas/testsuite/gas/i386/avx512dq-inval.l | 13 + gas/testsuite/gas/i386/avx512dq-inval.s | 22 + gas/testsuite/gas/i386/i386.exp | 1 + gdb/ChangeLog | 35 ++ gdb/ChangeLog-1992 | 43 -- gdb/ChangeLog-1993 | 52 +-- gdb/ChangeLog-1995 | 3 - gdb/ChangeLog-1996 | 8 +- gdb/ChangeLog-1998 | 6 +- gdb/ChangeLog-1999 | 15 +- gdb/ChangeLog-2000 | 8 +- gdb/ChangeLog-2001 | 8 +- gdb/ChangeLog-2002 | 30 +- gdb/ChangeLog-2003 | 10 +- gdb/ChangeLog-2004 | 8 +- gdb/ChangeLog-2005 | 1 - gdb/ChangeLog-2006 | 19 +- gdb/ChangeLog-2007 | 12 +- gdb/ChangeLog-2008 | 9 +- gdb/ChangeLog-2009 | 14 +- gdb/ChangeLog-2010 | 10 +- gdb/ChangeLog-2011 | 20 +- gdb/ChangeLog-2012 | 8 +- gdb/ChangeLog-2013 | 6 +- gdb/ChangeLog-2014 | 9 +- gdb/ChangeLog-2015 | 35 +- gdb/ChangeLog-2016 | 4 +- gdb/ChangeLog-2017 | 19 +- gdb/ChangeLog-2018 | 56 ++- gdb/ChangeLog-2019 | 74 ++-- gdb/btrace.c | 4 +- gdb/charset.c | 2 +- gdb/doc/ChangeLog | 217 ++++++++++ gdb/dwarf2loc.c | 39 ++ gdb/infcmd.c | 3 +- gdb/nat/linux-btrace.c | 2 +- gdb/python/py-record-btrace.c | 2 +- gdb/record-btrace.c | 2 +- gdb/testsuite/ChangeLog | 15 + gdb/testsuite/ChangeLog-1993-2013 | 52 ++- gdb/testsuite/lib/gdb.exp | 2 +- gdb/windows-tdep.c | 61 ++- gdbsupport/gdb_proc_service.h | 29 ++ include/ChangeLog | 8 + include/opcode/arm.h | 7 +- ld/ChangeLog | 11 + ld/scripttempl/elf32msp430.sc | 8 + ld/scripttempl/elf32msp430_3.sc | 224 ---------- ld/testsuite/ld-msp430-elf/msp430-elf.exp | 2 + ld/testsuite/ld-msp430-elf/upper-input-sections.s | 33 ++ opcodes/ChangeLog | 27 ++ opcodes/arm-dis.c | 471 +++++++++++----------- opcodes/i386-opc.tbl | 26 +- opcodes/i386-tbl.h | 32 +- 60 files changed, 1059 insertions(+), 829 deletions(-) create mode 100644 gas/testsuite/gas/i386/avx512dq-inval.l create mode 100644 gas/testsuite/gas/i386/avx512dq-inval.s delete mode 100644 ld/scripttempl/elf32msp430_3.sc create mode 100644 ld/testsuite/ld-msp430-elf/upper-input-sections.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tk1/gnu-master-arm-spec2k6-O2_LTO updated (fe4164eb -> 6f7aa469)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/gnu-master-arm-spec2k6-O2_LTO in repository toolchain/ci/base-artifacts. from fe4164eb 1: push: binutils-gcc-glibc: -3 new 6f7aa469 2: push: binutils-gcc-glibc: 0 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 176 +- 02-prepare_abe/console.log | 358 +- 03-build_abe-binutils/console.log | 10686 ++- 04-build_abe-stage1/console.log | 20104 ++-- 05-build_abe-linux/console.log | 294 +- 06-build_abe-glibc/console.log | 38895 ++++---- 07-build_abe-stage2/console.log | 45082 ++++----- 09-benchmark--O2_LTO_marm/benchmark-start.log | 2 +- 09-benchmark--O2_LTO_marm/benchmark.log | 25 +- 09-benchmark--O2_LTO_marm/console.log | 143 +- 10-check_regression/console.log | 45 +- console.log | 115803 ++++++++++++----------- jenkins/manifest.sh | 20 +- results | 2 + results_id | 1 + 15 files changed, 115857 insertions(+), 115779 deletions(-) create mode 100644 results_id -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (a8ffe8e4 -> 1ce9807d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards a8ffe8e4 2: update: llvm-linux: 17866 new 1ce9807d 2: update: llvm-linux: 17866 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a8ffe8e4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-build_llvm/console.log | 12055 +++++++++++++++++----------------- 03-build_linux/console.log | 926 +-- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 26 +- console.log | 13147 +++++++++++++++++++------------------- jenkins/manifest.sh | 6 +- 7 files changed, 13151 insertions(+), 13149 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/jenkins-scripts] branch master updated (981d178d -> d12b504a)

by Christophe Lyon

This is an automated email from the git hooks/post-receive script. "Christophe Lyon pushed a change to branch master in repository toolchain/jenkins-scripts. from 981d178d tcwg_bmk-build.sh, tcwg_gnu-build.sh: Fix bisection-worthy scores new d12b504a tcwg_gnu-build.sh: Make top_artifacts is an absolute directory The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: tcwg_gnu-build.sh | 5 +++++ 1 file changed, 5 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (b08e8353a89 -> 01ad4c83846)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project. from b08e8353a89 [clangd] Dont display `<unknown>` kinds in hover board adds 8a344674609 [Concepts] Fix ConceptSpecializationExpr profiling crash adds 75188b01e9a [PHIEliminate] Move dbg values after phi and label adds 00c74d0b644 Remove release note about in-process-cc1 adds 39d6b6c21f7 [lldb][NFC] Migrate several tests to expect_expr adds 19c5057e8df Fix "pointer is null" static analyzer warnings. NFCI. adds 23a887b0dd4 Fix unused variable warning. NFCI. adds d54d71b67e6 [clangd] Make output order of allTargetDecls deterministic adds d36b2649e5e [ELF] Optimization to LinkerScript::computeInputSections NFC adds c969335abdb Revert "[PHIEliminate] Move dbg values after phi and label" adds 4b6d9ac3926 Make lld cmake not compute commit revision twice adds cbaa32650a0 Removed an unused include from TypeLocVisitor.h adds 66c120f0256 [VectorUtils] Rework the Vector Function Database (VFDatabase). adds 4f5c65a5c80 try to unbreak build after 4b6d9ac392613 adds 2b81d3c6c6f [mlir][Linalg] Fix Linalg EDSC builders adds c24cf979608 [ARM][MVE] Enable extending gathers adds 15a6df52efa [lldb/DWARF/test] Freshen up debug_names tests adds 28bb43bdf80 [GlobalISel] Use more MachineIRBuilder helper methods adds 760b1751097 [ARM][LowOverheadLoops] Update liveness info adds 237fd943125 [Hexagon] Remove unnecessary case in StringSwitch, NFC adds fb9413cb84c Remove some SVN-specific code. adds 63f73545dd8 [GlobalISel] Pass MachineOperands into MachineIRBuilder hel [...] adds 885260d5d80 [GlobalISel] Don't arbitrarily limit a mask to 64 bits adds 7f5f6ff5476 [Hexagon] Add preprocessor test for hexagonv66 adds 9b2f3532c7f AMDGPU/GlobalISel: Select DS GWS intrinsics adds 81eaa3ddd06 [lldb][NFC] Delete TestDataFormatterObjCNSDate.py adds 1794158f90f [MC][test] Fix non-portable GNU diff option adds 4ca1ad85b7c AMDGPU/GlobalISel: Don't handle legacy buffer intrinsic adds 31458a9feec [llvm-exegesis][NFC] Refactor Mips tests fixtures into a ba [...] adds 6b357866496 [llvm-exegesis][mips] Add RegisterAliasingTest unit test adds bc413da0865 [Hexagon] Fix alignment info for __builtin_circ_lduh adds c29a9f64b78 [gn build] Port 6b357866496 adds 7acfda633f1 [llvm] Make new pass manager's OptimizationLevel a class adds 26646761e2b [lldb/Scripts] Remove swig_bot_lib/__init__.py adds 3478551bf3d [GVN] introduce GVNOptions to control GVN pass behavior adds 9b3254dbf9f [LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging adds d34e4152e3e [LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to [...] adds 81c67da0f20 remove an include that's unused after r347592 adds ee05138515a [lldb/test] Revert changes to debug-names-compressed.cpp adds cebba7ce395 [SystemZ] Avoid unnecessary conversions in vecintrin.h adds bed7626f04f [PowerPC][AIX] Make PIC the default relocation model for AIX adds 5caa1212957 [gn build] include revision information in lld --version output adds d51a15d86a2 [gn build] (manually) port bed7626f04f7 adds c87982b4670 Revert "[Loop Peeling] Add possibility to enable peeling on [...] adds 870094decfc [ELF] Decrease alignment of ThunkSection on 64-bit targets [...] adds 8ee2d168966 [Hexagon] Add a target feature to disable compound instructions adds c0d909a1b12 Delete control character from comment. (NFC) adds 20ca49b646b AMDGPU: Update tests to use modern buffer intrinsics adds 86d14ed766e TableGen: Remove dead code adds 03a592f18ba TableGen/GlobalISel: Fix srcvalue inputs adds 0d0fce42b0e GlobalISel: Preserve load/store metadata in IRTranslator adds d0943537e10 GlobalISel: Apply target MMO flags to atomics adds de4f88df97c AMDGPU: Remove IR section from MIR test adds a881fcafaa5 [clangd] Make define outline code action visible adds 0474fe465d8 [clangd] Print underlying type for decltypes in hover adds 61a89e17df4 [LegalizeDAG][Mips] Add an assert to protect a uint_to_fp i [...] adds 5f65065437c [Hexagon] Update autogeneated intrinsic information in LLVM adds be31a7b7eec GlobalISel: Move extension scalar narrowing to separate function adds a66d2817ca9 GlobalISel: Don't ignore requested ext narrowing type adds e12b840abfc AMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG adds 8945b23af59 AMDGPU: Update more tests to use modern buffer intrinsics adds ff1e3cad71e Don't run powerpc lit test case on other platforms. adds f5d98543b89 AMDGPU: Remove outdated comment adds 5f8e4121882 [lldb/test] Exted test for CMTime data formatter adds 59919c4d6b6 [libc++] Fix Windows DLL build for string. adds 39f746d8def [OpenMP][Tool] Fix memory leak and double-allocation adds d0b02aecacc Address redirect issue on Windows. adds 2d7a8cf9047 [ELF] -r: don't create .interp adds 6f3effbbf05 [Hexagon] Update autogenerated intrinsic info in clang adds 53b68e676fa Resubmit: [JumpThreading] Thread jumps through two basic blocks adds 1f2dad1fd57 [GVN] add GVN parameters parsing to new pass manager adds ecf0766cf14 [Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp adds 40514a7d7a3 [clangd] Add workaround for GCC5 host compilers. NFC. adds fc4e43ad618 [NFC] Remove unnecessary link components. adds c299d1981de scudo: Add initial memory tagging support. adds d5c6b8407c1 Factor out renaming logic from readability-identifier-naming adds cbc63fbdc43 [gn build] Port d5c6b8407c1 adds 8b321929483 [OPENMP]Avoid string concat where possible and use standard [...] adds 52b44902d05 [IR] fix crash in Constant::isElementWiseEqual() with FP types adds 3a05c3969c1 [WebAssembly] Track frame registers through VReg and local [...] adds 202446c639f Add BuiltinsHexagonDep.def to clang module map adds fa4112fffc6 [llvm-nm] Use `StringRef` over `const std::string &` params adds 91e758b7329 AMDGPU: Move permlane discard vdst_in optimization adds 3ef8cdf6660 AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine adds 80906d9d160 Revert "[WebAssembly] Track frame registers through VReg an [...] adds 6c4d3773340 lldb: xfail TestCrossDSOTailCalls.py and TestCrossObjectTai [...] adds 9050d0fb593 [libcxx] Temporarily switch back to pthread backend for Fuchsia adds 51b521c07a7 [lld][WebAssembly] Use a more meaningful name for stub functions adds 73f371c31d2 [mlir] NFC: Fix trivial typos adds a4a42160c44 [mlir] support translation of multidimensional vectors to LLVM IR adds 42b3c38903c [clangd][test] Disable a particular testcase in FindExplici [...] adds 9b549f26fab AMDGPU: Update clang test adds 25b542c61fe [OPENMP]Do not emit RTTI descriptor for NVPTX devices. adds b82d18e1e8e [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stor [...] adds de022a8824f [NFC] Fold isHugeExpression into hasHugeExpression and upda [...] adds 65eb74e94b4 PointerLikeTypeTraits: Standardize NumLowBitsAvailable on s [...] adds 933b4212566 [mlir] Add missing dependency on LinalgUtils adds fb5fafb23cc Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well. adds 1645f5e496b [gn build] replace llvm_allow_tardy_revision with llvm_appe [...] adds 40ac4221c30 Move static function to inline function - this fixes a conc [...] adds 1b1022b42ad Add back other PowerPC link components. adds 30a8865142a [FastISel] Lower `llvm.dbg.value(undef, ...` correctly. adds 8ef57f3e3f1 [xray] add --no-demangle cli opt for llvm-xray extract to o [...] adds 2671df9bd67 [lldb/Debugger] Rename ExecuteIOHandlers to RunIOHandlers (NFC) adds 7b0d58e339b Add testing for DW_OP_piece and fix a bug with small Scalar [...] adds f55ab6f90b7 Fix a buffer-size bug when the first DW_OP_piece is undefined adds 83f4c3af021 [modules] Do not cache invalid state for modules that we at [...] adds 6c26d8968ad Add back more link components. adds cef838e65f9 Revert "[RISCV] Support ABI checking with per function targ [...] adds b78e8e0d79c Add extra test file forgotten in 45d7080. adds ad83bed2411 [NFC][PowerPC] Remove unnecessary link components. adds 6a970135904 [mlir][spirv] Add implied capabilities and availability for [...] adds ccedb918bb3 [mlir][spirv] Use symbolize functions in enum attribute predicates adds 961174f8787 [mlir][spirv] Fix SPV_MM_Vulkan extension reqirements adds 051d330314c Avoid creating an immutable map in the Automaton class. adds 117d4f1900c AMDGPU: Add register classes to MUBUF load patterns adds 01a6cd471f0 Don't dump IR output from this test to stdout. adds 24fca5cd712 [lldb] add to gdb to lldb doc adds 25cf941275e [lldb/CMake] Set LLVM_HOST_TRIPLE from TARGET_TRIPLE in sta [...] adds 0d3d584f82f [docs][ORC] Update the "utilities" section, tidy intro and [...] adds d3d7666678a [lldb/CMake] Remove duplicate entry adds caee96031d3 [Transforms][RISCV] Remove a "using namespace llvm" from an [...] adds adef2f5324c [docs][ORC] Fix some RST errors in the ORCv2 doc. adds f6d6b98eec4 [docs][ORC] Try to fix 'title-level inconsistent' error in [...] adds 911a4c4dda9 [lldb/Test] Fix API tests for mutli-config generators adds e1f6b68d1fd [lldb/Cmake] Add a CMakeLists.txt to the utils directory... adds 9dbd395b9b8 [lldb] Remove ClangASTContext.h inclusion in Target.cpp adds 4df94d5b513 Revert "[clangd][test] Disable a particular testcase in Fin [...] adds 5ac610668a7 [lldb] Re-add NSDate formatter adds 0ab035ae504 Remove old Suversion release scripts adds 6b840834cd5 [lldb][NFC] Delete unused lldb/source/Plugins/LanguageRunti [...] adds d437fba8ef6 Reapply Allow system header to provide their own implementa [...] adds d293417931d Add __warn_memset_zero_len builtin as a workaround for glibc issue adds 0734fb21ed5 clang-format: [JS] Handle more keyword-named methods. adds 10b4aece528 Revert "Avoid creating an immutable map in the Automaton class." new c3ab790c8f5 [lldb][NFC] Resynchronize Init/Terminate calls in SystemIni [...] new 01ad4c83846 [LLD][ELF][ARM][AArch64] Only round up ThunkSection Size wh [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../readability/IdentifierNamingCheck.cpp | 397 +- .../clang-tidy/readability/IdentifierNamingCheck.h | 76 +- clang-tools-extra/clang-tidy/utils/CMakeLists.txt | 1 + .../clang-tidy/utils/RenamerClangTidyCheck.cpp | 422 + .../clang-tidy/utils/RenamerClangTidyCheck.h | 150 + clang-tools-extra/clangd/FindTarget.cpp | 82 +- clang-tools-extra/clangd/Hover.cpp | 46 +- .../clangd/refactor/tweaks/DefineOutline.cpp | 2 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 51 + clang/docs/ReleaseNotes.rst | 5 - clang/include/clang/AST/CanonicalType.h | 2 +- clang/include/clang/AST/Decl.h | 3 + clang/include/clang/AST/DeclGroup.h | 2 +- clang/include/clang/AST/ExternalASTSource.h | 5 +- clang/include/clang/AST/TemplateName.h | 2 +- clang/include/clang/AST/Type.h | 6 +- clang/include/clang/AST/TypeLocVisitor.h | 1 - clang/include/clang/Basic/Builtins.def | 3 + clang/include/clang/Basic/BuiltinsHexagon.def | 1910 +---- clang/include/clang/Basic/BuiltinsHexagonDep.def | 1690 ++++ clang/include/clang/Basic/IdentifierTable.h | 6 +- clang/include/clang/Basic/SourceLocation.h | 2 +- clang/include/clang/CodeGen/ConstantInitFuture.h | 10 +- clang/include/clang/Sema/Ownership.h | 2 +- clang/include/clang/Sema/Sema.h | 1 - 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mlir/test/lib/Transforms/TestLinalgTransforms.cpp | 1 - mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp | 24 +- mlir/utils/spirv/define_inst.sh | 2 +- mlir/utils/spirv/gen_spirv_dialect.py | 129 +- openmp/tools/archer/ompt-tsan.cpp | 9 +- polly/include/polly/CodeGen/IslExprBuilder.h | 2 +- 412 files changed, 18849 insertions(+), 21339 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.h create mode 100644 clang/include/clang/Basic/BuiltinsHexagonDep.def create mode 100644 clang/test/CodeGen/memcpy-nobuiltin.c create mode 100644 clang/test/CodeGen/memcpy-nobuiltin.inc delete mode 100644 clang/test/Modules/Inputs/implicit-invalidate-chain/A.h delete mode 100644 clang/test/Modules/Inputs/implicit-invalidate-chain/B.h delete mode 100644 clang/test/Modules/Inputs/implicit-invalidate-chain/C.h delete mode 100644 clang/test/Modules/Inputs/implicit-invalidate-chain/module.modulemap delete mode 100644 clang/test/Modules/implicit-invalidate-chain.c create mode 100644 clang/test/Parser/explicit-bool.cpp create mode 100644 compiler-rt/lib/scudo/standalone/memtag.h create mode 100644 lld/test/ELF/aarch64-cortex-a53-843419-thunk-align.s create mode 100644 lld/test/ELF/arm-fix-cortex-a8-thunk-align.s delete mode 100644 lldb/scripts/swig_bot_lib/__init__.py delete mode 100644 lldb/source/Plugins/LanguageRuntime/Go/CMakeLists.txt create mode 100644 lldb/source/Plugins/SymbolVendor/wasm/CMakeLists.txt create mode 100644 lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp create mode 100644 lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.h create mode 100644 lldb/test/Shell/ObjectFile/wasm/unified-debug-sections.yaml create mode 100644 lldb/utils/CMakeLists.txt copy llvm/include/llvm/IR/{IntrinsicsHexagon.td => IntrinsicsHexagonDep.td} (76%) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/combine-fconstant.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-atomic-metadata.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-load-metadata.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll create mode 100644 llvm/test/CodeGen/AArch64/fastisel-debugvalue-undef.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.barrier.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.init.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.br.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.rel [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.v.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-buffer [...] create mode 100644 llvm/test/CodeGen/Hexagon/feature-compound.ll create mode 100644 llvm/test/TableGen/GlobalISelEmitter-input-discard.td create mode 100644 llvm/test/Transforms/JumpThreading/thread-two-bbs1.ll create mode 100644 llvm/test/Transforms/JumpThreading/thread-two-bbs2.ll create mode 100644 llvm/test/Transforms/JumpThreading/thread-two-bbs3.ll create mode 100644 llvm/test/Transforms/LoopUnroll/opt-levels.ll delete mode 100644 llvm/test/Transforms/LoopUnroll/peel-loop-nests.ll create mode 100644 llvm/test/Transforms/LoopUnrollAndJam/opt-levels.ll create mode 100644 llvm/test/tools/llc/aix-pic-setting.ll create mode 100644 llvm/test/tools/llvm-xray/AArch64/extract-instrmap-aarch64-mang [...] create mode 100644 llvm/unittests/Target/PowerPC/AIXRelocModelTest.cpp create mode 100644 llvm/unittests/Target/PowerPC/CMakeLists.txt create mode 100644 llvm/unittests/tools/llvm-exegesis/Mips/RegisterAliasingTest.cpp create mode 100644 llvm/unittests/tools/llvm-exegesis/Mips/TestBase.h delete mode 100755 llvm/utils/GetRepositoryPath create mode 100644 llvm/utils/gn/secondary/llvm/unittests/Target/PowerPC/BUILD.gn delete mode 100755 llvm/utils/release/merge-git.sh delete mode 100755 llvm/utils/release/merge.sh delete mode 100755 llvm/utils/release/tag.sh -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (9b7773da -> 0534640e)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 9b7773da 0: update: llvm-linux: boot new 0534640e 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9b7773da) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 12663 ++++++++++++++++++----------------- 03-build_linux/console.log | 752 +-- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 10 +- console.log | 13619 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 7 files changed, 13621 insertions(+), 13627 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[gcc] branch devel/c++-coroutines updated (b46b8c74baab -> ac84ffe41d1a)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch devel/c++-coroutines in repository gcc. from b46b8c74baab Use <cstdlib> in the testsuite coro.h. adds 4ce43ba44d69 Mark param_max_combine_insns with Optimization keyword. adds f31a99f7c123 libstdc++: Define __cpp_lib_three_way_comparison conditionally adds a4a1f9655188 libstdc++: Remove redundant inequality operators in <stop_token> adds 5960de787f57 Fix amdgcn inline immediate range adds 3c2707f33af4 [AArch64] Fix constraints for CPY /M adds 033381118519 [AArch64] Use move-if-change for aarch64-tune.md adds 1810a89c77bb PR c++/79592 adjust testcase adds b4d74ed76602 Fix early-clobber in amdgcn vec_extract adds 2b4f0b8951cb mips.c (vr4130_align_insns): Fix typo. adds d54fc770768a Fix amdgcn issue with '0' constraints adds 8a0ae3c130cd Check mask argument's type when vectorising conditional functions adds a0643f028e43 Require equal shift amounts for IFN_DIV_POW2 adds cf319b3f5455 pa.md: Revert change to use ordered_comparison_operator in [...] adds bd401fc80904 Daily bump. adds e4bcf1f54971 PR c++/92739 - parsing requires clause with attributes. adds 665e3b214d89 PR c++/92552 - ICE with inherited constrained default ctor. adds dfef35003610 Add support for large prefixed address in adjusting a vect [...] adds 3d53551b8809 Fix bad code of vector extract of PC-relative address with [...] adds e5d3611ec317 Update 'Q' constraint documentation. adds 0a4c673c8206 Update ChangeLog for last change adds 1b02c8c34c96 Refactor some code for a future change. adds 6ac22177a085 ipa-inline: Adjust condition for caller_growth_limits adds f74f6092ace4 re PR c++/91369 (Implement P0784R7: constexpr new) adds 851817d85ed2 re PR fortran/93162 (gcc/fortran/trans-openmp.c:2469:50: r [...] adds 5dbaaa20c94b Mark param_min_crossjump_insns with Optimization keyword. adds a86689f5e9b9 Mark -free as Optimization option. adds a924bffba921 Make warn_inline Optimization option. adds fa13d9ebdc17 Document cloning for the target_clone attribute. adds 5c4177c50871 Add Optimization keyword for TREE/RTL optimization passes. adds f26916c2acdd re PR tree-optimization/93118 (>>32<<32 is not always conv [...] adds fb862fdfb53e re PR tree-optimization/93156 (abused nonnull attribute ev [...] adds c4b30920c742 Don't mangle attributes that have a space in their name adds 683e93d1975f [AArch64] Use type attributes to mark types that use the SVE PCS adds ab341f5003f8 Add a generic lhd_simulate_enum_decl adds b11b9e29f5b4 install.texi: Bump minimal supported MPC version. adds b46e3849d507 compiler: avoid a couple of compiler crashes adds 084a454e4e0e [doc] Add missing documentation for existing target checks adds 77aecac1b256 [testsuite][arm] xfail vect-epilogues for armbe adds 66b01cc34210 Disallow 'B' constraints on amdgcn addc/subb adds bd65538abb6a PR c++/47877 - -fvisibility-inlines-hidden and member templates. adds 0e159efc7632 [amdgcn] Add more modes for vector comparisons adds 5561b41dd676 compiler: avoid write barrier for a[i] = a[i][:v] adds 87d3f828de27 init.c (build_new): Add location_t parameter and use it th [...] adds 6af8819be1e0 PR libstdc++/92124 fix incorrect container move assignment adds cdf77151aa5a Revert a patch from luoxhu(a)linux.ibm.com adds 56eb4c70ea7a Restore patch reverted on trunk instead of a branch adds 7010bcd1c80e Revert patch accidentily created on the wrong sandbox adds 81f025b580be compiler, runtime: stop using __go_runtime_error adds fd9ca4c64676 Daily bump. adds fc6dbd584b4a compiler: fix loopdepth tracking in array slicing expressi [...] adds 709d7838e753 Partially revert ipa-inline caller_growth_limits adds 42d73fa9d575 Find matched aggregate lattice for self-recursive CP (PR i [...] adds 9e3c1eb77323 Rename condition_variable_any wait* methods to match curre [...] adds 54b0c0f0e978 whitespace adds d5bc18085c8b arm: Fix rmprofile multilibs when architecture includes +m [...] adds f30dd6076692 Implement 64-bit double functions. adds e3e131c9bb93 Add -nodevicespecs option for avr. adds 4dfa3251b5c8 Use dump_asm_name for Callers/Calls in dump. adds d597b9445f0f Replace node->name/node->order with node->dump_name. adds f74c4b2c4427 re PR tree-optimization/93199 (Compile time hog in sink_clobbers) adds d672c0afbb6c * gcc/doc/install.texi: Typo. adds 0f3072b5c311 re PR other/92997 (gcc.dg/torture/ftrapv-1.c fails startin [...] adds 949f00625424 re PR target/93182 ([avr] Add -nodevicespecs option.) adds fb768529d28e re PR tree-optimization/93199 (Compile time hog in sink_clobbers) adds df2c0d362024 libgomp.texi: Fix typos, use https. adds c1030b5cd3c9 libgomp.texi: Fix typos, use https (actual change) adds 3629ff8ad6b7 Use cgraph_node::dump_{asm_},name where possible. adds 80d803aefb82 relax aarch64 stack-clash tests depedence on alloca.h adds 7ca803f10115 re PR target/93174 (ICE building glibc __sha512_process_bl [...] adds b41383c8aba1 re PR target/93187 (ICE in extract_insn, at recog.c:2294) adds face749a49c3 Add missing { dg-require-effective-target fpic } to aarch64 tests adds fff148b787b8 libstdc++: Fix error handling in filesystem::remove_all (PR93201) adds 51f902357c56 hash-map-tests.c: fix memory leak adds 5b18be0b2bfc * gcc.dg/Wstringop-overflow-27.c: Make testnames unique. adds cd3ca6cb1129 Remove constexpr support for DECL_BY_REFERENCE. adds 10d2f801f472 PR c++/91369 - constexpr destructor and member initializer. adds 08f594eb399d Add TARGET_EXPR_DIRECT_INIT_P sanity check. adds 199caa70eaad Daily bump. adds dca7e570a58f RISC-V: Disable use of TLS copy relocs. adds b3de347f3296 sbitmap.h: add operator const_sbitmap to auto_sbitmap adds e4d2203e31e7 vec.h: add auto_delete_vec adds b9c84e95030d PR libstdc++/92124 fix incorrect unordered container move [...] adds ec9b602c167f re PR target/93141 (Missed optimization : Use of adc when [...] adds a0ab54de0ec3 re PR inline-asm/93202 ([RISCV] ICE when using inline asm [...] adds edbe1f3bb158 One more usage of cgraph_node::dump_name. adds ddc8786f8ebe avr-common.c (avr_option_optimization_table): Set -fsplit- [...] adds 0f507a365777 re PR tree-optimization/93040 (gcc doesn't optimize unalig [...] adds 00294b189cf3 re PR tree-optimization/93054 (ICE in gimple_set_lhs, at g [...] adds fdfd7f53ba8f Add Optimization for various IPA parameters. adds 2b5d3dc22c32 PR middle-end/93200 - spurious -Wstringop-overflow due to [...] adds 87f9579a4f99 Set Optimization for param_max_speculative_devirt_maydefs. adds 27c5a1779bad Make cgraph_edge::resolve-speculation static adds d574c8aafea4 libstdc++: Define memory resource key functions non-inline [...] adds 15df0040707d Fortran] PR84135 fix merging dimension into codimension ar [...] adds 482b2b43e510 Add a compatible_vector_types_p target hook adds 9ecb4221263c Fix tree-nrv.c ICE for direct internal functions new ac84ffe41d1a Merge master r10-5841 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 535 +++++ gcc/DATESTAMP | 2 +- gcc/auto-profile.c | 5 +- gcc/builtins.c | 12 + gcc/c-family/c-common.c | 2 +- gcc/c-family/c-warn.c | 2 +- gcc/c/ChangeLog | 6 + gcc/c/gimple-parser.c | 2 +- gcc/cgraph.c | 135 +- gcc/cgraph.h | 39 +- gcc/cgraphclones.c | 20 +- gcc/cgraphunit.c | 20 +- gcc/common.opt | 4 +- gcc/common/config/avr/avr-common.c | 2 + gcc/config.gcc | 48 +- gcc/config/aarch64/aarch64-protos.h | 3 +- gcc/config/aarch64/aarch64-sve-builtins.cc | 126 +- gcc/config/aarch64/aarch64-sve.md | 2 +- gcc/config/aarch64/aarch64.c | 48 +- gcc/config/aarch64/t-aarch64 | 6 +- gcc/config/arm/t-multilib | 9 + gcc/config/avr/avr-c.c | 32 +- gcc/config/avr/avr-protos.h | 2 + gcc/config/avr/avr.c | 17 + gcc/config/avr/avr.h | 3 + gcc/config/avr/avr.opt | 4 + gcc/config/avr/driver-avr.c | 8 +- gcc/config/gcn/constraints.md | 11 +- gcc/config/gcn/gcn-protos.h | 2 +- gcc/config/gcn/gcn-valu.md | 381 ++- gcc/config/gcn/gcn.c | 18 +- gcc/config/gcn/gcn.md | 4 +- gcc/config/i386/i386.md | 193 +- gcc/config/mips/mips.c | 2 +- gcc/config/pa/pa.md | 4 +- gcc/config/pa/predicates.md | 6 + gcc/config/riscv/riscv.c | 6 +- gcc/config/rs6000/constraints.md | 3 +- gcc/config/rs6000/rs6000.c | 57 +- gcc/config/rs6000/vsx.md | 8 +- gcc/cp/ChangeLog | 60 + gcc/cp/class.c | 1 - gcc/cp/constexpr.c | 62 +- gcc/cp/cp-gimplify.c | 7 + gcc/cp/cp-tree.h | 7 +- gcc/cp/decl2.c | 5 +- gcc/cp/init.c | 31 +- gcc/cp/mangle.c | 38 +- gcc/cp/parser.c | 14 +- gcc/cp/pt.c | 12 +- gcc/doc/extend.texi | 6 + gcc/doc/install.texi | 31 +- gcc/doc/invoke.texi | 50 +- gcc/doc/md.texi | 7 +- gcc/doc/sourcebuild.texi | 6 + gcc/doc/tm.texi | 21 + gcc/doc/tm.texi.in | 2 + gcc/fortran/ChangeLog | 13 + gcc/fortran/array.c | 2 +- gcc/fortran/decl.c | 21 +- gcc/fortran/trans-openmp.c | 4 +- gcc/gimple-expr.c | 11 +- gcc/gimple-fold.c | 1 + gcc/gimple-iterator.c | 8 +- gcc/gimple-loop-interchange.cc | 9 +- gcc/gimple-ssa-store-merging.c | 4 +- gcc/gimplify.c | 3 +- gcc/go/gofrontend/MERGE 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libgcc/config/avr/libf7/ChangeLog create mode 100644 libgcc/config/avr/libf7/asm-defs.h create mode 100644 libgcc/config/avr/libf7/f7-renames.h create mode 100644 libgcc/config/avr/libf7/f7-wraps.h create mode 100755 libgcc/config/avr/libf7/f7renames.sh create mode 100755 libgcc/config/avr/libf7/f7wraps.sh copy libgcc/config/{i386/enable-execute-stack-mingw32.c => avr/libf7/libf7-array.d [...] create mode 100644 libgcc/config/avr/libf7/libf7-asm-object.mk create mode 100644 libgcc/config/avr/libf7/libf7-asm.sx create mode 100644 libgcc/config/avr/libf7/libf7-c-object.mk create mode 100644 libgcc/config/avr/libf7/libf7-common.mk create mode 100644 libgcc/config/avr/libf7/libf7-const.def copy libgcc/{gcov.h => config/avr/libf7/libf7-constdef.h} (55%) create mode 100644 libgcc/config/avr/libf7/libf7.c create mode 100644 libgcc/config/avr/libf7/libf7.h create mode 100644 libgcc/config/avr/libf7/t-libf7 create mode 100644 libgcc/config/avr/libf7/t-libf7-math create mode 100644 libgcc/config/avr/libf7/t-libf7-math-symbols delete mode 100644 libgo/runtime/go-runtime-error.c copy libstdc++-v3/testsuite/{23_containers/deque/types/pmr_typedefs.cc => 20_util/ [...] copy libstdc++-v3/testsuite/23_containers/{list => map}/92124.cc (58%) copy libstdc++-v3/testsuite/23_containers/{forward_list => set}/92124.cc (56%) copy libstdc++-v3/testsuite/23_containers/{vector => unordered_set}/92124.cc (53%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (0bb3f83fdc4 -> f158d9197de)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/gcc. from 0bb3f83fdc4 Daily bump. adds 26b2838fc9b Daily bump. new f158d9197de Fortran: PR93263 -fno-automatic and RECURSIVE The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/DATESTAMP | 2 +- gcc/fortran/ChangeLog | 11 +++++++++++ gcc/fortran/resolve.c | 3 ++- gcc/testsuite/ChangeLog | 9 +++++++++ gcc/testsuite/gfortran.dg/pr93263_1.f90 | 29 +++++++++++++++++++++++++++++ gcc/testsuite/gfortran.dg/pr93263_2.f90 | 24 ++++++++++++++++++++++++ 6 files changed, 76 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/pr93263_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93263_2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

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