Tcwg-commits January 2020

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (89359fdb -> 094e91f0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 89359fdb 0: update: llvm-linux: boot new 094e91f0 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (89359fdb) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 70 +- 02-build_llvm/console.log | 12565 +++++++++++++++++------------------ 03-build_linux/console.log | 742 +-- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 29 + console.log | 13391 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 13429 insertions(+), 13394 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (f5ae2ea6347a -> 575966e08027)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/linux. from f5ae2ea6347a Fix built-in early-load Intel microcode alignment adds dfb9a8857f4d platform/chrome: wilco_ec: Fix keyboard backlight probing adds 0c99ee44b892 Merge tag 'tag-chrome-platform-fixes-for-v5.5-rc7' of git: [...] adds 57388a2ccb6c cpuidle: teo: Fix intervals[] array indexing bug adds f4353c3e2aaf Merge tag 'pm-5.5-rc7' of git://git.kernel.org/pub/scm/lin [...] adds 67f96ff7c8f0 clk: samsung: exynos5420: Keep top G3D clocks enabled adds fc666936f3f0 clk: tegra: Fix double-free in tegra_clk_init() adds 12ead77432f2 clk: Don't try to enable critical clocks if prepare failed adds 5e82548e26ef clk: qcom: gcc-sdm845: Add missing flag to votable GDSCs adds ad931a2d56e3 clk: ti: dra7-atl: Remove pm_runtime_irq_safe() adds 4ff40d140e2a clk: sunxi-ng: v3s: Fix incorrect number of hw_clks. adds c7b305267eb7 clk: sunxi-ng: r40: Allow setting parent rate for external [...] adds 47d64fef1f3f clk: sunxi-ng: sun8i-r: Fix divider on APB0 clock adds 675a6d467b43 clk: sunxi-ng: h6-r: Simplify R_APB1 clock definition adds 0c545240aebc clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent order adds a0af27424734 Merge tag 'sunxi-clk-fixes-for-5.5' of https://git.kernel. [...] adds ef64753c1922 Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pu [...] adds 210de0e996ae arm64: dts: agilex/stratix10: fix pmu interrupt numbers adds 43522b78b590 Merge tag 'socfpga_dts_fix_for_v5.5' of git://git.kernel.o [...] adds 0bd0f30bbf06 ARM: mmp: do not divide the clock rate adds 8bea5ac0fbc5 clk: mmp2: Fix the order of timer mux parents adds 8396bdc008fc ARM: dts: mmp3: Fix the TWSI ranges adds 5a769f6ff439 optee: Fix multi page dynamic shm pool alloc adds 850e0a99361b Merge tag 'tee-optee-fix-for-5.5' of git://git.linaro.org: [...] adds 90bdfa0b05e3 ARM: OMAP2+: Fix ti_sysc_find_one_clockdomain to check for [...] adds 2c81f0f6d3f5 bus: ti-sysc: Fix iterating over clocks adds 81cc0877840f ARM: dts: am57xx-beagle-x15/am57xx-idk: Remove "gpios" for [...] adds 0c4eb2a6b3c6 ARM: dts: am571x-idk: Fix gpios property to have the corre [...] adds e17e7c498d4f ARM: dts: beagle-x15-common: Model 5V0 regulator adds 03729cfa0d54 soc: ti: wkup_m3_ipc: Fix race condition with rproc_boot adds b583cef56905 Merge tag 'omap-for-v5.5/fixes-rc5' of git://git.kernel.or [...] adds 7afec66e2bf5 ARM: davinci: select CONFIG_RESET_CONTROLLER adds fe013e2121c6 ARM: omap2plus: select RESET_CONTROLLER adds 413200017b8e ARM: dts: aspeed-g6: Fix FSI master location adds e30dcbbcb0ee ARM: dts: aspeed: tacoma: Fix fsi master node adds 265ae459b3ba ARM: dts: aspeed: tacoma: Remove duplicate i2c busses adds 87c5947ffeec ARM: dts: aspeed: tacoma: Remove duplicate flash nodes adds 195cf4dbedce ARM: dts: aspeed: rainier: Remove duplicate i2c busses adds ffcdc5df08bf ARM: dts: aspeed: rainier: Fix fan fault and presence adds 9f1c2cb3296a Merge tag 'aspeed-5.5-devicetree-fixes' of git://git.kerne [...] adds f424da7f78a7 arm64: dts: meson-sm1-sei610: gpio-keys: switch to IRQs adds 46c9585ed4af ARM: dts: meson8: fix the size of the PMU registers adds 0766d65e6afa soc: amlogic: meson-ee-pwrc: propagate PD provider registr [...] adds c67aafd60d7e soc: amlogic: meson-ee-pwrc: propagate errors from pm_genp [...] adds 4881873f4cc1 dt-bindings: reset: meson8b: fix duplicate reset IDs adds 30388cc07572 arm64: dts: meson-sm1-sei610: add gpio bluetooth interrupt adds dc64f487f4c4 Merge tag 'amlogic-fixes' of https://git.kernel.org/pub/sc [...] adds 7d7778b1396b ARM: dts: imx6q-dhcom: fix rtc compatible adds 33eae7fb2e59 arm64: dts: ls1028a: fix endian setting for dcfg adds 24a572bf6799 arm64: dts: imx8mm: Change SDMA1 ahb clock for imx8mm adds b8ab62ff7199 ARM: dts: imx7ulp: fix reg of cpu node adds fe6a6689d181 ARM: dts: imx6q-dhcom: Fix SGTL5000 VDDIO regulator connection adds 106f7b3bf943 arm64: dts: imx8mq-librem5-devkit: use correct interrupt f [...] adds 4a132f60808a ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL adds 4521de30fbb3 ARM: dts: imx6qdl-sabresd: Remove incorrect power supply a [...] adds d4918ebb5c25 ARM: dts: imx6sx-sdb: Remove incorrect power supply assignment adds b4eb9ef0e29c ARM: dts: imx6sl-evk: Remove incorrect power supply assignment adds 3479b2843c78 ARM: dts: imx6sll-evk: Remove incorrect power supply assignment adds 4b0b97e651ec ARM: dts: imx7: Fix Toradex Colibri iMX7S 256MB NAND flash [...] adds 3f2b5941d335 Merge tag 'imx-fixes-5.5-2' of git://git.kernel.org/pub/sc [...] adds 8467ebbf708e arm64: dts: allwinner: a64: olinuxino: Fix eMMC supply regulator adds 3d615c2fc2d1 arm64: dts: allwinner: a64: olinuxino: Fix SDIO supply regulator adds 1c226017d3ec ARM: dts: sun8i: a83t: Correct USB3503 GPIOs polarity adds 41ec98def8d2 Merge tag 'sunxi-fixes-for-5.5' of https://git.kernel.org/ [...] adds 3433bdf98d8e arm64: dts: rockchip: Fix IR on Beelink A1 adds b47611c8c389 Merge tag 'v5.5-rockchip-dtsfixes' of git://git.kernel.org [...] adds 70db729fe1b3 MAINTAINERS: Add myself as the co-maintainer for Actions S [...] adds 575966e08027 Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/l [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 2 +- arch/arm/boot/dts/am571x-idk.dts | 6 +- arch/arm/boot/dts/am572x-idk-common.dtsi | 4 - arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 25 +- arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 369 +------------------ arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 403 +-------------------- arch/arm/boot/dts/aspeed-g6.dtsi | 39 +- arch/arm/boot/dts/imx6dl-icore-mipi.dts | 2 +- arch/arm/boot/dts/imx6q-dhcom-pdk2.dts | 2 +- arch/arm/boot/dts/imx6q-dhcom-som.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 4 - arch/arm/boot/dts/imx6sl-evk.dts | 4 - arch/arm/boot/dts/imx6sll-evk.dts | 4 - arch/arm/boot/dts/imx6sx-sdb-reva.dts | 4 - arch/arm/boot/dts/imx6sx-sdb.dts | 4 - arch/arm/boot/dts/imx7s-colibri.dtsi | 4 + arch/arm/boot/dts/imx7ulp.dtsi | 4 +- arch/arm/boot/dts/meson8.dtsi | 2 +- arch/arm/boot/dts/mmp3.dtsi | 12 +- arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 2 +- arch/arm/mach-davinci/Kconfig | 1 + arch/arm/mach-mmp/time.c | 2 +- arch/arm/mach-omap2/Kconfig | 3 +- arch/arm/mach-omap2/pdata-quirks.c | 6 +- .../dts/allwinner/sun50i-a64-olinuxino-emmc.dts | 2 +- .../boot/dts/allwinner/sun50i-a64-olinuxino.dts | 2 +- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 +- arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts | 28 +- arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 +- .../boot/dts/freescale/imx8mq-librem5-devkit.dts | 2 +- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 8 +- arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 3 +- drivers/bus/ti-sysc.c | 10 +- drivers/clk/clk.c | 10 +- drivers/clk/mmp/clk-of-mmp2.c | 2 +- drivers/clk/qcom/gcc-sdm845.c | 7 + drivers/clk/samsung/clk-exynos5420.c | 8 + drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | 16 +- drivers/clk/sunxi-ng/ccu-sun8i-r.c | 21 +- drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 6 +- drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 4 +- drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 2 - drivers/clk/tegra/clk.c | 4 +- drivers/clk/ti/clk-dra7-atl.c | 1 - drivers/cpuidle/governors/teo.c | 2 +- drivers/platform/chrome/wilco_ec/keyboard_leds.c | 28 +- drivers/soc/amlogic/meson-ee-pwrc.c | 24 +- drivers/soc/ti/wkup_m3_ipc.c | 4 +- drivers/tee/optee/shm_pool.c | 15 +- include/dt-bindings/reset/amlogic,meson8b-reset.h | 6 +- 51 files changed, 218 insertions(+), 919 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (58265ad42a9 -> f6d6b98eec4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/llvm-project. from 58265ad42a9 [mlir] fix broken links to Glossary adds 5cf1b01a011 [LegalizeDAG][TargetLowering] Move vXi64/i64->vXf32/f32 uin [...] adds afb22d7c33a [DebugInfo] Simplify the constructor of DWARFDebugAranges:: [...] adds 4f244bba4f6 [lldb] Fix asan failures in data-formatter-objc tests adds 773ae62ff85 [VE] i64 arguments, return values and constants adds ed181efa175 [HIP][AMDGPU] expand printf when compiling HIP to AMDGPU adds f8269bb0726 [gn build] Port ed181efa175 adds 59ac44b3c12 [LV] Make X86/assume.ll X86 independent (NFC). adds 23c113802e2 [LV] Allow assume calls in predicated blocks. adds 736a3802124 clang-format: [JS] tests for async wrapping. adds 0b21d552620 [IR] Mark memset.* intrinsics as IntrWriteMem. adds b08e8353a89 [clangd] Dont display `<unknown>` kinds in hover board adds 8a344674609 [Concepts] Fix ConceptSpecializationExpr profiling crash adds 75188b01e9a [PHIEliminate] Move dbg values after phi and label adds 00c74d0b644 Remove release note about in-process-cc1 adds 39d6b6c21f7 [lldb][NFC] Migrate several tests to expect_expr adds 19c5057e8df Fix "pointer is null" static analyzer warnings. NFCI. adds 23a887b0dd4 Fix unused variable warning. NFCI. adds d54d71b67e6 [clangd] Make output order of allTargetDecls deterministic adds d36b2649e5e [ELF] Optimization to LinkerScript::computeInputSections NFC adds c969335abdb Revert "[PHIEliminate] Move dbg values after phi and label" adds 4b6d9ac3926 Make lld cmake not compute commit revision twice adds cbaa32650a0 Removed an unused include from TypeLocVisitor.h adds 66c120f0256 [VectorUtils] Rework the Vector Function Database (VFDatabase). adds 4f5c65a5c80 try to unbreak build after 4b6d9ac392613 adds 2b81d3c6c6f [mlir][Linalg] Fix Linalg EDSC builders adds c24cf979608 [ARM][MVE] Enable extending gathers adds 15a6df52efa [lldb/DWARF/test] Freshen up debug_names tests adds 28bb43bdf80 [GlobalISel] Use more MachineIRBuilder helper methods adds 760b1751097 [ARM][LowOverheadLoops] Update liveness info adds 237fd943125 [Hexagon] Remove unnecessary case in StringSwitch, NFC adds fb9413cb84c Remove some SVN-specific code. adds 63f73545dd8 [GlobalISel] Pass MachineOperands into MachineIRBuilder hel [...] adds 885260d5d80 [GlobalISel] Don't arbitrarily limit a mask to 64 bits adds 7f5f6ff5476 [Hexagon] Add preprocessor test for hexagonv66 adds 9b2f3532c7f AMDGPU/GlobalISel: Select DS GWS intrinsics adds 81eaa3ddd06 [lldb][NFC] Delete TestDataFormatterObjCNSDate.py adds 1794158f90f [MC][test] Fix non-portable GNU diff option adds 4ca1ad85b7c AMDGPU/GlobalISel: Don't handle legacy buffer intrinsic adds 31458a9feec [llvm-exegesis][NFC] Refactor Mips tests fixtures into a ba [...] adds 6b357866496 [llvm-exegesis][mips] Add RegisterAliasingTest unit test adds bc413da0865 [Hexagon] Fix alignment info for __builtin_circ_lduh adds c29a9f64b78 [gn build] Port 6b357866496 adds 7acfda633f1 [llvm] Make new pass manager's OptimizationLevel a class adds 26646761e2b [lldb/Scripts] Remove swig_bot_lib/__init__.py adds 3478551bf3d [GVN] introduce GVNOptions to control GVN pass behavior adds 9b3254dbf9f [LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging adds d34e4152e3e [LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to [...] adds 81c67da0f20 remove an include that's unused after r347592 adds ee05138515a [lldb/test] Revert changes to debug-names-compressed.cpp adds cebba7ce395 [SystemZ] Avoid unnecessary conversions in vecintrin.h adds bed7626f04f [PowerPC][AIX] Make PIC the default relocation model for AIX adds 5caa1212957 [gn build] include revision information in lld --version output adds d51a15d86a2 [gn build] (manually) port bed7626f04f7 adds c87982b4670 Revert "[Loop Peeling] Add possibility to enable peeling on [...] adds 870094decfc [ELF] Decrease alignment of ThunkSection on 64-bit targets [...] adds 8ee2d168966 [Hexagon] Add a target feature to disable compound instructions adds c0d909a1b12 Delete control character from comment. (NFC) adds 20ca49b646b AMDGPU: Update tests to use modern buffer intrinsics adds 86d14ed766e TableGen: Remove dead code adds 03a592f18ba TableGen/GlobalISel: Fix srcvalue inputs adds 0d0fce42b0e GlobalISel: Preserve load/store metadata in IRTranslator adds d0943537e10 GlobalISel: Apply target MMO flags to atomics adds de4f88df97c AMDGPU: Remove IR section from MIR test adds a881fcafaa5 [clangd] Make define outline code action visible adds 0474fe465d8 [clangd] Print underlying type for decltypes in hover adds 61a89e17df4 [LegalizeDAG][Mips] Add an assert to protect a uint_to_fp i [...] adds 5f65065437c [Hexagon] Update autogeneated intrinsic information in LLVM adds be31a7b7eec GlobalISel: Move extension scalar narrowing to separate function adds a66d2817ca9 GlobalISel: Don't ignore requested ext narrowing type adds e12b840abfc AMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG adds 8945b23af59 AMDGPU: Update more tests to use modern buffer intrinsics adds ff1e3cad71e Don't run powerpc lit test case on other platforms. adds f5d98543b89 AMDGPU: Remove outdated comment adds 5f8e4121882 [lldb/test] Exted test for CMTime data formatter adds 59919c4d6b6 [libc++] Fix Windows DLL build for string. adds 39f746d8def [OpenMP][Tool] Fix memory leak and double-allocation adds d0b02aecacc Address redirect issue on Windows. adds 2d7a8cf9047 [ELF] -r: don't create .interp adds 6f3effbbf05 [Hexagon] Update autogenerated intrinsic info in clang adds 53b68e676fa Resubmit: [JumpThreading] Thread jumps through two basic blocks adds 1f2dad1fd57 [GVN] add GVN parameters parsing to new pass manager adds ecf0766cf14 [Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp adds 40514a7d7a3 [clangd] Add workaround for GCC5 host compilers. NFC. adds fc4e43ad618 [NFC] Remove unnecessary link components. adds c299d1981de scudo: Add initial memory tagging support. adds d5c6b8407c1 Factor out renaming logic from readability-identifier-naming adds cbc63fbdc43 [gn build] Port d5c6b8407c1 adds 8b321929483 [OPENMP]Avoid string concat where possible and use standard [...] adds 52b44902d05 [IR] fix crash in Constant::isElementWiseEqual() with FP types adds 3a05c3969c1 [WebAssembly] Track frame registers through VReg and local [...] adds 202446c639f Add BuiltinsHexagonDep.def to clang module map adds fa4112fffc6 [llvm-nm] Use `StringRef` over `const std::string &` params adds 91e758b7329 AMDGPU: Move permlane discard vdst_in optimization adds 3ef8cdf6660 AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine adds 80906d9d160 Revert "[WebAssembly] Track frame registers through VReg an [...] adds 6c4d3773340 lldb: xfail TestCrossDSOTailCalls.py and TestCrossObjectTai [...] adds 9050d0fb593 [libcxx] Temporarily switch back to pthread backend for Fuchsia adds 51b521c07a7 [lld][WebAssembly] Use a more meaningful name for stub functions adds 73f371c31d2 [mlir] NFC: Fix trivial typos adds a4a42160c44 [mlir] support translation of multidimensional vectors to LLVM IR adds 42b3c38903c [clangd][test] Disable a particular testcase in FindExplici [...] adds 9b549f26fab AMDGPU: Update clang test adds 25b542c61fe [OPENMP]Do not emit RTTI descriptor for NVPTX devices. adds b82d18e1e8e [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stor [...] adds de022a8824f [NFC] Fold isHugeExpression into hasHugeExpression and upda [...] adds 65eb74e94b4 PointerLikeTypeTraits: Standardize NumLowBitsAvailable on s [...] adds 933b4212566 [mlir] Add missing dependency on LinalgUtils adds fb5fafb23cc Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well. adds 1645f5e496b [gn build] replace llvm_allow_tardy_revision with llvm_appe [...] adds 40ac4221c30 Move static function to inline function - this fixes a conc [...] adds 1b1022b42ad Add back other PowerPC link components. adds 30a8865142a [FastISel] Lower `llvm.dbg.value(undef, ...` correctly. adds 8ef57f3e3f1 [xray] add --no-demangle cli opt for llvm-xray extract to o [...] adds 2671df9bd67 [lldb/Debugger] Rename ExecuteIOHandlers to RunIOHandlers (NFC) adds 7b0d58e339b Add testing for DW_OP_piece and fix a bug with small Scalar [...] adds f55ab6f90b7 Fix a buffer-size bug when the first DW_OP_piece is undefined adds 83f4c3af021 [modules] Do not cache invalid state for modules that we at [...] adds 6c26d8968ad Add back more link components. adds cef838e65f9 Revert "[RISCV] Support ABI checking with per function targ [...] adds b78e8e0d79c Add extra test file forgotten in 45d7080. adds ad83bed2411 [NFC][PowerPC] Remove unnecessary link components. adds 6a970135904 [mlir][spirv] Add implied capabilities and availability for [...] adds ccedb918bb3 [mlir][spirv] Use symbolize functions in enum attribute predicates adds 961174f8787 [mlir][spirv] Fix SPV_MM_Vulkan extension reqirements adds 051d330314c Avoid creating an immutable map in the Automaton class. adds 117d4f1900c AMDGPU: Add register classes to MUBUF load patterns adds 01a6cd471f0 Don't dump IR output from this test to stdout. adds 24fca5cd712 [lldb] add to gdb to lldb doc adds 25cf941275e [lldb/CMake] Set LLVM_HOST_TRIPLE from TARGET_TRIPLE in sta [...] adds 0d3d584f82f [docs][ORC] Update the "utilities" section, tidy intro and [...] adds d3d7666678a [lldb/CMake] Remove duplicate entry adds caee96031d3 [Transforms][RISCV] Remove a "using namespace llvm" from an [...] adds adef2f5324c [docs][ORC] Fix some RST errors in the ORCv2 doc. adds f6d6b98eec4 [docs][ORC] Try to fix 'title-level inconsistent' error in [...] No new revisions were added by this update. Summary of changes: .../readability/IdentifierNamingCheck.cpp | 397 +- .../clang-tidy/readability/IdentifierNamingCheck.h | 76 +- clang-tools-extra/clang-tidy/utils/CMakeLists.txt | 1 + .../clang-tidy/utils/RenamerClangTidyCheck.cpp | 422 + .../clang-tidy/utils/RenamerClangTidyCheck.h | 150 + clang-tools-extra/clangd/FindTarget.cpp | 82 +- clang-tools-extra/clangd/Hover.cpp | 49 +- .../clangd/refactor/tweaks/DefineOutline.cpp | 2 +- .../clangd/unittests/FindTargetTests.cpp | 5 + clang-tools-extra/clangd/unittests/HoverTests.cpp | 53 +- clang/docs/ReleaseNotes.rst | 5 - clang/include/clang/AST/CanonicalType.h | 2 +- clang/include/clang/AST/DeclGroup.h | 2 +- clang/include/clang/AST/ExternalASTSource.h | 5 +- clang/include/clang/AST/TemplateName.h | 2 +- clang/include/clang/AST/Type.h | 6 +- clang/include/clang/AST/TypeLocVisitor.h | 1 - clang/include/clang/Basic/BuiltinsHexagon.def | 1910 +---- clang/include/clang/Basic/BuiltinsHexagonDep.def | 1690 ++++ clang/include/clang/Basic/IdentifierTable.h | 6 +- clang/include/clang/Basic/SourceLocation.h | 2 +- clang/include/clang/CodeGen/ConstantInitFuture.h | 10 +- clang/include/clang/Sema/Ownership.h | 2 +- clang/include/clang/Sema/Sema.h | 1 - .../clang/Serialization/InMemoryModuleCache.h | 42 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/StmtProfile.cpp | 6 +- clang/lib/Basic/CMakeLists.txt | 4 +- clang/lib/Basic/Targets/Hexagon.cpp | 6 + clang/lib/Basic/Version.cpp | 35 +- clang/lib/CodeGen/BackendUtil.cpp | 10 +- clang/lib/CodeGen/CGBuiltin.cpp | 3 + clang/lib/CodeGen/CGGPUBuiltin.cpp | 34 + clang/lib/CodeGen/CGOpenMPRuntime.cpp | 24 +- clang/lib/CodeGen/CodeGenFunction.h | 2 + clang/lib/CodeGen/CodeGenModule.cpp | 8 +- clang/lib/Driver/ToolChains/HIP.cpp | 1 + clang/lib/Driver/ToolChains/Hexagon.cpp | 1 - clang/lib/Headers/vecintrin.h | 8 +- clang/lib/Sema/SemaChecking.cpp | 824 +- clang/lib/Serialization/ASTReader.cpp | 2 +- clang/lib/Serialization/ASTWriter.cpp | 2 +- clang/lib/Serialization/InMemoryModuleCache.cpp | 29 +- clang/lib/Serialization/ModuleManager.cpp | 11 +- clang/test/CodeGen/builtins-hexagon-circ.c | 2 +- clang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c | 2 +- clang/test/CodeGen/hexagon-brev-store-elm.c | 2 +- clang/test/CodeGenHIP/printf-aggregate.cpp | 20 + clang/test/CodeGenHIP/printf.cpp | 44 + clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl | 8 +- clang/test/Driver/hip-printf.hip | 9 + .../Modules/Inputs/implicit-invalidate-chain/A.h | 2 - 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5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (fd9bfacb -> b9f1f357)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards fd9bfacb 0: update: llvm-linux: boot new b9f1f357 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (fd9bfacb) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 12617 +++++++++++++++++----------------- 03-build_linux/console.log | 700 +- 04-boot_linux/console.log | 480 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 10 +- console.log | 14001 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 14010 insertions(+), 14004 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (03647d2e261 -> 5194b51ed97)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/gcc. from 03647d2e261 Daily bump. adds c35a3046247 PR93253 – Document BOZ changes, make it friendlier in legacy code adds 5c06093ce90 aarch64: Fix BE SVE mode punning involving floats adds 3b5757ea87a Work around array out of bounds warning in mkdeps adds f7dff7699fd PR tree-optimization/92429 do not fold when updating epilog [...] adds 2588197b6c2 contrib: Verify the id to be printed is ancestor of the cor [...] adds 55c7ffae702 Fix uninitialized field in expand_operand. adds 7c6056d52ef Uninitialized padding in struct _dep. adds 2db99ef7896 Fix value numbering dealing with reverse byte order adds 1c2755a6a6b Fix spacing in a dump in value-prof.c. adds 545f5fad17f contrib: Check and if needed set user.name and user.email i [...] adds 8c197c851e7 [GCC][PATCH][AArch64]Add ACLE intrinsics for dot product (u [...] adds d916538965e libstdc++: Improve unordered containers == operator (PR 91263) adds f275d73a57f [GCC][PATCH][AArch64]Add ACLE intrinsics for bfdot for ARMv [...] adds 7aa4e0db959 gcc-git-customization.sh: avoid double expansion adds 66aae15b4ed gcc-git-customization.sh: Avoid double expansion adds e953433f089 [PATCH, GCC/ARM, 1/10] Fix -mcmse check in libgcc adds e27cf2e3726 [PATCH, GCC/ARM, 2/10] Add command line support for Armv8.1 [...] adds e0e4be48a98 [PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry functions adds 9722215a027 [PATCH, GCC/ARM, 4/10] Clear GPR with CLRM adds 0b1c7b27a7d [PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRM adds 2d924ca6203 [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscal [...] adds 1e4f3696a24 [PATCH, GCC/ARM, 7/10] Clear all VFP regs inline in hardflo [...] adds 0ab81d9cc73 [PATCH, GCC/ARM, 8/10] Do lazy store & load inline when cal [...] adds a464ffc2156 [PATCH, GCC/ARM, 9/10] Call nscall function with blxns adds 4747e2ccec9 [PATCH, GCC/ARM, 10/10] Enable -mcmse adds 7b4c373beb3 Add CLI and multilib support for Armv8.1-M Mainline MVE extensions adds 2e87b2f4121 [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 3ea9140170b [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 98d56ea8900 libstdc++: std::ctype fixes for recent versions of NetBSD adds f48c6014133 Fix noreorder symbol partitioning reversion. adds 801f5b96775 PR c++/93280 - ICE with aggregate assignment and DMI. adds f5b25e15165 Make profile estimation more precise adds 852f0ae8055 Fix ICE caused by swallowing a token in c_parser_consume_token adds b6a0ebd1920 Extern -param=max-predicted-iterations range. adds 1113de9499d Daily bump. adds 5194b51ed97 PR c++/93286 - ICE with __is_constructible and variadic template. No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 16 + contrib/gcc-git-customization.sh | 67 ++- gcc/ChangeLog | 255 +++++++++ gcc/DATESTAMP | 2 +- gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 6 +- gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.c | 45 +- gcc/config/aarch64/aarch64-simd-builtins.def | 10 + gcc/config/aarch64/aarch64-simd.md | 66 +++ gcc/config/aarch64/aarch64.c | 4 +- gcc/config/aarch64/arm_neon.h | 134 +++++ gcc/config/aarch64/iterators.md | 17 + gcc/config/arm/arm-builtins.c | 33 +- gcc/config/arm/arm-cpus.in | 48 +- gcc/config/arm/arm-modes.def | 5 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm-simd-builtin-types.def | 2 + gcc/config/arm/arm-tables.opt | 2 +- gcc/config/arm/arm.c | 623 +++++++++++++++++---- gcc/config/arm/arm.h | 41 +- gcc/config/arm/arm.md | 56 +- gcc/config/arm/arm_bf16.h | 41 ++ gcc/config/arm/arm_neon.h | 4 + gcc/config/arm/iterators.md | 22 +- gcc/config/arm/neon.md | 8 +- gcc/config/arm/predicates.md | 12 + gcc/config/arm/t-rmprofile | 17 +- gcc/config/arm/thumb2.md | 66 ++- gcc/config/arm/unspecs.md | 8 + gcc/config/arm/vfp.md | 162 ++++-- gcc/cp/ChangeLog | 10 + gcc/cp/init.c | 4 + gcc/cp/pt.c | 74 ++- gcc/cp/typeck2.c | 3 - gcc/doc/invoke.texi | 24 + gcc/fortran/ChangeLog | 12 + gcc/fortran/check.c | 7 +- gcc/fortran/gfortran.texi | 7 +- gcc/fortran/lang.opt | 2 +- gcc/fortran/primary.c | 2 +- gcc/ipa-fnsummary.c | 2 +- gcc/lto/ChangeLog | 6 + gcc/lto/lto-partition.c | 3 + gcc/optabs.h | 1 + gcc/params.opt | 2 +- gcc/predict.c | 102 ++-- gcc/profile-count.c | 9 + gcc/profile-count.h | 5 +- gcc/sched-deps.c | 1 + gcc/sched-int.h | 2 + gcc/testsuite/ChangeLog | 334 +++++++++++ gcc/testsuite/c-c++-common/pr92833-1.c | 4 + gcc/testsuite/c-c++-common/pr92833-2.c | 4 + gcc/testsuite/c-c++-common/pr92833-3.c | 4 + gcc/testsuite/c-c++-common/pr92833-4.c | 7 + gcc/testsuite/g++.dg/abi/mangle-neon.C | 5 + gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C | 13 + gcc/testsuite/g++.dg/ext/is_constructible4.C | 18 + .../g++.target/arm/bfloat_cpp_typecheck.C | 14 + .../aarch64/advsimd-intrinsics/bfdot-1.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-2.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-3.c | 28 + .../aarch64/advsimd-intrinsics/vdot-3-1.c | 136 +++++ .../aarch64/advsimd-intrinsics/vdot-3-2.c | 137 +++++ .../aarch64/advsimd-intrinsics/vdot-3-3.c | 31 + .../aarch64/advsimd-intrinsics/vdot-3-4.c | 31 + gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c | 118 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c | 16 + .../gcc.target/arm/bfloat16_scalar_typecheck.c | 219 ++++++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c | 91 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 94 ++++ .../gcc.target/arm/bfloat16_vector_typecheck_1.c | 263 +++++++++ .../gcc.target/arm/bfloat16_vector_typecheck_2.c | 252 +++++++++ gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c | 5 +- gcc/testsuite/gcc.target/arm/cmse/cmse-1.c | 18 +- gcc/testsuite/gcc.target/arm/cmse/cmse-14.c | 15 +- gcc/testsuite/gcc.target/arm/cmse/cmse-15.c | 7 +- gcc/testsuite/gcc.target/arm/cmse/cmse.exp | 43 +- .../gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c | 25 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c | 20 + .../arm/cmse/mainline/8_1m/bitfield-and-union.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-13.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/hard/cmse-13.c | 32 ++ .../arm/cmse/mainline/8_1m/hard/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/soft/cmse-13.c | 29 + .../arm/cmse/mainline/8_1m/soft/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/soft/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/soft/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c | 14 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/softfp/cmse-13.c | 28 + .../arm/cmse/mainline/8_1m/softfp/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/softfp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp/cmse-8.c | 27 + .../gcc.target/arm/cmse/mainline/8_1m/union-1.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/union-2.c | 27 + .../arm/cmse/mainline/{ => 8m}/bitfield-4.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-5.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-6.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-7.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-8.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-9.c | 2 +- .../cmse/mainline/{ => 8m}/bitfield-and-union.c | 2 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-13.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-5.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c | 10 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/union-1.c | 3 +- .../arm/cmse/mainline/{ => 8m}/union-2.c | 2 +- gcc/testsuite/gcc.target/arm/cmse/struct-1.c | 6 +- gcc/testsuite/gcc.target/arm/multilib.exp | 21 + gcc/testsuite/gfortran.dg/boz_7.f90 | 2 +- gcc/testsuite/lib/target-supports.exp | 16 +- gcc/tree-ssa-loop-niter.c | 7 +- gcc/tree-ssa-loop-niter.h | 2 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-vect-loop.c | 7 +- gcc/value-prof.c | 4 +- libcpp/mkdeps.c | 2 +- libgcc/ChangeLog | 6 + libgcc/config/arm/t-arm | 2 +- libstdc++-v3/ChangeLog | 31 + libstdc++-v3/config/os/bsd/netbsd/ctype_base.h | 40 +- .../config/os/bsd/netbsd/ctype_configure_char.cc | 12 +- libstdc++-v3/config/os/bsd/netbsd/ctype_inline.h | 2 +- libstdc++-v3/include/bits/hashtable.h | 7 + libstdc++-v3/include/bits/hashtable_policy.h | 127 ++--- .../unordered_multiset/operators/1.cc | 56 ++ .../23_containers/unordered_set/operators/1.cc | 48 ++ 166 files changed, 5832 insertions(+), 491 deletions(-) create mode 100644 gcc/config/arm/arm_bf16.h create mode 100644 gcc/testsuite/c-c++-common/pr92833-1.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-2.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-3.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-4.c create mode 100644 gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible4.C create mode 100644 gcc/testsuite/g++.target/arm/bfloat_cpp_typecheck.C create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_typecheck.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_2.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-4.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-5.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-6.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-7.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-8.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-9.c (94%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-and-union.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-13.c (90%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-7.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-8.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-13.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-5.c (79%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c (65%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-1.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-2.c (96%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (c96d7e0462 -> bf8e4b6c81)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/binutils-gdb. from c96d7e0462 Automatic date update in version.in adds 4814632e69 x86: VPEXTRQ/VPINSRQ are unavailable outside of 64-bit mode adds 9cf70a448b x86: add a few more missing VexWIG adds d0849eed78 x86: drop stale Vec_Imm4 related comment adds 45a4bb2010 x86: drop found_cpu_match local variable adds 0c3d948509 MSP430: Add input section rules for .upper sections to defau [...] adds 6d0be74bfa MSP430: Remove unused linker script template elf32msp430_3.sc adds 2da2eaf4ce [binutils][arm] PR25376 Change MVE into a CORE_HIGH feature adds 3112ed9799 Support for DWARF5 location lists entries adds 701adfb009 [gdb] Move ChangeLog entries to their right files adds 790f17188a Ensure proc-service symbols have default visibility (PR buil [...] adds e0cdfe3c14 Add type for $_tlb->process_environment_block->process_parameters adds 40c9409927 Fix some spelling errors. adds bf8e4b6c81 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gas/ChangeLog | 21 + gas/config/tc-arm.c | 13 +- gas/config/tc-i386.c | 10 +- gas/testsuite/gas/i386/avx512dq-inval.l | 13 + gas/testsuite/gas/i386/avx512dq-inval.s | 22 + gas/testsuite/gas/i386/i386.exp | 1 + gdb/ChangeLog | 30 ++ gdb/ChangeLog-1992 | 43 -- gdb/ChangeLog-1993 | 52 +-- gdb/ChangeLog-1995 | 3 - gdb/ChangeLog-1996 | 8 +- gdb/ChangeLog-1998 | 6 +- gdb/ChangeLog-1999 | 15 +- gdb/ChangeLog-2000 | 8 +- gdb/ChangeLog-2001 | 8 +- gdb/ChangeLog-2002 | 30 +- gdb/ChangeLog-2003 | 10 +- gdb/ChangeLog-2004 | 8 +- gdb/ChangeLog-2005 | 1 - gdb/ChangeLog-2006 | 19 +- gdb/ChangeLog-2007 | 12 +- gdb/ChangeLog-2008 | 9 +- gdb/ChangeLog-2009 | 14 +- gdb/ChangeLog-2010 | 10 +- gdb/ChangeLog-2011 | 20 +- gdb/ChangeLog-2012 | 8 +- gdb/ChangeLog-2013 | 6 +- gdb/ChangeLog-2014 | 9 +- gdb/ChangeLog-2015 | 35 +- gdb/ChangeLog-2016 | 4 +- gdb/ChangeLog-2017 | 19 +- gdb/ChangeLog-2018 | 56 ++- gdb/ChangeLog-2019 | 74 ++-- gdb/btrace.c | 4 +- gdb/charset.c | 2 +- gdb/doc/ChangeLog | 217 ++++++++++ gdb/dwarf2loc.c | 39 ++ gdb/nat/linux-btrace.c | 2 +- gdb/python/py-record-btrace.c | 2 +- gdb/record-btrace.c | 2 +- gdb/testsuite/ChangeLog | 15 + gdb/testsuite/ChangeLog-1993-2013 | 52 ++- gdb/testsuite/lib/gdb.exp | 2 +- gdb/windows-tdep.c | 61 ++- gdbsupport/gdb_proc_service.h | 29 ++ include/ChangeLog | 8 + include/opcode/arm.h | 7 +- ld/ChangeLog | 11 + ld/scripttempl/elf32msp430.sc | 8 + ld/scripttempl/elf32msp430_3.sc | 224 ---------- ld/testsuite/ld-msp430-elf/msp430-elf.exp | 2 + ld/testsuite/ld-msp430-elf/upper-input-sections.s | 33 ++ opcodes/ChangeLog | 27 ++ opcodes/arm-dis.c | 471 +++++++++++----------- opcodes/i386-opc.tbl | 26 +- opcodes/i386-tbl.h | 32 +- 57 files changed, 1047 insertions(+), 828 deletions(-) create mode 100644 gas/testsuite/gas/i386/avx512dq-inval.l create mode 100644 gas/testsuite/gas/i386/avx512dq-inval.s delete mode 100644 ld/scripttempl/elf32msp430_3.sc create mode 100644 ld/testsuite/ld-msp430-elf/upper-input-sections.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (d1673686 -> eed6f45e)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards d1673686 0: update: binutils-gcc-linux: boot new eed6f45e 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d1673686) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 162 +- 02-prepare_abe/console.log | 267 +- 03-build_abe-binutils/console.log | 10588 +++++------ 04-build_abe-stage1/console.log | 19259 ++++++++++---------- 05-build_linux/console.log | 3656 ++-- 06-boot_linux/console.log | 476 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 34525 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 34480 insertions(+), 34469 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (58265ad42a9 -> f6d6b98eec4)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/llvm-project. from 58265ad42a9 [mlir] fix broken links to Glossary adds 5cf1b01a011 [LegalizeDAG][TargetLowering] Move vXi64/i64->vXf32/f32 uin [...] adds afb22d7c33a [DebugInfo] Simplify the constructor of DWARFDebugAranges:: [...] adds 4f244bba4f6 [lldb] Fix asan failures in data-formatter-objc tests adds 773ae62ff85 [VE] i64 arguments, return values and constants adds ed181efa175 [HIP][AMDGPU] expand printf when compiling HIP to AMDGPU adds f8269bb0726 [gn build] Port ed181efa175 adds 59ac44b3c12 [LV] Make X86/assume.ll X86 independent (NFC). adds 23c113802e2 [LV] Allow assume calls in predicated blocks. adds 736a3802124 clang-format: [JS] tests for async wrapping. adds 0b21d552620 [IR] Mark memset.* intrinsics as IntrWriteMem. adds b08e8353a89 [clangd] Dont display `<unknown>` kinds in hover board adds 8a344674609 [Concepts] Fix ConceptSpecializationExpr profiling crash adds 75188b01e9a [PHIEliminate] Move dbg values after phi and label adds 00c74d0b644 Remove release note about in-process-cc1 adds 39d6b6c21f7 [lldb][NFC] Migrate several tests to expect_expr adds 19c5057e8df Fix "pointer is null" static analyzer warnings. NFCI. adds 23a887b0dd4 Fix unused variable warning. NFCI. adds d54d71b67e6 [clangd] Make output order of allTargetDecls deterministic adds d36b2649e5e [ELF] Optimization to LinkerScript::computeInputSections NFC adds c969335abdb Revert "[PHIEliminate] Move dbg values after phi and label" adds 4b6d9ac3926 Make lld cmake not compute commit revision twice adds cbaa32650a0 Removed an unused include from TypeLocVisitor.h adds 66c120f0256 [VectorUtils] Rework the Vector Function Database (VFDatabase). adds 4f5c65a5c80 try to unbreak build after 4b6d9ac392613 adds 2b81d3c6c6f [mlir][Linalg] Fix Linalg EDSC builders adds c24cf979608 [ARM][MVE] Enable extending gathers adds 15a6df52efa [lldb/DWARF/test] Freshen up debug_names tests adds 28bb43bdf80 [GlobalISel] Use more MachineIRBuilder helper methods adds 760b1751097 [ARM][LowOverheadLoops] Update liveness info adds 237fd943125 [Hexagon] Remove unnecessary case in StringSwitch, NFC adds fb9413cb84c Remove some SVN-specific code. adds 63f73545dd8 [GlobalISel] Pass MachineOperands into MachineIRBuilder hel [...] adds 885260d5d80 [GlobalISel] Don't arbitrarily limit a mask to 64 bits adds 7f5f6ff5476 [Hexagon] Add preprocessor test for hexagonv66 adds 9b2f3532c7f AMDGPU/GlobalISel: Select DS GWS intrinsics adds 81eaa3ddd06 [lldb][NFC] Delete TestDataFormatterObjCNSDate.py adds 1794158f90f [MC][test] Fix non-portable GNU diff option adds 4ca1ad85b7c AMDGPU/GlobalISel: Don't handle legacy buffer intrinsic adds 31458a9feec [llvm-exegesis][NFC] Refactor Mips tests fixtures into a ba [...] adds 6b357866496 [llvm-exegesis][mips] Add RegisterAliasingTest unit test adds bc413da0865 [Hexagon] Fix alignment info for __builtin_circ_lduh adds c29a9f64b78 [gn build] Port 6b357866496 adds 7acfda633f1 [llvm] Make new pass manager's OptimizationLevel a class adds 26646761e2b [lldb/Scripts] Remove swig_bot_lib/__init__.py adds 3478551bf3d [GVN] introduce GVNOptions to control GVN pass behavior adds 9b3254dbf9f [LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging adds d34e4152e3e [LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to [...] adds 81c67da0f20 remove an include that's unused after r347592 adds ee05138515a [lldb/test] Revert changes to debug-names-compressed.cpp adds cebba7ce395 [SystemZ] Avoid unnecessary conversions in vecintrin.h adds bed7626f04f [PowerPC][AIX] Make PIC the default relocation model for AIX adds 5caa1212957 [gn build] include revision information in lld --version output adds d51a15d86a2 [gn build] (manually) port bed7626f04f7 adds c87982b4670 Revert "[Loop Peeling] Add possibility to enable peeling on [...] adds 870094decfc [ELF] Decrease alignment of ThunkSection on 64-bit targets [...] adds 8ee2d168966 [Hexagon] Add a target feature to disable compound instructions adds c0d909a1b12 Delete control character from comment. (NFC) adds 20ca49b646b AMDGPU: Update tests to use modern buffer intrinsics adds 86d14ed766e TableGen: Remove dead code adds 03a592f18ba TableGen/GlobalISel: Fix srcvalue inputs adds 0d0fce42b0e GlobalISel: Preserve load/store metadata in IRTranslator adds d0943537e10 GlobalISel: Apply target MMO flags to atomics adds de4f88df97c AMDGPU: Remove IR section from MIR test adds a881fcafaa5 [clangd] Make define outline code action visible adds 0474fe465d8 [clangd] Print underlying type for decltypes in hover adds 61a89e17df4 [LegalizeDAG][Mips] Add an assert to protect a uint_to_fp i [...] adds 5f65065437c [Hexagon] Update autogeneated intrinsic information in LLVM adds be31a7b7eec GlobalISel: Move extension scalar narrowing to separate function adds a66d2817ca9 GlobalISel: Don't ignore requested ext narrowing type adds e12b840abfc AMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG adds 8945b23af59 AMDGPU: Update more tests to use modern buffer intrinsics adds ff1e3cad71e Don't run powerpc lit test case on other platforms. adds f5d98543b89 AMDGPU: Remove outdated comment adds 5f8e4121882 [lldb/test] Exted test for CMTime data formatter adds 59919c4d6b6 [libc++] Fix Windows DLL build for string. adds 39f746d8def [OpenMP][Tool] Fix memory leak and double-allocation adds d0b02aecacc Address redirect issue on Windows. adds 2d7a8cf9047 [ELF] -r: don't create .interp adds 6f3effbbf05 [Hexagon] Update autogenerated intrinsic info in clang adds 53b68e676fa Resubmit: [JumpThreading] Thread jumps through two basic blocks adds 1f2dad1fd57 [GVN] add GVN parameters parsing to new pass manager adds ecf0766cf14 [Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp adds 40514a7d7a3 [clangd] Add workaround for GCC5 host compilers. NFC. adds fc4e43ad618 [NFC] Remove unnecessary link components. adds c299d1981de scudo: Add initial memory tagging support. adds d5c6b8407c1 Factor out renaming logic from readability-identifier-naming adds cbc63fbdc43 [gn build] Port d5c6b8407c1 adds 8b321929483 [OPENMP]Avoid string concat where possible and use standard [...] adds 52b44902d05 [IR] fix crash in Constant::isElementWiseEqual() with FP types adds 3a05c3969c1 [WebAssembly] Track frame registers through VReg and local [...] adds 202446c639f Add BuiltinsHexagonDep.def to clang module map adds fa4112fffc6 [llvm-nm] Use `StringRef` over `const std::string &` params adds 91e758b7329 AMDGPU: Move permlane discard vdst_in optimization adds 3ef8cdf6660 AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine adds 80906d9d160 Revert "[WebAssembly] Track frame registers through VReg an [...] adds 6c4d3773340 lldb: xfail TestCrossDSOTailCalls.py and TestCrossObjectTai [...] adds 9050d0fb593 [libcxx] Temporarily switch back to pthread backend for Fuchsia adds 51b521c07a7 [lld][WebAssembly] Use a more meaningful name for stub functions adds 73f371c31d2 [mlir] NFC: Fix trivial typos adds a4a42160c44 [mlir] support translation of multidimensional vectors to LLVM IR adds 42b3c38903c [clangd][test] Disable a particular testcase in FindExplici [...] adds 9b549f26fab AMDGPU: Update clang test adds 25b542c61fe [OPENMP]Do not emit RTTI descriptor for NVPTX devices. adds b82d18e1e8e [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stor [...] adds de022a8824f [NFC] Fold isHugeExpression into hasHugeExpression and upda [...] adds 65eb74e94b4 PointerLikeTypeTraits: Standardize NumLowBitsAvailable on s [...] adds 933b4212566 [mlir] Add missing dependency on LinalgUtils adds fb5fafb23cc Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well. adds 1645f5e496b [gn build] replace llvm_allow_tardy_revision with llvm_appe [...] adds 40ac4221c30 Move static function to inline function - this fixes a conc [...] adds 1b1022b42ad Add back other PowerPC link components. adds 30a8865142a [FastISel] Lower `llvm.dbg.value(undef, ...` correctly. adds 8ef57f3e3f1 [xray] add --no-demangle cli opt for llvm-xray extract to o [...] adds 2671df9bd67 [lldb/Debugger] Rename ExecuteIOHandlers to RunIOHandlers (NFC) adds 7b0d58e339b Add testing for DW_OP_piece and fix a bug with small Scalar [...] adds f55ab6f90b7 Fix a buffer-size bug when the first DW_OP_piece is undefined adds 83f4c3af021 [modules] Do not cache invalid state for modules that we at [...] adds 6c26d8968ad Add back more link components. adds cef838e65f9 Revert "[RISCV] Support ABI checking with per function targ [...] adds b78e8e0d79c Add extra test file forgotten in 45d7080. adds ad83bed2411 [NFC][PowerPC] Remove unnecessary link components. adds 6a970135904 [mlir][spirv] Add implied capabilities and availability for [...] adds ccedb918bb3 [mlir][spirv] Use symbolize functions in enum attribute predicates adds 961174f8787 [mlir][spirv] Fix SPV_MM_Vulkan extension reqirements adds 051d330314c Avoid creating an immutable map in the Automaton class. adds 117d4f1900c AMDGPU: Add register classes to MUBUF load patterns adds 01a6cd471f0 Don't dump IR output from this test to stdout. new 24fca5cd712 [lldb] add to gdb to lldb doc new 25cf941275e [lldb/CMake] Set LLVM_HOST_TRIPLE from TARGET_TRIPLE in sta [...] new 0d3d584f82f [docs][ORC] Update the "utilities" section, tidy intro and [...] new d3d7666678a [lldb/CMake] Remove duplicate entry new caee96031d3 [Transforms][RISCV] Remove a "using namespace llvm" from an [...] new adef2f5324c [docs][ORC] Fix some RST errors in the ORCv2 doc. new f6d6b98eec4 [docs][ORC] Try to fix 'title-level inconsistent' error in [...] The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../readability/IdentifierNamingCheck.cpp | 397 +- .../clang-tidy/readability/IdentifierNamingCheck.h | 76 +- clang-tools-extra/clang-tidy/utils/CMakeLists.txt | 1 + .../clang-tidy/utils/RenamerClangTidyCheck.cpp | 422 + .../clang-tidy/utils/RenamerClangTidyCheck.h | 150 + clang-tools-extra/clangd/FindTarget.cpp | 82 +- clang-tools-extra/clangd/Hover.cpp | 49 +- .../clangd/refactor/tweaks/DefineOutline.cpp | 2 +- .../clangd/unittests/FindTargetTests.cpp | 5 + clang-tools-extra/clangd/unittests/HoverTests.cpp | 53 +- clang/docs/ReleaseNotes.rst | 5 - clang/include/clang/AST/CanonicalType.h | 2 +- clang/include/clang/AST/DeclGroup.h | 2 +- clang/include/clang/AST/ExternalASTSource.h | 5 +- clang/include/clang/AST/TemplateName.h | 2 +- clang/include/clang/AST/Type.h | 6 +- clang/include/clang/AST/TypeLocVisitor.h | 1 - clang/include/clang/Basic/BuiltinsHexagon.def | 1910 +---- clang/include/clang/Basic/BuiltinsHexagonDep.def | 1690 ++++ clang/include/clang/Basic/IdentifierTable.h | 6 +- clang/include/clang/Basic/SourceLocation.h | 2 +- clang/include/clang/CodeGen/ConstantInitFuture.h | 10 +- clang/include/clang/Sema/Ownership.h | 2 +- clang/include/clang/Sema/Sema.h | 1 - .../clang/Serialization/InMemoryModuleCache.h | 42 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/StmtProfile.cpp | 6 +- clang/lib/Basic/CMakeLists.txt | 4 +- clang/lib/Basic/Targets/Hexagon.cpp | 6 + clang/lib/Basic/Version.cpp | 35 +- clang/lib/CodeGen/BackendUtil.cpp | 10 +- clang/lib/CodeGen/CGBuiltin.cpp | 3 + clang/lib/CodeGen/CGGPUBuiltin.cpp | 34 + clang/lib/CodeGen/CGOpenMPRuntime.cpp | 24 +- clang/lib/CodeGen/CodeGenFunction.h | 2 + clang/lib/CodeGen/CodeGenModule.cpp | 8 +- clang/lib/Driver/ToolChains/HIP.cpp | 1 + clang/lib/Driver/ToolChains/Hexagon.cpp | 1 - clang/lib/Headers/vecintrin.h | 8 +- clang/lib/Sema/SemaChecking.cpp | 824 +- clang/lib/Serialization/ASTReader.cpp | 2 +- clang/lib/Serialization/ASTWriter.cpp | 2 +- clang/lib/Serialization/InMemoryModuleCache.cpp | 29 +- clang/lib/Serialization/ModuleManager.cpp | 11 +- clang/test/CodeGen/builtins-hexagon-circ.c | 2 +- clang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c | 2 +- clang/test/CodeGen/hexagon-brev-store-elm.c | 2 +- clang/test/CodeGenHIP/printf-aggregate.cpp | 20 + clang/test/CodeGenHIP/printf.cpp | 44 + clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl | 8 +- clang/test/Driver/hip-printf.hip | 9 + .../Modules/Inputs/implicit-invalidate-chain/A.h | 2 - .../Modules/Inputs/implicit-invalidate-chain/B.h | 2 - .../Modules/Inputs/implicit-invalidate-chain/C.h | 2 - .../implicit-invalidate-chain/module.modulemap | 3 - clang/test/Modules/implicit-invalidate-chain.c | 67 - .../OpenMP/nvptx_target_pure_deleted_codegen.cpp | 5 +- clang/test/Parser/explicit-bool.cpp | 62 + clang/test/Preprocessor/hexagon-predefines.c | 7 + clang/test/Sema/builtins-hexagon-v55.c | 16 +- clang/test/Sema/builtins-hexagon-v60.c | 15 +- clang/test/Sema/builtins-hexagon-v62.c | 14 +- clang/test/Sema/builtins-hvx-none.c | 17 +- clang/test/Sema/builtins-hvx-v60.c | 16 +- clang/test/Sema/builtins-hvx-v62.c | 15 +- clang/unittests/Format/FormatTestJS.cpp | 16 + clang/unittests/Frontend/FrontendActionTest.cpp | 6 +- .../Serialization/InMemoryModuleCacheTest.cpp | 38 +- .../lib/scudo/standalone/allocator_config.h | 4 +- compiler-rt/lib/scudo/standalone/combined.h | 140 +- compiler-rt/lib/scudo/standalone/common.h | 1 + compiler-rt/lib/scudo/standalone/linux.cpp | 8 + compiler-rt/lib/scudo/standalone/memtag.h | 231 + compiler-rt/lib/scudo/standalone/primary32.h | 4 + compiler-rt/lib/scudo/standalone/primary64.h | 24 +- .../lib/scudo/standalone/tests/combined_test.cpp | 102 +- .../lib/scudo/standalone/tests/primary_test.cpp | 4 + compiler-rt/lib/scudo/standalone/wrappers_c.inc | 8 + libcxx/include/__config | 3 +- libcxx/include/string | 1 + lld/CMakeLists.txt | 27 - lld/Common/CMakeLists.txt | 4 +- lld/ELF/LinkerScript.cpp | 8 +- lld/ELF/SyntheticSections.cpp | 4 +- lld/ELF/Writer.cpp | 4 +- lld/include/lld/Common/Version.inc.in | 5 - lld/test/ELF/aarch64-call26-thunk.s | 10 +- lld/test/ELF/aarch64-cortex-a53-843419-thunk.s | 6 +- lld/test/ELF/aarch64-jump26-thunk.s | 10 +- lld/test/ELF/aarch64-thunk-pi.s | 12 +- lld/test/ELF/aarch64-thunk-script.s | 18 +- lld/test/ELF/dynamic-linker.s | 9 +- lld/test/ELF/ppc64-dtprel.s | 8 +- lld/test/ELF/ppc64-ifunc.s | 22 +- lld/test/ELF/ppc64-long-branch.s | 4 +- lld/test/ELF/ppc64-tls-gd.s | 18 +- lld/test/ELF/ppc64-toc-restore.s | 4 +- lld/test/wasm/signature-mismatch-export.ll | 2 +- lld/test/wasm/signature-mismatch.ll | 2 +- lld/wasm/SymbolTable.cpp | 2 +- lldb/docs/use/map.rst | 32 + lldb/include/lldb/Core/Debugger.h | 2 +- .../anonymous-struct/TestCallUserAnonTypedef.py | 2 +- .../call-function/TestCallBuiltinFunction.py | 3 - .../call-function/TestCallUserDefinedFunction.py | 16 +- .../TestCallOverriddenMethod.py | 10 +- ...lassTemplateSpecializationParametersHandling.py | 3 +- .../expression/entry-bp/TestExprEntryBP.py | 5 +- .../import-std-module/basic/TestImportStdModule.py | 10 +- .../conflicts/TestStdModuleWithConflicts.py | 6 +- .../deque-basic/TestBasicDeque.py | 18 +- .../inline-namespace/TestInlineNamespace.py | 4 +- .../TestNamespaceLocalVarSameNameCppAndC.py | 8 +- .../expression/radar_8638051/Test8638051.py | 9 +- .../static-initializers/TestStaticInitializers.py | 4 +- .../test/commands/expression/test/TestExprs.py | 39 +- .../TestDataFormatterObjCNSData.py | 2 +- .../TestDataFormatterObjCNSDate.py | 34 - .../cmtime/TestDataFormatterCMTime.py | 16 +- .../data-formatter-objc/cmtime/main.m | 17 +- .../data-formatter/data-formatter-objc/main.m | 2 +- .../cross_dso/TestCrossDSOTailCalls.py | 3 +- .../cross_object/TestCrossObjectTailCalls.py | 3 +- .../test/lang/c/forward/TestForwardDeclaration.py | 2 +- .../lldbsuite/test/lang/cpp/auto/TestCPPAuto.py | 2 +- .../lldbsuite/test/lang/cpp/bool/TestCPPBool.py | 7 +- .../lang/cpp/call-function/TestCallCPPFunction.py | 3 +- .../lang/cpp/chained-calls/TestCppChainedCalls.py | 65 +- .../test/lang/cpp/char1632_t/TestChar1632T.py | 12 +- .../test/lang/cpp/char8_t/TestCxxChar8_t.py | 11 +- .../cpp/limit-debug-info/TestWithLimitDebugInfo.py | 8 +- lldb/scripts/swig_bot_lib/__init__.py | 0 lldb/source/API/SystemInitializerFull.cpp | 3 + lldb/source/CMakeLists.txt | 4 +- lldb/source/Core/Debugger.cpp | 4 +- lldb/source/Expression/DWARFExpression.cpp | 24 +- lldb/source/Interpreter/CommandInterpreter.cpp | 2 +- .../Plugins/ObjectFile/wasm/ObjectFileWasm.cpp | 23 + .../Plugins/ObjectFile/wasm/ObjectFileWasm.h | 291 +- lldb/source/Plugins/SymbolVendor/CMakeLists.txt | 1 + .../Plugins/SymbolVendor/wasm/CMakeLists.txt | 9 + .../Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp | 145 + .../Plugins/SymbolVendor/wasm/SymbolVendorWasm.h | 44 + lldb/test/API/CMakeLists.txt | 1 - lldb/test/CMakeLists.txt | 4 + .../ObjectFile/wasm/unified-debug-sections.yaml | 85 + .../SymbolFile/DWARF/dwarf5-index-is-used.cpp | 2 +- .../SymbolFile/DWARF/dwarf5-partial-index.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-basic-function.cpp | 27 +- .../SymbolFile/DWARF/find-basic-namespace.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-basic-type.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-basic-variable.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-function-regex.cpp | 7 +- lldb/test/Shell/SymbolFile/DWARF/find-method.cpp | 10 +- .../Shell/SymbolFile/DWARF/find-variable-dwo.cpp | 11 +- .../Shell/SymbolFile/DWARF/find-variable-file.cpp | 11 +- lldb/tools/lldb-test/SystemInitializerTest.cpp | 3 + lldb/unittests/Expression/DWARFExpressionTest.cpp | 28 +- llvm/cmake/modules/LLVMConfig.cmake.in | 2 + llvm/docs/CMake.rst | 2 +- llvm/docs/ORCv2.rst | 187 +- llvm/include/llvm/ADT/IntervalMap.h | 2 +- llvm/include/llvm/ADT/PointerEmbeddedInt.h | 2 +- llvm/include/llvm/ADT/PointerIntPair.h | 3 +- .../llvm/Analysis/ScalarEvolutionExpressions.h | 2 +- llvm/include/llvm/Analysis/TargetLibraryInfo.h | 6 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 2 - llvm/include/llvm/Analysis/VectorUtils.h | 85 +- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 21 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 7 +- llvm/include/llvm/CodeGen/TargetLowering.h | 21 +- .../llvm/DebugInfo/DWARF/DWARFDebugAranges.h | 3 +- llvm/include/llvm/IR/Intrinsics.td | 7 +- llvm/include/llvm/IR/IntrinsicsHexagon.td | 6176 +------------- ...ntrinsicsHexagon.td => IntrinsicsHexagonDep.td} | 8383 ++++++++++---------- llvm/include/llvm/IR/Use.h | 4 +- llvm/include/llvm/Passes/PassBuilder.h | 54 +- llvm/include/llvm/Support/Automaton.h | 63 +- llvm/include/llvm/Support/PointerLikeTypeTraits.h | 14 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 13 - llvm/include/llvm/Transforms/Scalar/GVN.h | 41 + .../include/llvm/Transforms/Scalar/JumpThreading.h | 5 + .../llvm/Transforms/Utils/AMDGPUEmitPrintf.h | 25 + llvm/include/llvm/Transforms/Utils/SizeOpts.h | 16 +- .../Vectorize/LoopVectorizationLegality.h | 10 + llvm/lib/Analysis/GlobalsModRef.cpp | 2 +- llvm/lib/Analysis/LazyCallGraph.cpp | 8 +- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 2 +- llvm/lib/Analysis/ScalarEvolution.cpp | 16 +- llvm/lib/Analysis/VectorUtils.cpp | 1 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 94 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 393 +- llvm/lib/CodeGen/LivePhysRegs.cpp | 13 + llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 61 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 59 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 140 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 56 + llvm/lib/IR/Constants.cpp | 15 +- llvm/lib/LTO/LTOBackend.cpp | 8 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 1 - llvm/lib/ObjectYAML/ELFYAML.cpp | 2 + llvm/lib/Passes/PassBuilder.cpp | 142 +- llvm/lib/Passes/PassRegistry.def | 6 +- llvm/lib/Target/AArch64/AArch64Combine.td | 9 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 14 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 4 +- .../Target/AArch64/AArch64PreLegalizerCombiner.cpp | 26 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 116 + llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 45 - llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 5 - llvm/lib/Target/AMDGPU/BUFInstructions.td | 18 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 18 - llvm/lib/Target/AMDGPU/VOP3Instructions.td | 46 +- llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 68 + llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 87 +- llvm/lib/Target/Hexagon/Hexagon.td | 31 +- llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 38 +- llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td | 32 +- llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 6067 +++++++------- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 12 +- llvm/lib/Target/Hexagon/HexagonPatterns.td | 25 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 2 + llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 7 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 12 - 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5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (5287fb29 -> 95c9bf8b)

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5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (03647d2e261 -> 5194b51ed97)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/gcc. from 03647d2e261 Daily bump. adds c35a3046247 PR93253 – Document BOZ changes, make it friendlier in legacy code adds 5c06093ce90 aarch64: Fix BE SVE mode punning involving floats adds 3b5757ea87a Work around array out of bounds warning in mkdeps adds f7dff7699fd PR tree-optimization/92429 do not fold when updating epilog [...] adds 2588197b6c2 contrib: Verify the id to be printed is ancestor of the cor [...] adds 55c7ffae702 Fix uninitialized field in expand_operand. adds 7c6056d52ef Uninitialized padding in struct _dep. adds 2db99ef7896 Fix value numbering dealing with reverse byte order adds 1c2755a6a6b Fix spacing in a dump in value-prof.c. adds 545f5fad17f contrib: Check and if needed set user.name and user.email i [...] adds 8c197c851e7 [GCC][PATCH][AArch64]Add ACLE intrinsics for dot product (u [...] adds d916538965e libstdc++: Improve unordered containers == operator (PR 91263) adds f275d73a57f [GCC][PATCH][AArch64]Add ACLE intrinsics for bfdot for ARMv [...] adds 7aa4e0db959 gcc-git-customization.sh: avoid double expansion adds 66aae15b4ed gcc-git-customization.sh: Avoid double expansion adds e953433f089 [PATCH, GCC/ARM, 1/10] Fix -mcmse check in libgcc adds e27cf2e3726 [PATCH, GCC/ARM, 2/10] Add command line support for Armv8.1 [...] adds e0e4be48a98 [PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry functions adds 9722215a027 [PATCH, GCC/ARM, 4/10] Clear GPR with CLRM adds 0b1c7b27a7d [PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRM adds 2d924ca6203 [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscal [...] adds 1e4f3696a24 [PATCH, GCC/ARM, 7/10] Clear all VFP regs inline in hardflo [...] adds 0ab81d9cc73 [PATCH, GCC/ARM, 8/10] Do lazy store & load inline when cal [...] adds a464ffc2156 [PATCH, GCC/ARM, 9/10] Call nscall function with blxns adds 4747e2ccec9 [PATCH, GCC/ARM, 10/10] Enable -mcmse adds 7b4c373beb3 Add CLI and multilib support for Armv8.1-M Mainline MVE extensions adds 2e87b2f4121 [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 3ea9140170b [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 98d56ea8900 libstdc++: std::ctype fixes for recent versions of NetBSD adds f48c6014133 Fix noreorder symbol partitioning reversion. adds 801f5b96775 PR c++/93280 - ICE with aggregate assignment and DMI. adds f5b25e15165 Make profile estimation more precise adds 852f0ae8055 Fix ICE caused by swallowing a token in c_parser_consume_token adds b6a0ebd1920 Extern -param=max-predicted-iterations range. adds 1113de9499d Daily bump. adds 5194b51ed97 PR c++/93286 - ICE with __is_constructible and variadic template. No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 16 + contrib/gcc-git-customization.sh | 67 ++- gcc/ChangeLog | 255 +++++++++ gcc/DATESTAMP | 2 +- gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 6 +- gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.c | 45 +- gcc/config/aarch64/aarch64-simd-builtins.def | 10 + gcc/config/aarch64/aarch64-simd.md | 66 +++ gcc/config/aarch64/aarch64.c | 4 +- gcc/config/aarch64/arm_neon.h | 134 +++++ gcc/config/aarch64/iterators.md | 17 + gcc/config/arm/arm-builtins.c | 33 +- gcc/config/arm/arm-cpus.in | 48 +- gcc/config/arm/arm-modes.def | 5 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm-simd-builtin-types.def | 2 + gcc/config/arm/arm-tables.opt | 2 +- gcc/config/arm/arm.c | 623 +++++++++++++++++---- gcc/config/arm/arm.h | 41 +- gcc/config/arm/arm.md | 56 +- gcc/config/arm/arm_bf16.h | 41 ++ gcc/config/arm/arm_neon.h | 4 + gcc/config/arm/iterators.md | 22 +- gcc/config/arm/neon.md | 8 +- gcc/config/arm/predicates.md | 12 + gcc/config/arm/t-rmprofile | 17 +- gcc/config/arm/thumb2.md | 66 ++- gcc/config/arm/unspecs.md | 8 + gcc/config/arm/vfp.md | 162 ++++-- gcc/cp/ChangeLog | 10 + gcc/cp/init.c | 4 + gcc/cp/pt.c | 74 ++- gcc/cp/typeck2.c | 3 - gcc/doc/invoke.texi | 24 + gcc/fortran/ChangeLog | 12 + gcc/fortran/check.c | 7 +- gcc/fortran/gfortran.texi | 7 +- gcc/fortran/lang.opt | 2 +- gcc/fortran/primary.c | 2 +- gcc/ipa-fnsummary.c | 2 +- gcc/lto/ChangeLog | 6 + gcc/lto/lto-partition.c | 3 + gcc/optabs.h | 1 + gcc/params.opt | 2 +- gcc/predict.c | 102 ++-- gcc/profile-count.c | 9 + gcc/profile-count.h | 5 +- gcc/sched-deps.c | 1 + gcc/sched-int.h | 2 + gcc/testsuite/ChangeLog | 334 +++++++++++ gcc/testsuite/c-c++-common/pr92833-1.c | 4 + gcc/testsuite/c-c++-common/pr92833-2.c | 4 + gcc/testsuite/c-c++-common/pr92833-3.c | 4 + gcc/testsuite/c-c++-common/pr92833-4.c | 7 + gcc/testsuite/g++.dg/abi/mangle-neon.C | 5 + gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C | 13 + gcc/testsuite/g++.dg/ext/is_constructible4.C | 18 + .../g++.target/arm/bfloat_cpp_typecheck.C | 14 + .../aarch64/advsimd-intrinsics/bfdot-1.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-2.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-3.c | 28 + .../aarch64/advsimd-intrinsics/vdot-3-1.c | 136 +++++ .../aarch64/advsimd-intrinsics/vdot-3-2.c | 137 +++++ .../aarch64/advsimd-intrinsics/vdot-3-3.c | 31 + .../aarch64/advsimd-intrinsics/vdot-3-4.c | 31 + gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c | 118 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c | 16 + .../gcc.target/arm/bfloat16_scalar_typecheck.c | 219 ++++++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c | 91 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 94 ++++ .../gcc.target/arm/bfloat16_vector_typecheck_1.c | 263 +++++++++ .../gcc.target/arm/bfloat16_vector_typecheck_2.c | 252 +++++++++ gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c | 5 +- gcc/testsuite/gcc.target/arm/cmse/cmse-1.c | 18 +- gcc/testsuite/gcc.target/arm/cmse/cmse-14.c | 15 +- gcc/testsuite/gcc.target/arm/cmse/cmse-15.c | 7 +- gcc/testsuite/gcc.target/arm/cmse/cmse.exp | 43 +- .../gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c | 25 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c | 20 + .../arm/cmse/mainline/8_1m/bitfield-and-union.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-13.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/hard/cmse-13.c | 32 ++ .../arm/cmse/mainline/8_1m/hard/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/soft/cmse-13.c | 29 + .../arm/cmse/mainline/8_1m/soft/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/soft/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/soft/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c | 14 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/softfp/cmse-13.c | 28 + .../arm/cmse/mainline/8_1m/softfp/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/softfp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp/cmse-8.c | 27 + .../gcc.target/arm/cmse/mainline/8_1m/union-1.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/union-2.c | 27 + .../arm/cmse/mainline/{ => 8m}/bitfield-4.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-5.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-6.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-7.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-8.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-9.c | 2 +- .../cmse/mainline/{ => 8m}/bitfield-and-union.c | 2 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-13.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-5.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c | 10 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/union-1.c | 3 +- .../arm/cmse/mainline/{ => 8m}/union-2.c | 2 +- gcc/testsuite/gcc.target/arm/cmse/struct-1.c | 6 +- gcc/testsuite/gcc.target/arm/multilib.exp | 21 + gcc/testsuite/gfortran.dg/boz_7.f90 | 2 +- gcc/testsuite/lib/target-supports.exp | 16 +- gcc/tree-ssa-loop-niter.c | 7 +- gcc/tree-ssa-loop-niter.h | 2 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-vect-loop.c | 7 +- gcc/value-prof.c | 4 +- libcpp/mkdeps.c | 2 +- libgcc/ChangeLog | 6 + libgcc/config/arm/t-arm | 2 +- libstdc++-v3/ChangeLog | 31 + libstdc++-v3/config/os/bsd/netbsd/ctype_base.h | 40 +- .../config/os/bsd/netbsd/ctype_configure_char.cc | 12 +- libstdc++-v3/config/os/bsd/netbsd/ctype_inline.h | 2 +- libstdc++-v3/include/bits/hashtable.h | 7 + libstdc++-v3/include/bits/hashtable_policy.h | 127 ++--- .../unordered_multiset/operators/1.cc | 56 ++ .../23_containers/unordered_set/operators/1.cc | 48 ++ 166 files changed, 5832 insertions(+), 491 deletions(-) create mode 100644 gcc/config/arm/arm_bf16.h create mode 100644 gcc/testsuite/c-c++-common/pr92833-1.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-2.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-3.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-4.c create mode 100644 gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible4.C create mode 100644 gcc/testsuite/g++.target/arm/bfloat_cpp_typecheck.C create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_typecheck.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_2.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-4.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-5.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-6.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-7.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-8.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-9.c (94%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-and-union.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-13.c (90%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-7.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-8.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-13.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-5.c (79%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c (65%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-1.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-2.c (96%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits January 2020