Tcwg-commits January 2020

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig updated (ddcb894f -> 82b77953)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards ddcb894f 0: update: llvm-linux: all new 82b77953 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ddcb894f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-build_llvm/console.log | 12546 +++++++++++++++++------------------ 03-build_linux/console.log | 812 +-- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 10 +- console.log | 13615 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13601 insertions(+), 13618 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig updated (2a0f6c61b4d -> 3ea9140170b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig in repository toolchain/ci/gcc. from 2a0f6c61b4d libstdc++: Fix weakly_incrementable to allow __int128 (PR 93267) adds bc071d3a951 Fix ctz issues (PR93231) adds 7192b1ec124 PR c++/92871 - bad code with xvalue and GNU ?: extension. adds 596334fa040 PR c++/93257 - consteval void function. adds 299ddc61213 Revert "PR c++/33799 - destroy return value if local cleanu [...] adds 83fe2b92183 Fix "PR c++/91073 if constexpr no longer works directly wit [...] adds 49e9a9996ab analyzer: fix comment adds 5b6681201ae analyzer: add note about -fdump-ipa-analyzer to internal docs adds 03647d2e261 Daily bump. adds c35a3046247 PR93253 – Document BOZ changes, make it friendlier in legacy code adds 5c06093ce90 aarch64: Fix BE SVE mode punning involving floats adds 3b5757ea87a Work around array out of bounds warning in mkdeps adds f7dff7699fd PR tree-optimization/92429 do not fold when updating epilog [...] adds 2588197b6c2 contrib: Verify the id to be printed is ancestor of the cor [...] adds 55c7ffae702 Fix uninitialized field in expand_operand. adds 7c6056d52ef Uninitialized padding in struct _dep. adds 2db99ef7896 Fix value numbering dealing with reverse byte order adds 1c2755a6a6b Fix spacing in a dump in value-prof.c. adds 545f5fad17f contrib: Check and if needed set user.name and user.email i [...] adds 8c197c851e7 [GCC][PATCH][AArch64]Add ACLE intrinsics for dot product (u [...] adds d916538965e libstdc++: Improve unordered containers == operator (PR 91263) adds f275d73a57f [GCC][PATCH][AArch64]Add ACLE intrinsics for bfdot for ARMv [...] adds 7aa4e0db959 gcc-git-customization.sh: avoid double expansion adds 66aae15b4ed gcc-git-customization.sh: Avoid double expansion adds e953433f089 [PATCH, GCC/ARM, 1/10] Fix -mcmse check in libgcc adds e27cf2e3726 [PATCH, GCC/ARM, 2/10] Add command line support for Armv8.1 [...] adds e0e4be48a98 [PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry functions adds 9722215a027 [PATCH, GCC/ARM, 4/10] Clear GPR with CLRM adds 0b1c7b27a7d [PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRM adds 2d924ca6203 [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscal [...] adds 1e4f3696a24 [PATCH, GCC/ARM, 7/10] Clear all VFP regs inline in hardflo [...] adds 0ab81d9cc73 [PATCH, GCC/ARM, 8/10] Do lazy store & load inline when cal [...] adds a464ffc2156 [PATCH, GCC/ARM, 9/10] Call nscall function with blxns adds 4747e2ccec9 [PATCH, GCC/ARM, 10/10] Enable -mcmse adds 7b4c373beb3 Add CLI and multilib support for Armv8.1-M Mainline MVE extensions adds 2e87b2f4121 [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 3ea9140170b [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 16 + contrib/gcc-git-customization.sh | 67 ++- gcc/ChangeLog | 247 ++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 4 + gcc/analyzer/engine.cc | 2 +- gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.c | 45 +- gcc/config/aarch64/aarch64-simd-builtins.def | 10 + gcc/config/aarch64/aarch64-simd.md | 66 +++ gcc/config/aarch64/aarch64.c | 4 +- gcc/config/aarch64/arm_neon.h | 134 +++++ gcc/config/aarch64/iterators.md | 17 + gcc/config/arm/arm-builtins.c | 33 +- gcc/config/arm/arm-cpus.in | 48 +- gcc/config/arm/arm-modes.def | 5 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm-simd-builtin-types.def | 2 + gcc/config/arm/arm-tables.opt | 2 +- gcc/config/arm/arm.c | 623 +++++++++++++++++---- gcc/config/arm/arm.h | 41 +- gcc/config/arm/arm.md | 56 +- gcc/config/arm/arm_bf16.h | 41 ++ gcc/config/arm/arm_neon.h | 4 + gcc/config/arm/iterators.md | 22 +- gcc/config/arm/neon.md | 8 +- gcc/config/arm/predicates.md | 12 + gcc/config/arm/t-rmprofile | 17 +- gcc/config/arm/thumb2.md | 66 ++- gcc/config/arm/unspecs.md | 8 + gcc/config/arm/vfp.md | 162 ++++-- gcc/cp/ChangeLog | 27 + gcc/cp/call.c | 24 +- gcc/cp/constexpr.c | 3 +- gcc/cp/cp-tree.h | 15 +- gcc/cp/decl.c | 14 - gcc/cp/parser.c | 26 +- gcc/cp/typeck.c | 9 - gcc/doc/analyzer.texi | 2 + gcc/doc/invoke.texi | 24 + gcc/fortran/ChangeLog | 12 + gcc/fortran/check.c | 7 +- gcc/fortran/gfortran.texi | 7 +- gcc/fortran/lang.opt | 2 +- gcc/fortran/primary.c | 2 +- gcc/optabs.h | 1 + gcc/sched-deps.c | 1 + gcc/sched-int.h | 2 + gcc/testsuite/ChangeLog | 340 +++++++++++ gcc/testsuite/g++.dg/abi/mangle-neon.C | 5 + gcc/testsuite/g++.dg/concepts/pr91073-1.C | 37 ++ gcc/testsuite/g++.dg/concepts/pr91073-2.C | 19 + gcc/testsuite/g++.dg/cpp2a/consteval-void1.C | 10 + gcc/testsuite/g++.dg/eh/return1.C | 2 +- gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C | 13 + gcc/testsuite/g++.dg/ext/temp-extend1.C | 2 +- .../g++.target/arm/bfloat_cpp_typecheck.C | 14 + .../{gcc.target/aarch64 => gcc.dg}/pr90838.c | 15 +- gcc/testsuite/gcc.dg/pr93231.c | 35 ++ .../aarch64/advsimd-intrinsics/bfdot-1.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-2.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-3.c | 28 + .../aarch64/advsimd-intrinsics/vdot-3-1.c | 136 +++++ .../aarch64/advsimd-intrinsics/vdot-3-2.c | 137 +++++ .../aarch64/advsimd-intrinsics/vdot-3-3.c | 31 + .../aarch64/advsimd-intrinsics/vdot-3-4.c | 31 + gcc/testsuite/gcc.target/aarch64/pr90838.c | 2 +- gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c | 118 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c | 16 + .../gcc.target/arm/bfloat16_scalar_typecheck.c | 219 ++++++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c | 91 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 97 ++++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 93 +++ gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 94 ++++ .../gcc.target/arm/bfloat16_vector_typecheck_1.c | 263 +++++++++ .../gcc.target/arm/bfloat16_vector_typecheck_2.c | 252 +++++++++ gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c | 5 +- gcc/testsuite/gcc.target/arm/cmse/cmse-1.c | 18 +- gcc/testsuite/gcc.target/arm/cmse/cmse-14.c | 15 +- gcc/testsuite/gcc.target/arm/cmse/cmse-15.c | 7 +- gcc/testsuite/gcc.target/arm/cmse/cmse.exp | 43 +- .../gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c | 25 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c | 20 + .../arm/cmse/mainline/8_1m/bitfield-and-union.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-13.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/hard/cmse-13.c | 32 ++ .../arm/cmse/mainline/8_1m/hard/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/soft/cmse-13.c | 29 + .../arm/cmse/mainline/8_1m/soft/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/soft/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/soft/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c | 14 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/softfp/cmse-13.c | 28 + .../arm/cmse/mainline/8_1m/softfp/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/softfp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp/cmse-8.c | 27 + .../gcc.target/arm/cmse/mainline/8_1m/union-1.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/union-2.c | 27 + .../arm/cmse/mainline/{ => 8m}/bitfield-4.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-5.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-6.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-7.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-8.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-9.c | 2 +- .../cmse/mainline/{ => 8m}/bitfield-and-union.c | 2 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-13.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-5.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c | 10 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/union-1.c | 3 +- .../arm/cmse/mainline/{ => 8m}/union-2.c | 2 +- gcc/testsuite/gcc.target/arm/cmse/struct-1.c | 6 +- gcc/testsuite/gcc.target/arm/multilib.exp | 21 + gcc/testsuite/gfortran.dg/boz_7.f90 | 2 +- gcc/testsuite/lib/target-supports.exp | 16 +- gcc/tree-ssa-forwprop.c | 27 +- gcc/tree-ssa-loop-niter.c | 7 +- gcc/tree-ssa-loop-niter.h | 2 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-vect-loop.c | 7 +- gcc/value-prof.c | 4 +- libcpp/mkdeps.c | 2 +- libgcc/ChangeLog | 6 + libgcc/config/arm/t-arm | 2 +- libstdc++-v3/ChangeLog | 13 + libstdc++-v3/include/bits/hashtable.h | 7 + libstdc++-v3/include/bits/hashtable_policy.h | 127 ++--- .../unordered_multiset/operators/1.cc | 56 ++ .../23_containers/unordered_set/operators/1.cc | 48 ++ 164 files changed, 5805 insertions(+), 450 deletions(-) create mode 100644 gcc/config/arm/arm_bf16.h create mode 100644 gcc/testsuite/g++.dg/concepts/pr91073-1.C create mode 100644 gcc/testsuite/g++.dg/concepts/pr91073-2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/consteval-void1.C create mode 100644 gcc/testsuite/g++.dg/ext/arm-bf16/bf16-mangle-1.C create mode 100644 gcc/testsuite/g++.target/arm/bfloat_cpp_typecheck.C copy gcc/testsuite/{gcc.target/aarch64 => gcc.dg}/pr90838.c (75%) create mode 100644 gcc/testsuite/gcc.dg/pr93231.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_4.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_typecheck.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_vector_typecheck_2.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-4.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-5.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-6.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-7.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-8.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-9.c (94%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-and-union.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-13.c (90%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-7.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-8.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-13.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-5.c (79%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c (65%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-1.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-2.c (96%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig updated (0d1cc75df1 -> 3112ed9799)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig in repository toolchain/ci/binutils-gdb. from 0d1cc75df1 Set the default page size of the PDP11 target to 8192 bytes. adds 8dc3273e0c Use get_thread_regcache instead of get_current_regcache in p [...] adds c12081a66b texi2pod.pl: import support for @t{...} from gcc adds c96d7e0462 Automatic date update in version.in adds 4814632e69 x86: VPEXTRQ/VPINSRQ are unavailable outside of 64-bit mode adds 9cf70a448b x86: add a few more missing VexWIG adds d0849eed78 x86: drop stale Vec_Imm4 related comment adds 45a4bb2010 x86: drop found_cpu_match local variable adds 0c3d948509 MSP430: Add input section rules for .upper sections to defau [...] adds 6d0be74bfa MSP430: Remove unused linker script template elf32msp430_3.sc adds 2da2eaf4ce [binutils][arm] PR25376 Change MVE into a CORE_HIGH feature new 3112ed9799 Support for DWARF5 location lists entries The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- etc/ChangeLog | 4 + etc/texi2pod.pl | 1 + gas/ChangeLog | 21 + gas/config/tc-arm.c | 13 +- gas/config/tc-i386.c | 10 +- gas/testsuite/gas/i386/avx512dq-inval.l | 13 + gas/testsuite/gas/i386/avx512dq-inval.s | 22 + gas/testsuite/gas/i386/i386.exp | 1 + gdb/ChangeLog | 10 + gdb/dwarf2loc.c | 39 ++ gdb/infcmd.c | 3 +- include/ChangeLog | 8 + include/opcode/arm.h | 7 +- ld/ChangeLog | 11 + ld/scripttempl/elf32msp430.sc | 8 + ld/scripttempl/elf32msp430_3.sc | 224 ---------- ld/testsuite/ld-msp430-elf/msp430-elf.exp | 2 + ld/testsuite/ld-msp430-elf/upper-input-sections.s | 33 ++ opcodes/ChangeLog | 27 ++ opcodes/arm-dis.c | 471 +++++++++++----------- opcodes/i386-opc.tbl | 26 +- opcodes/i386-tbl.h | 32 +- 23 files changed, 481 insertions(+), 507 deletions(-) create mode 100644 gas/testsuite/gas/i386/avx512dq-inval.l create mode 100644 gas/testsuite/gas/i386/avx512dq-inval.s delete mode 100644 ld/scripttempl/elf32msp430_3.sc create mode 100644 ld/testsuite/ld-msp430-elf/upper-input-sections.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig updated (972393d4 -> cb56b497)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards 972393d4 2: update: binutils-gcc-linux: all new cb56b497 2: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (972393d4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11107 +++++------ 04-build_abe-stage1/console.log | 15841 ++++++++-------- 05-build_linux/console.log | 8030 ++++---- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 94 +- console.log | 35816 ++++++++++++++++++------------------ jenkins/manifest.sh | 16 +- results | 2 +- 11 files changed, 35747 insertions(+), 35767 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig updated (95e20af9fb9c -> f5ae2ea6347a)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig in repository toolchain/ci/linux. from 95e20af9fb9c Merge tag 'nfs-for-5.5-2' of git://git.linux-nfs.org/proje [...] adds c64cd6e34ea3 reimplement path_mountpoint() with less magic adds 508c8772760d fix autofs regression caused by follow_managed() changes adds 84bf39461e61 Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux [...] adds cb1eeb75cf3d crypto: hisilicon/sec2 - Use atomics instead of __sync adds 0174cb6ce944 Merge branch 'linus' of git://git.kernel.org/pub/scm/linux [...] adds dbff1e07b02d platform/x86: intel-ips: Use the correct style for SPDX Li [...] adds 638bc4ca3d28 platform/mellanox: fix potential deadlock in the tmfifo driver adds 6ae01050e49f platform/x86: GPD pocket fan: Use default values when wron [...] adds 1f27dbd8265d platform/x86: GPD pocket fan: Allow somewhat lower/higher [...] adds 515ff674bb9b platform/x86: intel_pmc_core: update Comet Lake platform driver adds 176a7fca81c5 platform/x86: asus-wmi: Fix keyboard brightness cannot be [...] adds f4094826779d Documentation/ABI: Fix documentation inconsistency for mlx [...] adds f3efc406d67e Documentation/ABI: Add missed attribute for mlxreg-io sysf [...] adds 51d69817519f Merge tag 'platform-drivers-x86-v5.5-3' of git://git.infra [...] adds 051d75d3bb31 MAINTAINERS: Update Ley Foon Tan's email address adds a4feff2264df Merge branch 'for-linus' of git://git.kernel.org/pub/scm/l [...] adds f5ae2ea6347a Fix built-in early-load Intel microcode alignment No new revisions were added by this update. Summary of changes: Documentation/ABI/stable/sysfs-driver-mlxreg-io | 13 +++- MAINTAINERS | 8 +-- drivers/base/firmware_loader/builtin/Makefile | 2 +- drivers/crypto/hisilicon/sec2/sec.h | 6 +- drivers/crypto/hisilicon/sec2/sec_crypto.c | 12 ++-- drivers/crypto/hisilicon/sec2/sec_main.c | 14 +++- drivers/platform/mellanox/mlxbf-tmfifo.c | 19 +++--- drivers/platform/x86/asus-wmi.c | 8 +-- drivers/platform/x86/gpd-pocket-fan.c | 27 ++++++-- drivers/platform/x86/intel_ips.h | 2 +- drivers/platform/x86/intel_pmc_core.h | 2 +- drivers/platform/x86/intel_pmc_core_pltdrv.c | 2 + fs/namei.c | 90 ++++--------------------- fs/nfs/nfstrace.h | 2 - include/linux/namei.h | 1 - 15 files changed, 85 insertions(+), 123 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig updated (005c7908 -> 057449ec)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 005c7908 0: update: llvm-linux: boot new 057449ec 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (005c7908) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 11968 +++++++++++++++++----------------- 03-build_linux/console.log | 668 +- 04-boot_linux/console.log | 442 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 29 + console.log | 13275 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13308 insertions(+), 13250 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[binutils-gdb] branch master updated (3112ed97991 -> 701adfb0092)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 3112ed97991 Support for DWARF5 location lists entries new 701adfb0092 [gdb] Move ChangeLog entries to their right files The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/ChangeLog-1992 | 43 -------- gdb/ChangeLog-1993 | 52 +++------ gdb/ChangeLog-1995 | 3 - gdb/ChangeLog-1996 | 8 +- gdb/ChangeLog-1998 | 6 +- gdb/ChangeLog-1999 | 15 +-- gdb/ChangeLog-2000 | 8 +- gdb/ChangeLog-2001 | 8 +- gdb/ChangeLog-2002 | 30 ++---- gdb/ChangeLog-2003 | 10 +- gdb/ChangeLog-2004 | 8 +- gdb/ChangeLog-2005 | 1 - gdb/ChangeLog-2006 | 19 ++-- gdb/ChangeLog-2007 | 12 +-- gdb/ChangeLog-2008 | 9 +- gdb/ChangeLog-2009 | 14 +-- gdb/ChangeLog-2010 | 10 +- gdb/ChangeLog-2011 | 20 ++-- gdb/ChangeLog-2012 | 8 +- gdb/ChangeLog-2013 | 6 +- gdb/ChangeLog-2014 | 9 +- gdb/ChangeLog-2015 | 35 +++--- gdb/ChangeLog-2016 | 4 +- gdb/ChangeLog-2017 | 19 ++-- gdb/ChangeLog-2018 | 56 +++++----- gdb/ChangeLog-2019 | 74 ++++++------- gdb/doc/ChangeLog | 217 ++++++++++++++++++++++++++++++++++++++ gdb/testsuite/ChangeLog | 11 ++ gdb/testsuite/ChangeLog-1993-2013 | 52 ++++++++- 29 files changed, 453 insertions(+), 314 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (8e5018e990b -> 81c67da0f20)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project. from 8e5018e990b Replace CLANG_SPAWN_CC1 env var with a driver mode flag adds 082962dec84 [gn build] Reformat all build files adds 2e39ea726e9 Revert "Revert rG6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 - [...] adds c75180258e6 [ORC] Set setCloneToNewContextOnEmit on LLJIT's transform l [...] adds d6a9b7e5896 [Mips] Add FileCheck to a test that just tested for a crash. adds aed52fd4837 [gn build] make "gn format" comment slightly more concise adds eadc28274b9 [gn build] add multi-line forcing comments in more places adds 527281a8432 [gn build] re-run "gn format" with trunk gn adds d629525597e [docs][ORC] Update the laziness section of the ORCv2 design doc. adds f0120556c7e [DWARF] Emit DW_AT_call_return_pc as an address adds a2cc80bc957 DebugInfo: Factor out logic to update locations in MD_loop [...] adds 388eaa1270c Work around PR43337: don't try to use the vec_sel overloads [...] adds b72a8c65e4e PR17164: Change clang's default behavior from -flax-vector- [...] adds 34ba96a3d49 [NFC][IndVarSimplify] remove duplicate code in widenWithVar [...] adds fa26a37d369 [mlir] Add shaped container component type interface adds 5466597fee3 [NFC] Refactor InlineResult for readability adds c65ac2ba784 [MachineScheduler][NFC] Don't swap when we can't cluster adds 8d2f252bb8e lldb: Run TestCrossDSOTailCalls.py and TestCrossObjectTailC [...] adds 24d2a015ead [libc++] Make SFINAE'd member functions in string mutually [...] adds 2d8f23f5716 [libc++] Explicitly mark basic_string<...>::npos with defau [...] adds 288a1436392 [libc++] Explicitly enumerate std::string external instanti [...] adds 8a4d12ae5b3 [BasicBlock] add helper getPostdominatingDeoptimizeCall adds 43464509fce DWARF: Simplify the way the return PC is attached to call s [...] adds 5aeb6798f26 [test] Move call-site-entry-linking.test into test/tools/ds [...] adds 58c7fa5adeb [libc++] Optimize basic_string::operator=(const basic_strin [...] adds 313d89724ce [libc++] Fix parsing <string> in C++03. adds 6b29aa21180 Revert "[OPENMP]Do not use RTTI by default for NVPTX devices." adds 7ce2de2ce4e [lldb/Debugger] Rename IO handler methods to be more meanin [...] adds 3d210ed3d18 Revert "Allow system header to provide their own implementa [...] adds 8045a8a7f18 [COFF] Warn that LLD does not support /PDBSTRIPPED: adds 3481e5d7ed0 [libcxx] Use mtx_plain | mtx_recursive following C11 API adds 81fc1be601e [lldb/Utils] Patch all variables used by lldb-dotest adds daab9227ff0 [IR] Module's NamedMD table needn't be 'void *' adds 25e9938a45e GlobalISel: Handle more cases of G_SEXT narrowing adds eef92f25ccf AMDGPU: Remove custom node for exports adds 711a17afaff AMDGPU/GlobalISel: Select exp with patterns adds 360abb7ee56 [CodeExtractor] Transfer debug info to extracted function adds b841b9e96e6 [OPENMP]Use regular processing of vtable used when TU is a prefix. adds 44560762c62 Revert "Further implement CWG 2292" adds 8b417dd3d6c Process BUNDLE in tail duplication adds cf958498c4b [lldb/Utils] Patch all variables used by lldb-dotest (2/2) adds eac134ddf03 [lldb/Utils] Patch all variables used by lit (3/3) adds e8f198dd9e9 Fix pack deduction to only deduce the arity of packs that a [...] adds 4bafceced6a [LLDB] Add ObjectFileWasm plugin for WebAssembly debugging adds 67ec8744d7e llc: Change behavior of -mattr with existing attribute adds 9efd57e3b7d [lldb/Tools] Remove lldb-mi.exports adds 647c3f4e47d [Support] make report_fatal_error `abort` instead of `exit` adds 1e89fb947ed debugserver: Cut dependency on intrinsics_gen adds 6e24c6037f7 Revert "[Support] make report_fatal_error `abort` instead o [...] adds 77eb1b8f63c llc: Don't overwrite frame-pointer attribute adds cd9e5c32302 Fix the macos build after D71575. adds bff9f84dc85 [X86] Add 32-bit mode sse1 command line to scalar-int-to-fp [...] adds e4454479212 [X86] When handling i64->f32 sint_to_fp on 32-bit targets o [...] adds 154cd6de513 [SampleFDO] Fix invalid branch profile generated by indirec [...] adds 45d70806f43 PR42694 Support explicit(bool) in older language modes as a [...] adds b54a50f52e9 [lldb/Reproducers] Extract function for reading environment [...] adds c378e52cb9d Set some fast math attributes in setFunctionAttributes adds 066e817b421 [lldb/Reproducers] Add a flag to always generating a reproducer adds 8fdafb7dced Insert wait instruction after X87 instructions which could [...] adds cc5efa213d9 [gn build] Port 8fdafb7dced adds 982a77b6940 [lldb/Reproducers] Print more info for reproducer status adds 58265ad42a9 [mlir] fix broken links to Glossary adds 5cf1b01a011 [LegalizeDAG][TargetLowering] Move vXi64/i64->vXf32/f32 uin [...] adds afb22d7c33a [DebugInfo] Simplify the constructor of DWARFDebugAranges:: [...] adds 4f244bba4f6 [lldb] Fix asan failures in data-formatter-objc tests adds 773ae62ff85 [VE] i64 arguments, return values and constants adds ed181efa175 [HIP][AMDGPU] expand printf when compiling HIP to AMDGPU adds f8269bb0726 [gn build] Port ed181efa175 adds 59ac44b3c12 [LV] Make X86/assume.ll X86 independent (NFC). adds 23c113802e2 [LV] Allow assume calls in predicated blocks. adds 736a3802124 clang-format: [JS] tests for async wrapping. adds 0b21d552620 [IR] Mark memset.* intrinsics as IntrWriteMem. adds b08e8353a89 [clangd] Dont display `<unknown>` kinds in hover board adds 8a344674609 [Concepts] Fix ConceptSpecializationExpr profiling crash adds 75188b01e9a [PHIEliminate] Move dbg values after phi and label adds 00c74d0b644 Remove release note about in-process-cc1 adds 39d6b6c21f7 [lldb][NFC] Migrate several tests to expect_expr adds 19c5057e8df Fix "pointer is null" static analyzer warnings. NFCI. adds 23a887b0dd4 Fix unused variable warning. NFCI. adds d54d71b67e6 [clangd] Make output order of allTargetDecls deterministic adds d36b2649e5e [ELF] Optimization to LinkerScript::computeInputSections NFC adds c969335abdb Revert "[PHIEliminate] Move dbg values after phi and label" adds 4b6d9ac3926 Make lld cmake not compute commit revision twice adds cbaa32650a0 Removed an unused include from TypeLocVisitor.h adds 66c120f0256 [VectorUtils] Rework the Vector Function Database (VFDatabase). adds 4f5c65a5c80 try to unbreak build after 4b6d9ac392613 adds 2b81d3c6c6f [mlir][Linalg] Fix Linalg EDSC builders adds c24cf979608 [ARM][MVE] Enable extending gathers adds 15a6df52efa [lldb/DWARF/test] Freshen up debug_names tests adds 28bb43bdf80 [GlobalISel] Use more MachineIRBuilder helper methods adds 760b1751097 [ARM][LowOverheadLoops] Update liveness info adds 237fd943125 [Hexagon] Remove unnecessary case in StringSwitch, NFC adds fb9413cb84c Remove some SVN-specific code. adds 63f73545dd8 [GlobalISel] Pass MachineOperands into MachineIRBuilder hel [...] adds 885260d5d80 [GlobalISel] Don't arbitrarily limit a mask to 64 bits adds 7f5f6ff5476 [Hexagon] Add preprocessor test for hexagonv66 adds 9b2f3532c7f AMDGPU/GlobalISel: Select DS GWS intrinsics adds 81eaa3ddd06 [lldb][NFC] Delete TestDataFormatterObjCNSDate.py adds 1794158f90f [MC][test] Fix non-portable GNU diff option adds 4ca1ad85b7c AMDGPU/GlobalISel: Don't handle legacy buffer intrinsic adds 31458a9feec [llvm-exegesis][NFC] Refactor Mips tests fixtures into a ba [...] adds 6b357866496 [llvm-exegesis][mips] Add RegisterAliasingTest unit test adds bc413da0865 [Hexagon] Fix alignment info for __builtin_circ_lduh adds c29a9f64b78 [gn build] Port 6b357866496 adds 7acfda633f1 [llvm] Make new pass manager's OptimizationLevel a class new 26646761e2b [lldb/Scripts] Remove swig_bot_lib/__init__.py new 3478551bf3d [GVN] introduce GVNOptions to control GVN pass behavior new 9b3254dbf9f [LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging new d34e4152e3e [LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to [...] new 81c67da0f20 remove an include that's unused after r347592 The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/FindTarget.cpp | 82 ++-- clang-tools-extra/clangd/Hover.cpp | 3 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 2 +- clang/docs/CommandGuide/clang.rst | 11 +- clang/docs/ReleaseNotes.rst | 29 +- clang/include/clang/AST/Decl.h | 3 - clang/include/clang/AST/TypeLocVisitor.h | 1 - clang/include/clang/Basic/DiagnosticParseKinds.td | 13 +- clang/include/clang/Basic/LangOptions.def | 2 +- clang/include/clang/Parse/Parser.h | 15 + clang/lib/AST/Decl.cpp | 8 - clang/lib/AST/StmtProfile.cpp | 6 +- clang/lib/Basic/Version.cpp | 35 +- clang/lib/CodeGen/BackendUtil.cpp | 10 +- clang/lib/CodeGen/CGBuiltin.cpp | 3 + clang/lib/CodeGen/CGExpr.cpp | 9 +- clang/lib/CodeGen/CGGPUBuiltin.cpp | 34 ++ clang/lib/CodeGen/CodeGenFunction.h | 2 + clang/lib/CodeGen/CodeGenModule.cpp | 9 +- clang/lib/Driver/ToolChain.cpp | 3 +- clang/lib/Driver/ToolChains/HIP.cpp | 1 + clang/lib/Driver/ToolChains/Hexagon.cpp | 1 - clang/lib/Headers/ppc_wrappers/emmintrin.h | 4 +- clang/lib/Parse/ParseDecl.cpp | 9 +- clang/lib/Parse/ParseTentative.cpp | 64 ++- clang/lib/Parse/Parser.cpp | 5 +- clang/lib/Sema/SemaChecking.cpp | 2 +- clang/lib/Sema/SemaDeclCXX.cpp | 2 +- clang/lib/Sema/SemaExprCXX.cpp | 6 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 50 ++- clang/test/CodeGen/memcpy-nobuiltin.c | 15 - clang/test/CodeGen/memcpy-nobuiltin.inc | 19 - clang/test/CodeGenHIP/printf-aggregate.cpp | 20 + clang/test/CodeGenHIP/printf.cpp | 44 ++ clang/test/Driver/hip-printf.hip | 9 + clang/test/Driver/openmp-offload-gpu.cpp | 20 - clang/test/Headers/altivec-header.c | 2 +- clang/test/Headers/arm-neon-header.c | 2 +- clang/test/Headers/x86-intrinsics-headers.c | 2 +- clang/test/Headers/x86intrin-2.c | 4 +- clang/test/Headers/x86intrin.c | 2 +- clang/test/OpenMP/declare_target_codegen.cpp | 25 +- clang/test/Preprocessor/hexagon-predefines.c | 7 + clang/test/Sema/vector-assign.c | 12 +- clang/test/Sema/vector-cast.c | 23 +- clang/test/Sema/vector-ops.c | 3 +- clang/test/SemaCXX/cxx2a-explicit-bool.cpp | 1 + clang/test/SemaCXX/pseudo-destructor-name.cpp | 26 -- clang/test/SemaTemplate/deduction.cpp | 18 + clang/unittests/Format/FormatTestJS.cpp | 16 + libcxx/include/__config | 4 + libcxx/include/__string | 53 +++ libcxx/include/__threading_support | 2 +- libcxx/include/string | 287 ++++++------- libcxx/src/string.cpp | 4 +- lld/CMakeLists.txt | 27 -- lld/COFF/Driver.cpp | 5 + lld/COFF/Options.td | 1 + lld/ELF/LinkerScript.cpp | 8 +- lld/include/lld/Common/Version.inc.in | 5 - lld/test/COFF/pdbstripped.test | 7 + lldb/include/lldb/API/SBReproducer.h | 1 + lldb/include/lldb/Core/Debugger.h | 19 +- lldb/include/lldb/Symbol/Function.h | 8 +- lldb/include/lldb/Utility/ArchSpec.h | 2 + lldb/include/lldb/Utility/Reproducer.h | 9 + .../anonymous-struct/TestCallUserAnonTypedef.py | 2 +- .../call-function/TestCallBuiltinFunction.py | 3 - .../call-function/TestCallUserDefinedFunction.py | 16 +- .../TestCallOverriddenMethod.py | 10 +- ...lassTemplateSpecializationParametersHandling.py | 3 +- .../expression/entry-bp/TestExprEntryBP.py | 5 +- .../import-std-module/basic/TestImportStdModule.py | 10 +- .../conflicts/TestStdModuleWithConflicts.py | 6 +- .../deque-basic/TestBasicDeque.py | 18 +- .../inline-namespace/TestInlineNamespace.py | 4 +- .../TestNamespaceLocalVarSameNameCppAndC.py | 8 +- .../expression/radar_8638051/Test8638051.py | 9 +- .../static-initializers/TestStaticInitializers.py | 4 +- .../test/commands/expression/test/TestExprs.py | 39 +- .../TestDataFormatterObjCNSData.py | 2 +- .../TestDataFormatterObjCNSDate.py | 34 -- .../data-formatter/data-formatter-objc/main.m | 2 +- .../tail_call_frames/cross_dso/Makefile | 17 + .../tail_call_frames/cross_dso/One.mk | 7 + .../tail_call_frames/cross_dso/One/One.c | 11 + .../cross_dso/TestCrossDSOTailCalls.py | 64 +++ .../tail_call_frames/cross_dso/Two.mk | 6 + .../tail_call_frames/cross_dso/Two/Two.c | 12 + .../tail_call_frames/cross_dso/main.c | 12 + .../tail_call_frames/cross_dso/shared.h | 3 + .../tail_call_frames/cross_object/Makefile | 4 + .../tail_call_frames/cross_object/One.c | 11 + .../cross_object/TestCrossObjectTailCalls.py | 59 +++ .../tail_call_frames/cross_object/Two.c | 12 + .../tail_call_frames/cross_object/main.c | 12 + .../tail_call_frames/cross_object/shared.h | 3 + .../test/lang/c/forward/TestForwardDeclaration.py | 2 +- .../lldbsuite/test/lang/cpp/auto/TestCPPAuto.py | 2 +- .../lldbsuite/test/lang/cpp/bool/TestCPPBool.py | 7 +- .../lang/cpp/call-function/TestCallCPPFunction.py | 3 +- .../lang/cpp/chained-calls/TestCppChainedCalls.py | 65 +-- .../test/lang/cpp/char1632_t/TestChar1632T.py | 12 +- .../test/lang/cpp/char8_t/TestCxxChar8_t.py | 11 +- .../cpp/limit-debug-info/TestWithLimitDebugInfo.py | 8 +- lldb/scripts/swig_bot_lib/__init__.py | 0 lldb/source/API/SBReproducer.cpp | 9 + lldb/source/API/SystemInitializerFull.cpp | 6 + lldb/source/Commands/CommandObjectCommands.cpp | 2 +- lldb/source/Commands/CommandObjectExpression.cpp | 6 +- lldb/source/Commands/CommandObjectGUI.cpp | 2 +- lldb/source/Commands/CommandObjectReproducer.cpp | 12 + lldb/source/Core/Debugger.cpp | 65 +-- lldb/source/Expression/REPL.cpp | 6 +- lldb/source/Interpreter/CommandInterpreter.cpp | 10 +- lldb/source/Plugins/ObjectFile/CMakeLists.txt | 1 + lldb/source/Plugins/ObjectFile/wasm/CMakeLists.txt | 11 + .../Plugins/ObjectFile/wasm/ObjectFileWasm.cpp | 458 +++++++++++++++++++++ .../Plugins/ObjectFile/wasm/ObjectFileWasm.h | 153 +++++++ .../ScriptInterpreter/Lua/ScriptInterpreterLua.cpp | 2 +- .../Python/ScriptInterpreterPython.cpp | 2 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 16 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 12 + lldb/source/Plugins/SymbolVendor/CMakeLists.txt | 1 + .../Plugins/SymbolVendor/wasm/CMakeLists.txt | 9 + .../Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp | 145 +++++++ .../Plugins/SymbolVendor/wasm/SymbolVendorWasm.h | 44 ++ lldb/source/Symbol/Function.cpp | 21 +- lldb/source/Target/Process.cpp | 5 +- lldb/source/Utility/ArchSpec.cpp | 9 +- lldb/source/Utility/Reproducer.cpp | 33 +- lldb/test/API/CMakeLists.txt | 13 + lldb/test/Shell/ObjectFile/wasm/basic.yaml | 30 ++ .../ObjectFile/wasm/embedded-debug-sections.yaml | 67 +++ .../ObjectFile/wasm/stripped-debug-sections.yaml | 54 +++ .../ObjectFile/wasm/unified-debug-sections.yaml | 85 ++++ lldb/test/Shell/Reproducer/TestDriverOptions.test | 11 +- .../SymbolFile/DWARF/debug-names-compressed.cpp | 7 +- .../SymbolFile/DWARF/dwarf5-index-is-used.cpp | 2 +- .../SymbolFile/DWARF/dwarf5-partial-index.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-basic-function.cpp | 27 +- .../SymbolFile/DWARF/find-basic-namespace.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-basic-type.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-basic-variable.cpp | 7 +- .../Shell/SymbolFile/DWARF/find-function-regex.cpp | 7 +- lldb/test/Shell/SymbolFile/DWARF/find-method.cpp | 10 +- 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llvm/include/llvm/Passes/PassBuilder.h | 54 ++- llvm/include/llvm/ProfileData/SampleProf.h | 12 +- llvm/include/llvm/Transforms/Scalar/GVN.h | 41 ++ .../llvm/Transforms/Utils/AMDGPUEmitPrintf.h | 25 ++ .../Vectorize/LoopVectorizationLegality.h | 10 + llvm/lib/Analysis/InlineCost.cpp | 85 ++-- llvm/lib/Analysis/LazyCallGraph.cpp | 8 +- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 2 +- llvm/lib/Analysis/VectorUtils.cpp | 1 + llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp | 15 - llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 28 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h | 12 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 23 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 67 ++- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 204 ++++----- llvm/lib/CodeGen/LivePhysRegs.cpp | 13 + llvm/lib/CodeGen/MachineScheduler.cpp | 38 +- llvm/lib/CodeGen/SafeStack.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 53 ++- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 140 ++----- llvm/lib/CodeGen/TailDuplicator.cpp | 4 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 5 +- llvm/lib/IR/BasicBlock.cpp | 7 + llvm/lib/IR/DebugInfo.cpp | 53 ++- llvm/lib/IR/Module.cpp | 10 +- llvm/lib/LTO/LTOBackend.cpp | 8 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 1 - llvm/lib/Passes/PassBuilder.cpp | 119 +++--- .../Target/AArch64/AArch64InstructionSelector.cpp | 56 ++- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 2 - llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 6 - .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 166 +++++--- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 45 -- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 47 +-- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 15 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 46 ++- llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 68 +++ llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 87 ++-- llvm/lib/Target/TargetMachine.cpp | 12 +- llvm/lib/Target/VE/InstPrinter/VEInstPrinter.cpp | 1 - llvm/lib/Target/VE/VE.h | 11 - llvm/lib/Target/VE/VECallingConv.td | 14 + llvm/lib/Target/VE/VEFrameLowering.cpp | 4 +- llvm/lib/Target/VE/VEISelLowering.cpp | 111 ++++- llvm/lib/Target/VE/VEInstrInfo.cpp | 17 + llvm/lib/Target/VE/VEInstrInfo.h | 4 + llvm/lib/Target/VE/VEInstrInfo.td | 57 ++- llvm/lib/Target/X86/CMakeLists.txt | 1 + llvm/lib/Target/X86/X86.h | 4 + llvm/lib/Target/X86/X86FloatingPoint.cpp | 3 + llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +- llvm/lib/Target/X86/X86InsertWait.cpp | 151 +++++++ llvm/lib/Target/X86/X86InstrFPStack.td | 7 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 1 + llvm/lib/Transforms/IPO/AlwaysInliner.cpp | 9 +- llvm/lib/Transforms/IPO/Inliner.cpp | 18 +- llvm/lib/Transforms/IPO/PartialInlining.cpp | 5 +- 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| 4 +- llvm/test/CodeGen/AArch64/machine-outliner.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir | 67 ++- .../GlobalISel/llvm.amdgcn.ds.gws.barrier.ll | 9 + .../AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.init.ll | 5 + .../GlobalISel/llvm.amdgcn.ds.gws.sema.br.ll | 5 + .../llvm.amdgcn.ds.gws.sema.release.all.ll | 8 + .../AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.v.ll | 5 + .../regbankselect-amdgcn-buffer-load.mir | 440 -------------------- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll | 37 +- .../test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll | 36 +- llvm/test/CodeGen/AMDGPU/tail-dup-bundle.mir | 38 ++ llvm/test/CodeGen/ARM/disable-fp-elim.ll | 12 +- llvm/test/CodeGen/Mips/uitofp.ll | 21 +- .../CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir | 6 +- .../CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir | 4 +- .../Thumb2/LowOverheadLoops/disjoint-vcmp.mir | 95 ++--- .../LowOverheadLoops/dont-remove-loop-update.mir | 2 +- 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lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/tail_call_f [...] delete mode 100644 lldb/scripts/swig_bot_lib/__init__.py create mode 100644 lldb/source/Plugins/ObjectFile/wasm/CMakeLists.txt create mode 100644 lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp create mode 100644 lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h create mode 100644 lldb/source/Plugins/SymbolVendor/wasm/CMakeLists.txt create mode 100644 lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp create mode 100644 lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.h create mode 100644 lldb/test/Shell/ObjectFile/wasm/basic.yaml create mode 100644 lldb/test/Shell/ObjectFile/wasm/embedded-debug-sections.yaml create mode 100644 lldb/test/Shell/ObjectFile/wasm/stripped-debug-sections.yaml create mode 100644 lldb/test/Shell/ObjectFile/wasm/unified-debug-sections.yaml delete mode 100644 lldb/tools/lldb-mi/lldb-mi.exports create mode 100644 llvm/include/llvm/Transforms/Utils/AMDGPUEmitPrintf.h create mode 100644 llvm/lib/Target/X86/X86InsertWait.cpp create mode 100644 llvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-frameaddr.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-returnaddr.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.barrier.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.init.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.br.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.rel [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.v.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-buffer [...] create mode 100644 llvm/test/CodeGen/AMDGPU/tail-dup-bundle.mir create mode 100644 llvm/test/CodeGen/VE/constants_i64.ll create mode 100644 llvm/test/Other/opt-override-frame-pointer.ll create mode 100644 llvm/test/Transforms/HotColdSplit/split-out-dbg-label.ll create mode 100644 llvm/test/Transforms/HotColdSplit/transfer-debug-info.ll create mode 100644 llvm/test/Transforms/HotColdSplit/update-split-loop-metadata.ll create mode 100644 llvm/test/Transforms/LoopUnroll/opt-levels.ll create mode 100644 llvm/test/Transforms/LoopUnrollAndJam/opt-levels.ll rename llvm/test/Transforms/LoopVectorize/{X86 => }/assume.ll (56%) create mode 100644 llvm/test/tools/dsymutil/X86/Inputs/call-site-entry.c create mode 100755 llvm/test/tools/dsymutil/X86/Inputs/call-site-entry.macho.x86_64 create mode 100644 llvm/test/tools/dsymutil/X86/Inputs/call-site-entry.macho.x86_64.o create mode 100644 llvm/test/tools/dsymutil/X86/call-site-entry-linking.test create mode 100644 llvm/unittests/tools/llvm-exegesis/Mips/RegisterAliasingTest.cpp create mode 100644 llvm/unittests/tools/llvm-exegesis/Mips/TestBase.h delete mode 100755 llvm/utils/GetRepositoryPath create mode 100644 mlir/docs/ShapeInference.md -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (f4d256c3 -> c6062d8e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards f4d256c3 0: update: llvm-linux: boot new c6062d8e 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f4d256c3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 162 +- 02-build_llvm/console.log | 12536 +++++++++++++-------------- 03-build_linux/console.log | 4626 +++++----- 04-boot_linux/console.log | 476 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 10 +- console.log | 17812 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 17822 insertions(+), 17810 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (95e20af9fb9c -> f5ae2ea6347a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/linux. from 95e20af9fb9c Merge tag 'nfs-for-5.5-2' of git://git.linux-nfs.org/proje [...] adds c64cd6e34ea3 reimplement path_mountpoint() with less magic adds 508c8772760d fix autofs regression caused by follow_managed() changes adds 84bf39461e61 Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux [...] adds cb1eeb75cf3d crypto: hisilicon/sec2 - Use atomics instead of __sync adds 0174cb6ce944 Merge branch 'linus' of git://git.kernel.org/pub/scm/linux [...] adds dbff1e07b02d platform/x86: intel-ips: Use the correct style for SPDX Li [...] adds 638bc4ca3d28 platform/mellanox: fix potential deadlock in the tmfifo driver adds 6ae01050e49f platform/x86: GPD pocket fan: Use default values when wron [...] adds 1f27dbd8265d platform/x86: GPD pocket fan: Allow somewhat lower/higher [...] adds 515ff674bb9b platform/x86: intel_pmc_core: update Comet Lake platform driver adds 176a7fca81c5 platform/x86: asus-wmi: Fix keyboard brightness cannot be [...] adds f4094826779d Documentation/ABI: Fix documentation inconsistency for mlx [...] adds f3efc406d67e Documentation/ABI: Add missed attribute for mlxreg-io sysf [...] adds 51d69817519f Merge tag 'platform-drivers-x86-v5.5-3' of git://git.infra [...] adds 051d75d3bb31 MAINTAINERS: Update Ley Foon Tan's email address adds a4feff2264df Merge branch 'for-linus' of git://git.kernel.org/pub/scm/l [...] adds f5ae2ea6347a Fix built-in early-load Intel microcode alignment No new revisions were added by this update. Summary of changes: Documentation/ABI/stable/sysfs-driver-mlxreg-io | 13 +++- MAINTAINERS | 8 +-- drivers/base/firmware_loader/builtin/Makefile | 2 +- drivers/crypto/hisilicon/sec2/sec.h | 6 +- drivers/crypto/hisilicon/sec2/sec_crypto.c | 12 ++-- drivers/crypto/hisilicon/sec2/sec_main.c | 14 +++- drivers/platform/mellanox/mlxbf-tmfifo.c | 19 +++--- drivers/platform/x86/asus-wmi.c | 8 +-- drivers/platform/x86/gpd-pocket-fan.c | 27 ++++++-- drivers/platform/x86/intel_ips.h | 2 +- drivers/platform/x86/intel_pmc_core.h | 2 +- drivers/platform/x86/intel_pmc_core_pltdrv.c | 2 + fs/namei.c | 90 ++++--------------------- fs/nfs/nfstrace.h | 2 - include/linux/namei.h | 1 - 15 files changed, 85 insertions(+), 123 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

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