Tcwg-commits January 2020

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[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (cb1f9a169a0e -> dcd888983542)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/linux. from cb1f9a169a0e Linux 4.19.94 adds 41f78c38ed9c USB: dummy-hcd: use usb_urb_dir_in instead of usb_pipein adds 11c6893b1b23 USB: dummy-hcd: increase max number of devices to 32 adds f70280ee8937 bpf: Fix passing modified ctx to ld/abs/ind instruction adds 551d7ff754f5 regulator: fix use after free issue adds 5a8c4f96a5f0 ASoC: max98090: fix possible race conditions adds c7673f01604f locking/spinlock/debug: Fix various data races adds 9e0f4d24733e netfilter: ctnetlink: netns exit must wait for callbacks adds 21f08020dd85 mwifiex: Fix heap overflow in mmwifiex_process_tdls_action [...] adds cb3b83a1151b libtraceevent: Fix lib installation with O= adds fa03b9cab91c x86/efi: Update e820 with reserved EFI boot services data [...] adds 0320cc64e325 ASoC: Intel: bytcr_rt5640: Update quirk for Teclast X89 adds 765a2970e66f efi/gop: Return EFI_NOT_FOUND if there are no usable GOPs adds 737bc8f67879 efi/gop: Return EFI_SUCCESS if a usable GOP was found adds 0010192db178 efi/gop: Fix memory leak in __gop_query32/64() adds 05f3fbb05380 ARM: dts: imx6ul: imx6ul-14x14-evk.dtsi: Fix SPI NOR probing adds 829fde079bd9 ARM: vexpress: Set-up shared OPP table instead of individu [...] adds 962debec8313 netfilter: uapi: Avoid undefined left-shift in xt_sctp.h adds 80a035ebefa1 netfilter: nft_set_rbtree: bogus lookup/get on consecutive [...] adds dc330d942c9f netfilter: nf_tables: validate NFT_SET_ELEM_INTERVAL_END adds 84133b6011ee netfilter: nf_tables: validate NFT_DATA_VALUE after nft_da [...] adds 6e168ef21fa3 ARM: dts: BCM5301X: Fix MDIO node address/size cells adds db3cb5c11ae7 selftests/ftrace: Fix multiple kprobe testcase adds 59b1cbee0885 ARM: dts: Cygnus: Fix MDIO node address/size cells adds f8832728bf33 spi: spi-cavium-thunderx: Add missing pci_release_regions() adds 459e1fba92b6 ASoC: topology: Check return value for soc_tplg_pcm_create() adds d1611ab68772 ARM: dts: bcm283x: Fix critical trip point adds 4bf973a1f84a bnxt_en: Return error if FW returns more data than dump length adds e240f26a7f1d bpf, mips: Limit to 33 tail calls adds 5821a1e91e0f spi: spi-ti-qspi: Fix a bug when accessing non default CS adds 712cd9d02b84 ARM: dts: am437x-gp/epos-evm: fix panel compatible adds 5663eb75ee9a samples: bpf: Replace symbol compare of trace_event adds 7d5ad9fe2c9b samples: bpf: fix syscall_tp due to unused syscall adds 055b4a62f115 powerpc: Ensure that swiotlb buffer is allocated from low memory adds 12ac1eb6ee76 btrfs: Fix error messages in qgroup_rescan_init adds e3d5f12b312a bpf: Clear skb->tstamp in bpf_redirect when necessary adds 1c96c9f1470b bnx2x: Do not handle requests from VFs after parity adds 133c0bab9437 bnx2x: Fix logic to get total no. of PFs per engine adds 93aaacd3da74 cxgb4: Fix kernel panic while accessing sge_info adds 588b700ce88b net: usb: lan78xx: Fix error message format specifier adds 4afc044f2010 parisc: add missing __init annotation adds d8ec4cf103d6 rfkill: Fix incorrect check to avoid NULL pointer dereference adds 18932974d67b ASoC: wm8962: fix lambda value adds b82c08e490c0 regulator: rn5t618: fix module aliases adds 17a6e26e5474 iommu/iova: Init the struct iova to fix the possible memleak adds a64d7894b461 kconfig: don't crash on NULL expressions in expr_eq() adds 50360686bf73 perf/x86/intel: Fix PT PMI handling adds 77de8ee6b09f fs: avoid softlockups in s_inodes iterators adds 57d547a41ecf net: stmmac: Do not accept invalid MTU values adds 864a8ff571d2 net: stmmac: xgmac: Clear previous RX buffer size adds c8fa1cb10330 net: stmmac: RX buffer size must be 16 byte aligned adds 5ee6f0da6bbd net: stmmac: Always arm TX Timer at end of transmission start adds 152eaa8626cc s390/purgatory: do not build purgatory with kcov, kasan an [...] adds f2bcbc595849 drm/exynos: gsc: add missed component_del adds 000d4f2fcf2c s390/dasd/cio: Interpret ccw_device_get_mdc return value c [...] adds 729a7f5e41f3 s390/dasd: fix memleak in path handling error case adds e80e36de03f3 block: fix memleak when __blk_rq_map_user_iov() is failed adds 4b9f0187aa07 parisc: Fix compiler warnings in debug_core.c adds fc95d2b0d4ee llc2: Fix return statement of llc_stat_ev_rx_null_dsap_xid [...] adds 24fc85b5f5b6 hv_netvsc: Fix unwanted rx_table reset adds 04a2096c4bf0 powerpc/vcpu: Assume dedicated processors as non-preempt adds 0b9700de712a powerpc/spinlocks: Include correct header for static key adds 4ef576e99d29 cpufreq: imx6q: read OCOTP through nvmem for imx6ul/imx6ull adds 40b049d085f3 ARM: dts: imx6ul: use nvmem-cells for cpu speed grading adds 13d9f98ef4c1 PCI/switchtec: Read all 64 bits of part_event_bitmap adds 776a81a024e7 gtp: fix bad unlock balance in gtp_encap_enable_socket adds 5f3274c53ae7 macvlan: do not assume mac_header is set in macvlan_broadcast() adds d36857e02bf8 net: dsa: mv88e6xxx: Preserve priority when setting CPU port. adds 527d74630691 net: stmmac: dwmac-sun8i: Allow all RGMII modes adds 5994f91dcdc4 net: stmmac: dwmac-sunxi: Allow all RGMII modes adds 77b07bbf47e4 net: usb: lan78xx: fix possible skb leak adds 94ac4a4d938f pkt_sched: fq: do not accept silly TCA_FQ_QUANTUM adds f5c8c211d811 sch_cake: avoid possible divide by zero in cake_enqueue() adds 5f52b9ebd47c sctp: free cmd->obj.chunk for the unprocessed SCTP_CMD_REPLY adds 5ea5b6e3c6e1 tcp: fix "old stuff" D-SACK causing SACK to be treated as D-SACK adds b5fdf59c2019 vxlan: fix tos value before xmit adds 4e71a156b40d vlan: fix memory leak in vlan_dev_set_egress_priority adds a98672dd8f79 vlan: vlan_changelink() should propagate errors adds 741cf884069e mlxsw: spectrum_qdisc: Ignore grafting of invisible FIFO adds 672d3ca2f395 net: sch_prio: When ungrafting, replace with FIFO adds ceaeb21b4bda usb: dwc3: gadget: Fix request complete check adds f85541a5d8d5 USB: core: fix check for duplicate endpoints adds a16ae61375c0 USB: serial: option: add Telit ME910G1 0x110a composition adds aad8003ad201 usb: missing parentheses in USE_NEW_SCHEME adds dcd888983542 Linux 4.19.95 No new revisions were added by this update. Summary of changes: Makefile | 2 +- arch/arm/boot/dts/am437x-gp-evm.dts | 2 +- arch/arm/boot/dts/am43x-epos-evm.dts | 2 +- arch/arm/boot/dts/bcm-cygnus.dtsi | 4 +- arch/arm/boot/dts/bcm283x.dtsi | 2 +- arch/arm/boot/dts/bcm5301x.dtsi | 4 +- arch/arm/boot/dts/imx6ul-14x14-evk.dtsi | 2 +- arch/arm/boot/dts/imx6ul.dtsi | 6 ++ arch/arm/mach-vexpress/spc.c | 12 +++- arch/mips/net/ebpf_jit.c | 9 +-- arch/parisc/include/asm/cmpxchg.h | 10 ++- arch/parisc/kernel/drivers.c | 2 +- arch/powerpc/include/asm/spinlock.h | 5 +- arch/powerpc/mm/mem.c | 8 +++ arch/powerpc/platforms/pseries/setup.c | 7 ++ arch/s390/purgatory/Makefile | 6 +- arch/s390/purgatory/string.c | 3 + arch/x86/events/core.c | 9 ++- arch/x86/platform/efi/quirks.c | 6 +- block/blk-map.c | 2 +- drivers/cpufreq/imx6q-cpufreq.c | 52 +++++++++----- drivers/firmware/efi/libstub/gop.c | 80 +++++----------------- drivers/gpu/drm/exynos/exynos_drm_gsc.c | 1 + drivers/iommu/iova.c | 2 +- drivers/net/dsa/mv88e6xxx/global1.c | 5 ++ drivers/net/dsa/mv88e6xxx/global1.h | 1 + drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h | 2 +- drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 12 +++- drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h | 1 + drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c | 12 ++++ drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 38 +++++++--- drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h | 4 ++ drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c | 4 ++ .../net/ethernet/mellanox/mlxsw/spectrum_qdisc.c | 7 ++ drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 3 + drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c | 2 +- drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 + drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 3 +- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 16 ++++- drivers/net/gtp.c | 5 +- drivers/net/hyperv/hyperv_net.h | 3 +- drivers/net/hyperv/netvsc_drv.c | 4 +- drivers/net/hyperv/rndis_filter.c | 10 ++- drivers/net/macvlan.c | 2 +- drivers/net/usb/lan78xx.c | 11 ++- drivers/net/vxlan.c | 4 +- drivers/net/wireless/marvell/mwifiex/tdls.c | 70 +++++++++++++++++-- drivers/pci/switch/switchtec.c | 4 +- drivers/regulator/core.c | 4 +- drivers/regulator/rn5t618-regulator.c | 1 + drivers/s390/block/dasd_eckd.c | 28 ++------ drivers/s390/cio/device_ops.c | 2 +- drivers/spi/spi-cavium-thunderx.c | 2 + drivers/spi/spi-ti-qspi.c | 6 +- drivers/usb/core/config.c | 70 +++++++++++++++---- drivers/usb/core/hub.c | 2 +- drivers/usb/dwc3/gadget.c | 7 ++ drivers/usb/gadget/udc/dummy_hcd.c | 10 +-- drivers/usb/serial/option.c | 2 + fs/btrfs/qgroup.c | 4 +- fs/drop_caches.c | 2 +- fs/inode.c | 7 ++ fs/notify/fsnotify.c | 1 + fs/quota/dquot.c | 1 + include/linux/if_ether.h | 8 +++ include/uapi/linux/netfilter/xt_sctp.h | 6 +- kernel/bpf/verifier.c | 9 ++- kernel/locking/spinlock_debug.c | 32 ++++----- net/8021q/vlan.h | 1 + net/8021q/vlan_dev.c | 3 +- net/8021q/vlan_netlink.c | 19 +++-- net/core/filter.c | 1 + net/ipv4/tcp_input.c | 5 +- net/llc/llc_station.c | 4 +- net/netfilter/nf_conntrack_netlink.c | 3 + net/netfilter/nf_tables_api.c | 16 +++-- net/netfilter/nft_bitwise.c | 4 +- net/netfilter/nft_cmp.c | 6 ++ net/netfilter/nft_range.c | 10 +++ net/netfilter/nft_set_rbtree.c | 21 ++++-- net/rfkill/core.c | 7 +- net/sched/sch_cake.c | 2 +- net/sched/sch_fq.c | 6 +- net/sched/sch_prio.c | 10 ++- net/sctp/sm_sideeffect.c | 28 +++++--- samples/bpf/syscall_tp_kern.c | 18 ++++- samples/bpf/trace_event_user.c | 4 +- scripts/kconfig/expr.c | 7 ++ sound/soc/codecs/max98090.c | 8 +-- sound/soc/codecs/max98090.h | 1 - sound/soc/codecs/wm8962.c | 4 +- sound/soc/intel/boards/bytcr_rt5640.c | 8 ++- sound/soc/soc-topology.c | 8 ++- tools/lib/traceevent/Makefile | 1 + .../ftrace/test.d/kprobe/multiple_kprobes.tc | 6 +- 95 files changed, 607 insertions(+), 271 deletions(-) create mode 100644 arch/s390/purgatory/string.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (2bdf33cc4c7 -> ad201691d5c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/llvm-project. from 2bdf33cc4c7 [mlir] NFC: Remove Value::operator* and Value::operator-> n [...] adds 4c48ea68e49 [ASTMatchers] extract public matchers from const-analysis i [...] adds 23a799adf0a Revert "[ASTMatchers] extract public matchers from const-an [...] adds d2751f8fdf6 [ExecutionEngine] Re-enable FastISel for non-iOS arm targets. adds dc422e968e7 Add -Wrange-loop-analysis changes to ReleaseNotes adds 9cc9120969f [X86] Turn FP_ROUND/STRICT_FP_ROUND into X86ISD::VFPROUND/S [...] adds a5994c789a2 [X86][Disassembler] Simplify and optimize reader functions adds 9fe6f36c1a9 [LegalizeVectorOps] Only pass SDNode* instead SDValue to al [...] adds 5a9954c02a7 [LegalizeVectorOps] Remove some of the simpler Expand metho [...] adds 179abb091d8 [X86][Disassembler] Replace custom logger with LLVM_DEBUG adds a1f16998f37 [Support] Optionally call signal handlers when a function w [...] adds 2cdb18afda8 [ORC] Fix argv handling in runAsMain / lli. adds 6fdd6a7b3f6 [Disassembler] Delete the VStream parameter of MCDisassembl [...] adds 1e8ce7492e9 [X86][Disassembler] Optimize argument passing and immediate [...] adds f719c540bb0 [X86][Disassembler] Shrink X86GenDisassemblerTables.inc fro [...] adds ddfcd82bdc2 [LegalizeVectorOps] Expand vector MERGE_VALUES immediately. adds ed679804d5e [TargetLowering][X86] Connect the chain from STRICT_FSETCC [...] adds efb674ac2f2 [LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UI [...] adds 569ccfc384a [SCEV] more accurate range for addrecexpr with nsw flag. adds d692f0f6c8c [X86] Don't call LowerSETCC from LowerSELECT for STRICT_FSE [...] adds f33fd43a7c9 [NFC] Refactor memory ops cluster method adds c5b94ea2651 [profile] Support merge pool size >= 10 adds 51c1d7c4bec [X86][Disassembler] Simplify adds 60cc095ecc3 [X86][Disassembler] Merge X86DisassemblerDecoder.cpp into X [...] adds b375f28b0ec [X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the [...] adds 66e39067edb [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower b [...] adds 065eefcfe96 [AMDGPU] Regenerate shl shift tests adds a888277897f [MIPS] Regenerate shl/lshr shift tests adds ad201691d5c Fix "pointer is null" static analyzer warnings. NFCI. No new revisions were added by this update. Summary of changes: clang/docs/ReleaseNotes.rst | 4 + .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp | 17 +- compiler-rt/lib/profile/InstrProfilingFile.c | 46 +- compiler-rt/test/profile/instrprof-basic.c | 7 + .../Disassembler/llvm/DisassemblerLLVMC.cpp | 2 +- .../Instruction/MIPS/EmulateInstructionMIPS.cpp | 18 +- .../MIPS64/EmulateInstructionMIPS64.cpp | 4 +- .../llvm/MC/MCDisassembler/MCDisassembler.h | 4 - llvm/include/llvm/Support/CrashRecoveryContext.h | 8 + llvm/include/llvm/Support/Signals.h | 9 + llvm/lib/Analysis/ScalarEvolution.cpp | 26 +- llvm/lib/CodeGen/MachineScheduler.cpp | 21 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 612 +++---- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 8 +- llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp | 2 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 2 +- llvm/lib/ExecutionEngine/TargetSelect.cpp | 7 - llvm/lib/MC/MCDisassembler/Disassembler.cpp | 3 +- llvm/lib/MC/MCDisassembler/MCDisassembler.cpp | 7 +- llvm/lib/Support/CrashRecoveryContext.cpp | 65 +- llvm/lib/Support/Unix/Signals.inc | 16 + llvm/lib/Support/Windows/Signals.inc | 57 +- .../AArch64/Disassembler/AArch64Disassembler.cpp | 1 - .../AArch64/Disassembler/AArch64Disassembler.h | 3 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 1 - .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 2 +- .../Target/ARC/Disassembler/ARCDisassembler.cpp | 2 - .../Target/ARM/Disassembler/ARMDisassembler.cpp | 20 +- .../Target/AVR/Disassembler/AVRDisassembler.cpp | 2 - .../Target/BPF/Disassembler/BPFDisassembler.cpp | 2 - .../Hexagon/Disassembler/HexagonDisassembler.cpp | 15 +- .../Lanai/Disassembler/LanaiDisassembler.cpp | 7 +- .../Target/Lanai/Disassembler/LanaiDisassembler.h | 3 +- .../MSP430/Disassembler/MSP430Disassembler.cpp | 14 +- .../Target/Mips/Disassembler/MipsDisassembler.cpp | 2 - .../PowerPC/Disassembler/PPCDisassembler.cpp | 4 +- .../RISCV/Disassembler/RISCVDisassembler.cpp | 2 - .../Sparc/Disassembler/SparcDisassembler.cpp | 2 - .../SystemZ/Disassembler/SystemZDisassembler.cpp | 2 - .../Disassembler/WebAssemblyDisassembler.cpp | 6 +- llvm/lib/Target/X86/Disassembler/CMakeLists.txt | 1 - .../Target/X86/Disassembler/X86Disassembler.cpp | 1666 ++++++++++++++++- .../X86/Disassembler/X86DisassemblerDecoder.cpp | 1920 -------------------- .../X86/Disassembler/X86DisassemblerDecoder.h | 69 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 4 + llvm/lib/Target/X86/X86ISelLowering.cpp | 25 +- llvm/lib/Target/X86/X86InstrAVX512.td | 60 - llvm/lib/Target/X86/X86InstrSSE.td | 7 - .../XCore/Disassembler/XCoreDisassembler.cpp | 8 +- .../test/Analysis/ScalarEvolution/range_nw_flag.ll | 8 +- llvm/test/CodeGen/AMDGPU/shl.ll | 1717 ++++++++++++++--- llvm/test/CodeGen/Mips/llvm-ir/lshr.ll | 196 +- llvm/test/CodeGen/Mips/llvm-ir/shl.ll | 246 +-- llvm/test/CodeGen/X86/avx-unpack.ll | 8 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 98 +- llvm/test/CodeGen/X86/subvector-broadcast.ll | 4 +- llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 129 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 26 +- llvm/test/ExecutionEngine/OrcLazy/printargv.ll | 81 + llvm/tools/lli/lli.cpp | 10 +- llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 2 +- llvm/tools/llvm-mc/Disassembler.cpp | 3 +- llvm/tools/llvm-objdump/MachODump.cpp | 12 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 11 +- llvm/tools/sancov/sancov.cpp | 2 +- llvm/unittests/Support/CrashRecoveryTest.cpp | 30 + llvm/utils/TableGen/X86DisassemblerTables.cpp | 88 +- .../llvm/lib/Target/X86/Disassembler/BUILD.gn | 1 - 69 files changed, 4073 insertions(+), 3396 deletions(-) delete mode 100644 llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp create mode 100644 llvm/test/ExecutionEngine/OrcLazy/printargv.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (c5d8397 -> b8c20b6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards c5d8397 0: update: llvm-linux: 16 new b8c20b6 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c5d8397) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 106 +- 02-build_llvm/console.log | 12608 +++++++++++++++++------------------ 03-build_linux/console.log | 858 +-- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 32 - console.log | 13614 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 7 files changed, 13590 insertions(+), 13650 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (53f92fb -> b92ee84)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/base-artifacts. discards 53f92fb 4: update: llvm-a701be8f036accef9a3dab62fa4baa70ea330a80: 602 new b92ee84 4: update: linux-6c09d7dbb7d366122d0218bc7487e0a1e6cca6ed: 602 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (53f92fb) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 127 +- 02-build_llvm/console.log | 12473 +- 03-build_linux/console.log | 664351 ++++++++++++++++++------------------ 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 27 +- console.log | 676988 ++++++++++++++++++------------------- jenkins/manifest.sh | 6 +- 7 files changed, 676981 insertions(+), 676993 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (bf03944d5d9 -> ad201691d5c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/llvm-project. from bf03944d5d9 Fix "pointer is null" static analyzer warnings. NFCI. adds fce887beb79 GlobalModuleIndex - Fix use-after-move clang static analyze [...] adds 6cb3957730e [X86AsmBackend] Be consistent about placing definitions out [...] adds 563d3e34445 [X86AsmBackend] Move static function before sole use [NFC] adds 1d641daf260 [X86] Adjust nop emission by compiler to consider target de [...] adds 2bdf33cc4c7 [mlir] NFC: Remove Value::operator* and Value::operator-> n [...] adds 4c48ea68e49 [ASTMatchers] extract public matchers from const-analysis i [...] adds 23a799adf0a Revert "[ASTMatchers] extract public matchers from const-an [...] adds d2751f8fdf6 [ExecutionEngine] Re-enable FastISel for non-iOS arm targets. adds dc422e968e7 Add -Wrange-loop-analysis changes to ReleaseNotes adds 9cc9120969f [X86] Turn FP_ROUND/STRICT_FP_ROUND into X86ISD::VFPROUND/S [...] adds a5994c789a2 [X86][Disassembler] Simplify and optimize reader functions adds 9fe6f36c1a9 [LegalizeVectorOps] Only pass SDNode* instead SDValue to al [...] adds 5a9954c02a7 [LegalizeVectorOps] Remove some of the simpler Expand metho [...] adds 179abb091d8 [X86][Disassembler] Replace custom logger with LLVM_DEBUG adds a1f16998f37 [Support] Optionally call signal handlers when a function w [...] adds 2cdb18afda8 [ORC] Fix argv handling in runAsMain / lli. adds 6fdd6a7b3f6 [Disassembler] Delete the VStream parameter of MCDisassembl [...] adds 1e8ce7492e9 [X86][Disassembler] Optimize argument passing and immediate [...] adds f719c540bb0 [X86][Disassembler] Shrink X86GenDisassemblerTables.inc fro [...] adds ddfcd82bdc2 [LegalizeVectorOps] Expand vector MERGE_VALUES immediately. adds ed679804d5e [TargetLowering][X86] Connect the chain from STRICT_FSETCC [...] adds efb674ac2f2 [LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UI [...] adds 569ccfc384a [SCEV] more accurate range for addrecexpr with nsw flag. adds d692f0f6c8c [X86] Don't call LowerSETCC from LowerSELECT for STRICT_FSE [...] adds f33fd43a7c9 [NFC] Refactor memory ops cluster method adds c5b94ea2651 [profile] Support merge pool size >= 10 adds 51c1d7c4bec [X86][Disassembler] Simplify adds 60cc095ecc3 [X86][Disassembler] Merge X86DisassemblerDecoder.cpp into X [...] adds b375f28b0ec [X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the [...] adds 66e39067edb [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower b [...] adds 065eefcfe96 [AMDGPU] Regenerate shl shift tests adds a888277897f [MIPS] Regenerate shl/lshr shift tests adds ad201691d5c Fix "pointer is null" static analyzer warnings. NFCI. No new revisions were added by this update. Summary of changes: clang/docs/ReleaseNotes.rst | 4 + clang/lib/Serialization/GlobalModuleIndex.cpp | 9 +- .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp | 17 +- compiler-rt/lib/profile/InstrProfilingFile.c | 46 +- compiler-rt/test/profile/instrprof-basic.c | 7 + .../Disassembler/llvm/DisassemblerLLVMC.cpp | 2 +- .../Instruction/MIPS/EmulateInstructionMIPS.cpp | 18 +- .../MIPS64/EmulateInstructionMIPS64.cpp | 4 +- .../llvm/MC/MCDisassembler/MCDisassembler.h | 4 - llvm/include/llvm/Support/CrashRecoveryContext.h | 8 + llvm/include/llvm/Support/Signals.h | 9 + llvm/lib/Analysis/ScalarEvolution.cpp | 26 +- llvm/lib/CodeGen/MachineScheduler.cpp | 21 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 612 +++---- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 8 +- llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp | 2 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 2 +- llvm/lib/ExecutionEngine/TargetSelect.cpp | 7 - llvm/lib/MC/MCDisassembler/Disassembler.cpp | 3 +- llvm/lib/MC/MCDisassembler/MCDisassembler.cpp | 7 +- llvm/lib/Support/CrashRecoveryContext.cpp | 65 +- llvm/lib/Support/Unix/Signals.inc | 16 + llvm/lib/Support/Windows/Signals.inc | 57 +- .../AArch64/Disassembler/AArch64Disassembler.cpp | 1 - .../AArch64/Disassembler/AArch64Disassembler.h | 3 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 1 - .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 2 +- .../Target/ARC/Disassembler/ARCDisassembler.cpp | 2 - .../Target/ARM/Disassembler/ARMDisassembler.cpp | 20 +- .../Target/AVR/Disassembler/AVRDisassembler.cpp | 2 - .../Target/BPF/Disassembler/BPFDisassembler.cpp | 2 - .../Hexagon/Disassembler/HexagonDisassembler.cpp | 15 +- .../Lanai/Disassembler/LanaiDisassembler.cpp | 7 +- .../Target/Lanai/Disassembler/LanaiDisassembler.h | 3 +- .../MSP430/Disassembler/MSP430Disassembler.cpp | 14 +- .../Target/Mips/Disassembler/MipsDisassembler.cpp | 2 - .../PowerPC/Disassembler/PPCDisassembler.cpp | 4 +- .../RISCV/Disassembler/RISCVDisassembler.cpp | 2 - .../Sparc/Disassembler/SparcDisassembler.cpp | 2 - .../SystemZ/Disassembler/SystemZDisassembler.cpp | 2 - .../Disassembler/WebAssemblyDisassembler.cpp | 6 +- llvm/lib/Target/X86/Disassembler/CMakeLists.txt | 1 - .../Target/X86/Disassembler/X86Disassembler.cpp | 1666 ++++++++++++++++- .../X86/Disassembler/X86DisassemblerDecoder.cpp | 1920 -------------------- .../X86/Disassembler/X86DisassemblerDecoder.h | 69 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 174 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 4 + llvm/lib/Target/X86/X86ISelLowering.cpp | 25 +- llvm/lib/Target/X86/X86InstrAVX512.td | 60 - llvm/lib/Target/X86/X86InstrSSE.td | 7 - llvm/lib/Target/X86/X86MCInstLower.cpp | 17 + .../XCore/Disassembler/XCoreDisassembler.cpp | 8 +- .../test/Analysis/ScalarEvolution/range_nw_flag.ll | 8 +- llvm/test/CodeGen/AMDGPU/shl.ll | 1717 ++++++++++++++--- llvm/test/CodeGen/Mips/llvm-ir/lshr.ll | 196 +- llvm/test/CodeGen/Mips/llvm-ir/shl.ll | 246 +-- .../X86/align-branch-boundary-suppressions.ll | 6 +- llvm/test/CodeGen/X86/avx-unpack.ll | 8 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 98 +- llvm/test/CodeGen/X86/stackmap-nops.ll | 488 +++-- llvm/test/CodeGen/X86/subvector-broadcast.ll | 4 +- llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 129 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 26 +- llvm/test/ExecutionEngine/OrcLazy/printargv.ll | 81 + llvm/test/MC/X86/stackmap-nops.ll | 4 +- llvm/tools/lli/lli.cpp | 10 +- llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 2 +- llvm/tools/llvm-mc/Disassembler.cpp | 3 +- llvm/tools/llvm-objdump/MachODump.cpp | 12 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 11 +- llvm/tools/sancov/sancov.cpp | 2 +- llvm/unittests/Support/CrashRecoveryTest.cpp | 30 + llvm/utils/TableGen/X86DisassemblerTables.cpp | 88 +- .../llvm/lib/Target/X86/Disassembler/BUILD.gn | 1 - mlir/docs/DeclarativeRewrites.md | 3 +- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/QuickstartRewrites.md | 8 +- mlir/docs/Tutorials/Toy/Ch-3.md | 6 +- mlir/docs/Tutorials/Toy/Ch-4.md | 4 +- mlir/examples/toy/Ch2/mlir/Dialect.cpp | 5 +- mlir/examples/toy/Ch3/mlir/Dialect.cpp | 5 +- mlir/examples/toy/Ch3/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch3/mlir/ToyCombine.td | 4 +- mlir/examples/toy/Ch4/mlir/Dialect.cpp | 17 +- mlir/examples/toy/Ch4/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch4/mlir/ToyCombine.td | 4 +- mlir/examples/toy/Ch5/mlir/Dialect.cpp | 17 +- mlir/examples/toy/Ch5/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch5/mlir/ToyCombine.td | 4 +- mlir/examples/toy/Ch6/mlir/Dialect.cpp | 17 +- mlir/examples/toy/Ch6/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch6/mlir/ToyCombine.td | 4 +- mlir/examples/toy/Ch7/mlir/Dialect.cpp | 26 +- mlir/examples/toy/Ch7/mlir/MLIRGen.cpp | 4 +- mlir/examples/toy/Ch7/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch7/mlir/ToyCombine.td | 4 +- mlir/include/mlir/Analysis/Dominance.h | 2 +- mlir/include/mlir/Dialect/AffineOps/AffineOps.h | 22 +- mlir/include/mlir/Dialect/AffineOps/AffineOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 14 +- mlir/include/mlir/Dialect/Linalg/EDSC/Builders.h | 2 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 6 +- .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 4 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h | 4 +- .../Linalg/Transforms/LinalgTransformPatterns.td | 2 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 2 +- mlir/include/mlir/Dialect/QuantOps/QuantOps.td | 2 +- mlir/include/mlir/Dialect/StandardOps/Ops.h | 12 +- mlir/include/mlir/Dialect/StandardOps/Ops.td | 30 +- mlir/include/mlir/Dialect/VectorOps/VectorOps.td | 78 +- .../Dialect/VectorOps/VectorTransformPatterns.td | 4 +- mlir/include/mlir/EDSC/Builders.h | 4 +- mlir/include/mlir/EDSC/Intrinsics.h | 2 +- mlir/include/mlir/IR/Matchers.h | 6 +- mlir/include/mlir/IR/OpBase.td | 22 +- mlir/include/mlir/IR/OpDefinition.h | 6 +- mlir/include/mlir/IR/OpImplementation.h | 6 +- mlir/include/mlir/IR/Operation.h | 4 +- mlir/include/mlir/IR/Value.h | 19 +- .../Quantizer/Support/ConstraintAnalysisGraph.h | 2 +- mlir/include/mlir/Transforms/RegionUtils.h | 2 +- mlir/lib/Analysis/AffineAnalysis.cpp | 4 +- mlir/lib/Analysis/AffineStructures.cpp | 28 +- mlir/lib/Analysis/CallGraph.cpp | 2 +- mlir/lib/Analysis/Dominance.cpp | 4 +- mlir/lib/Analysis/Liveness.cpp | 18 +- mlir/lib/Analysis/LoopAnalysis.cpp | 4 +- mlir/lib/Analysis/SliceAnalysis.cpp | 12 +- mlir/lib/Analysis/Utils.cpp | 20 +- mlir/lib/Analysis/VectorAnalysis.cpp | 2 +- mlir/lib/Analysis/Verifier.cpp | 4 +- .../Conversion/GPUCommon/OpToFuncCallLowering.h | 4 +- .../GPUToCUDA/ConvertLaunchFuncToCudaCalls.cpp | 2 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 26 +- .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 4 +- mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 6 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 4 +- .../StandardToLLVM/ConvertStandardToLLVM.cpp | 46 +- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 22 +- .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp | 5 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 14 +- mlir/lib/Dialect/AffineOps/AffineOps.cpp | 99 +- .../FxpMathOps/Transforms/LowerUniformRealMath.cpp | 10 +- .../FxpMathOps/Transforms/UniformKernelUtils.h | 8 +- mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 50 +- .../lib/Dialect/GPU/Transforms/KernelOutlining.cpp | 8 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 72 +- .../Dialect/Linalg/Analysis/DependenceAnalysis.cpp | 14 +- mlir/lib/Dialect/Linalg/EDSC/Builders.cpp | 2 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 36 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 15 +- .../Dialect/Linalg/Transforms/LinalgTransforms.cpp | 4 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 12 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 14 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 6 +- mlir/lib/Dialect/LoopOps/LoopOps.cpp | 19 +- mlir/lib/Dialect/QuantOps/IR/QuantOps.cpp | 4 +- .../Dialect/QuantOps/Transforms/ConvertConst.cpp | 6 +- mlir/lib/Dialect/SPIRV/SPIRVDialect.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 160 +- .../Dialect/SPIRV/Serialization/Deserializer.cpp | 6 +- .../lib/Dialect/SPIRV/Serialization/Serializer.cpp | 8 +- .../DecorateSPIRVCompositeTypeLayoutPass.cpp | 2 +- mlir/lib/Dialect/StandardOps/Ops.cpp | 166 +- mlir/lib/Dialect/Traits.cpp | 6 +- mlir/lib/Dialect/VectorOps/VectorOps.cpp | 109 +- mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 30 +- mlir/lib/EDSC/Builders.cpp | 12 +- mlir/lib/EDSC/Helpers.cpp | 6 +- mlir/lib/IR/AsmPrinter.cpp | 16 +- mlir/lib/IR/Block.cpp | 2 +- mlir/lib/IR/Builders.cpp | 2 +- mlir/lib/IR/Function.cpp | 4 +- mlir/lib/IR/Operation.cpp | 24 +- mlir/lib/IR/PatternMatch.cpp | 2 +- mlir/lib/IR/Region.cpp | 4 +- mlir/lib/IR/TypeUtilities.cpp | 6 +- mlir/lib/IR/Value.cpp | 6 +- mlir/lib/Parser/Parser.cpp | 14 +- .../lib/Quantizer/Configurations/FxpMathConfig.cpp | 18 +- .../Quantizer/Support/ConstraintAnalysisGraph.cpp | 6 +- .../Transforms/AddDefaultStatsTestPass.cpp | 8 +- .../Transforms/InferQuantizedTypesPass.cpp | 20 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 2 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 4 +- .../Transforms/AffineLoopInvariantCodeMotion.cpp | 6 +- mlir/lib/Transforms/DialectConversion.cpp | 32 +- mlir/lib/Transforms/LoopFusion.cpp | 22 +- mlir/lib/Transforms/LoopInvariantCodeMotion.cpp | 2 +- mlir/lib/Transforms/LoopTiling.cpp | 2 +- mlir/lib/Transforms/LoopUnrollAndJam.cpp | 2 +- mlir/lib/Transforms/MemRefDataFlowOpt.cpp | 8 +- mlir/lib/Transforms/PipelineDataTransfer.cpp | 20 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 6 +- .../Utils/GreedyPatternRewriteDriver.cpp | 8 +- mlir/lib/Transforms/Utils/InliningUtils.cpp | 20 +- mlir/lib/Transforms/Utils/LoopFusionUtils.cpp | 4 +- mlir/lib/Transforms/Utils/LoopUtils.cpp | 37 +- mlir/lib/Transforms/Utils/RegionUtils.cpp | 6 +- mlir/lib/Transforms/Utils/Utils.cpp | 36 +- mlir/lib/Transforms/Vectorize.cpp | 23 +- mlir/test/lib/TestDialect/TestDialect.cpp | 12 +- mlir/test/lib/TestDialect/TestOps.td | 2 +- mlir/test/lib/TestDialect/TestPatterns.cpp | 12 +- mlir/test/lib/Transforms/TestInlining.cpp | 4 +- .../lib/Transforms/TestMemRefStrideCalculation.cpp | 2 +- .../test/lib/Transforms/TestVectorizationUtils.cpp | 2 +- mlir/test/mlir-tblgen/op-result.td | 4 +- mlir/test/mlir-tblgen/predicate.td | 4 +- mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 14 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 10 +- 213 files changed, 5443 insertions(+), 4684 deletions(-) delete mode 100644 llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp create mode 100644 llvm/test/ExecutionEngine/OrcLazy/printargv.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (e694269 -> 3cc03cd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards e694269 6: update: llvm-bf03944d5d9a7e7c8105c69dfa0d7e0d345644df: 609 new 3cc03cd 6: update: llvm-linux: 609 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e694269) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 12588 +- 03-build_linux/console.log | 663035 ++++++++++++++++++------------------ 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 41 +- console.log | 675882 +++++++++++++++++++------------------ jenkins/manifest.sh | 11 +- 7 files changed, 676038 insertions(+), 675713 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig updated (bf03944d5d9 -> ad201691d5c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project. from bf03944d5d9 Fix "pointer is null" static analyzer warnings. NFCI. adds fce887beb79 GlobalModuleIndex - Fix use-after-move clang static analyze [...] adds 6cb3957730e [X86AsmBackend] Be consistent about placing definitions out [...] adds 563d3e34445 [X86AsmBackend] Move static function before sole use [NFC] adds 1d641daf260 [X86] Adjust nop emission by compiler to consider target de [...] adds 2bdf33cc4c7 [mlir] NFC: Remove Value::operator* and Value::operator-> n [...] adds 4c48ea68e49 [ASTMatchers] extract public matchers from const-analysis i [...] adds 23a799adf0a Revert "[ASTMatchers] extract public matchers from const-an [...] adds d2751f8fdf6 [ExecutionEngine] Re-enable FastISel for non-iOS arm targets. adds dc422e968e7 Add -Wrange-loop-analysis changes to ReleaseNotes adds 9cc9120969f [X86] Turn FP_ROUND/STRICT_FP_ROUND into X86ISD::VFPROUND/S [...] adds a5994c789a2 [X86][Disassembler] Simplify and optimize reader functions adds 9fe6f36c1a9 [LegalizeVectorOps] Only pass SDNode* instead SDValue to al [...] adds 5a9954c02a7 [LegalizeVectorOps] Remove some of the simpler Expand metho [...] adds 179abb091d8 [X86][Disassembler] Replace custom logger with LLVM_DEBUG adds a1f16998f37 [Support] Optionally call signal handlers when a function w [...] adds 2cdb18afda8 [ORC] Fix argv handling in runAsMain / lli. adds 6fdd6a7b3f6 [Disassembler] Delete the VStream parameter of MCDisassembl [...] adds 1e8ce7492e9 [X86][Disassembler] Optimize argument passing and immediate [...] adds f719c540bb0 [X86][Disassembler] Shrink X86GenDisassemblerTables.inc fro [...] adds ddfcd82bdc2 [LegalizeVectorOps] Expand vector MERGE_VALUES immediately. adds ed679804d5e [TargetLowering][X86] Connect the chain from STRICT_FSETCC [...] adds efb674ac2f2 [LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UI [...] adds 569ccfc384a [SCEV] more accurate range for addrecexpr with nsw flag. adds d692f0f6c8c [X86] Don't call LowerSETCC from LowerSELECT for STRICT_FSE [...] adds f33fd43a7c9 [NFC] Refactor memory ops cluster method adds c5b94ea2651 [profile] Support merge pool size >= 10 adds 51c1d7c4bec [X86][Disassembler] Simplify adds 60cc095ecc3 [X86][Disassembler] Merge X86DisassemblerDecoder.cpp into X [...] adds b375f28b0ec [X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the [...] adds 66e39067edb [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower b [...] new 065eefcfe96 [AMDGPU] Regenerate shl shift tests new a888277897f [MIPS] Regenerate shl/lshr shift tests new ad201691d5c Fix "pointer is null" static analyzer warnings. NFCI. The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/docs/ReleaseNotes.rst | 4 + clang/lib/Serialization/GlobalModuleIndex.cpp | 9 +- .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp | 17 +- compiler-rt/lib/profile/InstrProfilingFile.c | 46 +- compiler-rt/test/profile/instrprof-basic.c | 7 + .../Disassembler/llvm/DisassemblerLLVMC.cpp | 2 +- .../Instruction/MIPS/EmulateInstructionMIPS.cpp | 18 +- .../MIPS64/EmulateInstructionMIPS64.cpp | 4 +- .../llvm/MC/MCDisassembler/MCDisassembler.h | 4 - llvm/include/llvm/Support/CrashRecoveryContext.h | 8 + llvm/include/llvm/Support/Signals.h | 9 + llvm/lib/Analysis/ScalarEvolution.cpp | 26 +- llvm/lib/CodeGen/MachineScheduler.cpp | 21 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 612 +++---- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 8 +- llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp | 2 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 2 +- llvm/lib/ExecutionEngine/TargetSelect.cpp | 7 - llvm/lib/MC/MCDisassembler/Disassembler.cpp | 3 +- llvm/lib/MC/MCDisassembler/MCDisassembler.cpp | 7 +- llvm/lib/Support/CrashRecoveryContext.cpp | 65 +- llvm/lib/Support/Unix/Signals.inc | 16 + llvm/lib/Support/Windows/Signals.inc | 57 +- .../AArch64/Disassembler/AArch64Disassembler.cpp | 1 - .../AArch64/Disassembler/AArch64Disassembler.h | 3 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 1 - .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 2 +- .../Target/ARC/Disassembler/ARCDisassembler.cpp | 2 - .../Target/ARM/Disassembler/ARMDisassembler.cpp | 20 +- .../Target/AVR/Disassembler/AVRDisassembler.cpp | 2 - .../Target/BPF/Disassembler/BPFDisassembler.cpp | 2 - .../Hexagon/Disassembler/HexagonDisassembler.cpp | 15 +- .../Lanai/Disassembler/LanaiDisassembler.cpp | 7 +- .../Target/Lanai/Disassembler/LanaiDisassembler.h | 3 +- .../MSP430/Disassembler/MSP430Disassembler.cpp | 14 +- .../Target/Mips/Disassembler/MipsDisassembler.cpp | 2 - .../PowerPC/Disassembler/PPCDisassembler.cpp | 4 +- .../RISCV/Disassembler/RISCVDisassembler.cpp | 2 - .../Sparc/Disassembler/SparcDisassembler.cpp | 2 - .../SystemZ/Disassembler/SystemZDisassembler.cpp | 2 - .../Disassembler/WebAssemblyDisassembler.cpp | 6 +- llvm/lib/Target/X86/Disassembler/CMakeLists.txt | 1 - .../Target/X86/Disassembler/X86Disassembler.cpp | 1666 ++++++++++++++++- .../X86/Disassembler/X86DisassemblerDecoder.cpp | 1920 -------------------- .../X86/Disassembler/X86DisassemblerDecoder.h | 69 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 174 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 4 + llvm/lib/Target/X86/X86ISelLowering.cpp | 25 +- llvm/lib/Target/X86/X86InstrAVX512.td | 60 - llvm/lib/Target/X86/X86InstrSSE.td | 7 - llvm/lib/Target/X86/X86MCInstLower.cpp | 17 + .../XCore/Disassembler/XCoreDisassembler.cpp | 8 +- .../test/Analysis/ScalarEvolution/range_nw_flag.ll | 8 +- llvm/test/CodeGen/AMDGPU/shl.ll | 1717 ++++++++++++++--- llvm/test/CodeGen/Mips/llvm-ir/lshr.ll | 196 +- llvm/test/CodeGen/Mips/llvm-ir/shl.ll | 246 +-- .../X86/align-branch-boundary-suppressions.ll | 6 +- llvm/test/CodeGen/X86/avx-unpack.ll | 8 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 98 +- llvm/test/CodeGen/X86/stackmap-nops.ll | 488 +++-- llvm/test/CodeGen/X86/subvector-broadcast.ll | 4 +- llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 129 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 26 +- llvm/test/ExecutionEngine/OrcLazy/printargv.ll | 81 + llvm/test/MC/X86/stackmap-nops.ll | 4 +- llvm/tools/lli/lli.cpp | 10 +- llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp | 2 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 2 +- llvm/tools/llvm-mc/Disassembler.cpp | 3 +- llvm/tools/llvm-objdump/MachODump.cpp | 12 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 11 +- llvm/tools/sancov/sancov.cpp | 2 +- llvm/unittests/Support/CrashRecoveryTest.cpp | 30 + llvm/utils/TableGen/X86DisassemblerTables.cpp | 88 +- .../llvm/lib/Target/X86/Disassembler/BUILD.gn | 1 - mlir/docs/DeclarativeRewrites.md | 3 +- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/QuickstartRewrites.md | 8 +- mlir/docs/Tutorials/Toy/Ch-3.md | 6 +- mlir/docs/Tutorials/Toy/Ch-4.md | 4 +- mlir/examples/toy/Ch2/mlir/Dialect.cpp | 5 +- mlir/examples/toy/Ch3/mlir/Dialect.cpp | 5 +- mlir/examples/toy/Ch3/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch3/mlir/ToyCombine.td | 4 +- mlir/examples/toy/Ch4/mlir/Dialect.cpp | 17 +- mlir/examples/toy/Ch4/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch4/mlir/ToyCombine.td | 4 +- mlir/examples/toy/Ch5/mlir/Dialect.cpp | 17 +- mlir/examples/toy/Ch5/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch5/mlir/ToyCombine.td | 4 +- mlir/examples/toy/Ch6/mlir/Dialect.cpp | 17 +- mlir/examples/toy/Ch6/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch6/mlir/ToyCombine.td | 4 +- mlir/examples/toy/Ch7/mlir/Dialect.cpp | 26 +- mlir/examples/toy/Ch7/mlir/MLIRGen.cpp | 4 +- mlir/examples/toy/Ch7/mlir/ToyCombine.cpp | 2 +- mlir/examples/toy/Ch7/mlir/ToyCombine.td | 4 +- mlir/include/mlir/Analysis/Dominance.h | 2 +- mlir/include/mlir/Dialect/AffineOps/AffineOps.h | 22 +- mlir/include/mlir/Dialect/AffineOps/AffineOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 14 +- mlir/include/mlir/Dialect/Linalg/EDSC/Builders.h | 2 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 6 +- .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 4 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h | 4 +- .../Linalg/Transforms/LinalgTransformPatterns.td | 2 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 2 +- mlir/include/mlir/Dialect/QuantOps/QuantOps.td | 2 +- mlir/include/mlir/Dialect/StandardOps/Ops.h | 12 +- mlir/include/mlir/Dialect/StandardOps/Ops.td | 30 +- mlir/include/mlir/Dialect/VectorOps/VectorOps.td | 78 +- .../Dialect/VectorOps/VectorTransformPatterns.td | 4 +- mlir/include/mlir/EDSC/Builders.h | 4 +- mlir/include/mlir/EDSC/Intrinsics.h | 2 +- mlir/include/mlir/IR/Matchers.h | 6 +- mlir/include/mlir/IR/OpBase.td | 22 +- mlir/include/mlir/IR/OpDefinition.h | 6 +- mlir/include/mlir/IR/OpImplementation.h | 6 +- mlir/include/mlir/IR/Operation.h | 4 +- mlir/include/mlir/IR/Value.h | 19 +- .../Quantizer/Support/ConstraintAnalysisGraph.h | 2 +- mlir/include/mlir/Transforms/RegionUtils.h | 2 +- mlir/lib/Analysis/AffineAnalysis.cpp | 4 +- mlir/lib/Analysis/AffineStructures.cpp | 28 +- mlir/lib/Analysis/CallGraph.cpp | 2 +- mlir/lib/Analysis/Dominance.cpp | 4 +- mlir/lib/Analysis/Liveness.cpp | 18 +- mlir/lib/Analysis/LoopAnalysis.cpp | 4 +- mlir/lib/Analysis/SliceAnalysis.cpp | 12 +- mlir/lib/Analysis/Utils.cpp | 20 +- mlir/lib/Analysis/VectorAnalysis.cpp | 2 +- mlir/lib/Analysis/Verifier.cpp | 4 +- .../Conversion/GPUCommon/OpToFuncCallLowering.h | 4 +- .../GPUToCUDA/ConvertLaunchFuncToCudaCalls.cpp | 2 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 26 +- .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 4 +- mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 6 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 4 +- .../StandardToLLVM/ConvertStandardToLLVM.cpp | 46 +- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 22 +- .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp | 5 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 14 +- mlir/lib/Dialect/AffineOps/AffineOps.cpp | 99 +- .../FxpMathOps/Transforms/LowerUniformRealMath.cpp | 10 +- .../FxpMathOps/Transforms/UniformKernelUtils.h | 8 +- mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 50 +- .../lib/Dialect/GPU/Transforms/KernelOutlining.cpp | 8 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 72 +- .../Dialect/Linalg/Analysis/DependenceAnalysis.cpp | 14 +- mlir/lib/Dialect/Linalg/EDSC/Builders.cpp | 2 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 36 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 15 +- .../Dialect/Linalg/Transforms/LinalgTransforms.cpp | 4 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 12 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 14 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 6 +- mlir/lib/Dialect/LoopOps/LoopOps.cpp | 19 +- mlir/lib/Dialect/QuantOps/IR/QuantOps.cpp | 4 +- .../Dialect/QuantOps/Transforms/ConvertConst.cpp | 6 +- mlir/lib/Dialect/SPIRV/SPIRVDialect.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 160 +- .../Dialect/SPIRV/Serialization/Deserializer.cpp | 6 +- .../lib/Dialect/SPIRV/Serialization/Serializer.cpp | 8 +- .../DecorateSPIRVCompositeTypeLayoutPass.cpp | 2 +- mlir/lib/Dialect/StandardOps/Ops.cpp | 166 +- mlir/lib/Dialect/Traits.cpp | 6 +- mlir/lib/Dialect/VectorOps/VectorOps.cpp | 109 +- mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 30 +- mlir/lib/EDSC/Builders.cpp | 12 +- mlir/lib/EDSC/Helpers.cpp | 6 +- mlir/lib/IR/AsmPrinter.cpp | 16 +- mlir/lib/IR/Block.cpp | 2 +- mlir/lib/IR/Builders.cpp | 2 +- mlir/lib/IR/Function.cpp | 4 +- mlir/lib/IR/Operation.cpp | 24 +- mlir/lib/IR/PatternMatch.cpp | 2 +- mlir/lib/IR/Region.cpp | 4 +- mlir/lib/IR/TypeUtilities.cpp | 6 +- mlir/lib/IR/Value.cpp | 6 +- mlir/lib/Parser/Parser.cpp | 14 +- .../lib/Quantizer/Configurations/FxpMathConfig.cpp | 18 +- .../Quantizer/Support/ConstraintAnalysisGraph.cpp | 6 +- .../Transforms/AddDefaultStatsTestPass.cpp | 8 +- .../Transforms/InferQuantizedTypesPass.cpp | 20 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 2 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 4 +- .../Transforms/AffineLoopInvariantCodeMotion.cpp | 6 +- mlir/lib/Transforms/DialectConversion.cpp | 32 +- mlir/lib/Transforms/LoopFusion.cpp | 22 +- mlir/lib/Transforms/LoopInvariantCodeMotion.cpp | 2 +- mlir/lib/Transforms/LoopTiling.cpp | 2 +- mlir/lib/Transforms/LoopUnrollAndJam.cpp | 2 +- mlir/lib/Transforms/MemRefDataFlowOpt.cpp | 8 +- mlir/lib/Transforms/PipelineDataTransfer.cpp | 20 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 6 +- .../Utils/GreedyPatternRewriteDriver.cpp | 8 +- mlir/lib/Transforms/Utils/InliningUtils.cpp | 20 +- mlir/lib/Transforms/Utils/LoopFusionUtils.cpp | 4 +- mlir/lib/Transforms/Utils/LoopUtils.cpp | 37 +- mlir/lib/Transforms/Utils/RegionUtils.cpp | 6 +- mlir/lib/Transforms/Utils/Utils.cpp | 36 +- mlir/lib/Transforms/Vectorize.cpp | 23 +- mlir/test/lib/TestDialect/TestDialect.cpp | 12 +- mlir/test/lib/TestDialect/TestOps.td | 2 +- mlir/test/lib/TestDialect/TestPatterns.cpp | 12 +- mlir/test/lib/Transforms/TestInlining.cpp | 4 +- .../lib/Transforms/TestMemRefStrideCalculation.cpp | 2 +- .../test/lib/Transforms/TestVectorizationUtils.cpp | 2 +- mlir/test/mlir-tblgen/op-result.td | 4 +- mlir/test/mlir-tblgen/predicate.td | 4 +- mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 14 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 10 +- 213 files changed, 5443 insertions(+), 4684 deletions(-) delete mode 100644 llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp create mode 100644 llvm/test/ExecutionEngine/OrcLazy/printargv.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig updated (a27a39c -> ac04a92)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/base-artifacts. discards a27a39c 0: update: llvm-linux: boot new ac04a92 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a27a39c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 70 +- 02-build_llvm/console.log | 12540 +++++++++++++++++----------------- 03-build_linux/console.log | 714 +- 04-boot_linux/console.log | 480 +- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 29 - console.log | 13843 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13818 insertions(+), 13876 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[binutils-gdb] branch master updated (4ec89149dd8 -> bb1183e25ae)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 4ec89149dd8 Remove last traces of discard_all_inferiors new f5df0b5f087 gdbserver: include aarch32/aarch64 header file in correspon [...] new bb1183e25ae gdbserver: make aarch64_write_goto_address static The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/gdbserver/ChangeLog | 9 +++++++++ gdb/gdbserver/linux-aarch32-tdesc.c | 3 +++ gdb/gdbserver/linux-aarch64-low.c | 2 +- gdb/gdbserver/linux-aarch64-tdesc.c | 3 +++ 4 files changed, 16 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (f17ae668a96 -> a701be8f036)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/llvm-project. from f17ae668a96 [Driver][CodeGen] Add -fpatchable-function-entry=N[,0] adds 2d077d6dfa7 [ELF] Make TargetInfo::writeIgotPlt a no-op adds f678fc7660b [LegalizeVectorOps] Improve handling of multi-result operations. adds ef239972614 [lldb] Remove FieldDecl stealing hack by rerouting indirect [...] adds 572b9f468ad [lldb/Lua] Support loading Lua modules adds a5230ac10b0 Update the attribution policy to use the 'Author' property [...] adds 13ec473b9d4 [analyzer] Move PlacementNewChecker to alpha adds b590e0fd810 [TargetLowering][ARM][X86] Change softenSetCCOperands handl [...] adds 9cd985815ab [lld][WebAssembly] Add libcall symbols to the link when LTO [...] adds 815a3f54331 [CMake] Fix modules build after DWARFLinker reorganization adds f28972facc1 [clang] Fix out-of-bounds memory access in ComputeLineNumbers adds ba91dffafe4 [Driver][PowerPC] Move powerpcspe logic from cc1 to Driver adds 55d7b22277e [ASTMatchers] Make test more clear about what it is verifying adds 0c29d3ff223 [Tests] Precommit tests showing default branch padding on skylake adds 77da826edad [lldb] Make CompleteTagDeclsScope completion order deterministic adds 9e13cff44d6 [lldb] Fix TestClangASTContext.TestFunctionTemplateInRecord [...] adds 4ffcec40ace Implement new AST matcher hasAnyCapture to match on LambdaE [...] adds f3db1aad279 MakeUniqueCheck.cpp: explicit the fact that there is an aut [...] adds faeeb71a173 clang-tidy doc: Refresh the list of checkers and polish the script adds 71cee218619 [TargetLowering] Use SelectionDAG::getSetCC and remove a re [...] adds 68cd283f3b0 clang-tidy doc: unbreak the CI adds a5a6fd3f95a Summary: update macro for OFF_T so that sanitizer works on [...] adds 1a8c996a889 [lldb/Scripts] Remove buildbot.py adds e6d219122d5 [lldb/Scripts] Remove remote-build.py adds 7c47a3719a9 [lldb/Scripts] Move android script from underneath Python dir adds a9052b4dfc1 [AArch64] Add isAuthenticated predicate to MCInstDesc adds 7ce92dc0b4b [lldb/Test] Bypass LLDB_TEST_COMMON_ARGS for certain dotest [...] adds c5adcdc5c88 [lldb/Utils] Remove vim-lldb adds 4c00dbf22d7 lldbutil: Forward ASan launch info to test inferiors adds 987bf8b6c14 Let targets adjust operand latency of bundles adds d3ba1e026db [lldb/Reproducer] Add SBReproducer::Replay overload (again) adds 7a38468e34e Only destroy static locals if they have non-trivial destructors. adds e05e219926f [LockFileManager] Make default waitForUnlock timeout a para [...] adds 064087581ab [NFC][InlineCost] Factor cost modeling out of CallAnalyzer [...] adds ca4a55fabbb [mlir] NFC: put C++ code emission classes in their own files adds 397215cc309 [mlir][ods] Support dialect specific content emission via hooks adds 1b8c84b8dd5 Improve precision of documentation comment. adds ceb801612a6 [AArch64] Don't generate libcalls for wide shifts on Darwin adds f4df7f4701d Remove redundant implicit cast creation. adds fbf915f01d4 Add a FIXME and corresponding test coverage for some suspic [...] adds 9a6f4d451ca Clean up and slightly generalize implementation of composit [...] adds 44e0daf16e6 driver: Allow -fdebug-compilation-dir=foo in joined form. adds 1d2cd2c0b7d [Driver] Fix OptionClass of -fconvergent-functions and -fms [...] adds 9b23407063c [Concepts] Fix MarkUsedTemplateParameters for exprs adds de0a2247115 Remove umask tests adds 7c816492197 [COFF] Align ARM64 range extension thunks at instruction boundary adds bb2553175ac [TargetLowering][ARM][Mips][WebAssembly] Remove the ordered [...] adds a701be8f036 [SCEV] [NFC] add more test cases for range of addrecexpr wi [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/add_new_check.py | 6 +- .../clang-tidy/modernize/MakeUniqueCheck.cpp | 2 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 57 +- clang/docs/LibASTMatchersReference.html | 31 + clang/include/clang/AST/Decl.h | 4 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 45 ++ clang/include/clang/Driver/Options.td | 7 +- .../clang/StaticAnalyzer/Checkers/Checkers.td | 12 +- clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + clang/lib/Basic/SourceManager.cpp | 21 +- clang/lib/Basic/Targets/PPC.cpp | 3 +- clang/lib/CodeGen/CGDecl.cpp | 3 +- clang/lib/Driver/ToolChains/Arch/PPC.cpp | 3 + clang/lib/Driver/ToolChains/Clang.cpp | 6 + clang/lib/Sema/SemaExpr.cpp | 5 +- clang/lib/Sema/SemaExprCXX.cpp | 338 +++++---- clang/lib/Sema/SemaTemplateDeduction.cpp | 45 +- clang/test/Analysis/placement-new-user-defined.cpp | 2 +- clang/test/Analysis/placement-new.cpp | 2 +- clang/test/CodeGen/debug-info-compilation-dir.c | 1 + .../test/CodeGenObjC/initialize-function-static.m | 12 + clang/test/Driver/cl-options.c | 1 + clang/test/Driver/clang_f_opts.c | 4 +- clang/test/Driver/fembed-bitcode.c | 6 +- clang/test/Driver/integrated-as.s | 2 + clang/test/Driver/ppc-features.cpp | 5 +- clang/test/Misc/permissions.cpp | 11 - clang/test/Preprocessor/init.c | 1 - clang/test/SemaObjC/arc.m | 1 + clang/test/SemaObjCXX/arc-ptr-comparison.mm | 29 + .../test/SemaObjCXX/composite-objc-pointertype.mm | 10 + clang/test/SemaOpenCLCXX/address-space-cond.cl | 23 + .../ASTMatchers/ASTMatchersTraversalTest.cpp | 27 +- clang/unittests/Basic/SourceManagerTest.cpp | 24 + .../lib/sanitizer_common/sanitizer_linux.cpp | 2 +- .../lib/sanitizer_common/sanitizer_linux_s390.cpp | 2 +- .../lib/sanitizer_common/sanitizer_netbsd.cpp | 2 +- compiler-rt/lib/sanitizer_common/sanitizer_posix.h | 2 +- .../symbolizer/sanitizer_wrappers.cpp | 9 +- lld/COFF/Chunks.h | 2 +- lld/ELF/Target.cpp | 4 - lld/ELF/Target.h | 2 +- lld/test/COFF/arm64-thunks.s | 20 +- lld/test/ELF/aarch64-gnu-ifunc-plt.s | 4 +- lld/test/ELF/gnu-ifunc-plt.s | 4 +- lld/test/wasm/lto/Inputs/libcall-archive.ll | 6 + lld/test/wasm/lto/libcall-archive.ll | 25 + lld/wasm/Driver.cpp | 27 + lld/wasm/InputFiles.h | 4 + lld/wasm/Symbols.cpp | 11 + lld/wasm/Symbols.h | 1 + lldb/include/lldb/API/SBReproducer.h | 3 +- lldb/packages/Python/lldbsuite/test/lldbutil.py | 9 +- lldb/scripts/Python/remote-build.py | 312 --------- lldb/scripts/Python/use_lldb_suite.py | 26 - lldb/scripts/{Python => }/android/host_art_bt.py | 0 lldb/scripts/buildbot.py | 196 ------ lldb/source/API/SBReproducer.cpp | 4 + .../ExpressionParser/Clang/ClangASTSource.cpp | 14 - lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp | 31 + lldb/source/Plugins/ScriptInterpreter/Lua/Lua.h | 1 + .../ScriptInterpreter/Lua/ScriptInterpreterLua.cpp | 12 + .../ScriptInterpreter/Lua/ScriptInterpreterLua.h | 5 + lldb/source/Symbol/ClangASTImporter.cpp | 41 +- lldb/test/API/CMakeLists.txt | 8 - lldb/test/API/lit.cfg.py | 37 +- lldb/test/API/lit.site.cfg.py.in | 5 + .../ScriptInterpreter/Lua/Inputs/testmodule.lua | 7 + .../Lua/command_script_import.test | 13 + lldb/unittests/Symbol/TestClangASTContext.cpp | 6 +- lldb/utils/lldb-dotest/lldb-dotest.in | 10 + lldb/utils/vim-lldb/README | 59 -- lldb/utils/vim-lldb/doc/lldb.txt | 115 ---- lldb/utils/vim-lldb/plugin/lldb.vim | 151 ---- lldb/utils/vim-lldb/python-vim-lldb/import_lldb.py | 71 -- .../vim-lldb/python-vim-lldb/lldb_controller.py | 415 ----------- lldb/utils/vim-lldb/python-vim-lldb/plugin.py | 16 - lldb/utils/vim-lldb/python-vim-lldb/vim_panes.py | 669 ------------------ lldb/utils/vim-lldb/python-vim-lldb/vim_signs.py | 81 --- lldb/utils/vim-lldb/python-vim-lldb/vim_ui.py | 257 ------- llvm/docs/DeveloperPolicy.rst | 26 +- llvm/include/llvm/IR/RuntimeLibcalls.def | 4 - llvm/include/llvm/MC/MCInstrDesc.h | 10 + llvm/include/llvm/Support/LockFileManager.h | 4 +- llvm/include/llvm/Target/Target.td | 1 + llvm/include/llvm/module.modulemap | 7 + llvm/lib/Analysis/InlineCost.cpp | 759 ++++++++++++--------- llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 7 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 444 +++++++----- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 37 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 5 - llvm/lib/DWARFLinker/CMakeLists.txt | 2 + llvm/lib/Support/LockFileManager.cpp | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 2 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 18 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 65 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 2 + llvm/lib/Target/AMDGPU/SIInstrInfo.h | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 - llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 8 +- llvm/lib/Target/Mips/Mips16ISelLowering.cpp | 3 - .../WebAssemblyRuntimeLibcallSignatures.cpp | 6 - .../test/Analysis/ScalarEvolution/range_nw_flag.ll | 69 +- llvm/test/CodeGen/AArch64/shift_minsize.ll | 5 + llvm/test/CodeGen/Thumb2/float-cmp.ll | 12 +- .../CodeGen/X86/align-branch-boundary-default.ll | 37 + .../CodeGen/X86/align-branch-boundary-default.s | 38 ++ llvm/test/CodeGen/X86/avx512-cmp.ll | 36 + llvm/test/CodeGen/X86/fp128-compare.ll | 10 +- llvm/test/CodeGen/X86/fp128-libcalls-strict.ll | 20 +- llvm/test/CodeGen/X86/fpcmp-soft-fp.ll | 10 +- llvm/test/Other/umask.ll | 14 - llvm/unittests/Target/AArch64/InstSizes.cpp | 32 + llvm/utils/TableGen/CodeGenInstruction.cpp | 1 + llvm/utils/TableGen/CodeGenInstruction.h | 1 + llvm/utils/TableGen/InstrDocsEmitter.cpp | 1 + llvm/utils/TableGen/InstrInfoEmitter.cpp | 1 + mlir/include/mlir/TableGen/ODSDialectHook.h | 42 ++ mlir/include/mlir/TableGen/OpClass.h | 167 +++++ mlir/include/mlir/TableGen/Operator.h | 9 +- mlir/lib/TableGen/CMakeLists.txt | 1 + mlir/lib/TableGen/OpClass.cpp | 235 +++++++ mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 382 ++--------- 124 files changed, 2336 insertions(+), 3662 deletions(-) create mode 100644 clang/test/CodeGenObjC/initialize-function-static.m delete mode 100644 clang/test/Misc/permissions.cpp create mode 100644 clang/test/SemaOpenCLCXX/address-space-cond.cl create mode 100644 lld/test/wasm/lto/Inputs/libcall-archive.ll create mode 100644 lld/test/wasm/lto/libcall-archive.ll delete mode 100755 lldb/scripts/Python/remote-build.py delete mode 100644 lldb/scripts/Python/use_lldb_suite.py rename lldb/scripts/{Python => }/android/host_art_bt.py (100%) delete mode 100755 lldb/scripts/buildbot.py create mode 100644 lldb/test/Shell/ScriptInterpreter/Lua/Inputs/testmodule.lua create mode 100644 lldb/test/Shell/ScriptInterpreter/Lua/command_script_import.test delete mode 100644 lldb/utils/vim-lldb/README delete mode 100644 lldb/utils/vim-lldb/doc/lldb.txt delete mode 100644 lldb/utils/vim-lldb/plugin/lldb.vim delete mode 100644 lldb/utils/vim-lldb/python-vim-lldb/import_lldb.py delete mode 100644 lldb/utils/vim-lldb/python-vim-lldb/lldb_controller.py delete mode 100644 lldb/utils/vim-lldb/python-vim-lldb/plugin.py delete mode 100644 lldb/utils/vim-lldb/python-vim-lldb/vim_panes.py delete mode 100644 lldb/utils/vim-lldb/python-vim-lldb/vim_signs.py delete mode 100644 lldb/utils/vim-lldb/python-vim-lldb/vim_ui.py create mode 100644 llvm/test/CodeGen/X86/align-branch-boundary-default.ll create mode 100644 llvm/test/CodeGen/X86/align-branch-boundary-default.s delete mode 100644 llvm/test/Other/umask.ll create mode 100644 mlir/include/mlir/TableGen/ODSDialectHook.h create mode 100644 mlir/include/mlir/TableGen/OpClass.h create mode 100644 mlir/lib/TableGen/OpClass.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits January 2020