Tcwg-commits December 2020

tcwg-commits@lists.linaro.org

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11568 discussions

[gcc] branch master updated (d2eb616a0f7 -> 0411210fddb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from d2eb616a0f7 match.pd: Add clz(X) == 0 -> (int)X < 0 etc. simpifications [...] new 0411210fddb genmodes: Update GET_MODE_MASK when changing NUNITS [PR98214] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/genmodes.c | 22 +++++++++++++++++++--- gcc/machmode.h | 3 ++- gcc/testsuite/gcc.target/aarch64/sve/pr98214.c | 21 +++++++++++++++++++++ 3 files changed, 42 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr98214.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_bmk_tk1 updated (b76365a -> ead082c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1 in repository toolchain/ci/interesting-commits. from b76365a Add last-good e94de06fd6077438539b2d7c18eb8fcb113bd9b6 from h [...] new ead082c Add regression 0365b9e4af29dc65c4d1634ca3444362d2ad0422 from [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_bmk_tk1 updated (7d11b52 -> b76365a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1 in repository toolchain/ci/interesting-commits. from 7d11b52 Add regression 3e8fb15a8cfd0e62dd474af9f536863392ed7572 from [...] new b76365a Add last-good e94de06fd6077438539b2d7c18eb8fcb113bd9b6 from h [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (a05f8ecd88 -> 65a3c59840)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/qemu. from a05f8ecd88 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 4f02d49a80 disas/libvixl: Fix fall-through annotation for GCC >= 7 adds 51c915674d target/unicore32/translate: Add missing fallthrough annotations adds 216776099b hw/rtc/twl92230: Silence warnings about missing fallthrough [...] adds 30982862b2 hw/timer/renesas_tmr: silence the compiler warnings adds bdddc1c425 target/i386: silence the compiler warnings in gen_shiftd_rm_T1 adds d85afd1eb5 hw/intc/arm_gicv3_kvm: silence the compiler warnings adds f190bf05f8 accel/tcg/user-exec: silence the compiler warnings adds fc0cd86781 target/sparc/translate: silence the compiler warnings adds 9cf5a9cf60 target/sparc/win_helper: silence the compiler warnings adds d84568b773 tcg/optimize: Add fallthrough annotations adds 4f07e71bad tests/fp: Do not emit implicit-fallthrough warnings in the s [...] adds 484bed0574 bsd-user: Silence warnings about missing fallthrough statement adds 61e21b05de hw/rtc/twl92230: Add missing 'break' adds 0a2ebce92a configure: Compile with -Wimplicit-fallthrough=2 adds 65a3c59840 Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] No new revisions were added by this update. Summary of changes: accel/tcg/user-exec.c | 3 ++- bsd-user/main.c | 1 + configure | 1 + disas/libvixl/vixl/a64/disasm-a64.cc | 4 ++++ disas/libvixl/vixl/globals.h | 6 +++-- hw/intc/arm_gicv3_kvm.c | 8 +++++++ hw/rtc/twl92230.c | 44 ++++++++++++------------------------ hw/timer/renesas_tmr.c | 1 + include/qemu/compiler.h | 11 +++++++++ target/i386/tcg/translate.c | 7 ++++-- target/sparc/translate.c | 2 +- target/sparc/win_helper.c | 2 +- target/unicore32/translate.c | 2 ++ tcg/optimize.c | 4 ++++ tests/fp/meson.build | 2 ++ 15 files changed, 61 insertions(+), 37 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (2016f2c8a76 -> ae69fa9b9f6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/llvm-project. from 2016f2c8a76 Fixes warning 'enumeration value not handled in switch'. adds 3567908d8ce [SLP] add fadd reduction test to show broken FMF propagation; NFC adds ed507bc4d5e [mlir] NFC - Fix SubViewOp printing adds 9b5a3d67b49 [mlir] Fix indexing of first offset operand in ops that imp [...] adds b0d6bebe90d [ELF] Drop '>>> defined in ' for locations of linker synthe [...] adds 9c0c123b0b4 [CMake][tsan] Remove --sysroot=. adds fe431103b63 [IROutliner] Adding option to enable outlining from linkonc [...] adds 70de7e0d9a9 [compiler-rt] FuzzedDataProvider: Add PickValueInArray for [...] adds 88cadb894ce [PowerPC][test] Add explicit dso_local to definitions in EL [...] adds 453b6aadcef [mlir] Add option to read reproducer options from file adds 277ebe46c66 Fix `LLVM_ENABLE_MODULES=On` build adds 51a292d9945 [gn build] Switch copy_bundle_data from pax to cpio adds 294a196b048 [update_llc_test_checks] Support .Lfunc$local for x86 -relo [...] adds 5ced712e985 [LoopVectorizer] add test to show wrong FMF propagation; NFC adds 8ca60db40bd [LoopUtils] reduce FMF and min/max complexity when forming [...] adds 7181df1e499 [update_llc_test_checks] Support Windows .seh_proc for x86 adds 253dc16f9eb [RISCV] Cleanup some V intrinsic names used in tests to mat [...] adds c45f765c0d4 [SimplifyCFG] Teach SimplifyBranchOnICmpChain() to preserve [...] adds a17025aa61b [SimplifyCFG] Teach switchToSelect() to preserve DomTree adds 7f221c9196d [SimplifyCFG] Teach SwitchToLookupTable() to preserve DomTree adds 51879a52564 [LoopIdiom] 'left-shift until bittest': don't forget to che [...] adds cc07d525114 [libc][NFC] Use ASSERT_FP_EQ to compare nan values in tests. adds f07b95e8bcd [PowerPC] Add addtional test that retroactively catches PR47259 adds 6b316febb43 [OpenMP] libomp: Handle implicit conversion warnings adds 8c1f5538445 Avoid using /dev/null in test adds 871de4a479c [X86][test] Add explicit dso_local to definitions in ELF st [...] adds e0f70ee01c6 [test] Fix linux-preemption.ll adds 7b529d0411a [AArch64][test] Add explicit dso_local to definitions in EL [...] adds a64b89e69e3 [ARM][test] Add explicit dso_local to definitions in ELF st [...] adds a90e5a8f0d0 [SystemZ][test] Add explicit dso_local to definitions in EL [...] adds 7e5508e6a8a [RISCV][test] Add explicit dso_local to definitions in ELF [...] adds a14c955af86 [ORC] Remove some stale debugging output. adds a964e0f0850 [test] Add explicit dso_local to definitions in ELF static [...] adds f7318395848 [LowerEmuTls] Copy dso_local from <var> to __emutls_v.<var> adds bf1160c1d6b [test] Add explicit dso_local to definitions in ELF static [...] adds 2047c10c22b [TargetMachine] Drop implied dso_local for definitions in E [...] adds 52aa4e21074 [ThinLTO][test] Add visibility related tests adds 331c28f60db [ARM] Declare Op within an if statement (NFC) adds 95ea86587c5 [PGO] Use isa instead of dyn_cast (NFC) adds a87c7003ac2 [Analysis] Remove unused code recursivelySimplifyInstruction (NFC) adds 8886be242de [lld/mac] Add -adhoc_codesign / -no_adhoc_codesign flags adds 6f1503d5985 [LoopDeletion] Allows deletion of possibly infinite side-ef [...] adds 6be0b9a8ddc [X86] Don't fold negative offset into 32-bit absolute addre [...] adds 9a0237011b7 [lsan] Ignore inderect leaks referenced by suppressed blocks adds ecc38eac766 Add intrinsic testcase for some missing widening reduction. adds fdd30faae5b [RISCV] Define vector widening type-convert intrinsic. adds 2aed9bc98ab [RISCV] Define vector narrowing type-convert intrinsic. adds 1d04cbeb435 [RISCV] Define vector single-width type-convert intrinsic. adds 6b3351792c6 [test] Add {{.*}} to make tests immune to dso_local/dso_pre [...] adds 809a1e0ffd7 [CodeGenModule] Set dso_local for Mach-O GlobalValue adds 08665b18056 Support tilezero intrinsic and c interface for AMX. adds 4a290a59051 [lld/mac] fix typo adds 42c57dcc35e [mlir][python] Tweaks to make python extensions packagable/ [...] adds a16c00a7033 [mlir][python] Fix python extension building on windows. adds c1f3033697c Update inselt tests at llvm/test/Analysis to have poison as [...] adds f2cc2669a0d [test] Fix -triple and delete UNSUPPORTED: system-windows adds fd739804e05 [test] Add {{.*}} to make ELF tests immune to dso_local/dso [...] adds a92d01534f1 [sanitizer] Define SANITIZER_GLIBC to refine SANITIZER_LINU [...] adds 52d7e183bf2 [sanitizer] Include fstab.h on glibc/FreeBSD/NetBSD/macOS adds f760d57052d LangRef: fix significand bits of fp128 adds be764065beb Revert "[ThinLTO][test] Add visibility related tests" adds 8bee4d4e8f5 Revert "[LoopDeletion] Allows deletion of possibly infinite [...] adds 9b649394630 [NFC] Added tests for PR48604 adds 742ea77ca4c [InstCombine] Transform (A + B) - (A | B) to A & B (PR48604) new c1937c2af2a [NFC] Added/adjusted tests for PR48604; second pattern new ae69fa9b9f6 [InstCombine] Transform (A + B) - (A & B) to A | B (PR48604) The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/include/clang/Basic/BuiltinsX86_64.def | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 14 +- clang/lib/Headers/amxintrin.h | 9 +- .../expr.prim/expr.prim.lambda/blocks-irgen.mm | 2 +- clang/test/CXX/expr/p10-0x.cpp | 6 +- clang/test/CXX/modules-ts/basic/basic.link/p3.cppm | 4 +- clang/test/CXX/modules-ts/codegen-basics.cppm | 4 +- clang/test/CXX/special/class.copy/p3.cpp | 2 +- .../test/CXX/temp/temp.spec/temp.expl.spec/p14.cpp | 6 +- clang/test/CodeGen/2006-05-19-SingleEltReturn.c | 4 +- clang/test/CodeGen/2008-03-05-syncPtr.c | 12 +- clang/test/CodeGen/2008-04-08-NoExceptions.c | 2 +- ...2008-07-22-bitfield-init-after-zero-len-array.c | 2 +- .../CodeGen/2008-07-30-implicit-initialization.c | 6 +- ...7-31-promotion-of-compound-pointer-arithmetic.c | 6 +- clang/test/CodeGen/2008-08-07-AlignPadding1.c | 2 +- clang/test/CodeGen/2009-10-20-GlobalDebug.c | 2 +- clang/test/CodeGen/64bit-swiftcall.c | 280 +++---- clang/test/CodeGen/Atomics.c | 4 +- clang/test/CodeGen/PR32874.c | 4 +- clang/test/CodeGen/RISCV/riscv-inline-asm.c | 10 +- clang/test/CodeGen/RISCV/riscv32-ilp32-abi.c | 8 +- .../test/CodeGen/RISCV/riscv32-ilp32-ilp32f-abi.c | 8 +- .../RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c | 76 +- clang/test/CodeGen/RISCV/riscv32-ilp32d-abi.c | 106 +-- clang/test/CodeGen/RISCV/riscv32-ilp32f-abi.c | 14 +- .../test/CodeGen/RISCV/riscv32-ilp32f-ilp32d-abi.c | 96 +-- clang/test/CodeGen/RISCV/riscv64-lp64-abi.c | 12 +- clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-abi.c | 4 +- .../CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c | 68 +- clang/test/CodeGen/RISCV/riscv64-lp64d-abi.c | 96 +-- clang/test/CodeGen/RISCV/riscv64-lp64f-lp64d-abi.c | 100 +-- clang/test/CodeGen/SystemZ/align-systemz.c | 4 +- clang/test/CodeGen/SystemZ/mbackchain.c | 2 +- clang/test/CodeGen/SystemZ/systemz-abi-vector.c | 180 ++--- clang/test/CodeGen/SystemZ/systemz-abi.c | 116 +-- clang/test/CodeGen/SystemZ/systemz-abi.cpp | 36 +- clang/test/CodeGen/SystemZ/systemz-inline-asm.c | 38 +- clang/test/CodeGen/SystemZ/zvector.c | 68 +- clang/test/CodeGen/X86/3dnow-builtins.c | 100 +-- clang/test/CodeGen/X86/amx_api.c | 7 + clang/test/CodeGen/X86/avx-union.c | 2 +- clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c | 8 +- clang/test/CodeGen/X86/prefetchw-builtins.c | 4 +- .../CodeGen/X86/x86-inline-asm-min-vector-width.c | 12 +- clang/test/CodeGen/X86/x86-long-double.cpp | 28 +- clang/test/CodeGen/X86/x86-soft-float.c | 4 +- clang/test/CodeGen/X86/x86-vec-i128.c | 22 +- clang/test/CodeGen/X86/x86_32-arguments-darwin.c | 102 +-- clang/test/CodeGen/X86/x86_32-arguments-iamcu.c | 32 +- clang/test/CodeGen/X86/x86_32-arguments-linux.c | 2 +- clang/test/CodeGen/X86/x86_32-arguments-nommx.c | 4 +- clang/test/CodeGen/X86/x86_32-arguments-realign.c | 2 +- clang/test/CodeGen/X86/x86_64-arguments-nacl.c | 26 +- clang/test/CodeGen/X86/x86_64-arguments.c | 92 +-- clang/test/CodeGen/X86/x86_64-floatvectors.c | 14 +- clang/test/CodeGen/X86/x86_64-longdouble.c | 54 +- clang/test/CodeGen/_Bool-conversion.c | 2 +- clang/test/CodeGen/aapcs-align.cpp | 14 +- clang/test/CodeGen/aapcs64-align.cpp | 10 +- clang/test/CodeGen/aarch64-args.cpp | 30 +- clang/test/CodeGen/aarch64-arguments-hfa-v3.c | 4 +- .../test/CodeGen/aarch64-branch-protection-attr.c | 22 +- clang/test/CodeGen/aarch64-byval-temp.c | 4 +- clang/test/CodeGen/aarch64-matmul.cpp | 2 +- clang/test/CodeGen/aarch64-neon-3v.c | 160 ++-- clang/test/CodeGen/aarch64-neon-across.c | 88 +-- clang/test/CodeGen/aarch64-neon-dot-product.c | 24 +- clang/test/CodeGen/aarch64-neon-extract.c | 48 +- clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c | 42 +- clang/test/CodeGen/aarch64-neon-fma.c | 44 +- clang/test/CodeGen/aarch64-neon-ldst-one.c | 540 +++++++------- clang/test/CodeGen/aarch64-neon-scalar-copy.c | 48 +- .../CodeGen/aarch64-neon-scalar-x-indexed-elem.c | 84 +-- clang/test/CodeGen/aarch64-neon-tbl.c | 144 ++-- clang/test/CodeGen/aarch64-neon-vcombine.c | 28 +- clang/test/CodeGen/aarch64-neon-vget-hilo.c | 56 +- clang/test/CodeGen/aarch64-neon-vget.c | 96 +-- clang/test/CodeGen/aarch64-poly128.c | 62 +- clang/test/CodeGen/aarch64-poly64.c | 96 +-- ...4-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c | 16 +- ...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 4 +- clang/test/CodeGen/aarch64-sve.c | 2 +- clang/test/CodeGen/aarch64-tme.cpp | 2 +- clang/test/CodeGen/aarch64-varargs.c | 50 +- clang/test/CodeGen/aarch64-vpcs.c | 8 +- clang/test/CodeGen/address-space-avr.c | 2 +- clang/test/CodeGen/address-space-field1.c | 2 +- clang/test/CodeGen/address-space.c | 16 +- clang/test/CodeGen/alias-avr.c | 2 +- clang/test/CodeGen/alias.c | 32 +- clang/test/CodeGen/align-param.c | 4 +- clang/test/CodeGen/aligned-sret.c | 2 +- clang/test/CodeGen/altivec.c | 12 +- clang/test/CodeGen/annotations-var.c | 6 +- clang/test/CodeGen/arc/arguments.c | 44 +- clang/test/CodeGen/arc/struct-align.c | 4 +- clang/test/CodeGen/arm-aapcs-vfp.c | 48 +- clang/test/CodeGen/arm-arguments.c | 130 ++-- clang/test/CodeGen/arm-bf16-params-returns.c | 12 +- clang/test/CodeGen/arm-cc.c | 10 +- clang/test/CodeGen/arm-cmse-attr.c | 8 +- clang/test/CodeGen/arm-float-helpers.c | 76 +- clang/test/CodeGen/arm-fp16-arguments.c | 24 +- clang/test/CodeGen/arm-homogenous.c | 2 +- clang/test/CodeGen/arm-interrupt-attr.c | 14 +- clang/test/CodeGen/arm-neon-directed-rounding.c | 30 +- clang/test/CodeGen/arm-neon-dot-product.c | 16 +- clang/test/CodeGen/arm-neon-fma.c | 8 +- clang/test/CodeGen/arm-neon-numeric-maxmin.c | 8 +- clang/test/CodeGen/arm-neon-vcvtX.c | 32 +- clang/test/CodeGen/arm-pcs.c | 2 +- clang/test/CodeGen/arm-swiftcall.c | 302 ++++---- clang/test/CodeGen/arm-target-attr.c | 8 +- clang/test/CodeGen/arm-varargs.c | 36 +- clang/test/CodeGen/arm-vector-arguments.c | 10 +- clang/test/CodeGen/arm-vfp16-arguments.c | 36 +- clang/test/CodeGen/arm-vfp16-arguments2.cpp | 30 +- clang/test/CodeGen/arm64-aapcs-arguments.c | 6 +- clang/test/CodeGen/arm64-arguments.c | 152 ++-- clang/test/CodeGen/arm64-mte.c | 26 +- clang/test/CodeGen/arm64_32-vaarg.c | 12 +- clang/test/CodeGen/arm64_32.c | 14 +- clang/test/CodeGen/arm64_vcopy.c | 20 +- clang/test/CodeGen/arm64_vdupq_n_f64.c | 12 +- clang/test/CodeGen/arm_function_epilog.cpp | 2 +- clang/test/CodeGen/armv7k-abi.c | 20 +- clang/test/CodeGen/asan-globals-alias.cpp | 8 +- clang/test/CodeGen/asm-goto.c | 12 +- clang/test/CodeGen/asm-label.c | 4 +- clang/test/CodeGen/asm-reg-var-local.c | 4 +- clang/test/CodeGen/assign.c | 4 +- clang/test/CodeGen/atomic-arm64.c | 10 +- clang/test/CodeGen/atomics-inlining.c | 10 +- .../test/CodeGen/attr-arm-sve-vector-bits-types.c | 284 ++++---- clang/test/CodeGen/attr-cpuspecific.c | 8 +- clang/test/CodeGen/attr-disable-tail-calls.c | 8 +- clang/test/CodeGen/attr-func-def.c | 4 +- clang/test/CodeGen/attr-leaf.c | 2 +- clang/test/CodeGen/attr-loader-uninitialized.c | 11 +- clang/test/CodeGen/attr-msp430.c | 2 +- clang/test/CodeGen/attr-naked.c | 6 +- clang/test/CodeGen/attr-nomerge.cpp | 2 +- clang/test/CodeGen/attr-target-mv-func-ptrs.c | 8 +- clang/test/CodeGen/attr-target-mv-va-args.c | 8 +- clang/test/CodeGen/attr-target-mv.c | 44 +- clang/test/CodeGen/attr-weak-import.c | 8 +- clang/test/CodeGen/attr-weakref.c | 4 +- clang/test/CodeGen/attr-weakref2.c | 4 +- clang/test/CodeGen/attr-x86-interrupt.c | 8 +- clang/test/CodeGen/attributes.c | 34 +- clang/test/CodeGen/available-externally-suppress.c | 4 +- clang/test/CodeGen/avr-builtins.c | 30 +- clang/test/CodeGen/avr/attributes/interrupt.c | 2 +- clang/test/CodeGen/avr/attributes/signal.c | 2 +- clang/test/CodeGen/bitfield-2.c | 16 +- clang/test/CodeGen/block-byref-aggr.c | 4 +- clang/test/CodeGen/blocks.c | 6 +- clang/test/CodeGen/bool-convert.c | 10 +- clang/test/CodeGen/bool-init.c | 2 +- clang/test/CodeGen/bool_test.c | 4 +- clang/test/CodeGen/builtin-align.c | 12 +- clang/test/CodeGen/builtin-complex.c | 8 +- clang/test/CodeGen/builtin-constant-p.c | 4 +- clang/test/CodeGen/builtin-expect.c | 12 +- clang/test/CodeGen/builtin-ms-noop.cpp | 8 +- clang/test/CodeGen/builtin-unpredictable.c | 2 +- clang/test/CodeGen/builtins-arm.c | 36 +- clang/test/CodeGen/builtins-memcpy-inline.c | 8 +- clang/test/CodeGen/builtins-ppc-altivec.c | 30 +- clang/test/CodeGen/builtins-ppc-crypto.c | 58 +- clang/test/CodeGen/builtins-ppc-htm.c | 2 +- clang/test/CodeGen/builtins-ppc-p7.c | 10 +- clang/test/CodeGen/builtins-ppc-p8vector.c | 2 +- clang/test/CodeGen/builtins-ppc-quadword.c | 2 +- clang/test/CodeGen/builtins-ppc-vsx.c | 4 +- clang/test/CodeGen/builtins-ppc.c | 2 +- clang/test/CodeGen/builtins.c | 34 +- clang/test/CodeGen/byval-memcpy-elim.c | 6 +- clang/test/CodeGen/c11atomics-ios.c | 10 +- clang/test/CodeGen/c11atomics.c | 14 +- ...-assumption-attribute-align_value-on-lvalue.cpp | 2 +- ...ssumption-attribute-align_value-on-paramvar.cpp | 4 +- ...-attribute-alloc_align-on-function-variable.cpp | 4 +- ...ssumption-attribute-alloc_align-on-function.cpp | 4 +- ...ibute-assume_aligned-on-function-two-params.cpp | 4 +- ...mption-attribute-assume_aligned-on-function.cpp | 4 +- ...uiltin_assume_aligned-three-params-variable.cpp | 2 +- ...umption-builtin_assume_aligned-three-params.cpp | 2 +- ...ssumption-builtin_assume_aligned-two-params.cpp | 2 +- .../CodeGen/catch-alignment-assumption-openmp.cpp | 2 +- ...-nullptr-and-nonzero-offset-in-offsetof-idiom.c | 4 +- ...tr-and-nonzero-offset-when-nullptr-is-defined.c | 2 +- .../CodeGen/catch-nullptr-and-nonzero-offset.c | 32 +- .../test/CodeGen/catch-pointer-overflow-volatile.c | 2 +- clang/test/CodeGen/catch-pointer-overflow.c | 16 +- .../test/CodeGen/cfi-icall-canonical-jump-tables.c | 4 +- clang/test/CodeGen/cfi-icall-cross-dso2.c | 2 +- clang/test/CodeGen/cfi-icall-generalize.c | 2 +- clang/test/CodeGen/cfstring-elf-cfbuild-x86_64.c | 4 +- clang/test/CodeGen/clang-sections-attribute.c | 10 +- clang/test/CodeGen/cleanup-destslot-simple.c | 2 +- clang/test/CodeGen/complex-indirect.c | 2 +- clang/test/CodeGen/complex-init-list.c | 6 +- clang/test/CodeGen/compound-literal.c | 12 +- clang/test/CodeGen/const-arithmetic.c | 4 +- clang/test/CodeGen/const-init.c | 44 +- clang/test/CodeGen/constructor-attribute.c | 8 +- clang/test/CodeGen/darwin-thread-specifier.c | 2 +- clang/test/CodeGen/decl-in-prototype.c | 4 +- clang/test/CodeGen/default-address-space.c | 18 +- clang/test/CodeGen/default-function-attr.c | 2 +- clang/test/CodeGen/designated-initializers.c | 16 +- clang/test/CodeGen/disable-tail-calls.c | 2 +- clang/test/CodeGen/dllexport-1.c | 6 +- clang/test/CodeGen/dso-local-executable.c | 6 +- clang/test/CodeGen/enable_if.c | 10 +- clang/test/CodeGen/enum-bool.cpp | 16 +- clang/test/CodeGen/exceptions-strictfp.c | 4 +- clang/test/CodeGen/exceptions.c | 4 +- clang/test/CodeGen/exprs.c | 16 +- clang/test/CodeGen/ext-int-cc.c | 404 +++++------ clang/test/CodeGen/ext-int-sanitizer.cpp | 20 +- clang/test/CodeGen/fixed-point-tbaa.c | 12 +- clang/test/CodeGen/flatten.c | 2 +- clang/test/CodeGen/flexible-array-init.c | 4 +- clang/test/CodeGen/fp-floatcontrol-pragma.cpp | 10 +- clang/test/CodeGen/fp-function-attrs.cpp | 6 +- clang/test/CodeGen/fp-strictfp-exp.cpp | 2 +- clang/test/CodeGen/fp-strictfp.cpp | 2 +- clang/test/CodeGen/fp16-ops-strictfp.c | 4 +- clang/test/CodeGen/fp16-ops.c | 4 +- clang/test/CodeGen/func-aligned.c | 2 +- clang/test/CodeGen/func-return-member.c | 6 +- clang/test/CodeGen/function-attributes.c | 30 +- clang/test/CodeGen/functions.c | 8 +- clang/test/CodeGen/global-init.c | 10 +- clang/test/CodeGen/iamcu-abi.c | 8 +- clang/test/CodeGen/incomplete-function-type-2.c | 2 +- clang/test/CodeGen/incomplete-function-type.c | 2 +- clang/test/CodeGen/init-memset.c | 16 +- clang/test/CodeGen/init.c | 14 +- clang/test/CodeGen/inline.c | 54 +- clang/test/CodeGen/inline2.c | 40 +- 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| 2 +- clang/test/CodeGen/ppc64-elf-abi.c | 4 +- clang/test/CodeGen/ppc64-extend.c | 8 +- clang/test/CodeGen/ppc64-inline-asm.c | 2 +- clang/test/CodeGen/ppc64-long-double.cpp | 12 +- clang/test/CodeGen/ppc64-soft-float.c | 44 +- clang/test/CodeGen/ppc64-struct-onefloat.c | 4 +- clang/test/CodeGen/ppc64-struct-onevect.c | 2 +- clang/test/CodeGen/ppc64-vector.c | 14 +- clang/test/CodeGen/ppc64le-aggregates.c | 90 +-- clang/test/CodeGen/ppc64le-f128Aggregates.c | 24 +- clang/test/CodeGen/ppc64le-varargs-f128.c | 8 +- clang/test/CodeGen/pr12251.c | 2 +- clang/test/CodeGen/pr25786.c | 8 +- clang/test/CodeGen/pr34021.c | 4 +- clang/test/CodeGen/pr9614.c | 2 +- clang/test/CodeGen/pragma-pack-1.c | 4 +- clang/test/CodeGen/pragma-visibility.c | 4 +- clang/test/CodeGen/pragma-weak.c | 56 +- clang/test/CodeGen/private-extern-redef.c | 2 +- clang/test/CodeGen/ps4-dllimport-dllexport.c | 4 +- clang/test/CodeGen/redefine_extname.c | 2 +- clang/test/CodeGen/regcall.c | 60 +- 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...rallel_master_taskloop_simd_private_codegen.cpp | 6 +- clang/test/OpenMP/parallel_private_codegen.cpp | 2 +- clang/test/OpenMP/parallel_reduction_codegen.cpp | 6 +- .../test/OpenMP/sections_firstprivate_codegen.cpp | 14 +- clang/test/OpenMP/sections_lastprivate_codegen.cpp | 8 +- clang/test/OpenMP/sections_private_codegen.cpp | 2 +- clang/test/OpenMP/sections_reduction_codegen.cpp | 6 +- clang/test/OpenMP/simd_metadata.c | 6 +- clang/test/OpenMP/single_codegen.cpp | 2 +- clang/test/OpenMP/single_firstprivate_codegen.cpp | 14 +- clang/test/OpenMP/single_private_codegen.cpp | 2 +- .../test/OpenMP/target_codegen_global_capture.cpp | 8 +- clang/test/OpenMP/target_codegen_registration.cpp | 112 +-- .../OpenMP/target_data_use_device_ptr_codegen.cpp | 2 +- clang/test/OpenMP/target_defaultmap_codegen_01.cpp | 52 +- clang/test/OpenMP/target_is_device_ptr_codegen.cpp | 8 +- clang/test/OpenMP/target_map_codegen_05.cpp | 4 +- .../target_parallel_codegen_registration.cpp | 112 +-- .../target_parallel_for_codegen_registration.cpp | 112 +-- ...rget_parallel_for_simd_codegen_registration.cpp | 112 +-- .../OpenMP/target_simd_codegen_registration.cpp | 112 +-- .../OpenMP/target_teams_codegen_registration.cpp | 112 +-- ...arget_teams_distribute_codegen_registration.cpp | 112 +-- ...arget_teams_distribute_firstprivate_codegen.cpp | 12 +- ...istribute_parallel_for_firstprivate_codegen.cpp | 14 +- ...ams_distribute_parallel_for_private_codegen.cpp | 4 +- ...bute_parallel_for_simd_codegen_registration.cpp | 112 +-- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 14 +- ...istribute_parallel_for_simd_private_codegen.cpp | 4 +- .../target_teams_distribute_private_codegen.cpp | 12 +- ..._teams_distribute_simd_codegen_registration.cpp | 112 +-- ..._teams_distribute_simd_firstprivate_codegen.cpp | 12 +- ...arget_teams_distribute_simd_private_codegen.cpp | 12 +- clang/test/OpenMP/task_codegen.cpp | 2 +- clang/test/OpenMP/task_firstprivate_codegen.cpp | 6 +- clang/test/OpenMP/task_if_codegen.cpp | 2 +- clang/test/OpenMP/task_private_codegen.cpp | 6 +- .../test/OpenMP/taskloop_firstprivate_codegen.cpp | 6 +- clang/test/OpenMP/taskloop_lastprivate_codegen.cpp | 6 +- clang/test/OpenMP/taskloop_private_codegen.cpp | 6 +- .../OpenMP/taskloop_simd_firstprivate_codegen.cpp | 6 +- .../OpenMP/taskloop_simd_lastprivate_codegen.cpp | 6 +- .../test/OpenMP/taskloop_simd_private_codegen.cpp | 6 +- .../teams_distribute_firstprivate_codegen.cpp | 12 +- ...istribute_parallel_for_firstprivate_codegen.cpp | 12 +- ...ams_distribute_parallel_for_private_codegen.cpp | 12 +- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 12 +- ...istribute_parallel_for_simd_private_codegen.cpp | 12 +- .../OpenMP/teams_distribute_private_codegen.cpp | 12 +- .../teams_distribute_simd_firstprivate_codegen.cpp | 12 +- .../teams_distribute_simd_private_codegen.cpp | 12 +- clang/test/OpenMP/teams_private_codegen.cpp | 2 +- clang/test/OpenMP/threadprivate_codegen.cpp | 26 +- clang/test/PCH/arc-blocks.mm | 2 +- clang/test/PCH/builtin-is-constant-evaluated.cpp | 10 +- clang/test/PCH/chain-external-defs.c | 32 +- clang/test/PCH/external-defs.c | 10 +- clang/test/Parser/pragma-visibility2.c | 2 +- clang/test/Profile/c-captured.c | 2 +- clang/test/Profile/c-ternary.c | 2 +- .../cxx03-aligned-allocation-unscoped-enum.cpp | 2 +- clang/test/SemaCXX/linkage.cpp | 4 +- clang/test/SemaObjC/debugger-support.m | 2 +- compiler-rt/cmake/Modules/AddCompilerRT.cmake | 1 + compiler-rt/include/fuzzer/FuzzedDataProvider.h | 9 + compiler-rt/lib/asan/asan_interceptors.h | 6 +- compiler-rt/lib/asan/tests/asan_test.cpp | 4 +- .../fuzzer/tests/FuzzedDataProviderUnittest.cpp | 14 + .../lib/interception/interception_linux.cpp | 6 +- compiler-rt/lib/interception/interception_linux.h | 6 +- compiler-rt/lib/lsan/lsan_common.cpp | 104 ++- compiler-rt/lib/lsan/lsan_common.h | 3 +- compiler-rt/lib/msan/tests/msan_test.cpp | 36 +- .../sanitizer_common_interceptors_ioctl.inc | 6 +- .../sanitizer_common/sanitizer_linux_libcdep.cpp | 11 +- .../lib/sanitizer_common/sanitizer_platform.h | 11 + .../sanitizer_platform_interceptors.h | 90 ++- .../sanitizer_platform_limits_posix.cpp | 75 +- .../sanitizer_platform_limits_posix.h | 2 + compiler-rt/lib/tsan/CMakeLists.txt | 15 - .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 8 +- .../test/lsan/TestCases/suppressions_file.cpp | 7 +- libc/test/src/math/RemQuoTest.h | 2 +- lld/ELF/Relocations.cpp | 10 +- lld/MachO/Options.td | 7 + lld/test/ELF/x86-64-gotpc-err.s | 21 +- llvm/docs/LangRef.rst | 2 +- llvm/include/llvm/Analysis/InstructionSimplify.h | 11 - llvm/include/llvm/CodeGen/CodeGenPassBuilder.h | 1 + llvm/include/llvm/CodeGen/MachinePassRegistry.def | 2 +- .../ExecutionEngine/Orc/Shared/FDRawByteChannel.h | 13 - llvm/include/llvm/IR/IntrinsicsRISCV.td | 41 ++ llvm/include/llvm/IR/IntrinsicsX86.td | 4 + llvm/include/llvm/Transforms/IPO/IROutliner.h | 4 + llvm/include/llvm/Transforms/Utils/LoopUtils.h | 15 +- llvm/include/llvm/module.modulemap | 1 + llvm/lib/Analysis/InstructionSimplify.cpp | 7 - llvm/lib/CodeGen/LowerEmuTLS.cpp | 1 + llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 3 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 228 ++++++ llvm/lib/Target/TargetMachine.cpp | 10 - llvm/lib/Target/X86/X86ExpandPseudo.cpp | 6 + llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 12 + llvm/lib/Target/X86/X86ISelLowering.cpp | 7 +- llvm/lib/Target/X86/X86ISelLowering.h | 2 +- llvm/lib/Target/X86/X86InstrAMX.td | 3 + llvm/lib/Target/X86/X86PreTileConfig.cpp | 2 + llvm/lib/Target/X86/X86RegisterInfo.cpp | 1 + llvm/lib/Transforms/IPO/IROutliner.cpp | 15 + llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 18 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 16 + .../Transforms/Instrumentation/InstrProfiling.cpp | 2 +- .../Transforms/Instrumentation/PGOMemOPSizeOpt.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 4 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 57 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 47 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 5 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 93 +-- .../X86/masked-intrinsic-cost-inseltpoison.ll | 28 +- .../CostModel/X86/uniformshift-inseltpoison.ll | 6 +- .../CostModel/X86/vector_gep-inseltpoison.ll | 2 +- .../CostModel/X86/vshift-ashr-cost-inseltpoison.ll | 204 +++--- .../CostModel/X86/vshift-lshr-cost-inseltpoison.ll | 204 +++--- .../CostModel/X86/vshift-shl-cost-inseltpoison.ll | 204 +++--- .../AArch64/GlobalISel/legalize-blockaddress.mir | 4 +- .../AArch64/GlobalISel/select-blockaddress.mir | 4 +- .../AArch64/GlobalISel/select-gv-cmodel-large.mir | 6 +- .../AArch64/GlobalISel/select-gv-cmodel-tiny.mir | 6 +- .../CodeGen/AArch64/GlobalISel/select-static.mir | 18 +- .../AArch64/GlobalISel/sext-inreg-ldrow-16b.mir | 4 +- llvm/test/CodeGen/AArch64/aarch64-be-bv.ll | 90 +-- llvm/test/CodeGen/AArch64/addsub_ext.ll | 34 +- llvm/test/CodeGen/AArch64/and-sink.ll | 12 +- llvm/test/CodeGen/AArch64/arm64-aapcs.ll | 24 +- .../CodeGen/AArch64/arm64-custom-call-saved-reg.ll | 6 +- llvm/test/CodeGen/AArch64/arm64-fp128.ll | 36 +- llvm/test/CodeGen/AArch64/arm64-ldxr-stxr.ll | 44 +- .../test/CodeGen/AArch64/arm64-misched-multimmo.ll | 6 +- .../CodeGen/AArch64/arm64-sitofp-combine-chains.ll | 4 +- llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll | 16 +- llvm/test/CodeGen/AArch64/atomic-ops-lse.ll | 806 ++++++++++----------- llvm/test/CodeGen/AArch64/atomic-ops.ll | 124 ++-- llvm/test/CodeGen/AArch64/bitfield.ll | 30 +- llvm/test/CodeGen/AArch64/bool-loads.ll | 10 +- llvm/test/CodeGen/AArch64/breg.ll | 4 +- llvm/test/CodeGen/AArch64/call-rv-marker.ll | 16 +- llvm/test/CodeGen/AArch64/cmpxchg-O0.ll | 2 +- llvm/test/CodeGen/AArch64/code-model-large-abs.ll | 20 +- llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll | 20 +- llvm/test/CodeGen/AArch64/fcopysign.ll | 6 +- llvm/test/CodeGen/AArch64/func-argpassing.ll | 42 +- llvm/test/CodeGen/AArch64/func-calls.ll | 32 +- llvm/test/CodeGen/AArch64/global-alignment.ll | 20 +- llvm/test/CodeGen/AArch64/global-merge-2.ll | 10 +- llvm/test/CodeGen/AArch64/global-merge-3.ll | 6 +- llvm/test/CodeGen/AArch64/i1-contents.ll | 10 +- llvm/test/CodeGen/AArch64/irg_sp_tagp.ll | 14 +- llvm/test/CodeGen/AArch64/ldst-unscaledimm.ll | 24 +- llvm/test/CodeGen/AArch64/ldst-unsignedimm.ll | 32 +- llvm/test/CodeGen/AArch64/literal_pools_float.ll | 6 +- llvm/test/CodeGen/AArch64/misched-fusion-addr.ll | 34 +- llvm/test/CodeGen/AArch64/misched-fusion-lit.ll | 8 +- llvm/test/CodeGen/AArch64/movw-shift-encoding.ll | 4 +- llvm/test/CodeGen/AArch64/pie.ll | 4 +- llvm/test/CodeGen/AArch64/sibling-call.ll | 18 +- .../AArch64/{tiny_model.ll => tiny-model-pic.ll} | 31 +- .../{tiny_model.ll => tiny-model-static.ll} | 188 +---- llvm/test/CodeGen/AArch64/zero-reg.ll | 8 +- llvm/test/CodeGen/ARM/aeabi-read-tp.ll | 4 +- .../CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll | 8 +- .../CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll | 8 +- .../CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll | 8 +- llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll | 87 +-- llvm/test/CodeGen/ARM/fast-isel-pie.ll | 4 +- llvm/test/CodeGen/ARM/global-merge-alignment.ll | 6 +- llvm/test/CodeGen/ARM/global-merge-external-2.ll | 12 +- llvm/test/CodeGen/ARM/global-merge-external.ll | 14 +- llvm/test/CodeGen/ARM/ldm-base-writeback.ll | 8 +- llvm/test/CodeGen/ARM/pie.ll | 4 +- llvm/test/CodeGen/ARM/tls1.ll | 6 +- llvm/test/CodeGen/Hexagon/tls_static.ll | 8 +- llvm/test/CodeGen/Mips/tls-static.ll | 82 +++ llvm/test/CodeGen/Mips/tls.ll | 58 +- llvm/test/CodeGen/PowerPC/alias.ll | 10 +- llvm/test/CodeGen/PowerPC/atomics-constant.ll | 2 +- llvm/test/CodeGen/PowerPC/dsolocal-pic.ll | 124 ++++ llvm/test/CodeGen/PowerPC/dsolocal-static.ll | 121 ++++ llvm/test/CodeGen/PowerPC/elf-common.ll | 17 +- llvm/test/CodeGen/PowerPC/f128-arith.ll | 48 +- llvm/test/CodeGen/PowerPC/f128-compare.ll | 24 +- llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll | 40 +- llvm/test/CodeGen/PowerPC/float-load-store-pair.ll | 36 +- llvm/test/CodeGen/PowerPC/fma-combine.ll | 22 +- llvm/test/CodeGen/PowerPC/func-addr.ll | 2 +- llvm/test/CodeGen/PowerPC/macro-fusion.ll | 2 +- llvm/test/CodeGen/PowerPC/mcm-11.ll | 4 +- llvm/test/CodeGen/PowerPC/mcm-3.ll | 4 +- llvm/test/CodeGen/PowerPC/mcm-obj-2.ll | 6 +- llvm/test/CodeGen/PowerPC/mcm-obj.ll | 40 +- llvm/test/CodeGen/PowerPC/mma-acc-memops.ll | 40 +- llvm/test/CodeGen/PowerPC/p10-setbc-ri.ll | 125 ++-- llvm/test/CodeGen/PowerPC/p10-setbc-rr.ll | 213 +++--- llvm/test/CodeGen/PowerPC/p10-setbcr-ri.ll | 44 +- llvm/test/CodeGen/PowerPC/p10-setbcr-rr.ll | 247 +++---- llvm/test/CodeGen/PowerPC/p10-setnbc-ri.ll | 203 +++--- llvm/test/CodeGen/PowerPC/p10-setnbc-rr.ll | 309 ++++---- llvm/test/CodeGen/PowerPC/p10-setnbcr-ri.ll | 80 +- llvm/test/CodeGen/PowerPC/p10-setnbcr-rr.ll | 336 ++++----- llvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll | 14 +- llvm/test/CodeGen/PowerPC/peephole-align.ll | 30 +- llvm/test/CodeGen/PowerPC/pie.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-calls.ll | 12 +- llvm/test/CodeGen/PowerPC/ppc64-nonfunc-calls.ll | 10 +- .../CodeGen/PowerPC/ppc64-sibcall-shrinkwrap.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc64-sibcall.ll | 50 +- llvm/test/CodeGen/PowerPC/pr32140.ll | 41 +- llvm/test/CodeGen/PowerPC/preemption.ll | 302 -------- llvm/test/CodeGen/PowerPC/sched-addi.ll | 4 +- .../PowerPC/tailcall-speculatable-callee.ll | 2 +- llvm/test/CodeGen/PowerPC/tailcall-string-rvo.ll | 4 +- llvm/test/CodeGen/PowerPC/tailcall1-64.ll | 4 +- llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesi32ltu.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesieqsc.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesieqsi.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesieqsll.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesieqss.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiequc.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiequi.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiequll.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiequs.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesigesc.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesigesi.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesigesll.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesigess.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesigeuc.ll | 110 +-- llvm/test/CodeGen/PowerPC/testComparesigeui.ll | 110 +-- llvm/test/CodeGen/PowerPC/testComparesigeull.ll | 110 +-- llvm/test/CodeGen/PowerPC/testComparesigeus.ll | 110 +-- llvm/test/CodeGen/PowerPC/testComparesilesc.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesilesi.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesilesll.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesiless.ll | 20 +- llvm/test/CodeGen/PowerPC/testComparesileuc.ll | 119 +-- llvm/test/CodeGen/PowerPC/testComparesileui.ll | 119 +-- llvm/test/CodeGen/PowerPC/testComparesileull.ll | 116 +-- llvm/test/CodeGen/PowerPC/testComparesileus.ll | 119 +-- llvm/test/CodeGen/PowerPC/testComparesiltsc.ll | 80 +- llvm/test/CodeGen/PowerPC/testComparesiltsi.ll | 80 +- llvm/test/CodeGen/PowerPC/testComparesiltsll.ll | 101 +-- llvm/test/CodeGen/PowerPC/testComparesiltss.ll | 80 +- llvm/test/CodeGen/PowerPC/testComparesiltuc.ll | 56 +- llvm/test/CodeGen/PowerPC/testComparesiltui.ll | 56 +- llvm/test/CodeGen/PowerPC/testComparesiltus.ll | 56 +- llvm/test/CodeGen/PowerPC/testComparesinesc.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesinesi.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesinesll.ll | 42 +- llvm/test/CodeGen/PowerPC/testComparesiness.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesineuc.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesineui.ll | 38 +- llvm/test/CodeGen/PowerPC/testComparesineull.ll | 42 +- llvm/test/CodeGen/PowerPC/testComparesineus.ll | 38 +- llvm/test/CodeGen/PowerPC/testCompareslleqsc.ll | 30 +- llvm/test/CodeGen/PowerPC/testCompareslleqsi.ll | 30 +- llvm/test/CodeGen/PowerPC/testCompareslleqsll.ll | 30 +- llvm/test/CodeGen/PowerPC/testCompareslleqss.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllequc.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllequi.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllequll.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllequs.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllgesc.ll | 16 +- llvm/test/CodeGen/PowerPC/testComparesllgesi.ll | 16 +- llvm/test/CodeGen/PowerPC/testComparesllgesll.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllgess.ll | 16 +- llvm/test/CodeGen/PowerPC/testComparesllgeuc.ll | 102 +-- llvm/test/CodeGen/PowerPC/testComparesllgeui.ll | 102 +-- llvm/test/CodeGen/PowerPC/testComparesllgeull.ll | 102 +-- llvm/test/CodeGen/PowerPC/testComparesllgeus.ll | 102 +-- llvm/test/CodeGen/PowerPC/testCompareslllesc.ll | 16 +- llvm/test/CodeGen/PowerPC/testCompareslllesi.ll | 16 +- llvm/test/CodeGen/PowerPC/testCompareslllesll.ll | 30 +- llvm/test/CodeGen/PowerPC/testComparesllless.ll | 16 +- llvm/test/CodeGen/PowerPC/testComparesllleuc.ll | 111 +-- llvm/test/CodeGen/PowerPC/testComparesllleui.ll | 111 +-- llvm/test/CodeGen/PowerPC/testComparesllleull.ll | 108 +-- llvm/test/CodeGen/PowerPC/testComparesllleus.ll | 111 +-- llvm/test/CodeGen/PowerPC/testComparesllltsll.ll | 95 +-- llvm/test/CodeGen/PowerPC/testComparesllltuc.ll | 52 +- llvm/test/CodeGen/PowerPC/testComparesllltus.ll | 52 +- llvm/test/CodeGen/PowerPC/testComparesllnesll.ll | 34 +- llvm/test/CodeGen/PowerPC/testComparesllneull.ll | 34 +- llvm/test/CodeGen/PowerPC/tls.ll | 6 +- llvm/test/CodeGen/RISCV/double-mem.ll | 16 +- llvm/test/CodeGen/RISCV/float-mem.ll | 14 +- llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll | 44 +- llvm/test/CodeGen/RISCV/half-mem.ll | 6 +- llvm/test/CodeGen/RISCV/mem.ll | 26 +- llvm/test/CodeGen/RISCV/mem64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 112 +-- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 210 +++--- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 210 +++--- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 541 ++++++++++++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 541 ++++++++++++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 482 +++++++++--- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 288 ++++---- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 442 +++++++++-- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 216 +++--- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 325 +++++++++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 181 +++++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 482 +++++++++--- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 288 ++++---- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 426 ++++++++++- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 386 +++++++++- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll | 426 ++++++++++- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll | 386 +++++++++- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 482 +++++++++--- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 288 ++++---- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 442 +++++++++-- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 216 +++--- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 180 ++--- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 220 +++--- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 216 +++--- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 220 +++--- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 144 ++-- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 176 ++--- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 144 ++-- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 176 ++--- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 252 +++---- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 308 ++++---- llvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll | 112 +-- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 84 +-- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 84 +-- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 84 +-- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 84 +-- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 84 +-- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 84 +-- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 84 +-- llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll | 84 +-- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll | 547 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll | 757 +++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll | 547 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll | 757 +++++++++++++++++++ llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll | 8 +- llvm/test/CodeGen/SystemZ/and-08.ll | 62 +- llvm/test/CodeGen/SystemZ/branch-06.ll | 24 +- llvm/test/CodeGen/SystemZ/int-cmp-36.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-37.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-38.ll | 18 +- llvm/test/CodeGen/SystemZ/int-cmp-39.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-40.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-41.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-42.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-43.ll | 16 +- llvm/test/CodeGen/SystemZ/int-move-08.ll | 40 +- llvm/test/CodeGen/SystemZ/int-move-09.ll | 52 +- llvm/test/CodeGen/SystemZ/int-move-10.ll | 46 +- llvm/test/CodeGen/SystemZ/la-01.ll | 26 +- llvm/test/CodeGen/SystemZ/memcpy-02.ll | 76 +- llvm/test/CodeGen/SystemZ/pie.ll | 4 +- llvm/test/CodeGen/SystemZ/prefetch-01.ll | 18 +- llvm/test/CodeGen/SystemZ/spill-01.ll | 64 +- llvm/test/CodeGen/SystemZ/tls-01.ll | 4 +- llvm/test/CodeGen/Thumb2/tls1.ll | 6 +- llvm/test/CodeGen/WebAssembly/offset-folding.ll | 14 +- llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll | 4 +- .../CodeGen/X86/2010-08-04-MaskedSignedCompare.ll | 6 +- llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll | 8 +- llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll | 38 + llvm/test/CodeGen/X86/GlobalISel/GV.ll | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-GV-32.mir | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-GV-64.mir | 6 +- llvm/test/CodeGen/X86/abi-isel.ll | 658 ++++++++--------- llvm/test/CodeGen/X86/atomic-fp.ll | 22 +- llvm/test/CodeGen/X86/avx-vzeroupper.ll | 4 +- llvm/test/CodeGen/X86/avx2-gather.ll | 2 +- .../CodeGen/X86/avx512-gather-scatter-intrin.ll | 68 +- llvm/test/CodeGen/X86/avx512-regcall-Mask.ll | 38 +- llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll | 58 +- llvm/test/CodeGen/X86/backpropmask.ll | 12 +- llvm/test/CodeGen/X86/break-false-dep.ll | 34 +- llvm/test/CodeGen/X86/bswap.ll | 12 +- llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll | 6 +- llvm/test/CodeGen/X86/cast-vsel.ll | 14 +- llvm/test/CodeGen/X86/cmov-double.ll | 8 +- llvm/test/CodeGen/X86/cmovcmov.ll | 12 +- llvm/test/CodeGen/X86/cmp.ll | 46 +- llvm/test/CodeGen/X86/copy-eflags.ll | 18 +- llvm/test/CodeGen/X86/critical-edge-split-2.ll | 4 +- llvm/test/CodeGen/X86/dbg-changes-codegen.ll | 10 +- llvm/test/CodeGen/X86/emutls-pie.ll | 12 +- llvm/test/CodeGen/X86/emutls.ll | 36 +- llvm/test/CodeGen/X86/fmf-flags.ll | 14 +- llvm/test/CodeGen/X86/fold-add.ll | 8 +- llvm/test/CodeGen/X86/fp128-cast-strict.ll | 28 +- llvm/test/CodeGen/X86/fp128-cast.ll | 72 +- llvm/test/CodeGen/X86/fp128-g.ll | 2 +- llvm/test/CodeGen/X86/fp128-i128.ll | 10 +- llvm/test/CodeGen/X86/fp128-libcalls.ll | 42 +- llvm/test/CodeGen/X86/fp128-load.ll | 2 +- llvm/test/CodeGen/X86/fp128-store.ll | 4 +- llvm/test/CodeGen/X86/ga-offset.ll | 6 +- llvm/test/CodeGen/X86/global-access-pie.ll | 22 +- llvm/test/CodeGen/X86/hoist-spill-lpad.ll | 4 +- llvm/test/CodeGen/X86/immediate_merging.ll | 28 +- llvm/test/CodeGen/X86/inline-asm-h.ll | 4 +- llvm/test/CodeGen/X86/lea-recursion.ll | 6 +- llvm/test/CodeGen/X86/linux-preemption.ll | 24 +- llvm/test/CodeGen/X86/load-partial.ll | 6 +- llvm/test/CodeGen/X86/lsr-sort.ll | 4 +- llvm/test/CodeGen/X86/mempcpy.ll | 4 +- llvm/test/CodeGen/X86/min-legal-vector-width.ll | 74 +- llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll | 4 +- llvm/test/CodeGen/X86/musttail-tailcc.ll | 8 +- llvm/test/CodeGen/X86/narrow_op-1.ll | 6 +- llvm/test/CodeGen/X86/peephole-fold-movsd.ll | 4 +- llvm/test/CodeGen/X86/pie.ll | 8 +- llvm/test/CodeGen/X86/pr22774.ll | 6 +- llvm/test/CodeGen/X86/pr31956.ll | 4 +- llvm/test/CodeGen/X86/pr32282.ll | 10 +- llvm/test/CodeGen/X86/pr33290.ll | 8 +- llvm/test/CodeGen/X86/pr34629.ll | 6 +- llvm/test/CodeGen/X86/pr34634.ll | 10 +- llvm/test/CodeGen/X86/pr35761.ll | 8 +- llvm/test/CodeGen/X86/pr35763.ll | 6 +- llvm/test/CodeGen/X86/pr35765.ll | 10 +- llvm/test/CodeGen/X86/pr36312.ll | 8 +- llvm/test/CodeGen/X86/pr37826.ll | 10 +- llvm/test/CodeGen/X86/pr38217.ll | 4 +- llvm/test/CodeGen/X86/pr38803.ll | 8 +- llvm/test/CodeGen/X86/pr38865.ll | 4 +- llvm/test/CodeGen/X86/pr43866.ll | 4 +- llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll | 20 +- llvm/test/CodeGen/X86/sad.ll | 28 +- llvm/test/CodeGen/X86/shift-combine.ll | 24 +- llvm/test/CodeGen/X86/shrink-compare-pgso.ll | 28 +- llvm/test/CodeGen/X86/shrink-compare.ll | 28 +- llvm/test/CodeGen/X86/sibcall.ll | 36 +- ...peculative-execution-side-effect-suppression.ll | 8 +- .../X86/speculative-load-hardening-indirect.ll | 20 +- llvm/test/CodeGen/X86/splat-for-size.ll | 2 +- llvm/test/CodeGen/X86/stores-merging.ll | 56 +- llvm/test/CodeGen/X86/subvector-broadcast.ll | 20 +- llvm/test/CodeGen/X86/swift-return.ll | 10 +- llvm/test/CodeGen/X86/tail-opts.ll | 30 +- llvm/test/CodeGen/X86/tailcall-disable.ll | 6 +- llvm/test/CodeGen/X86/tailcall-tailcc.ll | 12 +- llvm/test/CodeGen/X86/tailcall.ll | 12 +- llvm/test/CodeGen/X86/test-shrink-bug.ll | 6 +- llvm/test/CodeGen/X86/tls-pie.ll | 10 +- llvm/test/CodeGen/X86/tls.ll | 42 +- llvm/test/CodeGen/X86/trunc-and.ll | 4 +- llvm/test/CodeGen/X86/undef-label.ll | 4 +- llvm/test/CodeGen/X86/vec-loadsingles-alignment.ll | 6 +- llvm/test/CodeGen/X86/widen_load-1.ll | 4 +- llvm/test/CodeGen/X86/x86-64-intrcc.ll | 6 +- llvm/test/CodeGen/X86/xor-select-i1-combine.ll | 8 +- llvm/test/CodeGen/X86/xray-tail-call-sled.ll | 4 +- llvm/test/CodeGen/XCore/codemodel.ll | 16 +- llvm/test/DebugInfo/X86/debug-loc-frame.ll | 10 +- llvm/test/DebugInfo/X86/live-debug-values.ll | 4 +- .../DebugInfo/X86/machinecse-wrongdebug-hoist.ll | 6 +- llvm/test/MC/AArch64/elf-globaladdress.ll | 14 +- llvm/test/MC/PowerPC/ppc64-encoding-ext.s | 10 + llvm/test/MC/X86/intel-syntax-var-offset.ll | 14 +- llvm/test/Transforms/IROutliner/outlining-odr.ll | 70 ++ llvm/test/Transforms/InstCombine/sub.ll | 88 +++ .../LoopIdiom/X86/left-shift-until-bittest.ll | 81 +++ .../LoopVectorize/X86/reduction-fastmath.ll | 89 +++ .../Transforms/SLPVectorizer/X86/horizontal.ll | 35 + .../SimplifyCFG/X86/CoveredLookupTable.ll | 2 +- .../SimplifyCFG/X86/disable-lookup-table.ll | 2 +- .../SimplifyCFG/X86/switch-covered-bug.ll | 2 +- .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 2 +- llvm/test/Transforms/SimplifyCFG/rangereduce.ll | 2 +- .../SimplifyCFG/switch-to-select-two-case.ll | 2 +- llvm/test/Transforms/SimplifyCFG/switch_msan.ll | 2 +- .../Inputs/aarch64_generated_funcs.ll | 6 +- .../aarch64_generated_funcs.ll.generated.expected | 6 +- ...aarch64_generated_funcs.ll.nogenerated.expected | 6 +- .../Inputs/amdgpu_generated_funcs.ll | 6 +- .../amdgpu_generated_funcs.ll.generated.expected | 18 +- .../amdgpu_generated_funcs.ll.nogenerated.expected | 18 +- .../Inputs/arm_generated_funcs.ll | 4 +- .../arm_generated_funcs.ll.generated.expected | 4 +- .../arm_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/hexagon_generated_funcs.ll | 4 +- .../hexagon_generated_funcs.ll.generated.expected | 4 +- ...hexagon_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/lanai_generated_funcs.ll | 4 +- .../lanai_generated_funcs.ll.generated.expected | 12 +- .../lanai_generated_funcs.ll.nogenerated.expected | 12 +- .../Inputs/mips_generated_funcs.ll | 4 +- .../mips_generated_funcs.ll.generated.expected | 4 +- .../mips_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/msp430_generated_funcs.ll | 4 +- .../msp430_generated_funcs.ll.generated.expected | 4 +- .../msp430_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/on_the_fly_arg_change.ll | 6 +- .../Inputs/on_the_fly_arg_change.ll.expected | 6 +- .../Inputs/ppc_generated_funcs.ll | 4 +- .../ppc_generated_funcs.ll.generated.expected | 4 +- .../ppc_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/sparc_generated_funcs.ll | 4 +- .../sparc_generated_funcs.ll.generated.expected | 4 +- .../sparc_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/systemz_generated_funcs.ll | 6 +- .../systemz_generated_funcs.ll.generated.expected | 6 +- ...systemz_generated_funcs.ll.nogenerated.expected | 6 +- .../Inputs/wasm_generated_funcs.ll | 4 +- .../wasm_generated_funcs.ll.generated.expected | 4 +- .../wasm_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/x86_function_name.ll | 21 +- .../Inputs/x86_function_name.ll.expected | 61 +- .../Inputs/x86_generated_funcs.ll | 6 +- .../x86_generated_funcs.ll.generated.expected | 6 +- .../x86_generated_funcs.ll.nogenerated.expected | 6 +- llvm/utils/UpdateTestChecks/asm.py | 4 +- llvm/utils/gn/build/toolchain/BUILD.gn | 6 +- mlir/cmake/modules/AddMLIRPythonExtension.cmake | 4 + mlir/docs/PassManagement.md | 4 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 33 +- mlir/include/mlir/Interfaces/ViewLikeInterface.td | 31 +- mlir/lib/Bindings/Python/CMakeLists.txt | 18 +- mlir/lib/Bindings/Python/mlir/__init__.py | 27 +- .../Bindings/Python/mlir/transforms/__init__.py | 4 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 2 +- mlir/lib/Support/MlirOptMain.cpp | 23 + mlir/test/Pass/run-reproducer.mlir | 22 + openmp/runtime/cmake/LibompHandleFlags.cmake | 1 + openmp/runtime/cmake/config-ix.cmake | 1 + openmp/runtime/src/kmp.h | 114 ++- openmp/runtime/src/kmp_affinity.cpp | 17 +- openmp/runtime/src/kmp_affinity.h | 54 +- openmp/runtime/src/kmp_alloc.cpp | 5 +- openmp/runtime/src/kmp_atomic.cpp | 6 +- openmp/runtime/src/kmp_barrier.cpp | 4 +- openmp/runtime/src/kmp_csupport.cpp | 28 +- openmp/runtime/src/kmp_dispatch.cpp | 33 +- openmp/runtime/src/kmp_dispatch_hier.h | 14 +- openmp/runtime/src/kmp_environment.cpp | 7 +- openmp/runtime/src/kmp_ftn_entry.h | 8 +- openmp/runtime/src/kmp_gsupport.cpp | 12 +- openmp/runtime/src/kmp_i18n.h | 2 +- openmp/runtime/src/kmp_itt.inl | 5 +- openmp/runtime/src/kmp_lock.cpp | 4 +- openmp/runtime/src/kmp_runtime.cpp | 23 +- openmp/runtime/src/kmp_settings.cpp | 14 +- openmp/runtime/src/kmp_stats.cpp | 35 +- openmp/runtime/src/kmp_stats.h | 2 +- openmp/runtime/src/kmp_str.cpp | 9 +- openmp/runtime/src/kmp_str.h | 4 +- openmp/runtime/src/kmp_stub.cpp | 6 +- openmp/runtime/src/kmp_stub.h | 4 +- openmp/runtime/src/kmp_taskdeps.cpp | 11 +- openmp/runtime/src/kmp_tasking.cpp | 13 +- openmp/runtime/src/kmp_threadprivate.cpp | 5 +- openmp/runtime/src/kmp_utility.cpp | 2 +- openmp/runtime/src/kmp_wait_release.h | 6 +- openmp/runtime/src/ompt-specific.cpp | 2 +- openmp/runtime/src/z_Linux_util.cpp | 38 +- 1515 files changed, 41084 insertions(+), 18440 deletions(-) copy llvm/test/CodeGen/AArch64/{tiny_model.ll => tiny-model-pic.ll} (91%) rename llvm/test/CodeGen/AArch64/{tiny_model.ll => tiny-model-static.ll} (54%) create mode 100644 llvm/test/CodeGen/Mips/tls-static.ll create mode 100644 llvm/test/CodeGen/PowerPC/dsolocal-pic.ll create mode 100644 llvm/test/CodeGen/PowerPC/dsolocal-static.ll delete mode 100644 llvm/test/CodeGen/PowerPC/preemption.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-odr.ll create mode 100644 mlir/test/Pass/run-reproducer.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (af956a8c1 -> 63073888f)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/base-artifacts. discards af956a8c1 0: update: llvm-linux-qemu: boot new 63073888f 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (af956a8c1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 22 +- 02-prepare_abe/console.log | 236 +- 03-build_llvm/console.log | 13790 ++++++++++++------------ 04-build_linux/console.log | 806 +- 05-build_abe-qemu/console.log | 6801 ++++++------ 06-boot_linux/console.log | 400 +- 07-check_regression/console.log | 24 +- 08-update_baseline/console.log | 10 +- console.log | 22089 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 10 files changed, 22088 insertions(+), 22102 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig updated (8abe76251ff -> 17cc02478ea)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig in repository toolchain/ci/gcc. from 8abe76251ff Daily bump. adds 17cc02478ea Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig updated (17c2dc6691 -> 20a201933c)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig in repository toolchain/ci/binutils-gdb. from 17c2dc6691 Automatic date update in version.in adds 20a201933c Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig updated (80cd597e2 -> fb75a2992)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards 80cd597e2 0: update: binutils-gcc-linux-qemu: all new fb75a2992 0: update: binutils-gcc-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (80cd597e2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-prepare_abe/console.log | 446 +- 03-build_abe-binutils/console.log | 11505 +++++----- 04-build_abe-stage1/console.log | 18392 ++++++++-------- 05-build_linux/console.log | 832 +- 06-build_abe-qemu/console.log | 2278 +- 07-boot_linux/console.log | 6 +- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 18 +- 09-update_baseline/results.regressions | 2 +- console.log | 33725 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 13 files changed, 33722 insertions(+), 33724 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-defconfig updated (a05f8ecd88 -> 65a3c59840)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-defconfig in repository toolchain/ci/qemu. from a05f8ecd88 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 4f02d49a80 disas/libvixl: Fix fall-through annotation for GCC >= 7 adds 51c915674d target/unicore32/translate: Add missing fallthrough annotations adds 216776099b hw/rtc/twl92230: Silence warnings about missing fallthrough [...] adds 30982862b2 hw/timer/renesas_tmr: silence the compiler warnings adds bdddc1c425 target/i386: silence the compiler warnings in gen_shiftd_rm_T1 adds d85afd1eb5 hw/intc/arm_gicv3_kvm: silence the compiler warnings adds f190bf05f8 accel/tcg/user-exec: silence the compiler warnings adds fc0cd86781 target/sparc/translate: silence the compiler warnings adds 9cf5a9cf60 target/sparc/win_helper: silence the compiler warnings adds d84568b773 tcg/optimize: Add fallthrough annotations adds 4f07e71bad tests/fp: Do not emit implicit-fallthrough warnings in the s [...] adds 484bed0574 bsd-user: Silence warnings about missing fallthrough statement adds 61e21b05de hw/rtc/twl92230: Add missing 'break' adds 0a2ebce92a configure: Compile with -Wimplicit-fallthrough=2 adds 65a3c59840 Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] No new revisions were added by this update. Summary of changes: accel/tcg/user-exec.c | 3 ++- bsd-user/main.c | 1 + configure | 1 + disas/libvixl/vixl/a64/disasm-a64.cc | 4 ++++ disas/libvixl/vixl/globals.h | 6 +++-- hw/intc/arm_gicv3_kvm.c | 8 +++++++ hw/rtc/twl92230.c | 44 ++++++++++++------------------------ hw/timer/renesas_tmr.c | 1 + include/qemu/compiler.h | 11 +++++++++ target/i386/tcg/translate.c | 7 ++++-- target/sparc/translate.c | 2 +- target/sparc/win_helper.c | 2 +- target/unicore32/translate.c | 2 ++ tcg/optimize.c | 4 ++++ tests/fp/meson.build | 2 ++ 15 files changed, 61 insertions(+), 37 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years

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