Tcwg-commits December 2020

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (7d4c3268e -> 5436915a1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 7d4c3268e 2: update: binutils-gcc-linux-qemu: 20990 new 5436915a1 2: update: binutils-gcc-linux-qemu: 20990 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7d4c3268e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 106 +- 02-prepare_abe/console.log | 128 +- 03-build_abe-binutils/console.log | 11026 ++++----- 04-build_abe-stage1/console.log | 16078 ++++++------- 05-build_linux/console.log | 9290 ++++---- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 4 +- 09-update_baseline/console.log | 48 +- 09-update_baseline/results.regressions | 4 +- console.log | 36724 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- 11 files changed, 36749 insertions(+), 36685 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (a05f8ecd88 -> 3fb340ccf5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/qemu. from a05f8ecd88 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 4f02d49a80 disas/libvixl: Fix fall-through annotation for GCC >= 7 adds 51c915674d target/unicore32/translate: Add missing fallthrough annotations adds 216776099b hw/rtc/twl92230: Silence warnings about missing fallthrough [...] adds 30982862b2 hw/timer/renesas_tmr: silence the compiler warnings adds bdddc1c425 target/i386: silence the compiler warnings in gen_shiftd_rm_T1 adds d85afd1eb5 hw/intc/arm_gicv3_kvm: silence the compiler warnings adds f190bf05f8 accel/tcg/user-exec: silence the compiler warnings adds fc0cd86781 target/sparc/translate: silence the compiler warnings adds 9cf5a9cf60 target/sparc/win_helper: silence the compiler warnings adds d84568b773 tcg/optimize: Add fallthrough annotations adds 4f07e71bad tests/fp: Do not emit implicit-fallthrough warnings in the s [...] adds 484bed0574 bsd-user: Silence warnings about missing fallthrough statement adds 61e21b05de hw/rtc/twl92230: Add missing 'break' adds 0a2ebce92a configure: Compile with -Wimplicit-fallthrough=2 adds 65a3c59840 Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] adds 56d190848b linux-user/mmap.c: check range of mremap result in target ad [...] adds 6dd97bfc1f linux-user/elfload: Move GET_FEATURE macro out of get_elf_hw [...] adds 7d9a3d96f5 linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN() adds 388765a05b linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro adds ce54384405 linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro adds 9ea313ba5d linux-user/elfload: Update HWCAP bits from linux 5.7 adds 53673d0ff4 linux-user: Add support for MIPS Loongson 2F/3A adds c8a03a8f95 docs/user: Display linux-user binaries nicely adds 8494645797 linux-user: Implement copy_file_range adds 6addf06a3c linux-user: Add most IFTUN ioctls adds 246ff44295 linux-user/sparc: Correct sparc64_get/set_context() FPU handling adds 309abce236 linux-user/sparc: Remove unneeded checks of 'err' from sparc [...] adds 0ad20314f1 linux-user/sparc: Don't restore %g7 in sparc64_set_context() adds 7a5805a08f linux-user/sparc: Handle tstate in sparc64_get/set_context() adds 091774bfde Merge remote-tracking branch 'remotes/vivier2/tags/linux-use [...] adds d22b854dc5 monitor:open brace '{' following struct go on the same line adds 89854b9558 monitor:braces {} are necessary for all arms of this statement adds 33b1fa9485 monitor:Don't use '#' flag of printf format ('%#') in format [...] adds ff688cd2c7 hmp-commands.hx: List abbreviation after command for cont, q [...] adds e49393a349 virtiofsd: Use --thread-pool-size=0 to mean no thread pool adds bebc3c24aa virtiofsd: make the debug log timestamp on stderr more human [...] adds ad3bfe1bd6 virtiofsd: Set up posix_lock hash table for root inode adds e7e8aa8aea virtiofsd: Disable posix_lock hash table if remote locks are [...] adds 31a4990f8d virtiofsd: Check file type in lo_flush() adds d6211148f6 virtiofsd: update FUSE_FORGET comment on "lo_inode.nlookup" adds 03350a1e8d virtiofsd: Remove useless code about send_notify_iov adds 243e7480d5 docs/devel/migration: Improve debugging section a bit adds 80ef0586d3 savevm: Remove dead code in save_snapshot() adds 2a909dc430 savevm: Delete snapshots just created in case of error adds 36d0fe6516 migration: Don't allow migration if vm is in POSTMIGRATE adds 3fb340ccf5 Merge remote-tracking branch 'remotes/dgilbert/tags/pull-mig [...] No new revisions were added by this update. Summary of changes: accel/tcg/user-exec.c | 3 +- bsd-user/main.c | 1 + configure | 1 + disas/libvixl/vixl/a64/disasm-a64.cc | 4 ++ disas/libvixl/vixl/globals.h | 6 ++- docs/devel/migration.rst | 11 ++-- docs/user/main.rst | 99 ++++++++++++++++++++---------------- hmp-commands.hx | 12 ++--- hw/intc/arm_gicv3_kvm.c | 8 +++ hw/rtc/twl92230.c | 44 +++++----------- hw/timer/renesas_tmr.c | 1 + include/qemu/compiler.h | 11 ++++ linux-user/elfload.c | 43 +++++++++++++--- linux-user/ioctls.h | 46 +++++++++++++++++ linux-user/mmap.c | 21 ++++---- linux-user/sparc/signal.c | 87 ++++++++++++++++--------------- linux-user/syscall.c | 79 ++++++++++++++++++++++++++++ linux-user/syscall_defs.h | 32 ++++++++++++ migration/migration.c | 6 +++ migration/savevm.c | 11 ++-- monitor/hmp-cmds.c | 3 +- monitor/misc.c | 16 +++--- target/i386/tcg/translate.c | 7 ++- target/mips/cpu.h | 1 + target/sparc/cpu.h | 28 ++++++++-- target/sparc/int64_helper.c | 5 +- target/sparc/translate.c | 2 +- target/sparc/win_helper.c | 2 +- target/unicore32/translate.c | 2 + tcg/optimize.c | 4 ++ tests/fp/meson.build | 2 + tools/virtiofsd/fuse_lowlevel.c | 98 ----------------------------------- tools/virtiofsd/fuse_virtio.c | 36 +++++++++---- tools/virtiofsd/passthrough_ll.c | 91 ++++++++++++++++++++++++++------- 34 files changed, 525 insertions(+), 298 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (cc07d525114 -> 3c60e9bac86)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/llvm-project. from cc07d525114 [libc][NFC] Use ASSERT_FP_EQ to compare nan values in tests. adds f07b95e8bcd [PowerPC] Add addtional test that retroactively catches PR47259 adds 6b316febb43 [OpenMP] libomp: Handle implicit conversion warnings adds 8c1f5538445 Avoid using /dev/null in test adds 871de4a479c [X86][test] Add explicit dso_local to definitions in ELF st [...] adds e0f70ee01c6 [test] Fix linux-preemption.ll adds 7b529d0411a [AArch64][test] Add explicit dso_local to definitions in EL [...] adds a64b89e69e3 [ARM][test] Add explicit dso_local to definitions in ELF st [...] adds a90e5a8f0d0 [SystemZ][test] Add explicit dso_local to definitions in EL [...] adds 7e5508e6a8a [RISCV][test] Add explicit dso_local to definitions in ELF [...] adds a14c955af86 [ORC] Remove some stale debugging output. adds a964e0f0850 [test] Add explicit dso_local to definitions in ELF static [...] adds f7318395848 [LowerEmuTls] Copy dso_local from <var> to __emutls_v.<var> adds bf1160c1d6b [test] Add explicit dso_local to definitions in ELF static [...] adds 2047c10c22b [TargetMachine] Drop implied dso_local for definitions in E [...] adds 52aa4e21074 [ThinLTO][test] Add visibility related tests adds 331c28f60db [ARM] Declare Op within an if statement (NFC) adds 95ea86587c5 [PGO] Use isa instead of dyn_cast (NFC) adds a87c7003ac2 [Analysis] Remove unused code recursivelySimplifyInstruction (NFC) adds 8886be242de [lld/mac] Add -adhoc_codesign / -no_adhoc_codesign flags adds 6f1503d5985 [LoopDeletion] Allows deletion of possibly infinite side-ef [...] adds 6be0b9a8ddc [X86] Don't fold negative offset into 32-bit absolute addre [...] adds 9a0237011b7 [lsan] Ignore inderect leaks referenced by suppressed blocks adds ecc38eac766 Add intrinsic testcase for some missing widening reduction. adds fdd30faae5b [RISCV] Define vector widening type-convert intrinsic. adds 2aed9bc98ab [RISCV] Define vector narrowing type-convert intrinsic. adds 1d04cbeb435 [RISCV] Define vector single-width type-convert intrinsic. adds 6b3351792c6 [test] Add {{.*}} to make tests immune to dso_local/dso_pre [...] adds 809a1e0ffd7 [CodeGenModule] Set dso_local for Mach-O GlobalValue adds 08665b18056 Support tilezero intrinsic and c interface for AMX. adds 4a290a59051 [lld/mac] fix typo adds 42c57dcc35e [mlir][python] Tweaks to make python extensions packagable/ [...] adds a16c00a7033 [mlir][python] Fix python extension building on windows. adds c1f3033697c Update inselt tests at llvm/test/Analysis to have poison as [...] adds f2cc2669a0d [test] Fix -triple and delete UNSUPPORTED: system-windows adds fd739804e05 [test] Add {{.*}} to make ELF tests immune to dso_local/dso [...] adds a92d01534f1 [sanitizer] Define SANITIZER_GLIBC to refine SANITIZER_LINU [...] adds 52d7e183bf2 [sanitizer] Include fstab.h on glibc/FreeBSD/NetBSD/macOS adds f760d57052d LangRef: fix significand bits of fp128 adds be764065beb Revert "[ThinLTO][test] Add visibility related tests" adds 8bee4d4e8f5 Revert "[LoopDeletion] Allows deletion of possibly infinite [...] adds 9b649394630 [NFC] Added tests for PR48604 adds 742ea77ca4c [InstCombine] Transform (A + B) - (A | B) to A & B (PR48604) adds c1937c2af2a [NFC] Added/adjusted tests for PR48604; second pattern adds ae69fa9b9f6 [InstCombine] Transform (A + B) - (A & B) to A | B (PR48604) adds d7154bbf92b [ThinLTO][test] Add visibility related tests adds 728f99fa0b6 [ThinLTO][test] Specify -enable-import-metadata to make !th [...] adds f904b46b1a9 [llvm-objcopy] Use llvm::erase_if (NFC) adds 7bc76fd0ec4 [CodeGen] Construct SmallVector with iterator ranges (NFC) adds b557c32ae92 [MemorySSA, BPF] Use isa instead of dyn_cast (NFC) adds a90b42b0fec [ThinLTO] Default -enable-import-metadata to false adds 1a9eb19af9b [IROutliner] Adding consistent function attribute merging adds 1a65b8c739a [Clang][Misc] Change run line in fragile test adds 509fa8e02e2 [SCEV] recognize logical and/or pattern adds 5cdf6ed7448 [CodeGen] recognize select form of and/ors when splitting b [...] adds a2513cb8655 remove pessimizing moves (reported by gcc 10) adds d974ac0224d [IRSim] Letting gep instructions be legal for similarity id [...] adds 3c60e9bac86 Add tests for D93943 (NFC) No new revisions were added by this update. Summary of changes: clang/include/clang/Basic/BuiltinsX86_64.def | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 14 +- clang/lib/Headers/amxintrin.h | 9 +- .../expr.prim/expr.prim.lambda/blocks-irgen.mm | 2 +- clang/test/CXX/expr/p10-0x.cpp | 6 +- clang/test/CXX/modules-ts/basic/basic.link/p3.cppm | 4 +- clang/test/CXX/modules-ts/codegen-basics.cppm | 4 +- clang/test/CXX/special/class.copy/p3.cpp | 2 +- .../test/CXX/temp/temp.spec/temp.expl.spec/p14.cpp | 6 +- clang/test/CodeGen/2006-05-19-SingleEltReturn.c | 4 +- clang/test/CodeGen/2008-03-05-syncPtr.c | 12 +- clang/test/CodeGen/2008-04-08-NoExceptions.c | 2 +- ...2008-07-22-bitfield-init-after-zero-len-array.c | 2 +- .../CodeGen/2008-07-30-implicit-initialization.c | 6 +- ...7-31-promotion-of-compound-pointer-arithmetic.c | 6 +- clang/test/CodeGen/2008-08-07-AlignPadding1.c | 2 +- clang/test/CodeGen/2009-10-20-GlobalDebug.c | 2 +- clang/test/CodeGen/64bit-swiftcall.c | 280 +++---- clang/test/CodeGen/Atomics.c | 4 +- clang/test/CodeGen/PR32874.c | 4 +- clang/test/CodeGen/RISCV/riscv-inline-asm.c | 10 +- clang/test/CodeGen/RISCV/riscv32-ilp32-abi.c | 8 +- .../test/CodeGen/RISCV/riscv32-ilp32-ilp32f-abi.c | 8 +- .../RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c | 76 +- clang/test/CodeGen/RISCV/riscv32-ilp32d-abi.c | 106 +-- clang/test/CodeGen/RISCV/riscv32-ilp32f-abi.c | 14 +- .../test/CodeGen/RISCV/riscv32-ilp32f-ilp32d-abi.c | 96 +-- clang/test/CodeGen/RISCV/riscv64-lp64-abi.c | 12 +- clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-abi.c | 4 +- .../CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c | 68 +- clang/test/CodeGen/RISCV/riscv64-lp64d-abi.c | 96 +-- clang/test/CodeGen/RISCV/riscv64-lp64f-lp64d-abi.c | 100 +-- clang/test/CodeGen/SystemZ/align-systemz.c | 4 +- clang/test/CodeGen/SystemZ/mbackchain.c | 2 +- clang/test/CodeGen/SystemZ/systemz-abi-vector.c | 180 ++--- clang/test/CodeGen/SystemZ/systemz-abi.c | 116 +-- clang/test/CodeGen/SystemZ/systemz-abi.cpp | 36 +- clang/test/CodeGen/SystemZ/systemz-inline-asm.c | 38 +- clang/test/CodeGen/SystemZ/zvector.c | 68 +- clang/test/CodeGen/X86/3dnow-builtins.c | 100 +-- clang/test/CodeGen/X86/amx_api.c | 7 + clang/test/CodeGen/X86/avx-union.c | 2 +- clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c | 8 +- clang/test/CodeGen/X86/prefetchw-builtins.c | 4 +- .../CodeGen/X86/x86-inline-asm-min-vector-width.c | 12 +- clang/test/CodeGen/X86/x86-long-double.cpp | 28 +- clang/test/CodeGen/X86/x86-soft-float.c | 4 +- clang/test/CodeGen/X86/x86-vec-i128.c | 22 +- clang/test/CodeGen/X86/x86_32-arguments-darwin.c | 102 +-- clang/test/CodeGen/X86/x86_32-arguments-iamcu.c | 32 +- clang/test/CodeGen/X86/x86_32-arguments-linux.c | 2 +- clang/test/CodeGen/X86/x86_32-arguments-nommx.c | 4 +- clang/test/CodeGen/X86/x86_32-arguments-realign.c | 2 +- clang/test/CodeGen/X86/x86_64-arguments-nacl.c | 26 +- clang/test/CodeGen/X86/x86_64-arguments.c | 92 +-- clang/test/CodeGen/X86/x86_64-floatvectors.c | 14 +- clang/test/CodeGen/X86/x86_64-longdouble.c | 54 +- clang/test/CodeGen/_Bool-conversion.c | 2 +- clang/test/CodeGen/aapcs-align.cpp | 14 +- clang/test/CodeGen/aapcs64-align.cpp | 10 +- clang/test/CodeGen/aarch64-args.cpp | 30 +- clang/test/CodeGen/aarch64-arguments-hfa-v3.c | 4 +- .../test/CodeGen/aarch64-branch-protection-attr.c | 22 +- clang/test/CodeGen/aarch64-byval-temp.c | 4 +- clang/test/CodeGen/aarch64-matmul.cpp | 2 +- clang/test/CodeGen/aarch64-neon-3v.c | 160 ++-- clang/test/CodeGen/aarch64-neon-across.c | 88 +-- clang/test/CodeGen/aarch64-neon-dot-product.c | 24 +- clang/test/CodeGen/aarch64-neon-extract.c | 48 +- clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c | 42 +- clang/test/CodeGen/aarch64-neon-fma.c | 44 +- clang/test/CodeGen/aarch64-neon-ldst-one.c | 540 +++++++------- clang/test/CodeGen/aarch64-neon-scalar-copy.c | 48 +- .../CodeGen/aarch64-neon-scalar-x-indexed-elem.c | 84 +-- clang/test/CodeGen/aarch64-neon-tbl.c | 144 ++-- clang/test/CodeGen/aarch64-neon-vcombine.c | 28 +- clang/test/CodeGen/aarch64-neon-vget-hilo.c | 56 +- clang/test/CodeGen/aarch64-neon-vget.c | 96 +-- clang/test/CodeGen/aarch64-poly128.c | 62 +- clang/test/CodeGen/aarch64-poly64.c | 96 +-- ...4-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c | 16 +- ...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 4 +- clang/test/CodeGen/aarch64-sve.c | 2 +- clang/test/CodeGen/aarch64-tme.cpp | 2 +- clang/test/CodeGen/aarch64-varargs.c | 50 +- clang/test/CodeGen/aarch64-vpcs.c | 8 +- clang/test/CodeGen/address-space-avr.c | 2 +- clang/test/CodeGen/address-space-field1.c | 2 +- clang/test/CodeGen/address-space.c | 16 +- clang/test/CodeGen/alias-avr.c | 2 +- clang/test/CodeGen/alias.c | 32 +- clang/test/CodeGen/align-param.c | 4 +- clang/test/CodeGen/aligned-sret.c | 2 +- clang/test/CodeGen/altivec.c | 12 +- clang/test/CodeGen/annotations-var.c | 6 +- clang/test/CodeGen/arc/arguments.c | 44 +- clang/test/CodeGen/arc/struct-align.c | 4 +- clang/test/CodeGen/arm-aapcs-vfp.c | 48 +- clang/test/CodeGen/arm-arguments.c | 130 ++-- clang/test/CodeGen/arm-bf16-params-returns.c | 12 +- clang/test/CodeGen/arm-cc.c | 10 +- clang/test/CodeGen/arm-cmse-attr.c | 8 +- clang/test/CodeGen/arm-float-helpers.c | 76 +- clang/test/CodeGen/arm-fp16-arguments.c | 24 +- clang/test/CodeGen/arm-homogenous.c | 2 +- clang/test/CodeGen/arm-interrupt-attr.c | 14 +- clang/test/CodeGen/arm-neon-directed-rounding.c | 30 +- clang/test/CodeGen/arm-neon-dot-product.c | 16 +- clang/test/CodeGen/arm-neon-fma.c | 8 +- clang/test/CodeGen/arm-neon-numeric-maxmin.c | 8 +- clang/test/CodeGen/arm-neon-vcvtX.c | 32 +- clang/test/CodeGen/arm-pcs.c | 2 +- clang/test/CodeGen/arm-swiftcall.c | 302 ++++---- clang/test/CodeGen/arm-target-attr.c | 8 +- clang/test/CodeGen/arm-varargs.c | 36 +- clang/test/CodeGen/arm-vector-arguments.c | 10 +- clang/test/CodeGen/arm-vfp16-arguments.c | 36 +- clang/test/CodeGen/arm-vfp16-arguments2.cpp | 30 +- clang/test/CodeGen/arm64-aapcs-arguments.c | 6 +- clang/test/CodeGen/arm64-arguments.c | 152 ++-- clang/test/CodeGen/arm64-mte.c | 26 +- clang/test/CodeGen/arm64_32-vaarg.c | 12 +- clang/test/CodeGen/arm64_32.c | 14 +- clang/test/CodeGen/arm64_vcopy.c | 20 +- clang/test/CodeGen/arm64_vdupq_n_f64.c | 12 +- clang/test/CodeGen/arm_function_epilog.cpp | 2 +- clang/test/CodeGen/armv7k-abi.c | 20 +- clang/test/CodeGen/asan-globals-alias.cpp | 8 +- clang/test/CodeGen/asm-goto.c | 12 +- clang/test/CodeGen/asm-label.c | 4 +- clang/test/CodeGen/asm-reg-var-local.c | 4 +- clang/test/CodeGen/assign.c | 4 +- clang/test/CodeGen/atomic-arm64.c | 10 +- clang/test/CodeGen/atomics-inlining.c | 10 +- .../test/CodeGen/attr-arm-sve-vector-bits-types.c | 284 ++++---- clang/test/CodeGen/attr-cpuspecific.c | 8 +- clang/test/CodeGen/attr-disable-tail-calls.c | 8 +- clang/test/CodeGen/attr-func-def.c | 4 +- clang/test/CodeGen/attr-leaf.c | 2 +- clang/test/CodeGen/attr-loader-uninitialized.c | 11 +- clang/test/CodeGen/attr-msp430.c | 2 +- clang/test/CodeGen/attr-naked.c | 6 +- clang/test/CodeGen/attr-nomerge.cpp | 2 +- clang/test/CodeGen/attr-target-mv-func-ptrs.c | 8 +- clang/test/CodeGen/attr-target-mv-va-args.c | 8 +- clang/test/CodeGen/attr-target-mv.c | 44 +- clang/test/CodeGen/attr-weak-import.c | 8 +- clang/test/CodeGen/attr-weakref.c | 4 +- clang/test/CodeGen/attr-weakref2.c | 4 +- clang/test/CodeGen/attr-x86-interrupt.c | 8 +- clang/test/CodeGen/attributes.c | 34 +- clang/test/CodeGen/available-externally-suppress.c | 4 +- clang/test/CodeGen/avr-builtins.c | 30 +- clang/test/CodeGen/avr/attributes/interrupt.c | 2 +- clang/test/CodeGen/avr/attributes/signal.c | 2 +- clang/test/CodeGen/bitfield-2.c | 16 +- clang/test/CodeGen/block-byref-aggr.c | 4 +- clang/test/CodeGen/blocks.c | 6 +- clang/test/CodeGen/bool-convert.c | 10 +- clang/test/CodeGen/bool-init.c | 2 +- clang/test/CodeGen/bool_test.c | 4 +- clang/test/CodeGen/builtin-align.c | 12 +- clang/test/CodeGen/builtin-complex.c | 8 +- clang/test/CodeGen/builtin-constant-p.c | 4 +- clang/test/CodeGen/builtin-expect.c | 12 +- clang/test/CodeGen/builtin-ms-noop.cpp | 8 +- clang/test/CodeGen/builtin-unpredictable.c | 2 +- clang/test/CodeGen/builtins-arm.c | 36 +- clang/test/CodeGen/builtins-memcpy-inline.c | 8 +- clang/test/CodeGen/builtins-ppc-altivec.c | 30 +- clang/test/CodeGen/builtins-ppc-crypto.c | 58 +- clang/test/CodeGen/builtins-ppc-htm.c | 2 +- clang/test/CodeGen/builtins-ppc-p7.c | 10 +- clang/test/CodeGen/builtins-ppc-p8vector.c | 2 +- clang/test/CodeGen/builtins-ppc-quadword.c | 2 +- clang/test/CodeGen/builtins-ppc-vsx.c | 4 +- clang/test/CodeGen/builtins-ppc.c | 2 +- clang/test/CodeGen/builtins.c | 34 +- clang/test/CodeGen/byval-memcpy-elim.c | 6 +- clang/test/CodeGen/c11atomics-ios.c | 10 +- clang/test/CodeGen/c11atomics.c | 14 +- ...-assumption-attribute-align_value-on-lvalue.cpp | 2 +- ...ssumption-attribute-align_value-on-paramvar.cpp | 4 +- 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clang/test/CodeGen/clang-sections-attribute.c | 10 +- clang/test/CodeGen/cleanup-destslot-simple.c | 2 +- clang/test/CodeGen/complex-indirect.c | 2 +- clang/test/CodeGen/complex-init-list.c | 6 +- clang/test/CodeGen/compound-literal.c | 12 +- clang/test/CodeGen/const-arithmetic.c | 4 +- clang/test/CodeGen/const-init.c | 44 +- clang/test/CodeGen/constructor-attribute.c | 8 +- clang/test/CodeGen/darwin-thread-specifier.c | 2 +- clang/test/CodeGen/decl-in-prototype.c | 4 +- clang/test/CodeGen/default-address-space.c | 18 +- clang/test/CodeGen/default-function-attr.c | 2 +- clang/test/CodeGen/designated-initializers.c | 16 +- clang/test/CodeGen/disable-tail-calls.c | 2 +- clang/test/CodeGen/dllexport-1.c | 6 +- clang/test/CodeGen/dso-local-executable.c | 6 +- clang/test/CodeGen/enable_if.c | 10 +- clang/test/CodeGen/enum-bool.cpp | 16 +- clang/test/CodeGen/exceptions-strictfp.c | 4 +- clang/test/CodeGen/exceptions.c | 4 +- clang/test/CodeGen/exprs.c | 16 +- clang/test/CodeGen/ext-int-cc.c | 404 +++++------ clang/test/CodeGen/ext-int-sanitizer.cpp | 20 +- clang/test/CodeGen/fixed-point-tbaa.c | 12 +- clang/test/CodeGen/flatten.c | 2 +- clang/test/CodeGen/flexible-array-init.c | 4 +- clang/test/CodeGen/fp-floatcontrol-pragma.cpp | 10 +- clang/test/CodeGen/fp-function-attrs.cpp | 6 +- clang/test/CodeGen/fp-strictfp-exp.cpp | 2 +- clang/test/CodeGen/fp-strictfp.cpp | 2 +- clang/test/CodeGen/fp16-ops-strictfp.c | 4 +- clang/test/CodeGen/fp16-ops.c | 4 +- clang/test/CodeGen/func-aligned.c | 2 +- clang/test/CodeGen/func-return-member.c | 6 +- clang/test/CodeGen/function-attributes.c | 30 +- clang/test/CodeGen/functions.c | 8 +- clang/test/CodeGen/global-init.c | 10 +- clang/test/CodeGen/iamcu-abi.c | 8 +- clang/test/CodeGen/incomplete-function-type-2.c | 2 +- clang/test/CodeGen/incomplete-function-type.c | 2 +- clang/test/CodeGen/init-memset.c | 16 +- clang/test/CodeGen/init.c | 14 +- clang/test/CodeGen/inline.c | 54 +- clang/test/CodeGen/inline2.c | 40 +- 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| 2 +- clang/test/CodeGen/ppc64-elf-abi.c | 4 +- clang/test/CodeGen/ppc64-extend.c | 8 +- clang/test/CodeGen/ppc64-inline-asm.c | 2 +- clang/test/CodeGen/ppc64-long-double.cpp | 12 +- clang/test/CodeGen/ppc64-soft-float.c | 44 +- clang/test/CodeGen/ppc64-struct-onefloat.c | 4 +- clang/test/CodeGen/ppc64-struct-onevect.c | 2 +- clang/test/CodeGen/ppc64-vector.c | 14 +- clang/test/CodeGen/ppc64le-aggregates.c | 90 +-- clang/test/CodeGen/ppc64le-f128Aggregates.c | 24 +- clang/test/CodeGen/ppc64le-varargs-f128.c | 8 +- clang/test/CodeGen/pr12251.c | 2 +- clang/test/CodeGen/pr25786.c | 8 +- clang/test/CodeGen/pr34021.c | 4 +- clang/test/CodeGen/pr9614.c | 2 +- clang/test/CodeGen/pragma-pack-1.c | 4 +- clang/test/CodeGen/pragma-visibility.c | 4 +- clang/test/CodeGen/pragma-weak.c | 56 +- clang/test/CodeGen/private-extern-redef.c | 2 +- clang/test/CodeGen/ps4-dllimport-dllexport.c | 4 +- clang/test/CodeGen/redefine_extname.c | 2 +- clang/test/CodeGen/regcall.c | 60 +- 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+- clang/test/CodeGenCUDA/device-fun-linkage.cu | 2 +- clang/test/CodeGenCUDA/device-stub.cu | 4 +- clang/test/CodeGenCUDA/device-var-init.cu | 116 +-- clang/test/CodeGenCUDA/device-vtable.cu | 12 +- clang/test/CodeGenCUDA/function-overload.cu | 2 +- clang/test/CodeGenCUDA/kernel-amdgcn.cu | 10 +- clang/test/CodeGenCUDA/kernel-args.cu | 16 +- clang/test/CodeGenCUDA/kernel-dbg-info.cu | 2 +- clang/test/CodeGenCUDA/lambda.cu | 10 +- clang/test/CodeGenCUDA/library-builtin.cu | 2 +- clang/test/CodeGenCUDA/link-device-bitcode.cu | 6 +- clang/test/CodeGenCUDA/nothrow.cu | 10 +- clang/test/CodeGenCUDA/propagate-metadata.cu | 2 +- clang/test/CodeGenCUDA/ptx-kernels.cu | 8 +- clang/test/CodeGenCUDA/static-device-var-no-rdc.cu | 12 +- clang/test/CodeGenCUDA/surface.cu | 2 +- clang/test/CodeGenCUDA/texture.cu | 4 +- clang/test/CodeGenCUDA/types.cu | 4 +- .../CodeGenCXX/2009-05-04-PureConstNounwind.cpp | 2 +- .../test/CodeGenCXX/2011-12-19-init-list-ctor.cpp | 2 +- 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...rallel_master_taskloop_simd_private_codegen.cpp | 6 +- clang/test/OpenMP/parallel_private_codegen.cpp | 2 +- clang/test/OpenMP/parallel_reduction_codegen.cpp | 6 +- .../test/OpenMP/sections_firstprivate_codegen.cpp | 14 +- clang/test/OpenMP/sections_lastprivate_codegen.cpp | 8 +- clang/test/OpenMP/sections_private_codegen.cpp | 2 +- clang/test/OpenMP/sections_reduction_codegen.cpp | 6 +- clang/test/OpenMP/simd_metadata.c | 6 +- clang/test/OpenMP/single_codegen.cpp | 2 +- clang/test/OpenMP/single_firstprivate_codegen.cpp | 14 +- clang/test/OpenMP/single_private_codegen.cpp | 2 +- .../test/OpenMP/target_codegen_global_capture.cpp | 8 +- clang/test/OpenMP/target_codegen_registration.cpp | 112 +-- .../OpenMP/target_data_use_device_ptr_codegen.cpp | 2 +- clang/test/OpenMP/target_defaultmap_codegen_01.cpp | 52 +- clang/test/OpenMP/target_is_device_ptr_codegen.cpp | 8 +- clang/test/OpenMP/target_map_codegen_05.cpp | 4 +- .../target_parallel_codegen_registration.cpp | 112 +-- .../target_parallel_for_codegen_registration.cpp | 112 +-- ...rget_parallel_for_simd_codegen_registration.cpp | 112 +-- .../OpenMP/target_simd_codegen_registration.cpp | 112 +-- .../OpenMP/target_teams_codegen_registration.cpp | 112 +-- ...arget_teams_distribute_codegen_registration.cpp | 112 +-- ...arget_teams_distribute_firstprivate_codegen.cpp | 12 +- ...istribute_parallel_for_firstprivate_codegen.cpp | 14 +- ...ams_distribute_parallel_for_private_codegen.cpp | 4 +- ...bute_parallel_for_simd_codegen_registration.cpp | 112 +-- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 14 +- ...istribute_parallel_for_simd_private_codegen.cpp | 4 +- .../target_teams_distribute_private_codegen.cpp | 12 +- ..._teams_distribute_simd_codegen_registration.cpp | 112 +-- ..._teams_distribute_simd_firstprivate_codegen.cpp | 12 +- ...arget_teams_distribute_simd_private_codegen.cpp | 12 +- clang/test/OpenMP/task_codegen.cpp | 2 +- clang/test/OpenMP/task_firstprivate_codegen.cpp | 6 +- clang/test/OpenMP/task_if_codegen.cpp | 2 +- clang/test/OpenMP/task_private_codegen.cpp | 6 +- .../test/OpenMP/taskloop_firstprivate_codegen.cpp | 6 +- clang/test/OpenMP/taskloop_lastprivate_codegen.cpp | 6 +- clang/test/OpenMP/taskloop_private_codegen.cpp | 6 +- .../OpenMP/taskloop_simd_firstprivate_codegen.cpp | 6 +- .../OpenMP/taskloop_simd_lastprivate_codegen.cpp | 6 +- .../test/OpenMP/taskloop_simd_private_codegen.cpp | 6 +- .../teams_distribute_firstprivate_codegen.cpp | 12 +- ...istribute_parallel_for_firstprivate_codegen.cpp | 12 +- ...ams_distribute_parallel_for_private_codegen.cpp | 12 +- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 12 +- ...istribute_parallel_for_simd_private_codegen.cpp | 12 +- .../OpenMP/teams_distribute_private_codegen.cpp | 12 +- .../teams_distribute_simd_firstprivate_codegen.cpp | 12 +- .../teams_distribute_simd_private_codegen.cpp | 12 +- clang/test/OpenMP/teams_private_codegen.cpp | 2 +- clang/test/OpenMP/threadprivate_codegen.cpp | 26 +- clang/test/PCH/arc-blocks.mm | 2 +- clang/test/PCH/builtin-is-constant-evaluated.cpp | 10 +- clang/test/PCH/chain-external-defs.c | 32 +- clang/test/PCH/external-defs.c | 10 +- clang/test/Parser/pragma-visibility2.c | 2 +- clang/test/Profile/c-captured.c | 2 +- clang/test/Profile/c-ternary.c | 2 +- .../cxx03-aligned-allocation-unscoped-enum.cpp | 2 +- clang/test/SemaCXX/linkage.cpp | 4 +- clang/test/SemaObjC/debugger-support.m | 2 +- compiler-rt/cmake/Modules/AddCompilerRT.cmake | 1 + compiler-rt/lib/asan/asan_interceptors.h | 6 +- compiler-rt/lib/asan/tests/asan_test.cpp | 4 +- .../lib/interception/interception_linux.cpp | 6 +- compiler-rt/lib/interception/interception_linux.h | 6 +- compiler-rt/lib/lsan/lsan_common.cpp | 104 ++- compiler-rt/lib/lsan/lsan_common.h | 3 +- compiler-rt/lib/msan/tests/msan_test.cpp | 36 +- .../sanitizer_common_interceptors_ioctl.inc | 6 +- .../sanitizer_common/sanitizer_linux_libcdep.cpp | 11 +- .../lib/sanitizer_common/sanitizer_platform.h | 11 + .../sanitizer_platform_interceptors.h | 90 ++- .../sanitizer_platform_limits_posix.cpp | 75 +- .../sanitizer_platform_limits_posix.h | 2 + .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 8 +- .../test/lsan/TestCases/suppressions_file.cpp | 7 +- lld/MachO/Options.td | 7 + llvm/docs/LangRef.rst | 2 +- .../include/llvm/Analysis/IRSimilarityIdentifier.h | 4 - llvm/include/llvm/Analysis/InstructionSimplify.h | 11 - llvm/include/llvm/Analysis/ScalarEvolution.h | 5 +- .../ExecutionEngine/Orc/Shared/FDRawByteChannel.h | 13 - .../llvm/ExecutionEngine/Orc/Shared/RPCUtils.h | 6 +- llvm/include/llvm/IR/Attributes.h | 15 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 41 ++ llvm/include/llvm/IR/IntrinsicsX86.td | 4 + llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 54 +- llvm/lib/Analysis/InstructionSimplify.cpp | 7 - llvm/lib/Analysis/MemorySSA.cpp | 4 +- llvm/lib/Analysis/ScalarEvolution.cpp | 84 ++- llvm/lib/CodeGen/CodeGenPrepare.cpp | 28 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 58 +- llvm/lib/CodeGen/IfConversion.cpp | 3 +- llvm/lib/CodeGen/LowerEmuTLS.cpp | 1 + llvm/lib/CodeGen/MachineBlockPlacement.cpp | 4 +- llvm/lib/CodeGen/MachineSink.cpp | 3 +- llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp | 2 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 4 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 59 +- llvm/lib/CodeGen/SjLjEHPrepare.cpp | 2 +- llvm/lib/CodeGen/TailDuplicator.cpp | 3 +- llvm/lib/CodeGen/WasmEHPrepare.cpp | 2 +- llvm/lib/IR/Attributes.cpp | 18 + llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 3 +- llvm/lib/Target/BPF/BPFAdjustOpt.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 228 ++++++ llvm/lib/Target/TargetMachine.cpp | 10 - llvm/lib/Target/X86/X86ExpandPseudo.cpp | 6 + llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 12 + llvm/lib/Target/X86/X86ISelLowering.cpp | 7 +- llvm/lib/Target/X86/X86ISelLowering.h | 2 +- llvm/lib/Target/X86/X86InstrAMX.td | 3 + llvm/lib/Target/X86/X86PreTileConfig.cpp | 2 + llvm/lib/Target/X86/X86RegisterInfo.cpp | 1 + llvm/lib/Transforms/IPO/FunctionImport.cpp | 10 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 2 + .../Transforms/InstCombine/InstCombineAddSub.cpp | 16 + .../Transforms/Instrumentation/InstrProfiling.cpp | 2 +- .../Transforms/Instrumentation/PGOMemOPSizeOpt.cpp | 2 +- .../X86/masked-intrinsic-cost-inseltpoison.ll | 28 +- .../CostModel/X86/uniformshift-inseltpoison.ll | 6 +- .../CostModel/X86/vector_gep-inseltpoison.ll | 2 +- .../CostModel/X86/vshift-ashr-cost-inseltpoison.ll | 204 +++--- .../CostModel/X86/vshift-lshr-cost-inseltpoison.ll | 204 +++--- .../CostModel/X86/vshift-shl-cost-inseltpoison.ll | 204 +++--- .../Analysis/ScalarEvolution/exit-count-select.ll | 312 ++++++++ .../ScalarEvolution/trip-count-andor-selectform.ll | 366 ++++++++++ .../GlobalISel/irtranslator-condbr-lower-tree.ll | 80 ++ .../AArch64/GlobalISel/legalize-blockaddress.mir | 4 +- .../AArch64/GlobalISel/select-blockaddress.mir | 4 +- .../AArch64/GlobalISel/select-gv-cmodel-large.mir | 6 +- .../AArch64/GlobalISel/select-gv-cmodel-tiny.mir | 6 +- .../CodeGen/AArch64/GlobalISel/select-static.mir | 18 +- .../AArch64/GlobalISel/sext-inreg-ldrow-16b.mir | 4 +- llvm/test/CodeGen/AArch64/aarch64-be-bv.ll | 90 +-- llvm/test/CodeGen/AArch64/addsub_ext.ll | 34 +- llvm/test/CodeGen/AArch64/and-sink.ll | 12 +- llvm/test/CodeGen/AArch64/arm64-aapcs.ll | 24 +- .../CodeGen/AArch64/arm64-custom-call-saved-reg.ll | 6 +- llvm/test/CodeGen/AArch64/arm64-fp128.ll | 36 +- llvm/test/CodeGen/AArch64/arm64-ldxr-stxr.ll | 44 +- .../test/CodeGen/AArch64/arm64-misched-multimmo.ll | 6 +- .../CodeGen/AArch64/arm64-sitofp-combine-chains.ll | 4 +- llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll | 16 +- llvm/test/CodeGen/AArch64/arm64_32.ll | 17 + llvm/test/CodeGen/AArch64/atomic-ops-lse.ll | 806 ++++++++++----------- llvm/test/CodeGen/AArch64/atomic-ops.ll | 124 ++-- llvm/test/CodeGen/AArch64/bitfield.ll | 30 +- llvm/test/CodeGen/AArch64/bool-loads.ll | 10 +- llvm/test/CodeGen/AArch64/breg.ll | 4 +- llvm/test/CodeGen/AArch64/call-rv-marker.ll | 16 +- llvm/test/CodeGen/AArch64/cmpxchg-O0.ll | 2 +- llvm/test/CodeGen/AArch64/code-model-large-abs.ll | 20 +- llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll | 20 +- .../CodeGen/AArch64/fast-isel-branch-cond-split.ll | 36 + llvm/test/CodeGen/AArch64/fcopysign.ll | 6 +- llvm/test/CodeGen/AArch64/func-argpassing.ll | 42 +- llvm/test/CodeGen/AArch64/func-calls.ll | 32 +- llvm/test/CodeGen/AArch64/global-alignment.ll | 20 +- llvm/test/CodeGen/AArch64/global-merge-2.ll | 10 +- llvm/test/CodeGen/AArch64/global-merge-3.ll | 6 +- llvm/test/CodeGen/AArch64/i1-contents.ll | 10 +- llvm/test/CodeGen/AArch64/irg_sp_tagp.ll | 14 +- llvm/test/CodeGen/AArch64/ldst-unscaledimm.ll | 24 +- llvm/test/CodeGen/AArch64/ldst-unsignedimm.ll | 32 +- llvm/test/CodeGen/AArch64/literal_pools_float.ll | 6 +- llvm/test/CodeGen/AArch64/misched-fusion-addr.ll | 34 +- llvm/test/CodeGen/AArch64/misched-fusion-lit.ll | 8 +- llvm/test/CodeGen/AArch64/movw-shift-encoding.ll | 4 +- llvm/test/CodeGen/AArch64/pie.ll | 4 +- llvm/test/CodeGen/AArch64/sibling-call.ll | 18 +- .../AArch64/{tiny_model.ll => tiny-model-pic.ll} | 31 +- .../{tiny_model.ll => tiny-model-static.ll} | 188 +---- llvm/test/CodeGen/AArch64/zero-reg.ll | 8 +- llvm/test/CodeGen/ARM/aeabi-read-tp.ll | 4 +- .../CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll | 8 +- .../CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll | 8 +- .../CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll | 8 +- llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll | 87 +-- llvm/test/CodeGen/ARM/fast-isel-pie.ll | 4 +- llvm/test/CodeGen/ARM/global-merge-alignment.ll | 6 +- llvm/test/CodeGen/ARM/global-merge-external-2.ll | 12 +- llvm/test/CodeGen/ARM/global-merge-external.ll | 14 +- llvm/test/CodeGen/ARM/ldm-base-writeback.ll | 8 +- llvm/test/CodeGen/ARM/pie.ll | 4 +- llvm/test/CodeGen/ARM/tls1.ll | 6 +- llvm/test/CodeGen/Hexagon/tls_static.ll | 8 +- llvm/test/CodeGen/Mips/tls-static.ll | 82 +++ llvm/test/CodeGen/Mips/tls.ll | 58 +- llvm/test/CodeGen/PowerPC/dsolocal-static.ll | 14 +- llvm/test/CodeGen/RISCV/double-mem.ll | 16 +- llvm/test/CodeGen/RISCV/float-mem.ll | 14 +- llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll | 44 +- llvm/test/CodeGen/RISCV/half-mem.ll | 6 +- llvm/test/CodeGen/RISCV/mem.ll | 26 +- llvm/test/CodeGen/RISCV/mem64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 541 ++++++++++++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 541 ++++++++++++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 325 +++++++++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 181 +++++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 422 ++++++++++- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 378 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll | 422 ++++++++++- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll | 378 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll | 547 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll | 757 +++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll | 547 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll | 757 +++++++++++++++++++ llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll | 8 +- llvm/test/CodeGen/SystemZ/and-08.ll | 62 +- llvm/test/CodeGen/SystemZ/branch-06.ll | 24 +- llvm/test/CodeGen/SystemZ/int-cmp-36.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-37.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-38.ll | 18 +- llvm/test/CodeGen/SystemZ/int-cmp-39.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-40.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-41.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-42.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-43.ll | 16 +- llvm/test/CodeGen/SystemZ/int-move-08.ll | 40 +- llvm/test/CodeGen/SystemZ/int-move-09.ll | 52 +- llvm/test/CodeGen/SystemZ/int-move-10.ll | 46 +- llvm/test/CodeGen/SystemZ/la-01.ll | 26 +- llvm/test/CodeGen/SystemZ/memcpy-02.ll | 76 +- llvm/test/CodeGen/SystemZ/pie.ll | 4 +- llvm/test/CodeGen/SystemZ/prefetch-01.ll | 18 +- llvm/test/CodeGen/SystemZ/spill-01.ll | 64 +- llvm/test/CodeGen/SystemZ/tls-01.ll | 4 +- llvm/test/CodeGen/Thumb2/tls1.ll | 6 +- llvm/test/CodeGen/WebAssembly/offset-folding.ll | 14 +- llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll | 4 +- .../CodeGen/X86/2010-08-04-MaskedSignedCompare.ll | 6 +- llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll | 8 +- llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll | 38 + llvm/test/CodeGen/X86/GlobalISel/GV.ll | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-GV-32.mir | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-GV-64.mir | 6 +- llvm/test/CodeGen/X86/abi-isel.ll | 658 ++++++++--------- llvm/test/CodeGen/X86/atomic-fp.ll | 22 +- llvm/test/CodeGen/X86/avx-vzeroupper.ll | 4 +- llvm/test/CodeGen/X86/avx2-gather.ll | 2 +- .../CodeGen/X86/avx512-gather-scatter-intrin.ll | 68 +- llvm/test/CodeGen/X86/avx512-regcall-Mask.ll | 38 +- llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll | 58 +- llvm/test/CodeGen/X86/backpropmask.ll | 12 +- llvm/test/CodeGen/X86/break-false-dep.ll | 34 +- llvm/test/CodeGen/X86/bswap.ll | 12 +- llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll | 6 +- llvm/test/CodeGen/X86/cast-vsel.ll | 14 +- llvm/test/CodeGen/X86/cmov-double.ll | 8 +- llvm/test/CodeGen/X86/cmovcmov.ll | 12 +- llvm/test/CodeGen/X86/cmp.ll | 46 +- llvm/test/CodeGen/X86/copy-eflags.ll | 18 +- llvm/test/CodeGen/X86/critical-edge-split-2.ll | 4 +- llvm/test/CodeGen/X86/dbg-changes-codegen.ll | 10 +- llvm/test/CodeGen/X86/emutls-pie.ll | 12 +- llvm/test/CodeGen/X86/emutls.ll | 36 +- llvm/test/CodeGen/X86/fmf-flags.ll | 14 +- llvm/test/CodeGen/X86/fold-add.ll | 8 +- llvm/test/CodeGen/X86/fp128-cast-strict.ll | 28 +- llvm/test/CodeGen/X86/fp128-cast.ll | 72 +- llvm/test/CodeGen/X86/fp128-g.ll | 2 +- llvm/test/CodeGen/X86/fp128-i128.ll | 10 +- llvm/test/CodeGen/X86/fp128-libcalls.ll | 42 +- llvm/test/CodeGen/X86/fp128-load.ll | 2 +- llvm/test/CodeGen/X86/fp128-store.ll | 4 +- llvm/test/CodeGen/X86/ga-offset.ll | 6 +- llvm/test/CodeGen/X86/global-access-pie.ll | 22 +- llvm/test/CodeGen/X86/hoist-spill-lpad.ll | 4 +- llvm/test/CodeGen/X86/immediate_merging.ll | 28 +- llvm/test/CodeGen/X86/inline-asm-h.ll | 4 +- llvm/test/CodeGen/X86/lea-recursion.ll | 6 +- llvm/test/CodeGen/X86/linux-preemption.ll | 24 +- llvm/test/CodeGen/X86/load-partial.ll | 6 +- llvm/test/CodeGen/X86/lsr-sort.ll | 4 +- llvm/test/CodeGen/X86/mempcpy.ll | 4 +- llvm/test/CodeGen/X86/min-legal-vector-width.ll | 74 +- llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll | 4 +- llvm/test/CodeGen/X86/musttail-tailcc.ll | 8 +- llvm/test/CodeGen/X86/narrow_op-1.ll | 6 +- llvm/test/CodeGen/X86/peephole-fold-movsd.ll | 4 +- llvm/test/CodeGen/X86/pie.ll | 8 +- llvm/test/CodeGen/X86/pr22774.ll | 6 +- llvm/test/CodeGen/X86/pr31956.ll | 4 +- llvm/test/CodeGen/X86/pr32282.ll | 10 +- llvm/test/CodeGen/X86/pr33290.ll | 8 +- llvm/test/CodeGen/X86/pr34629.ll | 6 +- llvm/test/CodeGen/X86/pr34634.ll | 10 +- llvm/test/CodeGen/X86/pr35761.ll | 8 +- llvm/test/CodeGen/X86/pr35763.ll | 6 +- llvm/test/CodeGen/X86/pr35765.ll | 10 +- llvm/test/CodeGen/X86/pr36312.ll | 8 +- llvm/test/CodeGen/X86/pr37826.ll | 10 +- llvm/test/CodeGen/X86/pr38217.ll | 4 +- llvm/test/CodeGen/X86/pr38803.ll | 8 +- llvm/test/CodeGen/X86/pr38865.ll | 4 +- llvm/test/CodeGen/X86/pr43866.ll | 4 +- llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll | 20 +- llvm/test/CodeGen/X86/sad.ll | 28 +- llvm/test/CodeGen/X86/shift-combine.ll | 24 +- llvm/test/CodeGen/X86/shrink-compare-pgso.ll | 28 +- llvm/test/CodeGen/X86/shrink-compare.ll | 28 +- llvm/test/CodeGen/X86/sibcall.ll | 36 +- ...peculative-execution-side-effect-suppression.ll | 8 +- .../X86/speculative-load-hardening-indirect.ll | 20 +- llvm/test/CodeGen/X86/splat-for-size.ll | 2 +- llvm/test/CodeGen/X86/stores-merging.ll | 56 +- llvm/test/CodeGen/X86/subvector-broadcast.ll | 20 +- llvm/test/CodeGen/X86/swift-return.ll | 10 +- llvm/test/CodeGen/X86/tail-opts.ll | 30 +- llvm/test/CodeGen/X86/tailcall-disable.ll | 6 +- llvm/test/CodeGen/X86/tailcall-tailcc.ll | 12 +- llvm/test/CodeGen/X86/tailcall.ll | 12 +- llvm/test/CodeGen/X86/test-shrink-bug.ll | 6 +- llvm/test/CodeGen/X86/tls-pie.ll | 10 +- llvm/test/CodeGen/X86/tls.ll | 42 +- llvm/test/CodeGen/X86/trunc-and.ll | 4 +- llvm/test/CodeGen/X86/undef-label.ll | 4 +- llvm/test/CodeGen/X86/vec-loadsingles-alignment.ll | 6 +- llvm/test/CodeGen/X86/widen_load-1.ll | 4 +- llvm/test/CodeGen/X86/x86-64-intrcc.ll | 6 +- llvm/test/CodeGen/X86/xor-select-i1-combine.ll | 8 +- llvm/test/CodeGen/X86/xray-tail-call-sled.ll | 4 +- llvm/test/CodeGen/XCore/codemodel.ll | 16 +- llvm/test/DebugInfo/X86/debug-loc-frame.ll | 10 +- llvm/test/DebugInfo/X86/live-debug-values.ll | 4 +- .../DebugInfo/X86/machinecse-wrongdebug-hoist.ll | 6 +- llvm/test/MC/AArch64/elf-globaladdress.ll | 14 +- llvm/test/MC/PowerPC/ppc64-encoding-ext.s | 10 + llvm/test/MC/X86/intel-syntax-var-offset.ll | 14 +- llvm/test/ThinLTO/X86/visibility-elf.ll | 137 ++++ llvm/test/ThinLTO/X86/visibility-macho.ll | 91 +++ llvm/test/Transforms/IROutliner/illegal-gep.ll | 6 +- .../outlining-compatible-and-attribute-transfer.ll | 126 ++++ .../outlining-compatible-or-attribute-transfer.ll | 67 ++ llvm/test/Transforms/InstCombine/sub.ll | 88 +++ llvm/test/Transforms/SimplifyCFG/switch_create.ll | 45 ++ .../Inputs/aarch64_generated_funcs.ll | 6 +- .../aarch64_generated_funcs.ll.generated.expected | 6 +- ...aarch64_generated_funcs.ll.nogenerated.expected | 6 +- .../Inputs/amdgpu_generated_funcs.ll | 6 +- .../amdgpu_generated_funcs.ll.generated.expected | 18 +- .../amdgpu_generated_funcs.ll.nogenerated.expected | 18 +- .../Inputs/arm_generated_funcs.ll | 4 +- .../arm_generated_funcs.ll.generated.expected | 4 +- .../arm_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/hexagon_generated_funcs.ll | 4 +- .../hexagon_generated_funcs.ll.generated.expected | 4 +- ...hexagon_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/lanai_generated_funcs.ll | 4 +- .../lanai_generated_funcs.ll.generated.expected | 12 +- .../lanai_generated_funcs.ll.nogenerated.expected | 12 +- .../Inputs/mips_generated_funcs.ll | 4 +- .../mips_generated_funcs.ll.generated.expected | 4 +- .../mips_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/msp430_generated_funcs.ll | 4 +- .../msp430_generated_funcs.ll.generated.expected | 4 +- .../msp430_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/on_the_fly_arg_change.ll | 6 +- .../Inputs/on_the_fly_arg_change.ll.expected | 6 +- .../Inputs/ppc_generated_funcs.ll | 4 +- .../ppc_generated_funcs.ll.generated.expected | 4 +- .../ppc_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/sparc_generated_funcs.ll | 4 +- .../sparc_generated_funcs.ll.generated.expected | 4 +- .../sparc_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/systemz_generated_funcs.ll | 6 +- .../systemz_generated_funcs.ll.generated.expected | 6 +- ...systemz_generated_funcs.ll.nogenerated.expected | 6 +- .../Inputs/wasm_generated_funcs.ll | 4 +- .../wasm_generated_funcs.ll.generated.expected | 4 +- .../wasm_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/x86_generated_funcs.ll | 6 +- .../x86_generated_funcs.ll.generated.expected | 6 +- .../x86_generated_funcs.ll.nogenerated.expected | 6 +- llvm/tools/llvm-objcopy/COFF/Object.cpp | 39 +- .../Analysis/IRSimilarityIdentifierTest.cpp | 101 ++- mlir/cmake/modules/AddMLIRPythonExtension.cmake | 4 + mlir/lib/Bindings/Python/CMakeLists.txt | 18 +- mlir/lib/Bindings/Python/mlir/__init__.py | 27 +- .../Bindings/Python/mlir/transforms/__init__.py | 4 +- mlir/test/Pass/run-reproducer.mlir | 2 +- openmp/runtime/cmake/LibompHandleFlags.cmake | 1 + openmp/runtime/cmake/config-ix.cmake | 1 + openmp/runtime/src/kmp.h | 114 ++- openmp/runtime/src/kmp_affinity.cpp | 17 +- openmp/runtime/src/kmp_affinity.h | 54 +- openmp/runtime/src/kmp_alloc.cpp | 5 +- openmp/runtime/src/kmp_atomic.cpp | 6 +- openmp/runtime/src/kmp_barrier.cpp | 4 +- openmp/runtime/src/kmp_csupport.cpp | 28 +- openmp/runtime/src/kmp_dispatch.cpp | 33 +- openmp/runtime/src/kmp_dispatch_hier.h | 14 +- openmp/runtime/src/kmp_environment.cpp | 7 +- openmp/runtime/src/kmp_ftn_entry.h | 8 +- openmp/runtime/src/kmp_gsupport.cpp | 12 +- openmp/runtime/src/kmp_i18n.h | 2 +- openmp/runtime/src/kmp_itt.inl | 5 +- openmp/runtime/src/kmp_lock.cpp | 4 +- openmp/runtime/src/kmp_runtime.cpp | 23 +- openmp/runtime/src/kmp_settings.cpp | 14 +- openmp/runtime/src/kmp_stats.cpp | 35 +- openmp/runtime/src/kmp_stats.h | 2 +- openmp/runtime/src/kmp_str.cpp | 9 +- openmp/runtime/src/kmp_str.h | 4 +- openmp/runtime/src/kmp_stub.cpp | 6 +- openmp/runtime/src/kmp_stub.h | 4 +- openmp/runtime/src/kmp_taskdeps.cpp | 11 +- openmp/runtime/src/kmp_tasking.cpp | 13 +- openmp/runtime/src/kmp_threadprivate.cpp | 5 +- openmp/runtime/src/kmp_utility.cpp | 2 +- openmp/runtime/src/kmp_wait_release.h | 6 +- openmp/runtime/src/ompt-specific.cpp | 2 +- openmp/runtime/src/z_Linux_util.cpp | 38 +- 1358 files changed, 34699 insertions(+), 11458 deletions(-) create mode 100644 llvm/test/Analysis/ScalarEvolution/exit-count-select.ll create mode 100644 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llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll create mode 100644 llvm/test/ThinLTO/X86/visibility-elf.ll create mode 100644 llvm/test/ThinLTO/X86/visibility-macho.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-compatible-and-attrib [...] create mode 100644 llvm/test/Transforms/IROutliner/outlining-compatible-or-attribu [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (9964c0b2f -> 3c6862107)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 9964c0b2f 2: update: llvm-linux-qemu: 21198 new 3c6862107 2: update: llvm-linux-qemu: 21198 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9964c0b2f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 52 +- 02-prepare_abe/console.log | 436 +- 03-build_llvm/console.log | 13748 +++++++++++++-------------- 04-build_linux/console.log | 806 +- 07-check_regression/console.log | 2 +- 07-check_regression/results.regressions | 10 +- 08-update_baseline/console.log | 20 +- 08-update_baseline/results.regressions | 10 +- console.log | 15064 +++++++++++++++--------------- jenkins/manifest.sh | 10 +- 10 files changed, 15077 insertions(+), 15081 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (a05f8ecd88 -> 3fb340ccf5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/qemu. from a05f8ecd88 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 4f02d49a80 disas/libvixl: Fix fall-through annotation for GCC >= 7 adds 51c915674d target/unicore32/translate: Add missing fallthrough annotations adds 216776099b hw/rtc/twl92230: Silence warnings about missing fallthrough [...] adds 30982862b2 hw/timer/renesas_tmr: silence the compiler warnings adds bdddc1c425 target/i386: silence the compiler warnings in gen_shiftd_rm_T1 adds d85afd1eb5 hw/intc/arm_gicv3_kvm: silence the compiler warnings adds f190bf05f8 accel/tcg/user-exec: silence the compiler warnings adds fc0cd86781 target/sparc/translate: silence the compiler warnings adds 9cf5a9cf60 target/sparc/win_helper: silence the compiler warnings adds d84568b773 tcg/optimize: Add fallthrough annotations adds 4f07e71bad tests/fp: Do not emit implicit-fallthrough warnings in the s [...] adds 484bed0574 bsd-user: Silence warnings about missing fallthrough statement adds 61e21b05de hw/rtc/twl92230: Add missing 'break' adds 0a2ebce92a configure: Compile with -Wimplicit-fallthrough=2 adds 65a3c59840 Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull- [...] adds 56d190848b linux-user/mmap.c: check range of mremap result in target ad [...] adds 6dd97bfc1f linux-user/elfload: Move GET_FEATURE macro out of get_elf_hw [...] adds 7d9a3d96f5 linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN() adds 388765a05b linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro adds ce54384405 linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro adds 9ea313ba5d linux-user/elfload: Update HWCAP bits from linux 5.7 adds 53673d0ff4 linux-user: Add support for MIPS Loongson 2F/3A adds c8a03a8f95 docs/user: Display linux-user binaries nicely adds 8494645797 linux-user: Implement copy_file_range adds 6addf06a3c linux-user: Add most IFTUN ioctls adds 246ff44295 linux-user/sparc: Correct sparc64_get/set_context() FPU handling adds 309abce236 linux-user/sparc: Remove unneeded checks of 'err' from sparc [...] adds 0ad20314f1 linux-user/sparc: Don't restore %g7 in sparc64_set_context() adds 7a5805a08f linux-user/sparc: Handle tstate in sparc64_get/set_context() adds 091774bfde Merge remote-tracking branch 'remotes/vivier2/tags/linux-use [...] adds d22b854dc5 monitor:open brace '{' following struct go on the same line adds 89854b9558 monitor:braces {} are necessary for all arms of this statement adds 33b1fa9485 monitor:Don't use '#' flag of printf format ('%#') in format [...] adds ff688cd2c7 hmp-commands.hx: List abbreviation after command for cont, q [...] adds e49393a349 virtiofsd: Use --thread-pool-size=0 to mean no thread pool adds bebc3c24aa virtiofsd: make the debug log timestamp on stderr more human [...] adds ad3bfe1bd6 virtiofsd: Set up posix_lock hash table for root inode adds e7e8aa8aea virtiofsd: Disable posix_lock hash table if remote locks are [...] adds 31a4990f8d virtiofsd: Check file type in lo_flush() adds d6211148f6 virtiofsd: update FUSE_FORGET comment on "lo_inode.nlookup" adds 03350a1e8d virtiofsd: Remove useless code about send_notify_iov adds 243e7480d5 docs/devel/migration: Improve debugging section a bit adds 80ef0586d3 savevm: Remove dead code in save_snapshot() adds 2a909dc430 savevm: Delete snapshots just created in case of error adds 36d0fe6516 migration: Don't allow migration if vm is in POSTMIGRATE adds 3fb340ccf5 Merge remote-tracking branch 'remotes/dgilbert/tags/pull-mig [...] No new revisions were added by this update. Summary of changes: accel/tcg/user-exec.c | 3 +- bsd-user/main.c | 1 + configure | 1 + disas/libvixl/vixl/a64/disasm-a64.cc | 4 ++ disas/libvixl/vixl/globals.h | 6 ++- docs/devel/migration.rst | 11 ++-- docs/user/main.rst | 99 ++++++++++++++++++++---------------- hmp-commands.hx | 12 ++--- hw/intc/arm_gicv3_kvm.c | 8 +++ hw/rtc/twl92230.c | 44 +++++----------- hw/timer/renesas_tmr.c | 1 + include/qemu/compiler.h | 11 ++++ linux-user/elfload.c | 43 +++++++++++++--- linux-user/ioctls.h | 46 +++++++++++++++++ linux-user/mmap.c | 21 ++++---- linux-user/sparc/signal.c | 87 ++++++++++++++++--------------- linux-user/syscall.c | 79 ++++++++++++++++++++++++++++ linux-user/syscall_defs.h | 32 ++++++++++++ migration/migration.c | 6 +++ migration/savevm.c | 11 ++-- monitor/hmp-cmds.c | 3 +- monitor/misc.c | 16 +++--- target/i386/tcg/translate.c | 7 ++- target/mips/cpu.h | 1 + target/sparc/cpu.h | 28 ++++++++-- target/sparc/int64_helper.c | 5 +- target/sparc/translate.c | 2 +- target/sparc/win_helper.c | 2 +- target/unicore32/translate.c | 2 + tcg/optimize.c | 4 ++ tests/fp/meson.build | 2 + tools/virtiofsd/fuse_lowlevel.c | 98 ----------------------------------- tools/virtiofsd/fuse_virtio.c | 36 +++++++++---- tools/virtiofsd/passthrough_ll.c | 91 ++++++++++++++++++++++++++------- 34 files changed, 525 insertions(+), 298 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (cc07d525114 -> 3c60e9bac86)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project. from cc07d525114 [libc][NFC] Use ASSERT_FP_EQ to compare nan values in tests. adds f07b95e8bcd [PowerPC] Add addtional test that retroactively catches PR47259 adds 6b316febb43 [OpenMP] libomp: Handle implicit conversion warnings adds 8c1f5538445 Avoid using /dev/null in test adds 871de4a479c [X86][test] Add explicit dso_local to definitions in ELF st [...] adds e0f70ee01c6 [test] Fix linux-preemption.ll adds 7b529d0411a [AArch64][test] Add explicit dso_local to definitions in EL [...] adds a64b89e69e3 [ARM][test] Add explicit dso_local to definitions in ELF st [...] adds a90e5a8f0d0 [SystemZ][test] Add explicit dso_local to definitions in EL [...] adds 7e5508e6a8a [RISCV][test] Add explicit dso_local to definitions in ELF [...] adds a14c955af86 [ORC] Remove some stale debugging output. adds a964e0f0850 [test] Add explicit dso_local to definitions in ELF static [...] adds f7318395848 [LowerEmuTls] Copy dso_local from <var> to __emutls_v.<var> adds bf1160c1d6b [test] Add explicit dso_local to definitions in ELF static [...] adds 2047c10c22b [TargetMachine] Drop implied dso_local for definitions in E [...] adds 52aa4e21074 [ThinLTO][test] Add visibility related tests adds 331c28f60db [ARM] Declare Op within an if statement (NFC) adds 95ea86587c5 [PGO] Use isa instead of dyn_cast (NFC) adds a87c7003ac2 [Analysis] Remove unused code recursivelySimplifyInstruction (NFC) adds 8886be242de [lld/mac] Add -adhoc_codesign / -no_adhoc_codesign flags adds 6f1503d5985 [LoopDeletion] Allows deletion of possibly infinite side-ef [...] adds 6be0b9a8ddc [X86] Don't fold negative offset into 32-bit absolute addre [...] adds 9a0237011b7 [lsan] Ignore inderect leaks referenced by suppressed blocks adds ecc38eac766 Add intrinsic testcase for some missing widening reduction. adds fdd30faae5b [RISCV] Define vector widening type-convert intrinsic. adds 2aed9bc98ab [RISCV] Define vector narrowing type-convert intrinsic. adds 1d04cbeb435 [RISCV] Define vector single-width type-convert intrinsic. adds 6b3351792c6 [test] Add {{.*}} to make tests immune to dso_local/dso_pre [...] adds 809a1e0ffd7 [CodeGenModule] Set dso_local for Mach-O GlobalValue adds 08665b18056 Support tilezero intrinsic and c interface for AMX. adds 4a290a59051 [lld/mac] fix typo adds 42c57dcc35e [mlir][python] Tweaks to make python extensions packagable/ [...] adds a16c00a7033 [mlir][python] Fix python extension building on windows. adds c1f3033697c Update inselt tests at llvm/test/Analysis to have poison as [...] adds f2cc2669a0d [test] Fix -triple and delete UNSUPPORTED: system-windows adds fd739804e05 [test] Add {{.*}} to make ELF tests immune to dso_local/dso [...] adds a92d01534f1 [sanitizer] Define SANITIZER_GLIBC to refine SANITIZER_LINU [...] adds 52d7e183bf2 [sanitizer] Include fstab.h on glibc/FreeBSD/NetBSD/macOS adds f760d57052d LangRef: fix significand bits of fp128 adds be764065beb Revert "[ThinLTO][test] Add visibility related tests" adds 8bee4d4e8f5 Revert "[LoopDeletion] Allows deletion of possibly infinite [...] adds 9b649394630 [NFC] Added tests for PR48604 adds 742ea77ca4c [InstCombine] Transform (A + B) - (A | B) to A & B (PR48604) adds c1937c2af2a [NFC] Added/adjusted tests for PR48604; second pattern adds ae69fa9b9f6 [InstCombine] Transform (A + B) - (A & B) to A | B (PR48604) adds d7154bbf92b [ThinLTO][test] Add visibility related tests adds 728f99fa0b6 [ThinLTO][test] Specify -enable-import-metadata to make !th [...] adds f904b46b1a9 [llvm-objcopy] Use llvm::erase_if (NFC) adds 7bc76fd0ec4 [CodeGen] Construct SmallVector with iterator ranges (NFC) adds b557c32ae92 [MemorySSA, BPF] Use isa instead of dyn_cast (NFC) adds a90b42b0fec [ThinLTO] Default -enable-import-metadata to false adds 1a9eb19af9b [IROutliner] Adding consistent function attribute merging adds 1a65b8c739a [Clang][Misc] Change run line in fragile test adds 509fa8e02e2 [SCEV] recognize logical and/or pattern adds 5cdf6ed7448 [CodeGen] recognize select form of and/ors when splitting b [...] new a2513cb8655 remove pessimizing moves (reported by gcc 10) new d974ac0224d [IRSim] Letting gep instructions be legal for similarity id [...] new 3c60e9bac86 Add tests for D93943 (NFC) The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/include/clang/Basic/BuiltinsX86_64.def | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 14 +- clang/lib/Headers/amxintrin.h | 9 +- .../expr.prim/expr.prim.lambda/blocks-irgen.mm | 2 +- clang/test/CXX/expr/p10-0x.cpp | 6 +- clang/test/CXX/modules-ts/basic/basic.link/p3.cppm | 4 +- clang/test/CXX/modules-ts/codegen-basics.cppm | 4 +- clang/test/CXX/special/class.copy/p3.cpp | 2 +- .../test/CXX/temp/temp.spec/temp.expl.spec/p14.cpp | 6 +- clang/test/CodeGen/2006-05-19-SingleEltReturn.c | 4 +- clang/test/CodeGen/2008-03-05-syncPtr.c | 12 +- clang/test/CodeGen/2008-04-08-NoExceptions.c | 2 +- ...2008-07-22-bitfield-init-after-zero-len-array.c | 2 +- .../CodeGen/2008-07-30-implicit-initialization.c | 6 +- ...7-31-promotion-of-compound-pointer-arithmetic.c | 6 +- clang/test/CodeGen/2008-08-07-AlignPadding1.c | 2 +- clang/test/CodeGen/2009-10-20-GlobalDebug.c | 2 +- clang/test/CodeGen/64bit-swiftcall.c | 280 +++---- clang/test/CodeGen/Atomics.c | 4 +- clang/test/CodeGen/PR32874.c | 4 +- clang/test/CodeGen/RISCV/riscv-inline-asm.c | 10 +- clang/test/CodeGen/RISCV/riscv32-ilp32-abi.c | 8 +- .../test/CodeGen/RISCV/riscv32-ilp32-ilp32f-abi.c | 8 +- .../RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c | 76 +- clang/test/CodeGen/RISCV/riscv32-ilp32d-abi.c | 106 +-- clang/test/CodeGen/RISCV/riscv32-ilp32f-abi.c | 14 +- .../test/CodeGen/RISCV/riscv32-ilp32f-ilp32d-abi.c | 96 +-- clang/test/CodeGen/RISCV/riscv64-lp64-abi.c | 12 +- clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-abi.c | 4 +- .../CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c | 68 +- clang/test/CodeGen/RISCV/riscv64-lp64d-abi.c | 96 +-- clang/test/CodeGen/RISCV/riscv64-lp64f-lp64d-abi.c | 100 +-- clang/test/CodeGen/SystemZ/align-systemz.c | 4 +- clang/test/CodeGen/SystemZ/mbackchain.c | 2 +- clang/test/CodeGen/SystemZ/systemz-abi-vector.c | 180 ++--- clang/test/CodeGen/SystemZ/systemz-abi.c | 116 +-- clang/test/CodeGen/SystemZ/systemz-abi.cpp | 36 +- clang/test/CodeGen/SystemZ/systemz-inline-asm.c | 38 +- clang/test/CodeGen/SystemZ/zvector.c | 68 +- clang/test/CodeGen/X86/3dnow-builtins.c | 100 +-- clang/test/CodeGen/X86/amx_api.c | 7 + clang/test/CodeGen/X86/avx-union.c | 2 +- clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c | 8 +- clang/test/CodeGen/X86/prefetchw-builtins.c | 4 +- .../CodeGen/X86/x86-inline-asm-min-vector-width.c | 12 +- clang/test/CodeGen/X86/x86-long-double.cpp | 28 +- clang/test/CodeGen/X86/x86-soft-float.c | 4 +- clang/test/CodeGen/X86/x86-vec-i128.c | 22 +- clang/test/CodeGen/X86/x86_32-arguments-darwin.c | 102 +-- clang/test/CodeGen/X86/x86_32-arguments-iamcu.c | 32 +- clang/test/CodeGen/X86/x86_32-arguments-linux.c | 2 +- clang/test/CodeGen/X86/x86_32-arguments-nommx.c | 4 +- clang/test/CodeGen/X86/x86_32-arguments-realign.c | 2 +- clang/test/CodeGen/X86/x86_64-arguments-nacl.c | 26 +- clang/test/CodeGen/X86/x86_64-arguments.c | 92 +-- clang/test/CodeGen/X86/x86_64-floatvectors.c | 14 +- clang/test/CodeGen/X86/x86_64-longdouble.c | 54 +- clang/test/CodeGen/_Bool-conversion.c | 2 +- clang/test/CodeGen/aapcs-align.cpp | 14 +- clang/test/CodeGen/aapcs64-align.cpp | 10 +- clang/test/CodeGen/aarch64-args.cpp | 30 +- clang/test/CodeGen/aarch64-arguments-hfa-v3.c | 4 +- .../test/CodeGen/aarch64-branch-protection-attr.c | 22 +- clang/test/CodeGen/aarch64-byval-temp.c | 4 +- clang/test/CodeGen/aarch64-matmul.cpp | 2 +- clang/test/CodeGen/aarch64-neon-3v.c | 160 ++-- clang/test/CodeGen/aarch64-neon-across.c | 88 +-- clang/test/CodeGen/aarch64-neon-dot-product.c | 24 +- clang/test/CodeGen/aarch64-neon-extract.c | 48 +- clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c | 42 +- clang/test/CodeGen/aarch64-neon-fma.c | 44 +- clang/test/CodeGen/aarch64-neon-ldst-one.c | 540 +++++++------- clang/test/CodeGen/aarch64-neon-scalar-copy.c | 48 +- .../CodeGen/aarch64-neon-scalar-x-indexed-elem.c | 84 +-- clang/test/CodeGen/aarch64-neon-tbl.c | 144 ++-- clang/test/CodeGen/aarch64-neon-vcombine.c | 28 +- clang/test/CodeGen/aarch64-neon-vget-hilo.c | 56 +- clang/test/CodeGen/aarch64-neon-vget.c | 96 +-- clang/test/CodeGen/aarch64-poly128.c | 62 +- clang/test/CodeGen/aarch64-poly64.c | 96 +-- ...4-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c | 16 +- ...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 4 +- clang/test/CodeGen/aarch64-sve.c | 2 +- clang/test/CodeGen/aarch64-tme.cpp | 2 +- clang/test/CodeGen/aarch64-varargs.c | 50 +- clang/test/CodeGen/aarch64-vpcs.c | 8 +- clang/test/CodeGen/address-space-avr.c | 2 +- clang/test/CodeGen/address-space-field1.c | 2 +- clang/test/CodeGen/address-space.c | 16 +- clang/test/CodeGen/alias-avr.c | 2 +- clang/test/CodeGen/alias.c | 32 +- clang/test/CodeGen/align-param.c | 4 +- clang/test/CodeGen/aligned-sret.c | 2 +- clang/test/CodeGen/altivec.c | 12 +- clang/test/CodeGen/annotations-var.c | 6 +- clang/test/CodeGen/arc/arguments.c | 44 +- clang/test/CodeGen/arc/struct-align.c | 4 +- clang/test/CodeGen/arm-aapcs-vfp.c | 48 +- clang/test/CodeGen/arm-arguments.c | 130 ++-- clang/test/CodeGen/arm-bf16-params-returns.c | 12 +- clang/test/CodeGen/arm-cc.c | 10 +- clang/test/CodeGen/arm-cmse-attr.c | 8 +- clang/test/CodeGen/arm-float-helpers.c | 76 +- clang/test/CodeGen/arm-fp16-arguments.c | 24 +- clang/test/CodeGen/arm-homogenous.c | 2 +- clang/test/CodeGen/arm-interrupt-attr.c | 14 +- clang/test/CodeGen/arm-neon-directed-rounding.c | 30 +- clang/test/CodeGen/arm-neon-dot-product.c | 16 +- clang/test/CodeGen/arm-neon-fma.c | 8 +- clang/test/CodeGen/arm-neon-numeric-maxmin.c | 8 +- clang/test/CodeGen/arm-neon-vcvtX.c | 32 +- clang/test/CodeGen/arm-pcs.c | 2 +- clang/test/CodeGen/arm-swiftcall.c | 302 ++++---- clang/test/CodeGen/arm-target-attr.c | 8 +- clang/test/CodeGen/arm-varargs.c | 36 +- clang/test/CodeGen/arm-vector-arguments.c | 10 +- clang/test/CodeGen/arm-vfp16-arguments.c | 36 +- clang/test/CodeGen/arm-vfp16-arguments2.cpp | 30 +- clang/test/CodeGen/arm64-aapcs-arguments.c | 6 +- clang/test/CodeGen/arm64-arguments.c | 152 ++-- clang/test/CodeGen/arm64-mte.c | 26 +- clang/test/CodeGen/arm64_32-vaarg.c | 12 +- clang/test/CodeGen/arm64_32.c | 14 +- clang/test/CodeGen/arm64_vcopy.c | 20 +- clang/test/CodeGen/arm64_vdupq_n_f64.c | 12 +- clang/test/CodeGen/arm_function_epilog.cpp | 2 +- clang/test/CodeGen/armv7k-abi.c | 20 +- clang/test/CodeGen/asan-globals-alias.cpp | 8 +- clang/test/CodeGen/asm-goto.c | 12 +- clang/test/CodeGen/asm-label.c | 4 +- clang/test/CodeGen/asm-reg-var-local.c | 4 +- clang/test/CodeGen/assign.c | 4 +- clang/test/CodeGen/atomic-arm64.c | 10 +- clang/test/CodeGen/atomics-inlining.c | 10 +- .../test/CodeGen/attr-arm-sve-vector-bits-types.c | 284 ++++---- clang/test/CodeGen/attr-cpuspecific.c | 8 +- clang/test/CodeGen/attr-disable-tail-calls.c | 8 +- clang/test/CodeGen/attr-func-def.c | 4 +- clang/test/CodeGen/attr-leaf.c | 2 +- clang/test/CodeGen/attr-loader-uninitialized.c | 11 +- clang/test/CodeGen/attr-msp430.c | 2 +- clang/test/CodeGen/attr-naked.c | 6 +- clang/test/CodeGen/attr-nomerge.cpp | 2 +- clang/test/CodeGen/attr-target-mv-func-ptrs.c | 8 +- clang/test/CodeGen/attr-target-mv-va-args.c | 8 +- clang/test/CodeGen/attr-target-mv.c | 44 +- clang/test/CodeGen/attr-weak-import.c | 8 +- clang/test/CodeGen/attr-weakref.c | 4 +- clang/test/CodeGen/attr-weakref2.c | 4 +- clang/test/CodeGen/attr-x86-interrupt.c | 8 +- clang/test/CodeGen/attributes.c | 34 +- clang/test/CodeGen/available-externally-suppress.c | 4 +- clang/test/CodeGen/avr-builtins.c | 30 +- clang/test/CodeGen/avr/attributes/interrupt.c | 2 +- clang/test/CodeGen/avr/attributes/signal.c | 2 +- clang/test/CodeGen/bitfield-2.c | 16 +- clang/test/CodeGen/block-byref-aggr.c | 4 +- clang/test/CodeGen/blocks.c | 6 +- clang/test/CodeGen/bool-convert.c | 10 +- clang/test/CodeGen/bool-init.c | 2 +- clang/test/CodeGen/bool_test.c | 4 +- clang/test/CodeGen/builtin-align.c | 12 +- clang/test/CodeGen/builtin-complex.c | 8 +- clang/test/CodeGen/builtin-constant-p.c | 4 +- clang/test/CodeGen/builtin-expect.c | 12 +- clang/test/CodeGen/builtin-ms-noop.cpp | 8 +- clang/test/CodeGen/builtin-unpredictable.c | 2 +- clang/test/CodeGen/builtins-arm.c | 36 +- clang/test/CodeGen/builtins-memcpy-inline.c | 8 +- clang/test/CodeGen/builtins-ppc-altivec.c | 30 +- clang/test/CodeGen/builtins-ppc-crypto.c | 58 +- clang/test/CodeGen/builtins-ppc-htm.c | 2 +- clang/test/CodeGen/builtins-ppc-p7.c | 10 +- clang/test/CodeGen/builtins-ppc-p8vector.c | 2 +- clang/test/CodeGen/builtins-ppc-quadword.c | 2 +- clang/test/CodeGen/builtins-ppc-vsx.c | 4 +- clang/test/CodeGen/builtins-ppc.c | 2 +- clang/test/CodeGen/builtins.c | 34 +- clang/test/CodeGen/byval-memcpy-elim.c | 6 +- clang/test/CodeGen/c11atomics-ios.c | 10 +- clang/test/CodeGen/c11atomics.c | 14 +- ...-assumption-attribute-align_value-on-lvalue.cpp | 2 +- ...ssumption-attribute-align_value-on-paramvar.cpp | 4 +- ...-attribute-alloc_align-on-function-variable.cpp | 4 +- ...ssumption-attribute-alloc_align-on-function.cpp | 4 +- ...ibute-assume_aligned-on-function-two-params.cpp | 4 +- ...mption-attribute-assume_aligned-on-function.cpp | 4 +- ...uiltin_assume_aligned-three-params-variable.cpp | 2 +- ...umption-builtin_assume_aligned-three-params.cpp | 2 +- ...ssumption-builtin_assume_aligned-two-params.cpp | 2 +- .../CodeGen/catch-alignment-assumption-openmp.cpp | 2 +- ...-nullptr-and-nonzero-offset-in-offsetof-idiom.c | 4 +- ...tr-and-nonzero-offset-when-nullptr-is-defined.c | 2 +- .../CodeGen/catch-nullptr-and-nonzero-offset.c | 32 +- .../test/CodeGen/catch-pointer-overflow-volatile.c | 2 +- clang/test/CodeGen/catch-pointer-overflow.c | 16 +- .../test/CodeGen/cfi-icall-canonical-jump-tables.c | 4 +- clang/test/CodeGen/cfi-icall-cross-dso2.c | 2 +- clang/test/CodeGen/cfi-icall-generalize.c | 2 +- clang/test/CodeGen/cfstring-elf-cfbuild-x86_64.c | 4 +- clang/test/CodeGen/clang-sections-attribute.c | 10 +- clang/test/CodeGen/cleanup-destslot-simple.c | 2 +- clang/test/CodeGen/complex-indirect.c | 2 +- clang/test/CodeGen/complex-init-list.c | 6 +- clang/test/CodeGen/compound-literal.c | 12 +- clang/test/CodeGen/const-arithmetic.c | 4 +- clang/test/CodeGen/const-init.c | 44 +- clang/test/CodeGen/constructor-attribute.c | 8 +- clang/test/CodeGen/darwin-thread-specifier.c | 2 +- clang/test/CodeGen/decl-in-prototype.c | 4 +- clang/test/CodeGen/default-address-space.c | 18 +- clang/test/CodeGen/default-function-attr.c | 2 +- clang/test/CodeGen/designated-initializers.c | 16 +- clang/test/CodeGen/disable-tail-calls.c | 2 +- clang/test/CodeGen/dllexport-1.c | 6 +- clang/test/CodeGen/dso-local-executable.c | 6 +- clang/test/CodeGen/enable_if.c | 10 +- clang/test/CodeGen/enum-bool.cpp | 16 +- clang/test/CodeGen/exceptions-strictfp.c | 4 +- clang/test/CodeGen/exceptions.c | 4 +- clang/test/CodeGen/exprs.c | 16 +- clang/test/CodeGen/ext-int-cc.c | 404 +++++------ clang/test/CodeGen/ext-int-sanitizer.cpp | 20 +- clang/test/CodeGen/fixed-point-tbaa.c | 12 +- clang/test/CodeGen/flatten.c | 2 +- clang/test/CodeGen/flexible-array-init.c | 4 +- clang/test/CodeGen/fp-floatcontrol-pragma.cpp | 10 +- clang/test/CodeGen/fp-function-attrs.cpp | 6 +- clang/test/CodeGen/fp-strictfp-exp.cpp | 2 +- clang/test/CodeGen/fp-strictfp.cpp | 2 +- clang/test/CodeGen/fp16-ops-strictfp.c | 4 +- clang/test/CodeGen/fp16-ops.c | 4 +- clang/test/CodeGen/func-aligned.c | 2 +- clang/test/CodeGen/func-return-member.c | 6 +- clang/test/CodeGen/function-attributes.c | 30 +- clang/test/CodeGen/functions.c | 8 +- clang/test/CodeGen/global-init.c | 10 +- clang/test/CodeGen/iamcu-abi.c | 8 +- clang/test/CodeGen/incomplete-function-type-2.c | 2 +- clang/test/CodeGen/incomplete-function-type.c | 2 +- clang/test/CodeGen/init-memset.c | 16 +- clang/test/CodeGen/init.c | 14 +- clang/test/CodeGen/inline.c | 54 +- clang/test/CodeGen/inline2.c | 40 +- clang/test/CodeGen/integer-overflow.c | 6 +- clang/test/CodeGen/lanai-arguments.c | 22 +- clang/test/CodeGen/le32-arguments.c | 18 +- clang/test/CodeGen/le32-libcall-pow.c | 2 +- clang/test/CodeGen/le32-vaarg.c | 6 +- clang/test/CodeGen/libcalls.c | 14 +- clang/test/CodeGen/lifetime-debuginfo-1.c | 2 +- clang/test/CodeGen/lifetime-debuginfo-2.c | 2 +- clang/test/CodeGen/link-bitcode-file.c | 6 +- clang/test/CodeGen/long-call-attr.c | 4 +- clang/test/CodeGen/long_double_fp128.cpp | 14 +- clang/test/CodeGen/malign-double-x86-nacl.c | 6 +- clang/test/CodeGen/malign-double.cpp | 66 +- clang/test/CodeGen/mangle-windows.c | 16 +- clang/test/CodeGen/matrix-type-builtins.c | 46 +- clang/test/CodeGen/matrix-type-operators.c | 34 +- clang/test/CodeGen/matrix-type.c | 18 +- clang/test/CodeGen/mcu-struct-return.c | 12 +- clang/test/CodeGen/mdouble.c | 8 +- .../CodeGen/memcpy-no-nobuiltin-if-not-emitted.c | 2 +- .../CodeGen/memcpy-no-nobuiltin-if-not-emitted.cpp | 2 +- clang/test/CodeGen/micromips-attr.c | 4 +- clang/test/CodeGen/microsoft-call-conv.c | 14 +- clang/test/CodeGen/mips-byval-arg.c | 4 +- clang/test/CodeGen/mips-interrupt-attr.c | 18 +- clang/test/CodeGen/mips-transparent-union.c | 2 +- clang/test/CodeGen/mips-varargs.c | 16 +- clang/test/CodeGen/mips-vector-arg.c | 8 +- clang/test/CodeGen/mips-zero-sized-struct.c | 6 +- clang/test/CodeGen/mips16-attr.c | 4 +- clang/test/CodeGen/mips64-class-return.cpp | 8 +- clang/test/CodeGen/mips64-padding-arg.c | 10 +- clang/test/CodeGen/mms-bitfields.c | 4 +- clang/test/CodeGen/mrtd.c | 6 +- clang/test/CodeGen/ms-inline-asm-align.c | 2 +- clang/test/CodeGen/ms-inline-asm.c | 50 +- clang/test/CodeGen/ms-inline-asm.cpp | 20 +- clang/test/CodeGen/ms_abi.c | 8 +- clang/test/CodeGen/ms_abi_aarch64.c | 4 +- clang/test/CodeGen/ms_struct-bitfield.c | 52 +- clang/test/CodeGen/no-bitfield-type-align.c | 2 +- clang/test/CodeGen/no-builtin.cpp | 18 +- clang/test/CodeGen/no-opt-volatile-memcpy.c | 4 +- clang/test/CodeGen/nodebug-attr.c | 2 +- clang/test/CodeGen/noduplicate-cxx11-test.cpp | 2 +- clang/test/CodeGen/nonnull.c | 36 +- clang/test/CodeGen/nvptx-abi.c | 2 +- clang/test/CodeGen/object-size.c | 32 +- clang/test/CodeGen/object-size.cpp | 4 +- clang/test/CodeGen/packed-arrays.c | 54 +- clang/test/CodeGen/packed-structure.c | 40 +- clang/test/CodeGen/partial-reinitialization1.c | 4 +- clang/test/CodeGen/pass-by-value-noalias.c | 4 +- clang/test/CodeGen/pass-object-size.c | 72 +- clang/test/CodeGen/patchable-function-entry.c | 16 +- clang/test/CodeGen/powerpc-c99complex.c | 14 +- clang/test/CodeGen/powerpc_types.c | 6 +- clang/test/CodeGen/ppc-aggregate-abi.cpp | 36 +- clang/test/CodeGen/ppc-signbit.c | 2 +- clang/test/CodeGen/ppc32-and-aix-struct-return.c | 40 +- clang/test/CodeGen/ppc32-dwarf.c | 2 +- clang/test/CodeGen/ppc64-align-struct.c | 26 +- clang/test/CodeGen/ppc64-complex-parms.c | 34 +- clang/test/CodeGen/ppc64-complex-return.c | 36 +- clang/test/CodeGen/ppc64-dwarf.c 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+- clang/test/CodeGenCUDA/device-fun-linkage.cu | 2 +- clang/test/CodeGenCUDA/device-stub.cu | 4 +- clang/test/CodeGenCUDA/device-var-init.cu | 116 +-- clang/test/CodeGenCUDA/device-vtable.cu | 12 +- clang/test/CodeGenCUDA/function-overload.cu | 2 +- clang/test/CodeGenCUDA/kernel-amdgcn.cu | 10 +- clang/test/CodeGenCUDA/kernel-args.cu | 16 +- clang/test/CodeGenCUDA/kernel-dbg-info.cu | 2 +- clang/test/CodeGenCUDA/lambda.cu | 10 +- clang/test/CodeGenCUDA/library-builtin.cu | 2 +- clang/test/CodeGenCUDA/link-device-bitcode.cu | 6 +- clang/test/CodeGenCUDA/nothrow.cu | 10 +- clang/test/CodeGenCUDA/propagate-metadata.cu | 2 +- clang/test/CodeGenCUDA/ptx-kernels.cu | 8 +- clang/test/CodeGenCUDA/static-device-var-no-rdc.cu | 12 +- clang/test/CodeGenCUDA/surface.cu | 2 +- clang/test/CodeGenCUDA/texture.cu | 4 +- clang/test/CodeGenCUDA/types.cu | 4 +- .../CodeGenCXX/2009-05-04-PureConstNounwind.cpp | 2 +- .../test/CodeGenCXX/2011-12-19-init-list-ctor.cpp | 2 +- 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llvm/lib/CodeGen/IfConversion.cpp | 3 +- llvm/lib/CodeGen/LowerEmuTLS.cpp | 1 + llvm/lib/CodeGen/MachineBlockPlacement.cpp | 4 +- llvm/lib/CodeGen/MachineSink.cpp | 3 +- llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp | 2 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 4 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 59 +- llvm/lib/CodeGen/SjLjEHPrepare.cpp | 2 +- llvm/lib/CodeGen/TailDuplicator.cpp | 3 +- llvm/lib/CodeGen/WasmEHPrepare.cpp | 2 +- llvm/lib/IR/Attributes.cpp | 18 + llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 3 +- llvm/lib/Target/BPF/BPFAdjustOpt.cpp | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 228 ++++++ llvm/lib/Target/TargetMachine.cpp | 10 - llvm/lib/Target/X86/X86ExpandPseudo.cpp | 6 + llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 12 + llvm/lib/Target/X86/X86ISelLowering.cpp | 7 +- llvm/lib/Target/X86/X86ISelLowering.h | 2 +- llvm/lib/Target/X86/X86InstrAMX.td | 3 + llvm/lib/Target/X86/X86PreTileConfig.cpp | 2 + llvm/lib/Target/X86/X86RegisterInfo.cpp | 1 + llvm/lib/Transforms/IPO/FunctionImport.cpp | 10 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 2 + .../Transforms/InstCombine/InstCombineAddSub.cpp | 16 + .../Transforms/Instrumentation/InstrProfiling.cpp | 2 +- .../Transforms/Instrumentation/PGOMemOPSizeOpt.cpp | 2 +- .../X86/masked-intrinsic-cost-inseltpoison.ll | 28 +- .../CostModel/X86/uniformshift-inseltpoison.ll | 6 +- .../CostModel/X86/vector_gep-inseltpoison.ll | 2 +- .../CostModel/X86/vshift-ashr-cost-inseltpoison.ll | 204 +++--- .../CostModel/X86/vshift-lshr-cost-inseltpoison.ll | 204 +++--- .../CostModel/X86/vshift-shl-cost-inseltpoison.ll | 204 +++--- .../Analysis/ScalarEvolution/exit-count-select.ll | 312 ++++++++ .../ScalarEvolution/trip-count-andor-selectform.ll | 366 ++++++++++ .../GlobalISel/irtranslator-condbr-lower-tree.ll | 80 ++ .../AArch64/GlobalISel/legalize-blockaddress.mir | 4 +- .../AArch64/GlobalISel/select-blockaddress.mir | 4 +- .../AArch64/GlobalISel/select-gv-cmodel-large.mir | 6 +- .../AArch64/GlobalISel/select-gv-cmodel-tiny.mir | 6 +- .../CodeGen/AArch64/GlobalISel/select-static.mir | 18 +- .../AArch64/GlobalISel/sext-inreg-ldrow-16b.mir | 4 +- llvm/test/CodeGen/AArch64/aarch64-be-bv.ll | 90 +-- llvm/test/CodeGen/AArch64/addsub_ext.ll | 34 +- llvm/test/CodeGen/AArch64/and-sink.ll | 12 +- llvm/test/CodeGen/AArch64/arm64-aapcs.ll | 24 +- .../CodeGen/AArch64/arm64-custom-call-saved-reg.ll | 6 +- llvm/test/CodeGen/AArch64/arm64-fp128.ll | 36 +- llvm/test/CodeGen/AArch64/arm64-ldxr-stxr.ll | 44 +- .../test/CodeGen/AArch64/arm64-misched-multimmo.ll | 6 +- .../CodeGen/AArch64/arm64-sitofp-combine-chains.ll | 4 +- llvm/test/CodeGen/AArch64/arm64-variadic-aapcs.ll | 16 +- llvm/test/CodeGen/AArch64/arm64_32.ll | 17 + llvm/test/CodeGen/AArch64/atomic-ops-lse.ll | 806 ++++++++++----------- llvm/test/CodeGen/AArch64/atomic-ops.ll | 124 ++-- llvm/test/CodeGen/AArch64/bitfield.ll | 30 +- llvm/test/CodeGen/AArch64/bool-loads.ll | 10 +- llvm/test/CodeGen/AArch64/breg.ll | 4 +- llvm/test/CodeGen/AArch64/call-rv-marker.ll | 16 +- llvm/test/CodeGen/AArch64/cmpxchg-O0.ll | 2 +- llvm/test/CodeGen/AArch64/code-model-large-abs.ll | 20 +- llvm/test/CodeGen/AArch64/code-model-tiny-abs.ll | 20 +- .../CodeGen/AArch64/fast-isel-branch-cond-split.ll | 36 + llvm/test/CodeGen/AArch64/fcopysign.ll | 6 +- llvm/test/CodeGen/AArch64/func-argpassing.ll | 42 +- llvm/test/CodeGen/AArch64/func-calls.ll | 32 +- llvm/test/CodeGen/AArch64/global-alignment.ll | 20 +- llvm/test/CodeGen/AArch64/global-merge-2.ll | 10 +- llvm/test/CodeGen/AArch64/global-merge-3.ll | 6 +- llvm/test/CodeGen/AArch64/i1-contents.ll | 10 +- llvm/test/CodeGen/AArch64/irg_sp_tagp.ll | 14 +- llvm/test/CodeGen/AArch64/ldst-unscaledimm.ll | 24 +- llvm/test/CodeGen/AArch64/ldst-unsignedimm.ll | 32 +- llvm/test/CodeGen/AArch64/literal_pools_float.ll | 6 +- llvm/test/CodeGen/AArch64/misched-fusion-addr.ll | 34 +- llvm/test/CodeGen/AArch64/misched-fusion-lit.ll | 8 +- llvm/test/CodeGen/AArch64/movw-shift-encoding.ll | 4 +- llvm/test/CodeGen/AArch64/pie.ll | 4 +- llvm/test/CodeGen/AArch64/sibling-call.ll | 18 +- .../AArch64/{tiny_model.ll => tiny-model-pic.ll} | 31 +- .../{tiny_model.ll => tiny-model-static.ll} | 188 +---- llvm/test/CodeGen/AArch64/zero-reg.ll | 8 +- llvm/test/CodeGen/ARM/aeabi-read-tp.ll | 4 +- .../CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll | 8 +- .../CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll | 8 +- .../CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll | 8 +- llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll | 87 +-- llvm/test/CodeGen/ARM/fast-isel-pie.ll | 4 +- llvm/test/CodeGen/ARM/global-merge-alignment.ll | 6 +- llvm/test/CodeGen/ARM/global-merge-external-2.ll | 12 +- llvm/test/CodeGen/ARM/global-merge-external.ll | 14 +- llvm/test/CodeGen/ARM/ldm-base-writeback.ll | 8 +- llvm/test/CodeGen/ARM/pie.ll | 4 +- llvm/test/CodeGen/ARM/tls1.ll | 6 +- llvm/test/CodeGen/Hexagon/tls_static.ll | 8 +- llvm/test/CodeGen/Mips/tls-static.ll | 82 +++ llvm/test/CodeGen/Mips/tls.ll | 58 +- llvm/test/CodeGen/PowerPC/dsolocal-static.ll | 14 +- llvm/test/CodeGen/RISCV/double-mem.ll | 16 +- llvm/test/CodeGen/RISCV/float-mem.ll | 14 +- llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll | 44 +- llvm/test/CodeGen/RISCV/half-mem.ll | 6 +- llvm/test/CodeGen/RISCV/mem.ll | 26 +- llvm/test/CodeGen/RISCV/mem64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 397 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 541 ++++++++++++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 541 ++++++++++++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 541 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 325 +++++++++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 181 +++++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 181 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 325 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 422 ++++++++++- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 378 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll | 422 ++++++++++- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll | 378 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll | 547 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll | 757 +++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll | 547 ++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll | 757 +++++++++++++++++++ llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll | 8 +- llvm/test/CodeGen/SystemZ/and-08.ll | 62 +- llvm/test/CodeGen/SystemZ/branch-06.ll | 24 +- llvm/test/CodeGen/SystemZ/int-cmp-36.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-37.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-38.ll | 18 +- llvm/test/CodeGen/SystemZ/int-cmp-39.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-40.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-41.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-42.ll | 16 +- llvm/test/CodeGen/SystemZ/int-cmp-43.ll | 16 +- llvm/test/CodeGen/SystemZ/int-move-08.ll | 40 +- llvm/test/CodeGen/SystemZ/int-move-09.ll | 52 +- llvm/test/CodeGen/SystemZ/int-move-10.ll | 46 +- llvm/test/CodeGen/SystemZ/la-01.ll | 26 +- llvm/test/CodeGen/SystemZ/memcpy-02.ll | 76 +- llvm/test/CodeGen/SystemZ/pie.ll | 4 +- llvm/test/CodeGen/SystemZ/prefetch-01.ll | 18 +- llvm/test/CodeGen/SystemZ/spill-01.ll | 64 +- llvm/test/CodeGen/SystemZ/tls-01.ll | 4 +- llvm/test/CodeGen/Thumb2/tls1.ll | 6 +- llvm/test/CodeGen/WebAssembly/offset-folding.ll | 14 +- llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll | 4 +- .../CodeGen/X86/2010-08-04-MaskedSignedCompare.ll | 6 +- llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll | 8 +- llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll | 38 + llvm/test/CodeGen/X86/GlobalISel/GV.ll | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-GV-32.mir | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-GV-64.mir | 6 +- llvm/test/CodeGen/X86/abi-isel.ll | 658 ++++++++--------- llvm/test/CodeGen/X86/atomic-fp.ll | 22 +- llvm/test/CodeGen/X86/avx-vzeroupper.ll | 4 +- llvm/test/CodeGen/X86/avx2-gather.ll | 2 +- .../CodeGen/X86/avx512-gather-scatter-intrin.ll | 68 +- llvm/test/CodeGen/X86/avx512-regcall-Mask.ll | 38 +- llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll | 58 +- llvm/test/CodeGen/X86/backpropmask.ll | 12 +- llvm/test/CodeGen/X86/break-false-dep.ll | 34 +- llvm/test/CodeGen/X86/bswap.ll | 12 +- llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll | 6 +- llvm/test/CodeGen/X86/cast-vsel.ll | 14 +- llvm/test/CodeGen/X86/cmov-double.ll | 8 +- llvm/test/CodeGen/X86/cmovcmov.ll | 12 +- llvm/test/CodeGen/X86/cmp.ll | 46 +- llvm/test/CodeGen/X86/copy-eflags.ll | 18 +- llvm/test/CodeGen/X86/critical-edge-split-2.ll | 4 +- llvm/test/CodeGen/X86/dbg-changes-codegen.ll | 10 +- llvm/test/CodeGen/X86/emutls-pie.ll | 12 +- llvm/test/CodeGen/X86/emutls.ll | 36 +- llvm/test/CodeGen/X86/fmf-flags.ll | 14 +- llvm/test/CodeGen/X86/fold-add.ll | 8 +- llvm/test/CodeGen/X86/fp128-cast-strict.ll | 28 +- llvm/test/CodeGen/X86/fp128-cast.ll | 72 +- llvm/test/CodeGen/X86/fp128-g.ll | 2 +- llvm/test/CodeGen/X86/fp128-i128.ll | 10 +- llvm/test/CodeGen/X86/fp128-libcalls.ll | 42 +- llvm/test/CodeGen/X86/fp128-load.ll | 2 +- llvm/test/CodeGen/X86/fp128-store.ll | 4 +- llvm/test/CodeGen/X86/ga-offset.ll | 6 +- llvm/test/CodeGen/X86/global-access-pie.ll | 22 +- llvm/test/CodeGen/X86/hoist-spill-lpad.ll | 4 +- llvm/test/CodeGen/X86/immediate_merging.ll | 28 +- llvm/test/CodeGen/X86/inline-asm-h.ll | 4 +- llvm/test/CodeGen/X86/lea-recursion.ll | 6 +- llvm/test/CodeGen/X86/linux-preemption.ll | 24 +- llvm/test/CodeGen/X86/load-partial.ll | 6 +- llvm/test/CodeGen/X86/lsr-sort.ll | 4 +- llvm/test/CodeGen/X86/mempcpy.ll | 4 +- llvm/test/CodeGen/X86/min-legal-vector-width.ll | 74 +- llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll | 4 +- llvm/test/CodeGen/X86/musttail-tailcc.ll | 8 +- llvm/test/CodeGen/X86/narrow_op-1.ll | 6 +- llvm/test/CodeGen/X86/peephole-fold-movsd.ll | 4 +- llvm/test/CodeGen/X86/pie.ll | 8 +- llvm/test/CodeGen/X86/pr22774.ll | 6 +- llvm/test/CodeGen/X86/pr31956.ll | 4 +- llvm/test/CodeGen/X86/pr32282.ll | 10 +- llvm/test/CodeGen/X86/pr33290.ll | 8 +- llvm/test/CodeGen/X86/pr34629.ll | 6 +- llvm/test/CodeGen/X86/pr34634.ll | 10 +- llvm/test/CodeGen/X86/pr35761.ll | 8 +- llvm/test/CodeGen/X86/pr35763.ll | 6 +- llvm/test/CodeGen/X86/pr35765.ll | 10 +- llvm/test/CodeGen/X86/pr36312.ll | 8 +- llvm/test/CodeGen/X86/pr37826.ll | 10 +- llvm/test/CodeGen/X86/pr38217.ll | 4 +- llvm/test/CodeGen/X86/pr38803.ll | 8 +- llvm/test/CodeGen/X86/pr38865.ll | 4 +- llvm/test/CodeGen/X86/pr43866.ll | 4 +- llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll | 20 +- llvm/test/CodeGen/X86/sad.ll | 28 +- llvm/test/CodeGen/X86/shift-combine.ll | 24 +- llvm/test/CodeGen/X86/shrink-compare-pgso.ll | 28 +- llvm/test/CodeGen/X86/shrink-compare.ll | 28 +- llvm/test/CodeGen/X86/sibcall.ll | 36 +- ...peculative-execution-side-effect-suppression.ll | 8 +- .../X86/speculative-load-hardening-indirect.ll | 20 +- llvm/test/CodeGen/X86/splat-for-size.ll | 2 +- llvm/test/CodeGen/X86/stores-merging.ll | 56 +- llvm/test/CodeGen/X86/subvector-broadcast.ll | 20 +- llvm/test/CodeGen/X86/swift-return.ll | 10 +- llvm/test/CodeGen/X86/tail-opts.ll | 30 +- llvm/test/CodeGen/X86/tailcall-disable.ll | 6 +- llvm/test/CodeGen/X86/tailcall-tailcc.ll | 12 +- llvm/test/CodeGen/X86/tailcall.ll | 12 +- llvm/test/CodeGen/X86/test-shrink-bug.ll | 6 +- llvm/test/CodeGen/X86/tls-pie.ll | 10 +- llvm/test/CodeGen/X86/tls.ll | 42 +- llvm/test/CodeGen/X86/trunc-and.ll | 4 +- llvm/test/CodeGen/X86/undef-label.ll | 4 +- llvm/test/CodeGen/X86/vec-loadsingles-alignment.ll | 6 +- llvm/test/CodeGen/X86/widen_load-1.ll | 4 +- llvm/test/CodeGen/X86/x86-64-intrcc.ll | 6 +- llvm/test/CodeGen/X86/xor-select-i1-combine.ll | 8 +- llvm/test/CodeGen/X86/xray-tail-call-sled.ll | 4 +- llvm/test/CodeGen/XCore/codemodel.ll | 16 +- llvm/test/DebugInfo/X86/debug-loc-frame.ll | 10 +- llvm/test/DebugInfo/X86/live-debug-values.ll | 4 +- .../DebugInfo/X86/machinecse-wrongdebug-hoist.ll | 6 +- llvm/test/MC/AArch64/elf-globaladdress.ll | 14 +- llvm/test/MC/PowerPC/ppc64-encoding-ext.s | 10 + llvm/test/MC/X86/intel-syntax-var-offset.ll | 14 +- llvm/test/ThinLTO/X86/visibility-elf.ll | 137 ++++ llvm/test/ThinLTO/X86/visibility-macho.ll | 91 +++ llvm/test/Transforms/IROutliner/illegal-gep.ll | 6 +- .../outlining-compatible-and-attribute-transfer.ll | 126 ++++ .../outlining-compatible-or-attribute-transfer.ll | 67 ++ llvm/test/Transforms/InstCombine/sub.ll | 88 +++ llvm/test/Transforms/SimplifyCFG/switch_create.ll | 45 ++ .../Inputs/aarch64_generated_funcs.ll | 6 +- .../aarch64_generated_funcs.ll.generated.expected | 6 +- ...aarch64_generated_funcs.ll.nogenerated.expected | 6 +- .../Inputs/amdgpu_generated_funcs.ll | 6 +- .../amdgpu_generated_funcs.ll.generated.expected | 18 +- .../amdgpu_generated_funcs.ll.nogenerated.expected | 18 +- .../Inputs/arm_generated_funcs.ll | 4 +- .../arm_generated_funcs.ll.generated.expected | 4 +- .../arm_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/hexagon_generated_funcs.ll | 4 +- .../hexagon_generated_funcs.ll.generated.expected | 4 +- ...hexagon_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/lanai_generated_funcs.ll | 4 +- .../lanai_generated_funcs.ll.generated.expected | 12 +- .../lanai_generated_funcs.ll.nogenerated.expected | 12 +- .../Inputs/mips_generated_funcs.ll | 4 +- .../mips_generated_funcs.ll.generated.expected | 4 +- .../mips_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/msp430_generated_funcs.ll | 4 +- .../msp430_generated_funcs.ll.generated.expected | 4 +- .../msp430_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/on_the_fly_arg_change.ll | 6 +- .../Inputs/on_the_fly_arg_change.ll.expected | 6 +- .../Inputs/ppc_generated_funcs.ll | 4 +- .../ppc_generated_funcs.ll.generated.expected | 4 +- .../ppc_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/sparc_generated_funcs.ll | 4 +- .../sparc_generated_funcs.ll.generated.expected | 4 +- .../sparc_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/systemz_generated_funcs.ll | 6 +- .../systemz_generated_funcs.ll.generated.expected | 6 +- ...systemz_generated_funcs.ll.nogenerated.expected | 6 +- .../Inputs/wasm_generated_funcs.ll | 4 +- .../wasm_generated_funcs.ll.generated.expected | 4 +- .../wasm_generated_funcs.ll.nogenerated.expected | 4 +- .../Inputs/x86_generated_funcs.ll | 6 +- .../x86_generated_funcs.ll.generated.expected | 6 +- .../x86_generated_funcs.ll.nogenerated.expected | 6 +- llvm/tools/llvm-objcopy/COFF/Object.cpp | 39 +- .../Analysis/IRSimilarityIdentifierTest.cpp | 101 ++- mlir/cmake/modules/AddMLIRPythonExtension.cmake | 4 + mlir/lib/Bindings/Python/CMakeLists.txt | 18 +- mlir/lib/Bindings/Python/mlir/__init__.py | 27 +- .../Bindings/Python/mlir/transforms/__init__.py | 4 +- mlir/test/Pass/run-reproducer.mlir | 2 +- openmp/runtime/cmake/LibompHandleFlags.cmake | 1 + openmp/runtime/cmake/config-ix.cmake | 1 + openmp/runtime/src/kmp.h | 114 ++- openmp/runtime/src/kmp_affinity.cpp | 17 +- openmp/runtime/src/kmp_affinity.h | 54 +- openmp/runtime/src/kmp_alloc.cpp | 5 +- openmp/runtime/src/kmp_atomic.cpp | 6 +- openmp/runtime/src/kmp_barrier.cpp | 4 +- openmp/runtime/src/kmp_csupport.cpp | 28 +- openmp/runtime/src/kmp_dispatch.cpp | 33 +- openmp/runtime/src/kmp_dispatch_hier.h | 14 +- openmp/runtime/src/kmp_environment.cpp | 7 +- openmp/runtime/src/kmp_ftn_entry.h | 8 +- openmp/runtime/src/kmp_gsupport.cpp | 12 +- openmp/runtime/src/kmp_i18n.h | 2 +- openmp/runtime/src/kmp_itt.inl | 5 +- openmp/runtime/src/kmp_lock.cpp | 4 +- openmp/runtime/src/kmp_runtime.cpp | 23 +- openmp/runtime/src/kmp_settings.cpp | 14 +- openmp/runtime/src/kmp_stats.cpp | 35 +- openmp/runtime/src/kmp_stats.h | 2 +- openmp/runtime/src/kmp_str.cpp | 9 +- openmp/runtime/src/kmp_str.h | 4 +- openmp/runtime/src/kmp_stub.cpp | 6 +- openmp/runtime/src/kmp_stub.h | 4 +- openmp/runtime/src/kmp_taskdeps.cpp | 11 +- openmp/runtime/src/kmp_tasking.cpp | 13 +- openmp/runtime/src/kmp_threadprivate.cpp | 5 +- openmp/runtime/src/kmp_utility.cpp | 2 +- openmp/runtime/src/kmp_wait_release.h | 6 +- openmp/runtime/src/ompt-specific.cpp | 2 +- openmp/runtime/src/z_Linux_util.cpp | 38 +- 1358 files changed, 34699 insertions(+), 11458 deletions(-) create mode 100644 llvm/test/Analysis/ScalarEvolution/exit-count-select.ll create mode 100644 llvm/test/Analysis/ScalarEvolution/trip-count-andor-selectform.ll copy llvm/test/CodeGen/AArch64/{tiny_model.ll => tiny-model-pic.ll} (91%) rename llvm/test/CodeGen/AArch64/{tiny_model.ll => tiny-model-static.ll} (54%) create mode 100644 llvm/test/CodeGen/Mips/tls-static.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll create mode 100644 llvm/test/ThinLTO/X86/visibility-elf.ll create mode 100644 llvm/test/ThinLTO/X86/visibility-macho.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-compatible-and-attrib [...] create mode 100644 llvm/test/Transforms/IROutliner/outlining-compatible-or-attribu [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (5b9fe36e3 -> c5ffe1765)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 5b9fe36e3 0: update: llvm-linux-qemu: boot new c5ffe1765 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5b9fe36e3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 420 +- 03-build_llvm/console.log | 13752 +++++++++++------------ 04-build_linux/console.log | 800 +- 05-build_abe-qemu/console.log | 6683 ++++++------ 06-boot_linux/console.log | 416 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 22241 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 10 files changed, 22242 insertions(+), 22252 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (8abe76251ff -> 17cc02478ea)

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (17c2dc6691 -> 20a201933c)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/binutils-gdb. from 17c2dc6691 Automatic date update in version.in adds 20a201933c Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (2918b6cd4 -> 72925e610)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/base-artifacts. discards 2918b6cd4 0: update: binutils-gcc-linux-qemu: boot new 72925e610 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (2918b6cd4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-prepare_abe/console.log | 440 +- 03-build_abe-binutils/console.log | 11290 +++++------ 04-build_abe-stage1/console.log | 13346 ++++++------- 05-build_linux/console.log | 664 +- 06-build_abe-qemu/console.log | 4535 ++--- 07-boot_linux/console.log | 488 +- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 12 +- 09-update_baseline/results.regressions | 2 +- console.log | 31037 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 13 files changed, 31012 insertions(+), 31010 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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