Tcwg-commits March 2020

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11017 discussions

[gcc] branch master updated (a50f6abffc3 -> 5db0eb95c34)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from a50f6abffc3 [ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with [...] new 5db0eb95c34 [ARM][GCC][2/1x]: MVE intrinsics with unary operand. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 49 +++++++++ gcc/config/arm/arm-builtins.c | 36 ++++++ gcc/config/arm/arm_mve.h | 122 +++++++++++++++++++++ gcc/config/arm/arm_mve_builtins.def | 6 + gcc/config/arm/mve.md | 55 +++++++++- gcc/testsuite/ChangeLog | 19 ++++ .../intrinsics/{vrev32q_f16.c => vcvtq_s16_f16.c} | 6 +- .../intrinsics/{vnegq_f32.c => vcvtq_s32_f32.c} | 6 +- .../intrinsics/{vrev32q_f16.c => vcvtq_u16_f16.c} | 6 +- .../intrinsics/{vabsq_f32.c => vcvtq_u32_f32.c} | 6 +- .../gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c | 14 +++ .../gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c | 14 +++ .../gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c | 14 +++ .../gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c | 14 +++ .../gcc.target/arm/mve/intrinsics/vrev64q_s16.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_s32.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_s8.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_u16.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_u32.c | 22 ++++ .../gcc.target/arm/mve/intrinsics/vrev64q_u8.c | 22 ++++ 20 files changed, 485 insertions(+), 14 deletions(-) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev32q_f16.c => vcvtq_s16_f16.c} (69%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vnegq_f32.c => vcvtq_s32_f32.c} (69%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vrev32q_f16.c => vcvtq_u16_f16.c} (68%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_f32.c => vcvtq_u32_f32.c} (68%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-check_binutils updated (a9ca89e3dd -> b9414a8064)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-check_binutils in repository toolchain/ci/binutils-gdb. from a9ca89e3dd gas, arm: PR25660L Fix vadd/vsub with lt and le condition co [...] adds b9414a8064 gas, arm: Fix bad backport No new revisions were added by this update. Summary of changes: gas/config/tc-arm.c | 1 - 1 file changed, 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-check_binutils updated (15fedf693 -> a632ece2e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-check_binutils in repository toolchain/ci/base-artifacts. discards 15fedf693 3: update: binutils-a9ca89e3dd83553b4cee4350740beac38a506287: 1 new a632ece2e 3: update: binutils-b9414a8064c4e10c469ef5e0aebbf46c9fbdcf80: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (15fedf693) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 60 +- 02-prepare_abe/console.log | 402 +- 03-build_abe-check_binutils/console.log | 11518 +++++---- 04-build_abe-check_binutils-check/console.log | 16407 +++++++------ 05-check_regression/console.log | 382 +- 06-update_baseline/console.log | 1413 +- console.log | 30110 ++++++++++++------------ jenkins/manifest.sh | 10 +- regressions.txt | 2 +- sumfiles/binutils.sum | 2 +- sumfiles/gas.sum | 2 +- sumfiles/ld.sum | 2 +- 12 files changed, 30115 insertions(+), 30195 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[gcc] branch master updated (14782c8123e -> a50f6abffc3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 14782c8123e [ARM][GCC][4/x]: MVE ACLE vector interleaving store intrinsics. new a50f6abffc3 [ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 91 +++++++ gcc/config/arm/arm-builtins.c | 22 ++ gcc/config/arm/arm_mve.h | 293 +++++++++++++++++++++ gcc/config/arm/arm_mve_builtins.def | 15 ++ gcc/config/arm/mve.md | 207 ++++++++++++++- gcc/testsuite/ChangeLog | 32 +++ .../gcc.target/arm/mve/intrinsics/vabsq_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vabsq_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c | 14 + .../gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c | 14 + .../gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c | 14 + .../gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c | 14 + .../gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vdupq_n_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vdupq_n_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vnegq_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vnegq_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vrev32q_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vrev64q_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vrev64q_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndaq_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndaq_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndmq_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndmq_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndnq_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndnq_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndpq_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndpq_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndq_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndq_f32.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndxq_f16.c | 14 + .../gcc.target/arm/mve/intrinsics/vrndxq_f32.c | 14 + 33 files changed, 1037 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/llvm-583-blx created (now 50198d61fe2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. prathamesh.kulkarni pushed a change to branch linaro-local/llvm-583-blx in repository toolchain/ci/llvm-project. at 50198d61fe2 Prefer indirect call for Thumb-1, if number of args is less [...] This branch includes the following new commits: new 50198d61fe2 Prefer indirect call for Thumb-1, if number of args is less [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/llvm-583-blx-base created (now e0ab0e6a281)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. prathamesh.kulkarni pushed a change to branch linaro-local/llvm-583-blx-base in repository toolchain/ci/llvm-project. at e0ab0e6a281 [MIPS] Implement PUL.PS and PUU.PS instructions No new revisions were added by this update. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (429d792f23f -> 409cf4b7bf5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/llvm-project. from 429d792f23f [mlir] Add support for generating dialect declarations via [...] adds 650f363bd75 [ValueLattice] Add singlecrfromundef lattice value. adds 56418042981 [DAG] MatchRotate - Add funnel shift by variable support adds 8105935d3aa [TypeSize] Allow returning scalable size in implicit conver [...] adds 5087ace6519 [Clang][SVE] Parse builtin type string for scalable vectors adds caef4a81c93 [AVR] Make helper functions static. NFC. adds 5cc9dea78a3 [tblgen] Remove unused private field. NFC. adds 775bf626982 [SystemZ] Regenerate rotate/shift tests adds 1ec395523d8 [Thumb2] Regenerate rotate tests adds 3ffb5ef7b03 [PowerPC] Regenerate rotate tests adds de5b2cfdd46 AMDGPU/GlobalISel: Add baseline test for mul adds 79cda46e49b AMDGPU/GlobalISel: Add baseline test for mul adds d09a46cdbc8 [gn build] (manually) port 5087ace6519 adds a1e940b1853 [Driver][test] Add a specific test file for -fmerge-all-constants adds 47df2220a27 [gn build] (manually) port 5087ace6519 more adds de0011abf58 [gn build] Port 5087ace6519 adds fe6037172b9 AMDGPU/GlobalISel: Add more tests for G_SADDE/G_SSUBE adds ce33926342c AMDGPU/GlobalISel: Remove -global-isel-abort=0 from some tests adds d3851332493 [llvm-objdump][test] Move {AArch64,X86}/macho-* to MachO/ adds 98f2bb44610 [ORC] Enable JITEventListeners in the RTDyldObjectLinkingLayer. adds b1cdada023a [llvm-objdump][test] Move {AArch64,ARM}/* to ELF/ARM/ or Ma [...] adds 7f5b8115acb [gn build] don't repeat arm header targets twice. no behavi [...] adds 9c5771710e6 Revert "[ORC] Enable JITEventListeners in the RTDyldObjectL [...] adds 6ed18eaa777 [llvm-objdump][test] Change llvm-objdump tests to use doubl [...] adds 7f6b25ad1bb [compiler-rt] [netbsd] Add support for the MKIPFILTER=no di [...] adds b2da1ddaef2 [X86] Add a non-zero cost for truncating v32i16->v32i8 on a [...] adds ecd6d7254e6 [test] llvm/test/: change llvm-objdump single-dash long opt [...] adds f0374e7db2d [test] lld/test/: change llvm-objdump single-dash long opti [...] adds 5c3ec7dc41f [llvm-objdump] Require long options to use double-dash --lo [...] adds f84beee9b8a [NFC][Test] Add three tests to verify the behavior of a*b-c [...] adds a79863f2f72 Support prefix padding for alignment purposes (Relaxable in [...] adds c94cfe6ea7f [MLIR] fix parse bound error message adds 2059d28bfd3 [lldb/Utils] Use PYTHON_EXECUTABLE to configure lldb-dotest [...] adds bfedb663ccf [lldb/Host] s/FindProcesses/FindProcessesImpl/ in freebsd/Host.cpp adds 4c90a5297d1 [lldb/Process] Include Unwind.h in FreeBSDThread adds 4ffe3ac729a Revert "[CodeGenPrepare] Freeze condition when transforming [...] adds 6ad63606ea4 [CodeGenPrepare] Freeze condition when transforming select to br adds 54146cbd32e [debuginfo-tests] Update test for double-dash long-option. adds 0eba5dc80fb [analyzer] Fix modeling some library functions when UCHAR_M [...] adds 53c2e10fb8a [Coroutines] Do not evaluate InitListExpr of a co_return adds ad643d5e93c [Verifier] Remove invalid verifier check adds e0ab0e6a281 [MIPS] Implement PUL.PS and PUU.PS instructions adds 56aed6144a1 [AVR] Add a release note about the AVR backend becoming an [...] adds d2b522f173c [NFC][X86] Simplify test cases for branch align adds 2005c60a6bf [obj2yaml][test] - Simplify call-graph-profile-section.yaml. NFCI. adds a2923b2a1e4 Implement CET Shadow Stack (Intel Controlflow Enforcement T [...] adds b1a7a245ec2 [NFC][MC] Rename alignBranches* to emitInstruction* adds c93652517c8 [DebugInfo] Handle generic type DW_OP_convert ops in llvm-d [...] adds 8b409eabaf7 [SVE] Auto-generate builtins and header for svld1. adds 3a5ddedadb6 [llvm-objdump] Display locations of variables alongside dis [...] adds f62b898c1f5 [DebugInfo] Add unit test for compact expression printer adds c0cf5f5da9a [llvm-objdump] Add simple memory expressions to variable display adds 18649f48139 [llvm-objdump] Add entry_value and stack_value opcodes adds 5abfa3226da [lldb/DWARF] Fix crash when a dwo compile unit refers to a [...] adds 02b6a3c3499 [DebugInfo] Handle generic type DW_OP_convert ops in dsymutil adds 161f70eae6c Don't run ARM objdump tests when ARM backend not built adds 042eb0482aa [llvm-objdump] Add llvm_unreachable to silence GCC warning. NFC. adds 2878c669387 Don't run PowerPC objdump tests when PowerPC backend not built adds 132f25bcca2 [SystemZ] Avoid scalarization of [SU]INT_TO_FP ISD-nodes. adds 2f20417ef04 Add AllowMissingMoveFunctionsWhenCopyIsDeleted flag to cppc [...] adds c5ff3df8393 [lldb] Hardcode target in dwo-type-in-main-file.s test adds f4cb9c919e2 Disable llvm-objdump --debug-vars tests on Windows adds 56cd6e356f1 [NFC][TTI] Use switch in getCastInstrCost adds 67d25914b2a [AST] rename DependencyFlags.h => DependenceFlags.h, NFC adds ac4609cb1d0 [X86] LowerRotate - use X86::isConstantSplat to detect cons [...] adds e43a0857818 [X86] X86::isConstantSplat - enable partial undef bit handl [...] adds e40525e0f2a [NFC][TTI] Remove static_casts adds 46c34447f86 [yaml2obj][test] - Fix comments in ELF/program-header-addre [...] adds adc2e250a1c Disable memcpy-inline-fails.ll for windows adds acdcd23b7b0 Add tests to ExpandMemCmp/X86/memcmp.ll before submitting D76113 adds 0a840ef8005 [lldb] Copy m_behaves_like_zeroth_frame on stack frame update adds 332edcc6bd1 [lldb] Remove unimplemented StackFrame::BehavesLikeZerothFrame adds 7aecf2323c4 [ExpandMemCmp] Correctly set alignment of generated loads adds c0241f150dc [GlobalISel] combine G_TRUNC with G_MERGE_VALUES adds 85462aefb52 [gn build] (manually) port 8b409eaba adds 2b3b453a827 [TargetLowering] Only demand a funnelshift's modulo amount bits adds 8d6582aa6bb [gn build] (manually) port 8b409eaba more adds 185b41393dc [gn build] Port f62b898c1f5 adds 536ba6373f0 [Object] Change ELFObjectFile<ELFT>::getFileFormatName() to [...] adds 57d896e838b AMDGPU/GlobalISel: Make some large merges legal adds 4efec6e1c00 Revert "Disable memcpy-inline-fails.ll for windows" adds 5c261c9c452 Fix typo in parameter name. adds 6ce537ccfcf Revert "[SVE] Auto-generate builtins and header for svld1." adds 8ff2dcb18b5 [GlobalISel] add additional lowering support for G_INSERT adds e2d8aa6bf77 [lldb] Re-add nullptr check to IRForTarget::RewriteObjCCons [...] adds 4060016fce3 Revert "[gn build] (manually) port 8b409eaba" adds 19a03501879 GlobalISel: Fix round lowering adds 88fbd8f9e79 [lldb/Reproducers] Decode run-length encoding in GDB replay [...] adds ddd20ed1586 [AST] Move dependence computations into a separate file adds 18c97662482 Revert "[AST] Move dependence computations into a separate file" adds 8a593e29ab9 [AST] Correct the CXXOperatorCallExpr source range. adds 84386b2d8ae AMDGPU: Drop special case f64 fround lowering adds 07a41544fde Minor fix to a comment in CodeGenPrepare.cpp adds 09f4bdc03f8 [DexTer] Add step.UNKNOWN check for NoneType line numbers. adds 36091109675 Implement _LIBCPP_SUPPRESS_DEPRECATED_XXX when testing MSVC's STL adds c460dc6eebc AMDGPU/GlobalISel: Fix some illegal scalar argument types adds 80b627d69d3 AMDGPU/GlobalISel: Fix handling of G_ANYEXT with s1 source adds f5943288537 [PowerPC] Disable sanitizer test due to failures when using LLD adds 2e773626266 GlobalISel: Fix lower bswap for vectors adds ebb181cf409 [X86] matchScalarReduction - add support for partial reductions adds 9e484220358 Revert "[llvm-objdump] Display locations of variables along [...] adds 7d382dcd46a [Syntax] Build declarator nodes adds 05e7d8d6ce0 TTI: Add addrspace parameters to memcpy lowering functions adds b0bdb186f50 Utils: Always set alignment when expanding mem intrinsics adds 0616e9964b9 [InstSimplify][SVE] Fix SimplifyGEPInst for scalable vector. adds 0f2b68d9c70 Implement IR intrinsics for gather prefetch. adds 9b1513866fd [mlir][NFC] Add missing include for std::string. adds 0928368f623 [libc] Provide Arm Optimized Routines for the LLVM libc project. adds 623cb95eb33 Revert "[InstSimplify] Simplify calls with "returned" attribute" adds 78d622a48c1 [libc] Add a README.md file to the AOR directory. adds 2d723d4ad51 [mlir] Avoid the use of auto in templates to fix MSVC build adds 05ff3323e07 [AArch64] Remove unused variable adds 378b1e60809 [X86] Assign avx512bf16 instructions to the SSEPackedSingle [...] adds 166f83f4366 [QuantOps] Add the quant region definition adds 74bf95d71df [CUDA] Updated CompileCudaWithLLVM doc. adds 7fa204580df [LoopTerminology] Rotated Loops adds 30dc342f084 [LoopTerminology] Rotated Loops images adds df082ac45aa Basic Block Sections support in LLVM. adds 78ce190803c [gn build] Port df082ac45aa adds 2a3723ef114 [memtag] Plug in stack safety analysis. adds 19fccc52ff2 [Concepts] Fix incorrect control flow when TryAnnotateTypeC [...] adds fbb23c9714f Fix profiling options on PS4 target: - libclang_rt.profile [...] adds 5f7772004b1 [Tests] Add test coverage for prefix selection logic adds 8b3b04eb416 Make isValidImmForSVEVecImmAddrMode inline static rather th [...] adds d811aee5d9c [MLIR][NFC] update/clean up affine PDT, related utils, its [...] adds bd5941b9cee [mlir] Remove the PatternState class and simplify PatternMa [...] adds c3f0ceab0fd Add target to test basicblock-sections-mir-parse.mir adds 90a2fbdb044 Switch to TypeSystemClang over to CreateDeserialized() (NFC) adds 85726bbcbaa [X86] Disable fast-isel call lowering for functions with vX [...] adds ac48b1885ad [Support] Change isatty to is_displayed adds 032743e18f2 [mlir] Add support for the attribute verifiers in the diale [...] adds 39bcc76a925 [X86] Disable nop padding before instruction following hardcode adds d00d6a19dda Fix `-Wpedantic` warning. NFC. adds f0714cbb6a9 [sanitizer] Fix warning on windows adds f20dcc31e31 Fix unused function warning adds 332f0b3cd48 Affine expr simplification for add of const multiple of sam [...] adds fa72b29bec0 [PowerPC] add test cases for target hook isProfitableToHoist - NFC adds 80c351cdb6e [InstCombine] Transform to undef incorrect atomic unordered [...] adds 0b126eec6d4 [NFC][PowerPC] Simplify the logic in lower select_cc adds 3f3bda1c372 [LoopTerminology] Minor fixes in loop rotation adds 8aa07f81b85 Remove the old SecTaskAccess entry from debugserver's plist adds 8620bb95343 [lld] Fix "loop variable creates a copy" warning adds 398b497cd0e [NFC] LoopRotate: do issue debug message when not rotating [...] adds 876bb86e26c [AST] Move dependence computations into a separate file adds 1b5970edda4 [gn build] Port 876bb86e26c adds d3d844212fc Fix the buildbot error. adds 409cf4b7bf5 [llvm-readobj][test] - Remove unused Offset key from reloc- [...] No new revisions were added by this update. Summary of changes: .../SpecialMemberFunctionsCheck.cpp | 51 +- .../SpecialMemberFunctionsCheck.h | 15 +- .../clang-tidy/modernize/LoopConvertCheck.cpp | 7 +- .../clangd/unittests/SelectionTests.cpp | 8 + clang-tools-extra/clangd/unittests/XRefsTests.cpp | 8 + .../cppcoreguidelines-special-member-functions.rst | 17 +- ...ons-allow-missing-move-when-copy-is-deleted.cpp | 49 + clang/include/clang/AST/ASTContext.h | 6 + clang/include/clang/AST/ComputeDependence.h | 182 + clang/include/clang/AST/DeclCXX.h | 22 +- clang/include/clang/AST/DeclTemplate.h | 4 + clang/include/clang/AST/DependenceFlags.h | 145 + clang/include/clang/AST/DependencyFlags.h | 138 - clang/include/clang/AST/Expr.h | 349 +- clang/include/clang/AST/ExprCXX.h | 222 +- clang/include/clang/AST/ExprObjC.h | 168 +- clang/include/clang/AST/ExprOpenMP.h | 19 +- clang/include/clang/AST/NestedNameSpecifier.h | 2 +- clang/include/clang/AST/Stmt.h | 2 +- clang/include/clang/AST/TemplateBase.h | 5 +- clang/include/clang/AST/TemplateName.h | 2 +- clang/include/clang/AST/Type.h | 2 +- clang/include/clang/Basic/AArch64SVEACLETypes.def | 28 +- clang/include/clang/Basic/Builtins.def | 1 + clang/include/clang/Basic/BuiltinsAArch64.def | 13 + clang/include/clang/Basic/arm_sve.td | 14 + clang/include/clang/Sema/Sema.h | 6 +- clang/include/clang/Tooling/Syntax/Nodes.h | 136 +- clang/lib/AST/ASTContext.cpp | 55 +- clang/lib/AST/ASTImporter.cpp | 5 +- clang/lib/AST/CMakeLists.txt | 1 + clang/lib/AST/ComputeDependence.cpp | 701 + clang/lib/AST/Expr.cpp | 337 +- clang/lib/AST/ExprCXX.cpp | 221 +- clang/lib/AST/ExprConcepts.cpp | 66 +- clang/lib/AST/ExprObjC.cpp | 43 +- clang/lib/AST/NestedNameSpecifier.cpp | 2 +- clang/lib/AST/TemplateBase.cpp | 2 +- clang/lib/AST/TemplateName.cpp | 2 +- clang/lib/CodeGen/BackendUtil.cpp | 16 + clang/lib/CodeGen/CGBuiltin.cpp | 73 + clang/lib/CodeGen/CGCoroutine.cpp | 6 +- clang/lib/CodeGen/CodeGenFunction.cpp | 10 +- clang/lib/CodeGen/CodeGenFunction.h | 5 + clang/lib/Driver/ToolChains/PS4CPU.cpp | 8 +- clang/lib/Headers/CMakeLists.txt | 2 + clang/lib/Headers/module.modulemap | 6 + clang/lib/Parse/ParseDecl.cpp | 6 + clang/lib/Parse/ParseTemplate.cpp | 3 +- clang/lib/Sema/SemaExpr.cpp | 8 +- clang/lib/Sema/SemaOverload.cpp | 2 +- clang/lib/Sema/SemaPseudoObject.cpp | 15 +- clang/lib/Sema/SemaTemplate.cpp | 13 +- clang/lib/Serialization/ASTReaderStmt.cpp | 2 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 42 +- clang/lib/Tooling/Syntax/BuildTree.cpp | 311 +- clang/lib/Tooling/Syntax/Nodes.cpp | 94 + .../CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c | 83 + .../coro-return-voidtype-initlist.cpp | 81 + clang/test/Driver/clang_f_opts.c | 8 - clang/test/Driver/fmerge-constants.c | 6 + clang/test/Driver/memtag.c | 23 + clang/test/Driver/ps4-runtime-flags.c | 5 + clang/test/SemaCXX/invalid-member-expr.cpp | 1 + clang/test/SemaCXX/typo-correction.cpp | 5 +- .../ms-lookup-template-base-classes.cpp | 1 + clang/unittests/Tooling/Syntax/TreeTest.cpp | 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llvm/test/MC/AArch64/SVE/nand.s | 2 +- llvm/test/MC/AArch64/SVE/nands.s | 2 +- llvm/test/MC/AArch64/SVE/neg.s | 2 +- llvm/test/MC/AArch64/SVE/nor.s | 2 +- llvm/test/MC/AArch64/SVE/nors.s | 2 +- llvm/test/MC/AArch64/SVE/not.s | 2 +- llvm/test/MC/AArch64/SVE/nots.s | 2 +- llvm/test/MC/AArch64/SVE/orn.s | 2 +- llvm/test/MC/AArch64/SVE/orns.s | 2 +- llvm/test/MC/AArch64/SVE/orr.s | 2 +- llvm/test/MC/AArch64/SVE/orrs.s | 2 +- llvm/test/MC/AArch64/SVE/orv.s | 2 +- llvm/test/MC/AArch64/SVE/pfalse.s | 2 +- llvm/test/MC/AArch64/SVE/pfirst.s | 2 +- llvm/test/MC/AArch64/SVE/pnext.s | 2 +- llvm/test/MC/AArch64/SVE/prfb.s | 2 +- llvm/test/MC/AArch64/SVE/prfd.s | 2 +- llvm/test/MC/AArch64/SVE/prfh.s | 2 +- llvm/test/MC/AArch64/SVE/prfw.s | 2 +- llvm/test/MC/AArch64/SVE/ptest.s | 2 +- llvm/test/MC/AArch64/SVE/ptrue.s | 2 +- llvm/test/MC/AArch64/SVE/ptrues.s | 2 +- llvm/test/MC/AArch64/SVE/punpkhi.s | 2 +- llvm/test/MC/AArch64/SVE/punpklo.s | 2 +- llvm/test/MC/AArch64/SVE/rbit.s | 2 +- llvm/test/MC/AArch64/SVE/rdffr.s | 2 +- llvm/test/MC/AArch64/SVE/rdffrs.s | 2 +- llvm/test/MC/AArch64/SVE/rdvl.s | 2 +- llvm/test/MC/AArch64/SVE/rev.s | 2 +- llvm/test/MC/AArch64/SVE/revb.s | 2 +- llvm/test/MC/AArch64/SVE/revh.s | 2 +- llvm/test/MC/AArch64/SVE/revw.s | 2 +- llvm/test/MC/AArch64/SVE/sabd.s | 2 +- llvm/test/MC/AArch64/SVE/saddv.s | 2 +- llvm/test/MC/AArch64/SVE/scvtf.s | 2 +- llvm/test/MC/AArch64/SVE/sdiv.s | 2 +- llvm/test/MC/AArch64/SVE/sdivr.s | 2 +- llvm/test/MC/AArch64/SVE/sdot.s | 2 +- llvm/test/MC/AArch64/SVE/sel.s | 2 +- llvm/test/MC/AArch64/SVE/setffr.s | 2 +- llvm/test/MC/AArch64/SVE/smax.s | 2 +- llvm/test/MC/AArch64/SVE/smaxv.s | 2 +- llvm/test/MC/AArch64/SVE/smin.s | 2 +- llvm/test/MC/AArch64/SVE/sminv.s | 2 +- llvm/test/MC/AArch64/SVE/smulh.s | 2 +- llvm/test/MC/AArch64/SVE/splice.s | 2 +- llvm/test/MC/AArch64/SVE/sqadd.s | 2 +- llvm/test/MC/AArch64/SVE/sqdecb.s | 2 +- llvm/test/MC/AArch64/SVE/sqdecd.s | 2 +- llvm/test/MC/AArch64/SVE/sqdech.s | 2 +- llvm/test/MC/AArch64/SVE/sqdecp.s | 2 +- llvm/test/MC/AArch64/SVE/sqdecw.s | 2 +- llvm/test/MC/AArch64/SVE/sqincb.s | 2 +- llvm/test/MC/AArch64/SVE/sqincd.s | 2 +- llvm/test/MC/AArch64/SVE/sqinch.s | 2 +- llvm/test/MC/AArch64/SVE/sqincp.s | 2 +- llvm/test/MC/AArch64/SVE/sqincw.s | 2 +- llvm/test/MC/AArch64/SVE/sqsub.s | 2 +- llvm/test/MC/AArch64/SVE/st1b.s | 2 +- llvm/test/MC/AArch64/SVE/st1d.s | 2 +- llvm/test/MC/AArch64/SVE/st1h.s | 2 +- llvm/test/MC/AArch64/SVE/st1w.s | 2 +- llvm/test/MC/AArch64/SVE/st2b.s | 2 +- llvm/test/MC/AArch64/SVE/st2d.s | 2 +- llvm/test/MC/AArch64/SVE/st2h.s | 2 +- llvm/test/MC/AArch64/SVE/st2w.s | 2 +- llvm/test/MC/AArch64/SVE/st3b.s | 2 +- llvm/test/MC/AArch64/SVE/st3d.s | 2 +- llvm/test/MC/AArch64/SVE/st3h.s | 2 +- llvm/test/MC/AArch64/SVE/st3w.s | 2 +- llvm/test/MC/AArch64/SVE/st4b.s | 2 +- llvm/test/MC/AArch64/SVE/st4d.s | 2 +- llvm/test/MC/AArch64/SVE/st4h.s | 2 +- llvm/test/MC/AArch64/SVE/st4w.s | 2 +- llvm/test/MC/AArch64/SVE/stnt1b.s | 2 +- llvm/test/MC/AArch64/SVE/stnt1d.s | 2 +- llvm/test/MC/AArch64/SVE/stnt1h.s | 2 +- llvm/test/MC/AArch64/SVE/stnt1w.s | 2 +- llvm/test/MC/AArch64/SVE/str.s | 2 +- llvm/test/MC/AArch64/SVE/sub.s | 2 +- llvm/test/MC/AArch64/SVE/subr.s | 2 +- llvm/test/MC/AArch64/SVE/sunpkhi.s | 2 +- llvm/test/MC/AArch64/SVE/sunpklo.s | 2 +- llvm/test/MC/AArch64/SVE/sxtb.s | 2 +- llvm/test/MC/AArch64/SVE/sxth.s | 2 +- llvm/test/MC/AArch64/SVE/sxtw.s | 2 +- llvm/test/MC/AArch64/SVE/system-regs.s | 2 +- llvm/test/MC/AArch64/SVE/tbl.s | 2 +- llvm/test/MC/AArch64/SVE/trn1.s | 2 +- llvm/test/MC/AArch64/SVE/trn2.s | 2 +- llvm/test/MC/AArch64/SVE/uabd.s | 2 +- llvm/test/MC/AArch64/SVE/uaddv.s | 2 +- llvm/test/MC/AArch64/SVE/ucvtf.s | 2 +- llvm/test/MC/AArch64/SVE/udiv.s | 2 +- llvm/test/MC/AArch64/SVE/udivr.s | 2 +- llvm/test/MC/AArch64/SVE/udot.s | 2 +- llvm/test/MC/AArch64/SVE/umax.s | 2 +- llvm/test/MC/AArch64/SVE/umaxv.s | 2 +- llvm/test/MC/AArch64/SVE/umin.s | 2 +- llvm/test/MC/AArch64/SVE/uminv.s | 2 +- llvm/test/MC/AArch64/SVE/umulh.s | 2 +- llvm/test/MC/AArch64/SVE/uqadd.s | 2 +- llvm/test/MC/AArch64/SVE/uqdecb.s | 2 +- llvm/test/MC/AArch64/SVE/uqdecd.s | 2 +- llvm/test/MC/AArch64/SVE/uqdech.s | 2 +- llvm/test/MC/AArch64/SVE/uqdecp.s | 2 +- llvm/test/MC/AArch64/SVE/uqdecw.s | 2 +- llvm/test/MC/AArch64/SVE/uqincb.s | 2 +- llvm/test/MC/AArch64/SVE/uqincd.s | 2 +- llvm/test/MC/AArch64/SVE/uqinch.s | 2 +- llvm/test/MC/AArch64/SVE/uqincp.s | 2 +- llvm/test/MC/AArch64/SVE/uqincw.s | 2 +- llvm/test/MC/AArch64/SVE/uqsub.s | 2 +- llvm/test/MC/AArch64/SVE/uunpkhi.s | 2 +- llvm/test/MC/AArch64/SVE/uunpklo.s | 2 +- llvm/test/MC/AArch64/SVE/uxtb.s | 2 +- llvm/test/MC/AArch64/SVE/uxth.s | 2 +- llvm/test/MC/AArch64/SVE/uxtw.s | 2 +- llvm/test/MC/AArch64/SVE/uzp1.s | 2 +- llvm/test/MC/AArch64/SVE/uzp2.s | 2 +- llvm/test/MC/AArch64/SVE/whilele.s | 2 +- llvm/test/MC/AArch64/SVE/whilelo.s | 2 +- llvm/test/MC/AArch64/SVE/whilels.s | 2 +- llvm/test/MC/AArch64/SVE/whilelt.s | 2 +- llvm/test/MC/AArch64/SVE/wrffr.s | 2 +- llvm/test/MC/AArch64/SVE/zip1.s | 2 +- llvm/test/MC/AArch64/SVE/zip2.s | 2 +- llvm/test/MC/AArch64/SVE2/adclb.s | 2 +- llvm/test/MC/AArch64/SVE2/adclt.s | 2 +- llvm/test/MC/AArch64/SVE2/addhnb.s | 2 +- llvm/test/MC/AArch64/SVE2/addhnt.s | 2 +- llvm/test/MC/AArch64/SVE2/addp.s | 2 +- llvm/test/MC/AArch64/SVE2/aesd.s | 2 +- llvm/test/MC/AArch64/SVE2/aese.s | 2 +- llvm/test/MC/AArch64/SVE2/aesimc.s | 2 +- llvm/test/MC/AArch64/SVE2/aesmc.s | 2 +- llvm/test/MC/AArch64/SVE2/bcax.s | 2 +- llvm/test/MC/AArch64/SVE2/bdep.s | 2 +- llvm/test/MC/AArch64/SVE2/bext.s | 2 +- llvm/test/MC/AArch64/SVE2/bgrp.s | 2 +- llvm/test/MC/AArch64/SVE2/bsl.s | 2 +- llvm/test/MC/AArch64/SVE2/bsl1n.s | 2 +- llvm/test/MC/AArch64/SVE2/bsl2n.s | 2 +- llvm/test/MC/AArch64/SVE2/cadd.s | 2 +- llvm/test/MC/AArch64/SVE2/cdot.s | 2 +- llvm/test/MC/AArch64/SVE2/cmla.s | 2 +- llvm/test/MC/AArch64/SVE2/eor3.s | 2 +- llvm/test/MC/AArch64/SVE2/eorbt.s | 2 +- llvm/test/MC/AArch64/SVE2/eortb.s | 2 +- llvm/test/MC/AArch64/SVE2/ext.s | 2 +- llvm/test/MC/AArch64/SVE2/faddp.s | 2 +- llvm/test/MC/AArch64/SVE2/fcvtlt.s | 2 +- llvm/test/MC/AArch64/SVE2/fcvtnt.s | 2 +- llvm/test/MC/AArch64/SVE2/fcvtx.s | 2 +- llvm/test/MC/AArch64/SVE2/fcvtxnt.s | 2 +- llvm/test/MC/AArch64/SVE2/flogb.s | 2 +- llvm/test/MC/AArch64/SVE2/fmaxnmp.s | 2 +- llvm/test/MC/AArch64/SVE2/fmaxp.s | 2 +- llvm/test/MC/AArch64/SVE2/fminnmp.s | 2 +- llvm/test/MC/AArch64/SVE2/fminp.s | 2 +- llvm/test/MC/AArch64/SVE2/fmlalb.s | 2 +- llvm/test/MC/AArch64/SVE2/fmlalt.s | 2 +- llvm/test/MC/AArch64/SVE2/fmlslb.s | 2 +- llvm/test/MC/AArch64/SVE2/fmlslt.s | 2 +- llvm/test/MC/AArch64/SVE2/histcnt.s | 2 +- llvm/test/MC/AArch64/SVE2/histseg.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1b.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1d.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1h.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1sb.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1sh.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1sw.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1w.s | 2 +- llvm/test/MC/AArch64/SVE2/match.s | 2 +- llvm/test/MC/AArch64/SVE2/mla.s | 2 +- llvm/test/MC/AArch64/SVE2/mls.s | 2 +- llvm/test/MC/AArch64/SVE2/mul.s | 2 +- llvm/test/MC/AArch64/SVE2/nbsl.s | 2 +- llvm/test/MC/AArch64/SVE2/nmatch.s | 2 +- llvm/test/MC/AArch64/SVE2/pmul.s | 2 +- llvm/test/MC/AArch64/SVE2/pmullb-128.s | 2 +- llvm/test/MC/AArch64/SVE2/pmullb.s | 2 +- llvm/test/MC/AArch64/SVE2/pmullt-128.s | 2 +- llvm/test/MC/AArch64/SVE2/pmullt.s | 2 +- llvm/test/MC/AArch64/SVE2/raddhnb.s | 2 +- llvm/test/MC/AArch64/SVE2/raddhnt.s | 2 +- llvm/test/MC/AArch64/SVE2/rax1.s | 2 +- llvm/test/MC/AArch64/SVE2/rshrnb.s | 2 +- llvm/test/MC/AArch64/SVE2/rshrnt.s | 2 +- llvm/test/MC/AArch64/SVE2/rsubhnb.s | 2 +- llvm/test/MC/AArch64/SVE2/rsubhnt.s | 2 +- llvm/test/MC/AArch64/SVE2/saba.s | 2 +- llvm/test/MC/AArch64/SVE2/sabalb.s | 2 +- llvm/test/MC/AArch64/SVE2/sabalt.s | 2 +- llvm/test/MC/AArch64/SVE2/sabdlb.s | 2 +- llvm/test/MC/AArch64/SVE2/sabdlt.s | 2 +- llvm/test/MC/AArch64/SVE2/sadalp.s | 2 +- llvm/test/MC/AArch64/SVE2/saddlb.s | 2 +- llvm/test/MC/AArch64/SVE2/saddlbt.s | 2 +- llvm/test/MC/AArch64/SVE2/saddlt.s | 2 +- llvm/test/MC/AArch64/SVE2/saddwb.s | 2 +- llvm/test/MC/AArch64/SVE2/saddwt.s | 2 +- llvm/test/MC/AArch64/SVE2/sbclb.s | 2 +- llvm/test/MC/AArch64/SVE2/sbclt.s | 2 +- llvm/test/MC/AArch64/SVE2/shadd.s | 2 +- llvm/test/MC/AArch64/SVE2/shrnb.s | 2 +- llvm/test/MC/AArch64/SVE2/shrnt.s | 2 +- llvm/test/MC/AArch64/SVE2/shsub.s | 2 +- llvm/test/MC/AArch64/SVE2/shsubr.s | 2 +- llvm/test/MC/AArch64/SVE2/sli.s | 2 +- llvm/test/MC/AArch64/SVE2/sm4e.s | 2 +- llvm/test/MC/AArch64/SVE2/sm4ekey.s | 2 +- llvm/test/MC/AArch64/SVE2/smaxp.s | 2 +- llvm/test/MC/AArch64/SVE2/sminp.s | 2 +- llvm/test/MC/AArch64/SVE2/smlalb.s | 2 +- llvm/test/MC/AArch64/SVE2/smlalt.s | 2 +- llvm/test/MC/AArch64/SVE2/smlslb.s | 2 +- llvm/test/MC/AArch64/SVE2/smlslt.s | 2 +- llvm/test/MC/AArch64/SVE2/smulh.s | 2 +- llvm/test/MC/AArch64/SVE2/smullb.s | 2 +- llvm/test/MC/AArch64/SVE2/smullt.s | 2 +- llvm/test/MC/AArch64/SVE2/splice.s | 2 +- llvm/test/MC/AArch64/SVE2/sqabs.s | 2 +- llvm/test/MC/AArch64/SVE2/sqadd.s | 2 +- llvm/test/MC/AArch64/SVE2/sqcadd.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlalb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlalbt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlalt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlslb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlslbt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlslt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmulh.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmullb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmullt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqneg.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrdcmlah.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrdmlah.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrdmlsh.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrdmulh.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshl.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshlr.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshrnb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshrnt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshrunb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshrunt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshl.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshlr.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshlu.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshrnb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshrnt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshrunb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshrunt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqsub.s | 2 +- llvm/test/MC/AArch64/SVE2/sqsubr.s | 2 +- llvm/test/MC/AArch64/SVE2/sqxtnb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqxtnt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqxtunb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqxtunt.s | 2 +- llvm/test/MC/AArch64/SVE2/srhadd.s | 2 +- llvm/test/MC/AArch64/SVE2/sri.s | 2 +- llvm/test/MC/AArch64/SVE2/srshl.s | 2 +- llvm/test/MC/AArch64/SVE2/srshlr.s | 2 +- llvm/test/MC/AArch64/SVE2/srshr.s | 2 +- llvm/test/MC/AArch64/SVE2/srsra.s | 2 +- llvm/test/MC/AArch64/SVE2/sshllb.s | 2 +- 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llvm/test/tools/llvm-objdump/MachO/ARM/v7m.test rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/ObjC.exe.macho-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/ObjC.obj.macho-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/Objc1.32bit.exe.macho-i3 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/Objc1.32bit.obj.macho-i3 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/Objc2.32bit.exe.macho-i3 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/Objc2.32bit.obj.macho-i3 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/Objc2.64bit.exe.macho-x8 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/Objc2.64bit.obj.dylib-x8 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/Objc2.64bit.obj.macho-x8 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/codesig.macho-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/dylibLoadKinds.macho-x86 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/dylibModInit.macho-x86_6 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/dylibRoutines.macho-x86_ [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/dylibSubClient.macho-x86 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/dylibSubFramework.macho- [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/dylibSubLibrary.macho-x8 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/dylibSubUmbrella.macho-x [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/exeThread.macho-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello-macho-fat (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello-macho-fat.dwarf (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello-macho-thin (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello-macho-thin.dwarf (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello.exe.macho-i386 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello.exe.macho-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello.exe.stripped.macho [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello.obj.macho-i386 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello.obj.macho-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/hello_cpp.exe.macho-x86_ [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/kextbundle.macho-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/linkerOption.macho-x86_6 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-disassemble-stab-x [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-bind-entry (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-linker-com [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-reloc-sect [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-symbol-ind [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-symbol-ind [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-symbol-lib [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-symbol-nse [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-symbol-nse [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-symbol-str [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-invalid-symbol-str [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-multiple-text (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-preload-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-universal-archive. [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-universal.x86_64.i [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/macho-universal64.x86_64 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/malformed-machos/0000003 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/malformed-machos/mem-cru [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/malformed-machos/mem-cru [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/malformed-machos/mem-cru [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/malformed-machos/mem-cru [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/malformed-machos/mem-cru [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/malformed-machos/mem-cru [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/malformed-machos/mem-cru [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/nofirst-symbol.macho-x86 [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/note.macho-x86 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/objModInit.macho-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/stub-nosyms.macho-x86_64 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/stubbed.dylib.macho-x86_ [...] rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/thread.macho-i386 (100%) rename llvm/test/tools/llvm-objdump/{X86 => MachO}/Inputs/truncated-section.dylib. [...] create mode 100644 llvm/test/tools/llvm-objdump/MachO/archive-headers.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/build-version.yaml create mode 100644 llvm/test/tools/llvm-objdump/MachO/cstring-dump.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/data-in-code.ll create mode 100644 llvm/test/tools/llvm-objdump/MachO/dis-no-leading-addr.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/dis-symname.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/disassemble-all.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/disassemble-g-dsym.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/disassemble-kextbundle.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/disassemble-stab.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/disassemble-stripped.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/dylib.test rename llvm/test/tools/llvm-objdump/{X86 => MachO}/hex-displacement.test (100%) create mode 100644 llvm/test/tools/llvm-objdump/MachO/image-info.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/indirect-symbols.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/info-plist-nofollow.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/info-plist.test copy llvm/test/{Analysis/CostModel/X86 => tools/llvm-objdump/MachO}/lit.local.cfg (100%) create mode 100644 llvm/test/tools/llvm-objdump/MachO/literal-pointers-i386.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/literal-pointers-x86_64.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/literals.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/maccatalyst-build-version.yaml create mode 100644 llvm/test/tools/llvm-objdump/MachO/macho-objc-meta-data.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/malformed-machos.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/nofirst-symbol-disassembly.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/nontext-disasm.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/preload-relocations.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/print-thread.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/private-header.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/private-headers.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/relocations.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/section-contents.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/section-headers.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/section.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/stub-nosyms-disassembly.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/stubbed-dylib.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/symbol-table.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/symbolized-disassembly.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/symbolized-subtractor-i386.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/symbolized-subtractor.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/truncated-section.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/universal-x86_64.i386.test create mode 100644 llvm/test/tools/llvm-objdump/MachO/unwind-info.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-archive-headers.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-build-version.yaml delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-cstring-dump.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-data-in-code.ll delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-dis-no-leading-addr.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-dis-symname.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-disassemble-all.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-disassemble-g-dsym.test delete mode 100644 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llvm/test/tools/llvm-objdump/X86/macho-symbol-table.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-symbolized-disassembly.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-symbolized-subtractor-i386.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-symbolized-subtractor.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-universal-x86_64.i386.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/macho-unwind-info.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/malformed-machos.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/stubbed-dylib.test delete mode 100644 llvm/test/tools/llvm-objdump/X86/truncated-section.test create mode 100644 llvm/test/tools/llvm-readobj/COFF/Inputs/has-cet.exe create mode 100644 llvm/test/tools/llvm-readobj/COFF/cetcompat.test create mode 100644 mlir/test/Dialect/QuantOps/quant_region.mlir -- To stop receiving notification emails like this one, please contact the administrator of this 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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (e9808f8c6 -> 83756cf5d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards e9808f8c6 0: update: llvm-linux: all new 83756cf5d 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e9808f8c6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 225 +- 02-build_llvm/console.log | 12807 ++++++++-------- 03-build_linux/console.log | 17310 +++++++++++----------- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 14 +- 06-update_baseline/console.log | 16 +- console.log | 30374 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- regressions.txt | 1 + 9 files changed, 30395 insertions(+), 30362 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan updated (0f66f1d8039 -> 9a532a94e35)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan in repository toolchain/ci/gcc. from 0f66f1d8039 Daily bump. adds 6c7e43f4702 Daily bump. adds cb05d702a17 c++: Fix CTAD with multiple-arg ctor template [93248]. adds 2fa5f9e380b c++: Fix ICE-after-error on partial spec [92068] adds c3747bca384 c++: Find parameter pack in typedef in lambda [92909]. adds a81912b0740 Daily bump. adds 31b204ace29 libstdc++: Add default constructor to net::service_already_ [...] adds 9a532a94e35 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 18 +++++++++++ gcc/cp/pt.c | 30 ++++++++++++++---- .../g++.dg/cpp0x/lambda/lambda-variadic10.C | 12 ++++++++ gcc/testsuite/g++.dg/cpp0x/variadic178.C | 6 ++++ gcc/testsuite/g++.dg/cpp1z/class-deduction71.C | 6 ++++ libstdc++-v3/ChangeLog | 11 +++++++ libstdc++-v3/include/experimental/executor | 9 +++++- .../net/execution_context/make_service.cc | 36 ++++++++++++++++++++++ 9 files changed, 122 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-variadic10.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/variadic178.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/class-deduction71.C create mode 100644 libstdc++-v3/testsuite/experimental/net/execution_context/make_ [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan updated (8c9a7245f -> 6d578464e)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_ubsan in repository toolchain/ci/base-artifacts. discards 8c9a7245f 0: update: gcc-0f66f1d80396e2592f9efb802d311c714233369f: 1 new 6d578464e 0: update: gcc-9a532a94e35008869dafc0e70301f1cff9700f20: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8c9a7245f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 14 +- 02-prepare_abe/console.log | 416 +- 03-build_abe-bootstrap_ubsan/console.log | 70597 ++++++++++++++-------------- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 71031 ++++++++++++++--------------- jenkins/manifest.sh | 8 +- regressions.txt | 20 +- 8 files changed, 71044 insertions(+), 71046 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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