Tcwg-commits April 2020

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 updated (71395f312 -> da3d3ef13)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 in repository toolchain/ci/base-artifacts. discards 71395f312 0: update: gcc-a4d2774c9c1e213cb129c8b81a591297669838c8: 1 new da3d3ef13 0: update: gcc-ae6fc5ce43788db6962ca657e8c0d17017c1a6e2: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (71395f312) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-master-aarch64-b [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 210 +- 03-build_abe-bootstrap_O3/console.log | 71280 ++++++++++++++++--------------- 05-check_regression/console.log | 4 +- 06-update_baseline/console.log | 2 +- console.log | 71662 ++++++++++++++++---------------- jenkins/manifest.sh | 8 +- 7 files changed, 71623 insertions(+), 71673 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (7824768b2e7 -> d985b0bf5c8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/llvm-project. from 7824768b2e7 [mlir][Pass] Add a new `Pass::getArgument` hook adds 9c1842d8aff Change FastISel::CallLoweringInfo::CS to be an ImmutableCal [...] adds a517191a474 [mlir][NFC] Refactor ClassID into a TypeID class. adds efeb35e1956 tsan: disable ASLR in Go test on NetBSD adds 1624be938dd tsan: fix leak of ThreadSignalContext memory mapping when d [...] adds 76503cb3e1b [PDB] Remove defunct PDBFileBuilder::commitFpm declaration. NFC. adds c65e6079fc9 tsan: add newline in test file adds 8340c844aee Analysis.h - remove unused SDNode/SDValue/SelectionDAG forw [...] adds fcabd7530f6 CallingConvLower.h - remove unused llvm::TargetMachine forw [...] adds a2519be0e92 ExecutionDomainFix.h - remove unused llvm::MachineBasicBloc [...] adds 595c28e6182 IntrinsicLowering.h - remove unused llvm::Module forward de [...] adds 6aa85d5214e PredicateInfo.h - remove unused llvm::Instruction/MemoryAcc [...] adds feed674deca [OpenMP] Introduce stream pool to make sure the correctness [...] adds ca23d14fa20 Passes.h - remove unused llvm::LoopPass/Pass/PassInfo forwa [...] adds e3b47c5adc8 OptimizationRemarkEmitter.h - remove unused llvm::DebugLoc/ [...] adds 566359193d8 SyntheticCountsUtils.h - remove unused llvm::CallGraph/Func [...] adds 78730a68400 ObjCARCAnalysisUtils.h - remove unused llvm::raw_ostream fo [...] adds 142dd80d098 PhiValues.h - remove unused llvm::Use forward declaration. NFC. adds 9eacd000cbc Local.h - remove unnecessary Twine.h include. NFC. adds 89f6ca05b74 CodeGen/EdgeBundles - move Twine.h include down into EdgeBu [...] adds 7cc6d0cc90e [TSAN] Fix infinite loop on targets where char is unsigned adds 719846c469e [VPlan] Drop redundant private: at beginning of class defs (NFC). adds 512600e3c0d [PowerPC] Handle f16 as a storage type only adds 5ef2cb3df4c [FormatVariadic] Reduce allocations adds e590bd6b921 [argpromote] Use formatv to simplify code. NFCI. adds 0292ddc7114 [FormatVariadic] Put back return type in an attempt to make [...] adds adb456b8d32 TargetLoweringObjectFileImpl.h - replace MCExpr.h and Modul [...] adds 1318ddbc14c [VectorUtils] rename scaleShuffleMask to narrowShuffleMaskE [...] adds cbcb12fd44d [MLIR] Handle in-place folding properly in greedy pattern r [...] adds 612f23857f3 [scudo][standalone] Work with -Werror=class-memaccess adds cf29333f40e AMDGPU/GlobalISel: Work around forming illegal zextload aft [...] adds 2f7707db025 [mlir][toy][docs] Reword for better sentence flow. NFC adds 3737be8902b [mlir][toy][docs] Fix reference to generated ToyCombine.inc. NFC adds 015ebd2930b [mlir][toy] Fix comment typo. NFC adds 0dbaafaa3a6 [mlir][docs] Explain the EDSC acronym. NFC adds a50df668f68 [clangd] Remove redundant code in test. NFC adds 52dcbcbfe07 Simplify string joins. NFCI. adds d2e5157c1f0 [MC] Add UseIntegratedAssembler = false. NFC adds 0a55d3f557a [MC] Default MCAsmInfo::UseIntegratedAssembler to true adds 470eb62d7bc [libc++][test] Silence "unused variable" warning adds 55de49ac1c3 [mlir][docs] Refactor the layout of the docs folder adds b96b9335aea Use more LLVM_ENABLE_ABI_BREAKING_CHECKS in Error.h adds 11455a79059 [CodeGen] Allow partial tail duplication in Machine Block P [...] adds c5497e53999 AMDGPU/GlobalISel: Fix legalizing <3 x s16> vselects adds 1747ba25b23 GlobalISel: Fix typo in assert message adds d34a91a10f7 [clangd][test] Provide registered targets to lit tests adds 806763efcff [CallSite removal][SelectionDAGBuilder] Use CallBase instea [...] adds 5d5671242eb [clangd] Disable failing target_info test adds 1b76c4cade5 ModuleUtils.h - include and forward declaration cleanup. NFC. adds 89b007037fd [mlir][docs] Remove the MLIR prefix from several titles. adds 4e86e5eedc6 [DenseMap] Add assertion that end() iterator isn't derefenced. adds 21a7d08e72d [X86] Move code that replaces ISD::VSELECT with X86ISD::BLE [...] adds d1da1b53ff8 [X86] Cleanup ISD::BRIND handling code in X86DAGToDAGISel:: [...] adds 75ea9e4e40c [MLIR][NFC] add doc cross links from/to std.alloca adds ac8d51a3c68 AMDGPU/GlobalISel: Legalize 16-bit shift amounts to s16 adds ab31797e166 This is a test commit. adds 61d39b627a8 Revert "This is a test commit." adds 7a45aeacf3a Revert "llvm-dwarfdump: Report errors when failing to parse [...] adds 96819011caa AMDGPU/GlobalISel: Fix RegBankSelect for v2s16 shifts adds 9225ff62789 [lld][WebAssembly] Add test for --export of empty string adds 72ffeb2d38f [LoopTerminology] LCSSA: Fix typo in code sample adds d3465e06912 [X86] Enable shuffle combining for AVX512 unless the root i [...] adds 5b423990297 [CallSite removal][FastISel] Remove uses of CallSite. adds 0031c7f7dab Implement some micro-optimizations for Identifier. NFC adds ed87d9d6434 Change the implementation of mlir::hash_value(Identifier) t [...] adds 4c18e1d3afe [MLIR] add cmake abstraction for translation libraries adds 4956871c0e6 [MLIR] CMake cleanup for mlir-opt adds aef4ec00f99 Change the identifier table in MLIRContext to use StringSet [...] adds d985b0bf5c8 A few cosmetic cleanups to StringMap/StringSet.h, including [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/test/lit.cfg.py | 11 +- clang-tools-extra/clangd/test/target_info.test | 35 - .../clangd/unittests/SerializationTests.cpp | 3 - clang/lib/Format/BreakableToken.cpp | 3 +- clang/lib/Sema/Sema.cpp | 10 +- clang/tools/driver/cc1as_main.cpp | 7 +- .../lib/sanitizer_common/sanitizer_linux.cpp | 4 +- compiler-rt/lib/scudo/standalone/mutex.h | 2 +- compiler-rt/lib/scudo/standalone/quarantine.h | 7 +- compiler-rt/lib/scudo/standalone/stats.h | 4 +- compiler-rt/lib/tsan/go/buildgo.sh | 4 + .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 7 +- compiler-rt/lib/tsan/rtl/tsan_platform.h | 1 + compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp | 3 + compiler-rt/test/tsan/fiber_cleanup.cpp | 71 ++ .../tuple.cnstr/alloc_const_Types.pass.cpp | 2 +- lld/test/wasm/export-empty.test | 4 + llvm/docs/LoopTerminology.rst | 1 - llvm/include/llvm/ADT/DenseMap.h | 3 + llvm/include/llvm/ADT/StringMap.h | 107 +- llvm/include/llvm/ADT/StringSet.h | 65 +- llvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h | 4 - .../llvm/Analysis/OptimizationRemarkEmitter.h | 4 - llvm/include/llvm/Analysis/Passes.h | 3 - llvm/include/llvm/Analysis/PhiValues.h | 1 - llvm/include/llvm/Analysis/SyntheticCountsUtils.h | 3 - llvm/include/llvm/Analysis/Utils/Local.h | 1 - llvm/include/llvm/Analysis/VectorUtils.h | 16 +- llvm/include/llvm/CodeGen/Analysis.h | 3 - llvm/include/llvm/CodeGen/CallingConvLower.h | 1 - llvm/include/llvm/CodeGen/EdgeBundles.h | 1 - llvm/include/llvm/CodeGen/ExecutionDomainFix.h | 1 - llvm/include/llvm/CodeGen/FastISel.h | 10 +- llvm/include/llvm/CodeGen/IntrinsicLowering.h | 1 - .../llvm/CodeGen/TargetLoweringObjectFileImpl.h | 5 +- .../llvm/DebugInfo/PDB/Native/PDBFileBuilder.h | 1 - llvm/include/llvm/Support/Error.h | 6 + llvm/include/llvm/Support/FormatVariadic.h | 63 +- llvm/include/llvm/Support/PointerLikeTypeTraits.h | 7 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 9 + llvm/include/llvm/Transforms/Utils/ModuleUtils.h | 4 +- llvm/include/llvm/Transforms/Utils/PredicateInfo.h | 3 - llvm/lib/Analysis/VectorUtils.cpp | 16 +- llvm/lib/CodeGen/EdgeBundles.cpp | 1 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- llvm/lib/CodeGen/MachineBlockPlacement.cpp | 8 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 43 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 44 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 3 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 4 +- llvm/lib/MC/MCAsmInfo.cpp | 2 +- llvm/lib/MC/MCAsmInfoCOFF.cpp | 2 - llvm/lib/MC/MCAsmInfoDarwin.cpp | 2 - llvm/lib/Support/FormatVariadic.cpp | 4 +- llvm/lib/Support/Triple.cpp | 8 +- .../AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUCombine.td | 14 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 18 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 22 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 2 + llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp | 5 - llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp | 1 - llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h | 2 + .../Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp | 1 + .../Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp | 3 - .../Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp | 1 - .../lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp | 1 - .../Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp | 2 + .../Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 17 + llvm/lib/Target/PowerPC/PPCInstrVSX.td | 10 + .../Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp | 1 + .../Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp | 2 - .../SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp | 2 - llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp | 1 + llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp | 10 - llvm/lib/Target/X86/X86FastISel.cpp | 14 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 36 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 131 ++- llvm/lib/Target/X86/X86InterleavedAccess.cpp | 8 +- .../Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp | 2 + llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 10 +- .../InstCombine/InstCombineVectorOps.cpp | 2 +- .../Vectorize/LoopVectorizationPlanner.h | 1 - llvm/lib/Transforms/Vectorize/VPlan.h | 18 - llvm/lib/Transforms/Vectorize/VPlanValue.h | 3 - llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 2 +- llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll | 1224 +++++++++++++++++++ .../AMDGPU/GlobalISel/inst-select-ashr.s16.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-lshr.s16.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 178 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 40 +- .../CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 139 +++ .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 46 +- llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll | 1234 ++++++++++++++++++++ .../AMDGPU/GlobalISel/regbankselect-ashr.mir | 209 +++- .../AMDGPU/GlobalISel/regbankselect-lshr.mir | 212 +++- .../AMDGPU/GlobalISel/regbankselect-shl.mir | 209 +++- llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll | 1200 +++++++++++++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll | 217 ++++ .../CodeGen/PowerPC/handle-f16-storage-type.ll | 200 ++++ .../test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll | 14 +- llvm/test/CodeGen/X86/avx512-cvt.ll | 26 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 13 +- .../CodeGen/X86/sse2-intrinsics-x86-upgrade.ll | 14 +- llvm/test/CodeGen/X86/sse41.ll | 8 +- llvm/test/CodeGen/X86/tail-dup-partial.ll | 85 ++ llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll | 6 +- llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll | 6 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 36 +- llvm/test/CodeGen/X86/vector-fshl-256.ll | 13 +- llvm/test/CodeGen/X86/vector-fshl-512.ll | 83 +- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 13 +- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 57 +- llvm/test/CodeGen/X86/vector-fshr-256.ll | 13 +- llvm/test/CodeGen/X86/vector-fshr-512.ll | 99 +- llvm/test/CodeGen/X86/vector-fshr-rot-256.ll | 13 +- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 57 +- llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll | 98 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 130 +-- llvm/test/CodeGen/X86/vector-rotate-256.ll | 13 +- llvm/test/CodeGen/X86/vector-rotate-512.ll | 57 +- llvm/test/CodeGen/X86/vector-shift-lshr-256.ll | 13 +- llvm/test/CodeGen/X86/vector-shift-lshr-512.ll | 13 +- llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 4 +- .../X86/vector-shuffle-combining-avx512bw.ll | 14 +- .../X86/vector-shuffle-combining-avx512f.ll | 19 +- llvm/test/CodeGen/X86/vector-shuffle-v1.ll | 10 +- .../X86/dwarfdump-debug-loc-error-cases.s | 12 +- .../X86/dwarfdump-debug-loc-error-cases2.s | 11 +- .../X86/dwarfdump-debug-loclists-error-cases.s | 14 +- .../X86/dwarfdump-debug-loclists-error-cases2.s | 9 +- .../test/DebugInfo/X86/dwarfdump-ranges-baseaddr.s | 2 +- .../X86/dwarfdump-str-offsets-invalid-6.s | 2 +- .../X86/debug_addr_address_size_not_multiple.s | 2 +- .../X86/debug_addr_invalid_addr_size.s | 2 +- .../X86/debug_addr_reserved_length.s | 2 +- .../X86/debug_addr_segment_selector.s | 2 +- .../X86/debug_addr_small_length_field.s | 2 +- ...ebug_addr_too_small_for_extended_length_field.s | 2 +- .../X86/debug_addr_too_small_for_length_field.s | 2 +- .../X86/debug_addr_too_small_for_section.s | 2 +- .../X86/debug_addr_unsupported_version.s | 2 +- .../test/tools/llvm-dwarfdump/X86/debug_rnglists.s | 5 +- .../llvm-dwarfdump/X86/debug_rnglists_invalid.s | 4 +- .../X86/debug_rnglists_reserved_length.s | 2 +- llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp | 3 +- llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp | 17 +- llvm/unittests/Analysis/VectorUtilsTest.cpp | 6 +- mlir/cmake/modules/AddMLIR.cmake | 6 + mlir/docs/Diagnostics.md | 2 +- mlir/docs/EDSC.md | 7 +- mlir/docs/GenericDAGRewriter.md | 2 +- mlir/docs/Interfaces.md | 2 +- mlir/docs/LangRef.md | 2 +- mlir/docs/{WritingAPass.md => PassManagement.md} | 6 +- mlir/docs/Passes.md | 2 +- mlir/docs/Quantization.md | 2 +- .../docs/{ => Rationale}/MLIRForGraphAlgorithms.md | 0 mlir/docs/{ => Rationale}/Rationale.md | 0 .../docs/{ => Rationale}/RationaleLinalgDialect.md | 0 .../RationaleSimplifiedPolyhedralForm.md | 0 mlir/docs/{ => Rationale}/UsageOfConst.md | 0 mlir/docs/ShapeInference.md | 2 +- mlir/docs/Traits.md | 7 +- mlir/docs/{ => Tutorials}/CreatingADialect.md | 0 .../{ => Tutorials}/DefiningAttributesAndTypes.md | 2 +- mlir/docs/{ => Tutorials}/QuickstartRewrites.md | 0 mlir/docs/Tutorials/Toy/Ch-3.md | 2 +- mlir/docs/Tutorials/Toy/Ch-5.md | 4 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 2 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 2 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 7 +- mlir/include/mlir/IR/AttributeSupport.h | 6 +- mlir/include/mlir/IR/Dialect.h | 16 +- mlir/include/mlir/IR/DialectHooks.h | 8 +- mlir/include/mlir/IR/DialectInterface.h | 12 +- mlir/include/mlir/IR/Identifier.h | 27 +- mlir/include/mlir/IR/Location.h | 12 +- mlir/include/mlir/IR/OpDefinition.h | 20 +- mlir/include/mlir/IR/OperationSupport.h | 20 +- mlir/include/mlir/IR/StorageUniquerSupport.h | 4 +- mlir/include/mlir/IR/TypeSupport.h | 8 +- mlir/include/mlir/Interfaces/SideEffects.h | 20 +- mlir/include/mlir/Pass/AnalysisManager.h | 35 +- mlir/include/mlir/Pass/Pass.h | 24 +- mlir/include/mlir/Pass/PassInstrumentation.h | 19 +- mlir/include/mlir/Pass/PassRegistry.h | 7 +- mlir/include/mlir/Support/STLExtras.h | 17 - mlir/include/mlir/Support/TypeID.h | 133 +++ mlir/include/mlir/Transforms/FoldUtils.h | 5 +- mlir/lib/IR/Attributes.cpp | 15 +- mlir/lib/IR/Dialect.cpp | 18 +- mlir/lib/IR/Location.cpp | 6 +- mlir/lib/IR/LocationDetail.h | 10 +- mlir/lib/IR/MLIRContext.cpp | 37 +- mlir/lib/Pass/Pass.cpp | 6 +- mlir/lib/Pass/PassRegistry.cpp | 8 +- mlir/lib/Pass/PassTiming.cpp | 12 +- mlir/lib/Target/CMakeLists.txt | 10 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 10 +- .../Utils/GreedyPatternRewriteDriver.cpp | 13 +- mlir/tools/mlir-opt/CMakeLists.txt | 3 - mlir/tools/mlir-tblgen/PassGen.cpp | 6 +- mlir/tools/mlir-translate/CMakeLists.txt | 7 +- openmp/libomptarget/plugins/cuda/src/rtl.cpp | 258 ++-- 209 files changed, 6642 insertions(+), 1382 deletions(-) delete mode 100644 clang-tools-extra/clangd/test/target_info.test create mode 100644 compiler-rt/test/tsan/fiber_cleanup.cpp create mode 100644 lld/test/wasm/export-empty.test create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll create mode 100644 llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll create mode 100644 llvm/test/CodeGen/X86/tail-dup-partial.ll rename mlir/docs/{WritingAPass.md => PassManagement.md} (99%) rename mlir/docs/{ => Rationale}/MLIRForGraphAlgorithms.md (100%) rename mlir/docs/{ => Rationale}/Rationale.md (100%) rename mlir/docs/{ => Rationale}/RationaleLinalgDialect.md (100%) rename mlir/docs/{ => Rationale}/RationaleSimplifiedPolyhedralForm.md (100%) rename mlir/docs/{ => Rationale}/UsageOfConst.md (100%) rename mlir/docs/{ => Tutorials}/CreatingADialect.md (100%) rename mlir/docs/{ => Tutorials}/DefiningAttributesAndTypes.md (99%) rename mlir/docs/{ => Tutorials}/QuickstartRewrites.md (100%) create mode 100644 mlir/include/mlir/Support/TypeID.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (5ffa7108e -> 9aa4dd80c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards 5ffa7108e 0: update: llvm-linux: boot new 9aa4dd80c 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5ffa7108e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 14 +- 02-build_llvm/console.log | 12910 ++++++++++++++++---------------- 03-build_linux/console.log | 1940 ++--- 04-boot_linux/console.log | 404 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 4 +- console.log | 15274 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 15278 insertions(+), 15278 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (5b8b9d0c6d0e -> b032227c6293)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/linux. from 5b8b9d0c6d0e Merge branch 'akpm' (patches from Andrew) adds c7850ae4d71c mailmap: Add Sedat Dilek (replacement for expired email address) adds e3c0f6f3fbda sh: use __builtin_constant_p() directly instead of IS_IMMEDIATE() adds c9ee4bf9e0f5 h8300: move definition of __kernel_size_t etc. to posix_types.h adds 7d538b5a1ddf sh: remove unneeded uapi asm-generic wrappers adds 06bd48b6cd97 lib/raid6/test: fix build on distros whose /bin/sh is not bash adds 418d6e295e43 x86: remove unneeded defined(__ASSEMBLY__) check from asm/ [...] adds 0f2661c4b935 x86: remove always-defined CONFIG_AS_CFI adds 46427f658e90 x86: remove unneeded (CONFIG_AS_)CFI_SIGNAL_FRAME adds 48e24723d0b5 x86: remove always-defined CONFIG_AS_CFI_SECTIONS adds 92203b02805d x86: remove always-defined CONFIG_AS_SSSE3 adds 42251572c468 x86: remove always-defined CONFIG_AS_AVX adds 8192e551c7e6 drm/i915: remove always-defined CONFIG_AS_MOVNTDQA adds 5e8ebd841a44 x86: probe assembler capabilities via kconfig instead of makefile adds e9e070cfe141 x86: add comments about the binutils version to support co [...] adds 4dcbfc35f7da crypto: x86 - rework configuration based on Kconfig adds 3f523e12404c crypto: curve25519 - do not pollute dispatcher based on assembler adds 0aa78b105f57 Documentation/changes: Raise minimum supported binutils ve [...] adds d7e40ea83eb9 crypto: x86 - clean up poly1305-x86_64-cryptogams.S by 'ma [...] adds e6abef610c73 x86: update AS_* macros to binutils >=2.23, supporting ADX [...] adds afe956c577b2 kbuild: Enable -Wtautological-compare adds 77342a02ff6e gcc-plugins: drop support for GCC <= 4.7 adds cf497b922386 kconfig: qconf: clean deprecated warnings adds 5752ff07fd90 kconfig: qconf: Change title for the item window adds cce1faba8264 kconfig: qconf: fix the content of the main widget adds b311142fcfd3 kconfig: qconf: fix support for the split view mode adds e1f7769f6094 kconfig: qconf: remove some old bogus TODOs adds 60969f02f07a kconfig: qconf: Fix a few alignment issues adds 4dcc9a88448a kbuild: mkcompile_h: Include $LD version in /proc/version adds 0f44fbc162b7 Documentation/llvm: fix the name of llvm-size adds 01a6126b5f7e kbuild: do not pass $(KBUILD_CFLAGS) to scripts/mkcompile_h adds c8bddf4feaab kbuild: remove -I$(srctree)/tools/include from scripts/Makefile adds 2a5e5d0c9669 MIPS: fw: arc: add __weak to prom_meminit and prom_free_pr [...] adds 7273ad2b08f8 kbuild: link lib-y objects to vmlinux forcibly when CONFIG [...] adds 76426e238834 kbuild: add dummy toolchains to enable all cc-option etc. [...] adds 7e20e47c70f8 kbuild: replace AS=clang with LLVM_IAS=1 adds a0d1c951ef08 kbuild: support LLVM=1 to switch the default tools to Clang/LLVM adds 00d76a0c1943 kbuild: fix comment about missing include guard detection adds b753101a4ac0 Merge tag 'kbuild-v5.7-2' of git://git.kernel.org/pub/scm/ [...] adds cdcda0d1f8f4 dma-direct: fix data truncation in dma_direct_get_required_mask() adds 9bb50ed74709 dma-debug: fix displaying of dma allocation type adds 75e71883979c Merge tag 'dma-mapping-5.7-1' of git://git.infradead.org/u [...] adds f26e433185cb arch: nios2: Enable the common clk subsystem on Nios2 adds 6dd5d3b8ad2b arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio' adds d00935affc8f arch: nios2: remove 'resetvalue' property adds 0ec8a5054d7f MAINTAINERS: Remove nios2-dev(a)lists.rocketboards.org adds b032227c6293 Merge tag 'nios2-v5.7-rc1' of git://git.kernel.org/pub/scm [...] No new revisions were added by this update. Summary of changes: .mailmap | 1 + .../devicetree/bindings/fpga/fpga-region.txt | 5 +- Documentation/kbuild/kbuild.rst | 5 + Documentation/kbuild/llvm.rst | 15 +- Documentation/process/changes.rst | 4 +- MAINTAINERS | 4 - Makefile | 40 +++-- arch/h8300/include/uapi/asm/bitsperlong.h | 15 -- arch/h8300/include/uapi/asm/posix_types.h | 13 ++ arch/mips/fw/arc/memory.c | 4 +- arch/nios2/Kconfig | 1 + arch/nios2/boot/dts/10m50_devboard.dts | 6 +- arch/nios2/platform/platform.c | 8 + arch/sh/include/asm/bitops-op32.h | 8 +- arch/sh/include/uapi/asm/setup.h | 2 - arch/sh/include/uapi/asm/types.h | 2 - arch/x86/Kconfig | 2 + arch/x86/Kconfig.assembler | 17 +++ arch/x86/Makefile | 22 --- arch/x86/crypto/Makefile | 162 ++++++++------------- arch/x86/crypto/aesni-intel_avx-x86_64.S | 6 - arch/x86/crypto/aesni-intel_glue.c | 21 +-- arch/x86/crypto/blake2s-core.S | 2 - arch/x86/crypto/chacha_glue.c | 6 +- arch/x86/crypto/poly1305-x86_64-cryptogams.pl | 16 -- arch/x86/crypto/poly1305_glue.c | 11 +- arch/x86/crypto/sha1_ssse3_asm.S | 4 - arch/x86/crypto/sha1_ssse3_glue.c | 13 -- arch/x86/crypto/sha256-avx-asm.S | 3 - arch/x86/crypto/sha256-avx2-asm.S | 3 - arch/x86/crypto/sha256_ssse3_glue.c | 12 -- arch/x86/crypto/sha512-avx-asm.S | 2 - arch/x86/crypto/sha512-avx2-asm.S | 3 - arch/x86/crypto/sha512_ssse3_glue.c | 10 -- arch/x86/include/asm/dwarf2.h | 44 ------ arch/x86/include/asm/xor_avx.h | 9 -- drivers/gpu/drm/i915/Makefile | 3 - drivers/gpu/drm/i915/i915_memcpy.c | 5 - include/crypto/curve25519.h | 6 +- init/Makefile | 2 +- kernel/dma/debug.c | 9 +- kernel/dma/direct.c | 3 +- lib/raid6/algos.c | 8 +- lib/raid6/avx2.c | 4 - lib/raid6/recov_avx2.c | 6 - lib/raid6/recov_ssse3.c | 6 - lib/raid6/test/Makefile | 9 +- net/netfilter/Makefile | 2 +- net/netfilter/nf_tables_api.c | 2 +- net/netfilter/nft_set_pipapo.c | 2 +- net/netfilter/nft_set_pipapo_avx2.h | 4 +- scripts/Kconfig.include | 3 - scripts/Makefile | 4 - scripts/Makefile.build | 19 +-- scripts/Makefile.clean | 1 - scripts/Makefile.extrawarn | 1 + scripts/Makefile.host | 23 +-- scripts/dummy-tools/gcc | 91 ++++++++++++ scripts/dummy-tools/ld | 30 ++++ scripts/dummy-tools/nm | 1 + scripts/dummy-tools/objcopy | 1 + scripts/gcc-plugin.sh | 55 +------ scripts/gcc-plugins/Kconfig | 12 +- scripts/gcc-plugins/Makefile | 21 +-- scripts/kconfig/qconf.cc | 90 ++++++++---- scripts/kconfig/qconf.h | 2 + scripts/mkcompile_h | 6 +- tools/objtool/Makefile | 6 + usr/include/Makefile | 2 +- 69 files changed, 406 insertions(+), 534 deletions(-) delete mode 100644 arch/h8300/include/uapi/asm/bitsperlong.h create mode 100644 arch/h8300/include/uapi/asm/posix_types.h delete mode 100644 arch/sh/include/uapi/asm/setup.h delete mode 100644 arch/sh/include/uapi/asm/types.h create mode 100644 arch/x86/Kconfig.assembler create mode 100755 scripts/dummy-tools/gcc create mode 100755 scripts/dummy-tools/ld create mode 120000 scripts/dummy-tools/nm create mode 120000 scripts/dummy-tools/objcopy -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (7824768b2e7 -> d985b0bf5c8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/llvm-project. from 7824768b2e7 [mlir][Pass] Add a new `Pass::getArgument` hook adds 9c1842d8aff Change FastISel::CallLoweringInfo::CS to be an ImmutableCal [...] adds a517191a474 [mlir][NFC] Refactor ClassID into a TypeID class. adds efeb35e1956 tsan: disable ASLR in Go test on NetBSD adds 1624be938dd tsan: fix leak of ThreadSignalContext memory mapping when d [...] adds 76503cb3e1b [PDB] Remove defunct PDBFileBuilder::commitFpm declaration. NFC. adds c65e6079fc9 tsan: add newline in test file adds 8340c844aee Analysis.h - remove unused SDNode/SDValue/SelectionDAG forw [...] adds fcabd7530f6 CallingConvLower.h - remove unused llvm::TargetMachine forw [...] adds a2519be0e92 ExecutionDomainFix.h - remove unused llvm::MachineBasicBloc [...] adds 595c28e6182 IntrinsicLowering.h - remove unused llvm::Module forward de [...] adds 6aa85d5214e PredicateInfo.h - remove unused llvm::Instruction/MemoryAcc [...] adds feed674deca [OpenMP] Introduce stream pool to make sure the correctness [...] adds ca23d14fa20 Passes.h - remove unused llvm::LoopPass/Pass/PassInfo forwa [...] adds e3b47c5adc8 OptimizationRemarkEmitter.h - remove unused llvm::DebugLoc/ [...] adds 566359193d8 SyntheticCountsUtils.h - remove unused llvm::CallGraph/Func [...] adds 78730a68400 ObjCARCAnalysisUtils.h - remove unused llvm::raw_ostream fo [...] adds 142dd80d098 PhiValues.h - remove unused llvm::Use forward declaration. NFC. adds 9eacd000cbc Local.h - remove unnecessary Twine.h include. NFC. adds 89f6ca05b74 CodeGen/EdgeBundles - move Twine.h include down into EdgeBu [...] adds 7cc6d0cc90e [TSAN] Fix infinite loop on targets where char is unsigned adds 719846c469e [VPlan] Drop redundant private: at beginning of class defs (NFC). adds 512600e3c0d [PowerPC] Handle f16 as a storage type only adds 5ef2cb3df4c [FormatVariadic] Reduce allocations adds e590bd6b921 [argpromote] Use formatv to simplify code. NFCI. adds 0292ddc7114 [FormatVariadic] Put back return type in an attempt to make [...] adds adb456b8d32 TargetLoweringObjectFileImpl.h - replace MCExpr.h and Modul [...] adds 1318ddbc14c [VectorUtils] rename scaleShuffleMask to narrowShuffleMaskE [...] adds cbcb12fd44d [MLIR] Handle in-place folding properly in greedy pattern r [...] adds 612f23857f3 [scudo][standalone] Work with -Werror=class-memaccess adds cf29333f40e AMDGPU/GlobalISel: Work around forming illegal zextload aft [...] adds 2f7707db025 [mlir][toy][docs] Reword for better sentence flow. NFC adds 3737be8902b [mlir][toy][docs] Fix reference to generated ToyCombine.inc. NFC adds 015ebd2930b [mlir][toy] Fix comment typo. NFC adds 0dbaafaa3a6 [mlir][docs] Explain the EDSC acronym. NFC adds a50df668f68 [clangd] Remove redundant code in test. NFC adds 52dcbcbfe07 Simplify string joins. NFCI. adds d2e5157c1f0 [MC] Add UseIntegratedAssembler = false. NFC adds 0a55d3f557a [MC] Default MCAsmInfo::UseIntegratedAssembler to true adds 470eb62d7bc [libc++][test] Silence "unused variable" warning adds 55de49ac1c3 [mlir][docs] Refactor the layout of the docs folder adds b96b9335aea Use more LLVM_ENABLE_ABI_BREAKING_CHECKS in Error.h adds 11455a79059 [CodeGen] Allow partial tail duplication in Machine Block P [...] adds c5497e53999 AMDGPU/GlobalISel: Fix legalizing <3 x s16> vselects adds 1747ba25b23 GlobalISel: Fix typo in assert message adds d34a91a10f7 [clangd][test] Provide registered targets to lit tests adds 806763efcff [CallSite removal][SelectionDAGBuilder] Use CallBase instea [...] adds 5d5671242eb [clangd] Disable failing target_info test adds 1b76c4cade5 ModuleUtils.h - include and forward declaration cleanup. NFC. adds 89b007037fd [mlir][docs] Remove the MLIR prefix from several titles. adds 4e86e5eedc6 [DenseMap] Add assertion that end() iterator isn't derefenced. adds 21a7d08e72d [X86] Move code that replaces ISD::VSELECT with X86ISD::BLE [...] adds d1da1b53ff8 [X86] Cleanup ISD::BRIND handling code in X86DAGToDAGISel:: [...] adds 75ea9e4e40c [MLIR][NFC] add doc cross links from/to std.alloca adds ac8d51a3c68 AMDGPU/GlobalISel: Legalize 16-bit shift amounts to s16 adds ab31797e166 This is a test commit. adds 61d39b627a8 Revert "This is a test commit." adds 7a45aeacf3a Revert "llvm-dwarfdump: Report errors when failing to parse [...] adds 96819011caa AMDGPU/GlobalISel: Fix RegBankSelect for v2s16 shifts adds 9225ff62789 [lld][WebAssembly] Add test for --export of empty string adds 72ffeb2d38f [LoopTerminology] LCSSA: Fix typo in code sample adds d3465e06912 [X86] Enable shuffle combining for AVX512 unless the root i [...] new 5b423990297 [CallSite removal][FastISel] Remove uses of CallSite. new 0031c7f7dab Implement some micro-optimizations for Identifier. NFC new ed87d9d6434 Change the implementation of mlir::hash_value(Identifier) t [...] new 4c18e1d3afe [MLIR] add cmake abstraction for translation libraries new 4956871c0e6 [MLIR] CMake cleanup for mlir-opt new aef4ec00f99 Change the identifier table in MLIRContext to use StringSet [...] new d985b0bf5c8 A few cosmetic cleanups to StringMap/StringSet.h, including [...] The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/test/lit.cfg.py | 11 +- clang-tools-extra/clangd/test/target_info.test | 35 - .../clangd/unittests/SerializationTests.cpp | 3 - clang/lib/Format/BreakableToken.cpp | 3 +- clang/lib/Sema/Sema.cpp | 10 +- clang/tools/driver/cc1as_main.cpp | 7 +- .../lib/sanitizer_common/sanitizer_linux.cpp | 4 +- compiler-rt/lib/scudo/standalone/mutex.h | 2 +- compiler-rt/lib/scudo/standalone/quarantine.h | 7 +- compiler-rt/lib/scudo/standalone/stats.h | 4 +- compiler-rt/lib/tsan/go/buildgo.sh | 4 + .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 7 +- compiler-rt/lib/tsan/rtl/tsan_platform.h | 1 + compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp | 3 + compiler-rt/test/tsan/fiber_cleanup.cpp | 71 ++ .../tuple.cnstr/alloc_const_Types.pass.cpp | 2 +- lld/test/wasm/export-empty.test | 4 + llvm/docs/LoopTerminology.rst | 1 - llvm/include/llvm/ADT/DenseMap.h | 3 + llvm/include/llvm/ADT/StringMap.h | 107 +- llvm/include/llvm/ADT/StringSet.h | 65 +- llvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h | 4 - .../llvm/Analysis/OptimizationRemarkEmitter.h | 4 - llvm/include/llvm/Analysis/Passes.h | 3 - llvm/include/llvm/Analysis/PhiValues.h | 1 - llvm/include/llvm/Analysis/SyntheticCountsUtils.h | 3 - llvm/include/llvm/Analysis/Utils/Local.h | 1 - llvm/include/llvm/Analysis/VectorUtils.h | 16 +- llvm/include/llvm/CodeGen/Analysis.h | 3 - llvm/include/llvm/CodeGen/CallingConvLower.h | 1 - llvm/include/llvm/CodeGen/EdgeBundles.h | 1 - llvm/include/llvm/CodeGen/ExecutionDomainFix.h | 1 - llvm/include/llvm/CodeGen/FastISel.h | 10 +- llvm/include/llvm/CodeGen/IntrinsicLowering.h | 1 - .../llvm/CodeGen/TargetLoweringObjectFileImpl.h | 5 +- .../llvm/DebugInfo/PDB/Native/PDBFileBuilder.h | 1 - llvm/include/llvm/Support/Error.h | 6 + llvm/include/llvm/Support/FormatVariadic.h | 63 +- llvm/include/llvm/Support/PointerLikeTypeTraits.h | 7 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 9 + llvm/include/llvm/Transforms/Utils/ModuleUtils.h | 4 +- llvm/include/llvm/Transforms/Utils/PredicateInfo.h | 3 - llvm/lib/Analysis/VectorUtils.cpp | 16 +- llvm/lib/CodeGen/EdgeBundles.cpp | 1 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- llvm/lib/CodeGen/MachineBlockPlacement.cpp | 8 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 43 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 44 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 3 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 4 +- llvm/lib/MC/MCAsmInfo.cpp | 2 +- llvm/lib/MC/MCAsmInfoCOFF.cpp | 2 - llvm/lib/MC/MCAsmInfoDarwin.cpp | 2 - llvm/lib/Support/FormatVariadic.cpp | 4 +- llvm/lib/Support/Triple.cpp | 8 +- .../AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUCombine.td | 14 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 18 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 22 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 2 + llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp | 5 - llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp | 1 - llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h | 2 + .../Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp | 1 + .../Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp | 3 - .../Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp | 1 - .../lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp | 1 - .../Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp | 2 + .../Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 17 + llvm/lib/Target/PowerPC/PPCInstrVSX.td | 10 + .../Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp | 1 + .../Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp | 2 - .../SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp | 2 - llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp | 1 + llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp | 10 - llvm/lib/Target/X86/X86FastISel.cpp | 14 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 36 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 131 ++- llvm/lib/Target/X86/X86InterleavedAccess.cpp | 8 +- .../Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp | 2 + llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 10 +- .../InstCombine/InstCombineVectorOps.cpp | 2 +- .../Vectorize/LoopVectorizationPlanner.h | 1 - llvm/lib/Transforms/Vectorize/VPlan.h | 18 - llvm/lib/Transforms/Vectorize/VPlanValue.h | 3 - llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 2 +- llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll | 1224 +++++++++++++++++++ .../AMDGPU/GlobalISel/inst-select-ashr.s16.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-lshr.s16.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 178 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 40 +- .../CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 139 +++ .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 46 +- llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll | 1234 ++++++++++++++++++++ .../AMDGPU/GlobalISel/regbankselect-ashr.mir | 209 +++- .../AMDGPU/GlobalISel/regbankselect-lshr.mir | 212 +++- .../AMDGPU/GlobalISel/regbankselect-shl.mir | 209 +++- llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll | 1200 +++++++++++++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll | 217 ++++ .../CodeGen/PowerPC/handle-f16-storage-type.ll | 200 ++++ .../test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll | 14 +- llvm/test/CodeGen/X86/avx512-cvt.ll | 26 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 13 +- .../CodeGen/X86/sse2-intrinsics-x86-upgrade.ll | 14 +- llvm/test/CodeGen/X86/sse41.ll | 8 +- llvm/test/CodeGen/X86/tail-dup-partial.ll | 85 ++ llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll | 6 +- llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll | 6 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 36 +- llvm/test/CodeGen/X86/vector-fshl-256.ll | 13 +- llvm/test/CodeGen/X86/vector-fshl-512.ll | 83 +- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 13 +- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 57 +- llvm/test/CodeGen/X86/vector-fshr-256.ll | 13 +- llvm/test/CodeGen/X86/vector-fshr-512.ll | 99 +- llvm/test/CodeGen/X86/vector-fshr-rot-256.ll | 13 +- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 57 +- llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll | 98 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 130 +-- llvm/test/CodeGen/X86/vector-rotate-256.ll | 13 +- llvm/test/CodeGen/X86/vector-rotate-512.ll | 57 +- llvm/test/CodeGen/X86/vector-shift-lshr-256.ll | 13 +- llvm/test/CodeGen/X86/vector-shift-lshr-512.ll | 13 +- llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 4 +- .../X86/vector-shuffle-combining-avx512bw.ll | 14 +- .../X86/vector-shuffle-combining-avx512f.ll | 19 +- llvm/test/CodeGen/X86/vector-shuffle-v1.ll | 10 +- .../X86/dwarfdump-debug-loc-error-cases.s | 12 +- .../X86/dwarfdump-debug-loc-error-cases2.s | 11 +- .../X86/dwarfdump-debug-loclists-error-cases.s | 14 +- .../X86/dwarfdump-debug-loclists-error-cases2.s | 9 +- .../test/DebugInfo/X86/dwarfdump-ranges-baseaddr.s | 2 +- .../X86/dwarfdump-str-offsets-invalid-6.s | 2 +- .../X86/debug_addr_address_size_not_multiple.s | 2 +- .../X86/debug_addr_invalid_addr_size.s | 2 +- .../X86/debug_addr_reserved_length.s | 2 +- .../X86/debug_addr_segment_selector.s | 2 +- .../X86/debug_addr_small_length_field.s | 2 +- ...ebug_addr_too_small_for_extended_length_field.s | 2 +- .../X86/debug_addr_too_small_for_length_field.s | 2 +- .../X86/debug_addr_too_small_for_section.s | 2 +- .../X86/debug_addr_unsupported_version.s | 2 +- .../test/tools/llvm-dwarfdump/X86/debug_rnglists.s | 5 +- .../llvm-dwarfdump/X86/debug_rnglists_invalid.s | 4 +- .../X86/debug_rnglists_reserved_length.s | 2 +- llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp | 3 +- llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp | 17 +- llvm/unittests/Analysis/VectorUtilsTest.cpp | 6 +- mlir/cmake/modules/AddMLIR.cmake | 6 + mlir/docs/Diagnostics.md | 2 +- mlir/docs/EDSC.md | 7 +- mlir/docs/GenericDAGRewriter.md | 2 +- mlir/docs/Interfaces.md | 2 +- mlir/docs/LangRef.md | 2 +- mlir/docs/{WritingAPass.md => PassManagement.md} | 6 +- mlir/docs/Passes.md | 2 +- mlir/docs/Quantization.md | 2 +- .../docs/{ => Rationale}/MLIRForGraphAlgorithms.md | 0 mlir/docs/{ => Rationale}/Rationale.md | 0 .../docs/{ => Rationale}/RationaleLinalgDialect.md | 0 .../RationaleSimplifiedPolyhedralForm.md | 0 mlir/docs/{ => Rationale}/UsageOfConst.md | 0 mlir/docs/ShapeInference.md | 2 +- mlir/docs/Traits.md | 7 +- mlir/docs/{ => Tutorials}/CreatingADialect.md | 0 .../{ => Tutorials}/DefiningAttributesAndTypes.md | 2 +- mlir/docs/{ => Tutorials}/QuickstartRewrites.md | 0 mlir/docs/Tutorials/Toy/Ch-3.md | 2 +- mlir/docs/Tutorials/Toy/Ch-5.md | 4 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 2 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 2 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 7 +- mlir/include/mlir/IR/AttributeSupport.h | 6 +- mlir/include/mlir/IR/Dialect.h | 16 +- mlir/include/mlir/IR/DialectHooks.h | 8 +- mlir/include/mlir/IR/DialectInterface.h | 12 +- mlir/include/mlir/IR/Identifier.h | 27 +- mlir/include/mlir/IR/Location.h | 12 +- mlir/include/mlir/IR/OpDefinition.h | 20 +- mlir/include/mlir/IR/OperationSupport.h | 20 +- mlir/include/mlir/IR/StorageUniquerSupport.h | 4 +- mlir/include/mlir/IR/TypeSupport.h | 8 +- mlir/include/mlir/Interfaces/SideEffects.h | 20 +- mlir/include/mlir/Pass/AnalysisManager.h | 35 +- mlir/include/mlir/Pass/Pass.h | 24 +- mlir/include/mlir/Pass/PassInstrumentation.h | 19 +- mlir/include/mlir/Pass/PassRegistry.h | 7 +- mlir/include/mlir/Support/STLExtras.h | 17 - mlir/include/mlir/Support/TypeID.h | 133 +++ mlir/include/mlir/Transforms/FoldUtils.h | 5 +- mlir/lib/IR/Attributes.cpp | 15 +- mlir/lib/IR/Dialect.cpp | 18 +- mlir/lib/IR/Location.cpp | 6 +- mlir/lib/IR/LocationDetail.h | 10 +- mlir/lib/IR/MLIRContext.cpp | 37 +- mlir/lib/Pass/Pass.cpp | 6 +- mlir/lib/Pass/PassRegistry.cpp | 8 +- mlir/lib/Pass/PassTiming.cpp | 12 +- mlir/lib/Target/CMakeLists.txt | 10 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 10 +- .../Utils/GreedyPatternRewriteDriver.cpp | 13 +- mlir/tools/mlir-opt/CMakeLists.txt | 3 - mlir/tools/mlir-tblgen/PassGen.cpp | 6 +- mlir/tools/mlir-translate/CMakeLists.txt | 7 +- openmp/libomptarget/plugins/cuda/src/rtl.cpp | 258 ++-- 209 files changed, 6642 insertions(+), 1382 deletions(-) delete mode 100644 clang-tools-extra/clangd/test/target_info.test create mode 100644 compiler-rt/test/tsan/fiber_cleanup.cpp create mode 100644 lld/test/wasm/export-empty.test create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll create mode 100644 llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll create mode 100644 llvm/test/CodeGen/X86/tail-dup-partial.ll rename mlir/docs/{WritingAPass.md => PassManagement.md} (99%) rename mlir/docs/{ => Rationale}/MLIRForGraphAlgorithms.md (100%) rename mlir/docs/{ => Rationale}/Rationale.md (100%) rename mlir/docs/{ => Rationale}/RationaleLinalgDialect.md (100%) rename mlir/docs/{ => Rationale}/RationaleSimplifiedPolyhedralForm.md (100%) rename mlir/docs/{ => Rationale}/UsageOfConst.md (100%) rename mlir/docs/{ => Tutorials}/CreatingADialect.md (100%) rename mlir/docs/{ => Tutorials}/DefiningAttributesAndTypes.md (99%) rename mlir/docs/{ => Tutorials}/QuickstartRewrites.md (100%) create mode 100644 mlir/include/mlir/Support/TypeID.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig updated (73b0b17e6 -> 36b9c7a7b)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 73b0b17e6 0: update: llvm-linux: boot new 36b9c7a7b 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (73b0b17e6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-build_llvm/console.log | 12808 +++++++++++++-------------- 03-build_linux/console.log | 715 +- 04-boot_linux/console.log | 480 +- 05-check_regression/console.log | 22 +- 05-check_regression/results.regressions | 2 +- 06-update_baseline/console.log | 10 +- 06-update_baseline/results.regressions | 2 +- console.log | 14163 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- results | 2 +- 11 files changed, 14179 insertions(+), 14165 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (bb87d5cc77d -> ae6fc5ce437)

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (cf83625da2 -> 0b07a19901)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/binutils-gdb. from cf83625da2 gdb: fix undefined behavior reported in copy_bitwise adds 0b07a19901 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (526892e18 -> 5e5d2ac3c)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 526892e18 0: update: binutils-gcc-linux: boot new 5e5d2ac3c 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (526892e18) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 174 +- 02-prepare_abe/console.log | 132 +- 03-build_abe-binutils/console.log | 9551 +++++---- 04-build_abe-stage1/console.log | 20250 +++++++++--------- 05-build_linux/console.log | 3284 +-- 06-boot_linux/console.log | 480 +- 07-check_regression/console.log | 12 +- 07-check_regression/results.regressions | 4 +- 08-update_baseline/console.log | 18 +- 08-update_baseline/results.regressions | 4 +- console.log | 33909 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 12 files changed, 33894 insertions(+), 33936 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (47539a4acef -> ae6fc5ce437)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/gcc. from 47539a4acef Daily bump. adds a615ea71bc8 cselib: Mark the cselib_record_sp_cfa_base_equiv VALUE as p [...] adds bb87d5cc77d testsuite: Fix up pr94482.c testcase [PR94482] adds f883c46b487 i386: Fix REDUC_SSE_SMINMAX_MODE mode conditions. adds 4ded16a7782 c++: Add test for PR 86327. adds ae6fc5ce437 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 13 +++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/i386/sse.md | 4 ++-- gcc/cselib.c | 5 ++++- gcc/testsuite/ChangeLog | 17 +++++++++++++++++ gcc/testsuite/g++.dg/cpp1y/constexpr-return5.C | 12 ++++++++++++ gcc/testsuite/gcc.dg/torture/pr94482.c | 4 ++-- gcc/testsuite/gcc.target/i386/pr94494.c | 23 +++++++++++++++++++++++ 8 files changed, 74 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-return5.C create mode 100644 gcc/testsuite/gcc.target/i386/pr94494.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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