Tcwg-commits April 2020

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (15000650a6d -> 7a45aeacf3a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 15000650a6d [lit] Fix tests on Windows adds 6e7eeb44b30 [GVN] Fix VNCoercion for Scalable Vector. adds 49ae0fc2f08 GlobalISel: Fix incorrect lowering G_FCOPYSIGN adds e4767a6f143 [libc] Add fully-qualified target names. adds ed03d9485eb Revert "[TLI] Per-function fveclib for math library used fo [...] adds f7de4b5d6bc Thread Plans pushed by a scripted plan should be private plans. adds aa4b37b2acd Convert the ThreadPlanCommands test to use a scripted plan [...] adds 0505181006f [X86] Fix to X86LoadValueInjectionRetHardeningPass for poss [...] adds 04eae396176 [PowerPC] Another folow-up fix for 6c4b40def776 adds f49f6cf91eb [CallSite removal][SelectionDAGBuilder] Remove most CallSit [...] adds c610807afe5 [lit] Temporarily disable failing tests on Windows adds 5d73f79c547 [X86][MC] Make -x86-pad-max-prefix-size compatible with --m [...] adds 7ad46cfe415 [NFC][test] Refine tests for branch align adds 7824768b2e7 [mlir][Pass] Add a new `Pass::getArgument` hook adds 9c1842d8aff Change FastISel::CallLoweringInfo::CS to be an ImmutableCal [...] adds a517191a474 [mlir][NFC] Refactor ClassID into a TypeID class. adds efeb35e1956 tsan: disable ASLR in Go test on NetBSD adds 1624be938dd tsan: fix leak of ThreadSignalContext memory mapping when d [...] adds 76503cb3e1b [PDB] Remove defunct PDBFileBuilder::commitFpm declaration. NFC. adds c65e6079fc9 tsan: add newline in test file adds 8340c844aee Analysis.h - remove unused SDNode/SDValue/SelectionDAG forw [...] adds fcabd7530f6 CallingConvLower.h - remove unused llvm::TargetMachine forw [...] adds a2519be0e92 ExecutionDomainFix.h - remove unused llvm::MachineBasicBloc [...] adds 595c28e6182 IntrinsicLowering.h - remove unused llvm::Module forward de [...] adds 6aa85d5214e PredicateInfo.h - remove unused llvm::Instruction/MemoryAcc [...] adds feed674deca [OpenMP] Introduce stream pool to make sure the correctness [...] adds ca23d14fa20 Passes.h - remove unused llvm::LoopPass/Pass/PassInfo forwa [...] adds e3b47c5adc8 OptimizationRemarkEmitter.h - remove unused llvm::DebugLoc/ [...] adds 566359193d8 SyntheticCountsUtils.h - remove unused llvm::CallGraph/Func [...] adds 78730a68400 ObjCARCAnalysisUtils.h - remove unused llvm::raw_ostream fo [...] adds 142dd80d098 PhiValues.h - remove unused llvm::Use forward declaration. NFC. adds 9eacd000cbc Local.h - remove unnecessary Twine.h include. NFC. adds 89f6ca05b74 CodeGen/EdgeBundles - move Twine.h include down into EdgeBu [...] adds 7cc6d0cc90e [TSAN] Fix infinite loop on targets where char is unsigned adds 719846c469e [VPlan] Drop redundant private: at beginning of class defs (NFC). adds 512600e3c0d [PowerPC] Handle f16 as a storage type only adds 5ef2cb3df4c [FormatVariadic] Reduce allocations adds e590bd6b921 [argpromote] Use formatv to simplify code. NFCI. adds 0292ddc7114 [FormatVariadic] Put back return type in an attempt to make [...] adds adb456b8d32 TargetLoweringObjectFileImpl.h - replace MCExpr.h and Modul [...] adds 1318ddbc14c [VectorUtils] rename scaleShuffleMask to narrowShuffleMaskE [...] adds cbcb12fd44d [MLIR] Handle in-place folding properly in greedy pattern r [...] adds 612f23857f3 [scudo][standalone] Work with -Werror=class-memaccess adds cf29333f40e AMDGPU/GlobalISel: Work around forming illegal zextload aft [...] adds 2f7707db025 [mlir][toy][docs] Reword for better sentence flow. NFC adds 3737be8902b [mlir][toy][docs] Fix reference to generated ToyCombine.inc. NFC adds 015ebd2930b [mlir][toy] Fix comment typo. NFC adds 0dbaafaa3a6 [mlir][docs] Explain the EDSC acronym. NFC adds a50df668f68 [clangd] Remove redundant code in test. NFC adds 52dcbcbfe07 Simplify string joins. NFCI. adds d2e5157c1f0 [MC] Add UseIntegratedAssembler = false. NFC adds 0a55d3f557a [MC] Default MCAsmInfo::UseIntegratedAssembler to true adds 470eb62d7bc [libc++][test] Silence "unused variable" warning adds 55de49ac1c3 [mlir][docs] Refactor the layout of the docs folder adds b96b9335aea Use more LLVM_ENABLE_ABI_BREAKING_CHECKS in Error.h adds 11455a79059 [CodeGen] Allow partial tail duplication in Machine Block P [...] adds c5497e53999 AMDGPU/GlobalISel: Fix legalizing <3 x s16> vselects adds 1747ba25b23 GlobalISel: Fix typo in assert message adds d34a91a10f7 [clangd][test] Provide registered targets to lit tests adds 806763efcff [CallSite removal][SelectionDAGBuilder] Use CallBase instea [...] adds 5d5671242eb [clangd] Disable failing target_info test adds 1b76c4cade5 ModuleUtils.h - include and forward declaration cleanup. NFC. adds 89b007037fd [mlir][docs] Remove the MLIR prefix from several titles. adds 4e86e5eedc6 [DenseMap] Add assertion that end() iterator isn't derefenced. adds 21a7d08e72d [X86] Move code that replaces ISD::VSELECT with X86ISD::BLE [...] adds d1da1b53ff8 [X86] Cleanup ISD::BRIND handling code in X86DAGToDAGISel:: [...] adds 75ea9e4e40c [MLIR][NFC] add doc cross links from/to std.alloca adds ac8d51a3c68 AMDGPU/GlobalISel: Legalize 16-bit shift amounts to s16 new ab31797e166 This is a test commit. new 61d39b627a8 Revert "This is a test commit." new 7a45aeacf3a Revert "llvm-dwarfdump: Report errors when failing to parse [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/test/lit.cfg.py | 11 +- clang-tools-extra/clangd/test/target_info.test | 35 -- .../clangd/unittests/SerializationTests.cpp | 3 - clang/lib/CodeGen/BackendUtil.cpp | 29 +- clang/lib/CodeGen/CGCall.cpp | 21 -- clang/lib/Format/BreakableToken.cpp | 3 +- clang/lib/Sema/Sema.cpp | 10 +- clang/test/CodeGen/libcalls-veclib.c | 14 - clang/tools/driver/cc1as_main.cpp | 7 +- .../lib/sanitizer_common/sanitizer_linux.cpp | 4 +- compiler-rt/lib/scudo/standalone/mutex.h | 2 +- compiler-rt/lib/scudo/standalone/quarantine.h | 7 +- compiler-rt/lib/scudo/standalone/stats.h | 4 +- compiler-rt/lib/tsan/go/buildgo.sh | 4 + .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 7 +- compiler-rt/lib/tsan/rtl/tsan_platform.h | 1 + compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp | 3 + compiler-rt/test/tsan/fiber_cleanup.cpp | 71 ++++ libc/CMakeLists.txt | 4 +- libc/cmake/modules/LLVMLibCRules.cmake | 164 ++++++--- libc/cmake/modules/LLVMLibCTargetNameUtils.cmake | 32 ++ libc/config/linux/CMakeLists.txt | 2 +- libc/fuzzing/string/CMakeLists.txt | 6 +- libc/include/CMakeLists.txt | 36 +- libc/lib/CMakeLists.txt | 50 +-- libc/loader/linux/CMakeLists.txt | 44 ++- libc/loader/linux/x86_64/CMakeLists.txt | 4 +- libc/src/__support/CMakeLists.txt | 2 +- libc/src/assert/CMakeLists.txt | 6 +- libc/src/signal/CMakeLists.txt | 59 +++- libc/src/signal/linux/CMakeLists.txt | 54 +-- libc/src/stdlib/CMakeLists.txt | 15 +- libc/src/stdlib/linux/CMakeLists.txt | 6 +- libc/src/string/CMakeLists.txt | 25 +- libc/src/string/memory_utils/CMakeLists.txt | 2 +- libc/src/sys/mman/CMakeLists.txt | 16 +- libc/src/sys/mman/linux/CMakeLists.txt | 16 +- libc/src/threads/CMakeLists.txt | 35 ++ libc/src/threads/linux/CMakeLists.txt | 50 +-- libc/test/config/linux/x86_64/CMakeLists.txt | 3 +- libc/test/loader/CMakeLists.txt | 22 +- libc/test/loader/linux/CMakeLists.txt | 14 +- libc/test/src/assert/CMakeLists.txt | 8 +- libc/test/src/errno/CMakeLists.txt | 2 +- libc/test/src/signal/CMakeLists.txt | 70 ++-- libc/test/src/stdlib/CMakeLists.txt | 14 +- libc/test/src/string/CMakeLists.txt | 24 +- libc/test/src/string/memory_utils/CMakeLists.txt | 6 +- libc/test/src/sys/mman/linux/CMakeLists.txt | 10 +- libc/test/src/threads/CMakeLists.txt | 30 +- libc/utils/UnitTest/CMakeLists.txt | 2 +- .../tuple.cnstr/alloc_const_Types.pass.cpp | 2 +- lldb/source/API/SBThreadPlan.cpp | 14 +- .../thread_plan/TestThreadPlanCommands.py | 59 ++-- .../functionalities/thread_plan/wrap_step_over.py | 22 ++ llvm/include/llvm/ADT/DenseMap.h | 3 + llvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h | 4 - .../llvm/Analysis/OptimizationRemarkEmitter.h | 4 - llvm/include/llvm/Analysis/Passes.h | 3 - llvm/include/llvm/Analysis/PhiValues.h | 1 - llvm/include/llvm/Analysis/SyntheticCountsUtils.h | 3 - llvm/include/llvm/Analysis/TargetLibraryInfo.h | 154 ++++---- llvm/include/llvm/Analysis/Utils/Local.h | 1 - llvm/include/llvm/Analysis/VectorUtils.h | 16 +- llvm/include/llvm/CodeGen/Analysis.h | 3 - llvm/include/llvm/CodeGen/CallingConvLower.h | 1 - llvm/include/llvm/CodeGen/EdgeBundles.h | 1 - llvm/include/llvm/CodeGen/ExecutionDomainFix.h | 1 - llvm/include/llvm/CodeGen/FastISel.h | 10 +- llvm/include/llvm/CodeGen/IntrinsicLowering.h | 1 - .../llvm/CodeGen/TargetLoweringObjectFileImpl.h | 5 +- .../llvm/DebugInfo/PDB/Native/PDBFileBuilder.h | 1 - llvm/include/llvm/Support/Error.h | 6 + llvm/include/llvm/Support/FormatVariadic.h | 63 ++-- llvm/include/llvm/Target/TargetSelectionDAG.td | 9 + llvm/include/llvm/Transforms/Utils/ModuleUtils.h | 4 +- llvm/include/llvm/Transforms/Utils/PredicateInfo.h | 3 - llvm/lib/Analysis/InlineCost.cpp | 9 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 91 ++--- llvm/lib/Analysis/VectorUtils.cpp | 16 +- llvm/lib/CodeGen/EdgeBundles.cpp | 1 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 4 +- llvm/lib/CodeGen/MachineBlockPlacement.cpp | 8 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 4 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 158 +++++---- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 7 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 4 +- llvm/lib/MC/MCAsmInfo.cpp | 2 +- llvm/lib/MC/MCAsmInfoCOFF.cpp | 2 - llvm/lib/MC/MCAsmInfoDarwin.cpp | 2 - llvm/lib/MC/MCObjectStreamer.cpp | 3 +- llvm/lib/Support/FormatVariadic.cpp | 4 +- llvm/lib/Support/Triple.cpp | 8 +- .../AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUCombine.td | 14 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 18 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 2 + llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp | 5 - llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp | 1 - llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h | 2 + .../Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp | 1 + .../Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp | 3 - .../Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp | 1 - .../lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp | 1 - .../Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp | 2 + .../Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 3 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 9 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 17 + llvm/lib/Target/PowerPC/PPCInstrVSX.td | 10 + .../Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp | 1 + .../Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp | 2 - .../SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp | 2 - llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp | 1 + llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp | 10 - llvm/lib/Target/X86/X86FastISel.cpp | 14 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 36 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 20 +- llvm/lib/Target/X86/X86InterleavedAccess.cpp | 8 +- .../X86/X86LoadValueInjectionRetHardening.cpp | 3 + .../Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp | 2 + llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 10 +- .../InstCombine/InstCombineVectorOps.cpp | 2 +- .../InstCombine/InstructionCombining.cpp | 2 +- llvm/lib/Transforms/Utils/VNCoercion.cpp | 63 ++-- .../Vectorize/LoopVectorizationPlanner.h | 1 - llvm/lib/Transforms/Vectorize/VPlan.h | 18 - llvm/lib/Transforms/Vectorize/VPlanValue.h | 3 - llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 2 +- .../AMDGPU/GlobalISel/inst-select-ashr.s16.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-lshr.s16.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 178 +++++++++- .../AMDGPU/GlobalISel/legalize-fcopysign.mir | 45 +-- .../CodeGen/AMDGPU/GlobalISel/legalize-frint.mir | 37 +- .../AMDGPU/GlobalISel/legalize-intrinsic-round.mir | 392 ++++++++++++--------- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 40 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 139 ++++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 46 ++- llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll | 217 ++++++++++++ .../CodeGen/PowerPC/handle-f16-storage-type.ll | 200 +++++++++++ .../CodeGen/PowerPC/pcrel-call-linkage-leaf.ll | 9 + llvm/test/CodeGen/X86/tail-dup-partial.ll | 85 +++++ .../X86/dwarfdump-debug-loc-error-cases.s | 12 +- .../X86/dwarfdump-debug-loc-error-cases2.s | 11 +- .../X86/dwarfdump-debug-loclists-error-cases.s | 14 +- .../X86/dwarfdump-debug-loclists-error-cases2.s | 9 +- .../test/DebugInfo/X86/dwarfdump-ranges-baseaddr.s | 2 +- .../X86/dwarfdump-str-offsets-invalid-6.s | 2 +- ...align-branch-32-work.s => align-branch-32bit.s} | 2 +- ...lign-branch-64-align.s => align-branch-align.s} | 2 +- ...lign-branch-64-basic.s => align-branch-basic.s} | 2 +- ...gn-branch-64-bundle.s => align-branch-bundle.s} | 17 +- ...lign-branch-64-fused.s => align-branch-fused.s} | 2 +- ...-branch-64-general.s => align-branch-general.s} | 6 +- ...ranch-64-hardcode.s => align-branch-hardcode.s} | 2 +- ...lign-branch-64-mixed.s => align-branch-mixed.s} | 2 +- ...nch-64-necessary.s => align-branch-necessary.s} | 2 +- ...ranch-64-negative.s => align-branch-negative.s} | 2 +- ...-max-prefix.s => align-branch-pad-max-prefix.s} | 2 +- ...gn-branch-64-prefix.s => align-branch-prefix.s} | 2 +- ...nch-64-relax-all.s => align-branch-relax-all.s} | 3 +- ...-section-size.s => align-branch-section-size.s} | 2 +- ...gn-branch-64-single.s => align-branch-single.s} | 10 +- ...gn-branch-64-system.s => align-branch-system.s} | 2 +- llvm/test/MC/X86/align-branch-variant-symbol.s | 4 +- llvm/test/Transforms/GVN/vscale.ll | 344 ++++++++++++++++++ .../Inline/inline-no-builtin-compatible.ll | 4 +- llvm/test/Transforms/Inline/veclib-compat.ll | 48 --- .../X86/debug_addr_address_size_not_multiple.s | 2 +- .../X86/debug_addr_invalid_addr_size.s | 2 +- .../X86/debug_addr_reserved_length.s | 2 +- .../X86/debug_addr_segment_selector.s | 2 +- .../X86/debug_addr_small_length_field.s | 2 +- ...ebug_addr_too_small_for_extended_length_field.s | 2 +- .../X86/debug_addr_too_small_for_length_field.s | 2 +- .../X86/debug_addr_too_small_for_section.s | 2 +- .../X86/debug_addr_unsupported_version.s | 2 +- .../test/tools/llvm-dwarfdump/X86/debug_rnglists.s | 5 +- .../llvm-dwarfdump/X86/debug_rnglists_invalid.s | 4 +- .../X86/debug_rnglists_reserved_length.s | 2 +- llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp | 3 +- llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp | 17 +- llvm/unittests/Analysis/VectorUtilsTest.cpp | 6 +- llvm/utils/lit/tests/max-failures.py | 2 + llvm/utils/lit/tests/max-time.py | 2 + mlir/docs/Diagnostics.md | 2 +- mlir/docs/EDSC.md | 7 +- mlir/docs/GenericDAGRewriter.md | 2 +- mlir/docs/Interfaces.md | 2 +- mlir/docs/LangRef.md | 2 +- mlir/docs/{WritingAPass.md => PassManagement.md} | 6 +- mlir/docs/Passes.md | 2 +- mlir/docs/Quantization.md | 2 +- .../docs/{ => Rationale}/MLIRForGraphAlgorithms.md | 0 mlir/docs/{ => Rationale}/Rationale.md | 0 .../docs/{ => Rationale}/RationaleLinalgDialect.md | 0 .../RationaleSimplifiedPolyhedralForm.md | 0 mlir/docs/{ => Rationale}/UsageOfConst.md | 0 mlir/docs/ShapeInference.md | 2 +- mlir/docs/Traits.md | 7 +- mlir/docs/{ => Tutorials}/CreatingADialect.md | 0 .../{ => Tutorials}/DefiningAttributesAndTypes.md | 2 +- mlir/docs/{ => Tutorials}/QuickstartRewrites.md | 0 mlir/docs/Tutorials/Toy/Ch-3.md | 2 +- mlir/docs/Tutorials/Toy/Ch-5.md | 4 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 2 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 2 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 7 +- mlir/include/mlir/IR/AttributeSupport.h | 6 +- mlir/include/mlir/IR/Dialect.h | 16 +- mlir/include/mlir/IR/DialectHooks.h | 8 +- mlir/include/mlir/IR/DialectInterface.h | 12 +- mlir/include/mlir/IR/Location.h | 12 +- mlir/include/mlir/IR/OpDefinition.h | 20 +- mlir/include/mlir/IR/OperationSupport.h | 20 +- mlir/include/mlir/IR/StorageUniquerSupport.h | 4 +- mlir/include/mlir/IR/TypeSupport.h | 8 +- mlir/include/mlir/Interfaces/SideEffects.h | 20 +- mlir/include/mlir/Pass/AnalysisManager.h | 35 +- mlir/include/mlir/Pass/Pass.h | 41 ++- mlir/include/mlir/Pass/PassInstrumentation.h | 19 +- mlir/include/mlir/Pass/PassRegistry.h | 7 +- mlir/include/mlir/Support/STLExtras.h | 17 - mlir/include/mlir/Support/TypeID.h | 133 +++++++ mlir/include/mlir/Transforms/FoldUtils.h | 5 +- mlir/lib/IR/Dialect.cpp | 18 +- mlir/lib/IR/Location.cpp | 6 +- mlir/lib/IR/LocationDetail.h | 10 +- mlir/lib/IR/MLIRContext.cpp | 20 +- mlir/lib/Pass/Pass.cpp | 17 +- mlir/lib/Pass/PassRegistry.cpp | 8 +- mlir/lib/Pass/PassTiming.cpp | 12 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 10 +- .../Utils/GreedyPatternRewriteDriver.cpp | 13 +- mlir/tools/mlir-tblgen/PassGen.cpp | 10 +- openmp/libomptarget/plugins/cuda/src/rtl.cpp | 258 ++++++++++---- 238 files changed, 3271 insertions(+), 1607 deletions(-) delete mode 100644 clang-tools-extra/clangd/test/target_info.test delete mode 100644 clang/test/CodeGen/libcalls-veclib.c create mode 100644 compiler-rt/test/tsan/fiber_cleanup.cpp create mode 100644 libc/cmake/modules/LLVMLibCTargetNameUtils.cmake create mode 100644 lldb/test/API/functionalities/thread_plan/wrap_step_over.py create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll create mode 100644 llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll create mode 100644 llvm/test/CodeGen/X86/tail-dup-partial.ll rename llvm/test/MC/X86/{align-branch-32-work.s => align-branch-32bit.s} (51%) rename llvm/test/MC/X86/{align-branch-64-align.s => align-branch-align.s} (75%) rename llvm/test/MC/X86/{align-branch-64-basic.s => align-branch-basic.s} (92%) rename llvm/test/MC/X86/{align-branch-64-bundle.s => align-branch-bundle.s} (51%) rename llvm/test/MC/X86/{align-branch-64-fused.s => align-branch-fused.s} (82%) rename llvm/test/MC/X86/{align-branch-64-general.s => align-branch-general.s} (67%) rename llvm/test/MC/X86/{align-branch-64-hardcode.s => align-branch-hardcode.s} (74%) rename llvm/test/MC/X86/{align-branch-64-mixed.s => align-branch-mixed.s} (87%) rename llvm/test/MC/X86/{align-branch-64-necessary.s => align-branch-necessary.s} (78%) rename llvm/test/MC/X86/{align-branch-64-negative.s => align-branch-negative.s} (86%) rename llvm/test/MC/X86/{align-branch-64-pad-max-prefix.s => align-branch-pad-max- [...] rename llvm/test/MC/X86/{align-branch-64-prefix.s => align-branch-prefix.s} (86%) rename llvm/test/MC/X86/{align-branch-64-relax-all.s => align-branch-relax-all.s} (62%) rename llvm/test/MC/X86/{align-branch-64-section-size.s => align-branch-section-si [...] rename llvm/test/MC/X86/{align-branch-64-single.s => align-branch-single.s} (64%) rename llvm/test/MC/X86/{align-branch-64-system.s => align-branch-system.s} (86%) create mode 100644 llvm/test/Transforms/GVN/vscale.ll delete mode 100644 llvm/test/Transforms/Inline/veclib-compat.ll rename mlir/docs/{WritingAPass.md => PassManagement.md} (99%) rename mlir/docs/{ => Rationale}/MLIRForGraphAlgorithms.md (100%) rename mlir/docs/{ => Rationale}/Rationale.md (100%) rename mlir/docs/{ => Rationale}/RationaleLinalgDialect.md (100%) rename mlir/docs/{ => Rationale}/RationaleSimplifiedPolyhedralForm.md (100%) rename mlir/docs/{ => Rationale}/UsageOfConst.md (100%) rename mlir/docs/{ => Tutorials}/CreatingADialect.md (100%) rename mlir/docs/{ => Tutorials}/DefiningAttributesAndTypes.md (99%) rename mlir/docs/{ => Tutorials}/QuickstartRewrites.md (100%) create mode 100644 mlir/include/mlir/Support/TypeID.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (4e5483194 -> e312c5585)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 4e5483194 0: update: llvm-linux: all new e312c5585 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4e5483194) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 70 +- 02-build_llvm/console.log | 12956 ++++++++++++++-------------- 03-build_linux/console.log | 680 +- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 12 +- 05-check_regression/results.regressions | 2 +- 06-update_baseline/console.log | 18 +- console.log | 13738 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- results | 2 +- 10 files changed, 13746 insertions(+), 13746 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (f41bd52147a -> d2fee90546d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/gcc. from f41bd52147a Daily bump. adds 59eddd97690 i386: Fix REDUC_SSE_SMINMAX_MODE mode conditions. adds d2fee90546d i386: Fix REDUC_SSE_SMINMAX_MODE mode conditions. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 6 ++++++ gcc/config/i386/sse.md | 4 ++-- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr94494.c | 23 +++++++++++++++++++++++ 4 files changed, 36 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr94494.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (2a05ed8d6 -> 34dd2bb79)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 2a05ed8d6 0: update: binutils-gcc-linux: boot new 34dd2bb79 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (2a05ed8d6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-prepare_abe/console.log | 412 +- 03-build_abe-binutils/console.log | 11023 +++++------ 04-build_abe-stage1/console.log | 18099 ++++++++--------- 05-build_linux/console.log | 800 +- 06-boot_linux/console.log | 482 +- 07-check_regression/console.log | 12 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 12 +- 08-update_baseline/results.regressions | 2 +- console.log | 31324 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 12 files changed, 31206 insertions(+), 31186 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[gcc] branch releases/gcc-9 updated (d2fee90546d -> 557142474a3)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-9 in repository gcc. from d2fee90546d i386: Fix REDUC_SSE_SMINMAX_MODE mode conditions. new 557142474a3 Daily bump. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[gcc] branch releases/gcc-8 updated (6f9fa50688e -> 295b1a5d2d9)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-8 in repository gcc. from 6f9fa50688e Daily bump. new 295b1a5d2d9 Daily bump. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[gcc] branch master updated (4ded16a7782 -> ae6fc5ce437)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 4ded16a7782 c++: Add test for PR 86327. new ae6fc5ce437 Daily bump. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[binutils-gdb] branch master updated (cf83625da29 -> 0b07a199018)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from cf83625da29 gdb: fix undefined behavior reported in copy_bitwise new 0b07a199018 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[binutils-gdb] branch binutils-2_34-branch updated (0a2701a076b -> 39ea1a80825)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch binutils-2_34-branch in repository binutils-gdb. from 0a2701a076b Automatic date update in version.in new 39ea1a80825 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[binutils-gdb] branch gdb-9-branch updated (51427703cb4 -> 63c6c2207fb)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gdb-9-branch in repository binutils-gdb. from 51427703cb4 Automatic date update in version.in new 63c6c2207fb Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

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