[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (3e84068b30f -> d2fee90546d)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig
in repository toolchain/ci/gcc.
from 3e84068b30f arc: Allow more ABIs in GLIBC_DYNAMIC_LINKER
adds 3c7a476c5ad Test cases for mixed structured/dynamic data lifetimes with [...]
adds f41bd52147a Daily bump.
adds 59eddd97690 i386: Fix REDUC_SSE_SMINMAX_MODE mode conditions.
adds d2fee90546d i386: Fix REDUC_SSE_SMINMAX_MODE mode conditions.
No new revisions were added by this update.
Summary of changes:
gcc/ChangeLog | 6 +
gcc/DATESTAMP | 2 +-
gcc/config/i386/sse.md | 4 +-
gcc/testsuite/ChangeLog | 5 +
gcc/testsuite/gcc.target/i386/pr94494.c | 23 +++
libgomp/ChangeLog | 37 +++++
.../static-dynamic-lifetimes-1-lib.c | 3 +
.../static-dynamic-lifetimes-1.c | 160 ++++++++++++++++++
.../static-dynamic-lifetimes-2-lib.c | 3 +
.../static-dynamic-lifetimes-2.c | 166 +++++++++++++++++++
.../static-dynamic-lifetimes-3-lib.c | 3 +
.../static-dynamic-lifetimes-3.c | 183 +++++++++++++++++++++
.../static-dynamic-lifetimes-4-lib.c | 3 +
.../static-dynamic-lifetimes-4.c | 64 +++++++
.../static-dynamic-lifetimes-5-lib.c | 3 +
.../static-dynamic-lifetimes-5.c | 56 +++++++
.../static-dynamic-lifetimes-6-lib.c | 3 +
.../static-dynamic-lifetimes-6.c | 42 +++++
.../static-dynamic-lifetimes-7-lib.c | 3 +
.../static-dynamic-lifetimes-7.c | 42 +++++
.../static-dynamic-lifetimes-8-lib.c | 3 +
.../static-dynamic-lifetimes-8.c | 47 ++++++
22 files changed, 858 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr94494.c
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0
[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (7eedfce8a -> 77bb0fd8e)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig
in repository toolchain/ci/base-artifacts.
discards 7eedfce8a 0: update: binutils-gcc-linux: boot
new 77bb0fd8e 0: update: binutils-gcc-linux: boot
This update added new revisions after undoing existing revisions.
That is to say, some revisions that were in the old version of the
branch are not in the new version. This situation occurs
when a user --force pushes a change and generates a repository
containing something like this:
* -- * -- B -- O -- O -- O (7eedfce8a)
\
N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...]
You should already have received notification emails for all of the O
revisions, and so the following emails describe only the N revisions
from the common base, B.
Any revisions marked "omits" are not gone; other references still
refer to them. Any revisions marked "discards" are gone forever.
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
01-reset_artifacts/console.log | 171 +-
02-prepare_abe/console.log | 166 +-
03-build_abe-binutils/console.log | 11674 +++++++------
04-build_abe-stage1/console.log | 13980 +++++++--------
05-build_linux/console.log | 708 +-
06-boot_linux/console.log | 476 +-
07-check_regression/console.log | 8 +-
07-check_regression/results.regressions | 2 +-
08-update_baseline/console.log | 2 +-
08-update_baseline/results.regressions | 2 +-
console.log | 27119 +++++++++++++++---------------
jenkins/manifest.sh | 12 +-
12 files changed, 27157 insertions(+), 27163 deletions(-)
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0
[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig updated (7478addd84a -> f883c46b487)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig
in repository toolchain/ci/gcc.
from 7478addd84a libphobos: Use libdruntime as a convenience library for libphobos.
adds ff3f862b451 Handle 'omp declare target' attribute set for both OpenACC [...]
adds 6b816a5f0ed Add 'dg-do run' to 'libgomp.fortran/target-enter-data-1.f90'
adds be9862dd969 Test cases for mixed structured/dynamic data lifetimes with [...]
adds ecc66362ee5 Fix UNRESOLVED testcase gfortran.dg/asynchronous_5.f03.
adds e26bd694c79 Fix typo in gfortran.dg/asynchronous_5.f03 from last commit.
adds 62c25d7adb1 c++: make __is_constructible work with paren-init of aggrs [...]
adds 0666767eb4c coroutines: Revise await expansions [PR94528]
adds a02558a3953 Correct PR numbers in the last Changelog.
adds 47539a4acef Daily bump.
adds a615ea71bc8 cselib: Mark the cselib_record_sp_cfa_base_equiv VALUE as p [...]
adds bb87d5cc77d testsuite: Fix up pr94482.c testcase [PR94482]
adds f883c46b487 i386: Fix REDUC_SSE_SMINMAX_MODE mode conditions.
No new revisions were added by this update.
Summary of changes:
gcc/ChangeLog | 20 +
gcc/DATESTAMP | 2 +-
gcc/config/i386/sse.md | 4 +-
gcc/cp/ChangeLog | 22 +
gcc/cp/coroutines.cc | 456 +++++++++++----------
gcc/cp/method.c | 42 +-
gcc/cselib.c | 5 +-
gcc/omp-general.c | 13 +
gcc/testsuite/ChangeLog | 40 ++
gcc/testsuite/c-c++-common/goacc-gomp/pr93465-1.c | 56 +++
gcc/testsuite/g++.dg/coroutines/pr94528.C | 64 +++
gcc/testsuite/g++.dg/cpp2a/paren-init24.C | 26 ++
gcc/testsuite/g++.dg/cpp2a/paren-init25.C | 25 ++
gcc/testsuite/g++.dg/ext/is_constructible5.C | 16 +
gcc/testsuite/gcc.dg/torture/pr94482.c | 4 +-
gcc/testsuite/gcc.target/i386/pr94494.c | 23 ++
gcc/testsuite/gfortran.dg/asynchronous_5.f03 | 22 +-
libgomp/ChangeLog | 42 ++
.../libgomp.fortran/target-enter-data-1.f90 | 2 +
.../static-dynamic-lifetimes-1-lib.c | 3 +
.../static-dynamic-lifetimes-1.c | 160 ++++++++
.../static-dynamic-lifetimes-2-lib.c | 3 +
.../static-dynamic-lifetimes-2.c | 166 ++++++++
.../static-dynamic-lifetimes-3-lib.c | 3 +
.../static-dynamic-lifetimes-3.c | 183 +++++++++
.../static-dynamic-lifetimes-4-lib.c | 3 +
.../static-dynamic-lifetimes-4.c | 64 +++
.../static-dynamic-lifetimes-5-lib.c | 3 +
.../static-dynamic-lifetimes-5.c | 56 +++
.../static-dynamic-lifetimes-6-lib.c | 3 +
.../static-dynamic-lifetimes-6.c | 42 ++
.../static-dynamic-lifetimes-7-lib.c | 3 +
.../static-dynamic-lifetimes-7.c | 42 ++
.../static-dynamic-lifetimes-8-lib.c | 3 +
.../static-dynamic-lifetimes-8.c | 47 +++
35 files changed, 1439 insertions(+), 229 deletions(-)
create mode 100644 gcc/testsuite/c-c++-common/goacc-gomp/pr93465-1.c
create mode 100644 gcc/testsuite/g++.dg/coroutines/pr94528.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/paren-init24.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/paren-init25.C
create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible5.C
create mode 100644 gcc/testsuite/gcc.target/i386/pr94494.c
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0
[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig updated (0c4311ab90 -> cf83625da2)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig
in repository toolchain/ci/binutils-gdb.
from 0c4311ab90 Avoid infinite recursion in get_msymbol_address
adds de7ac122a7 Automatic date update in version.in
adds cf83625da2 gdb: fix undefined behavior reported in copy_bitwise
No new revisions were added by this update.
Summary of changes:
bfd/version.h | 2 +-
gdb/ChangeLog | 5 +++++
gdb/utils.c | 2 +-
3 files changed, 7 insertions(+), 2 deletions(-)
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0
[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig updated (2db4afe1e -> 44807c6d6)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig
in repository toolchain/ci/base-artifacts.
discards 2db4afe1e 0: update: binutils-gcc-linux: all
new 44807c6d6 0: update: binutils-gcc-linux: all
This update added new revisions after undoing existing revisions.
That is to say, some revisions that were in the old version of the
branch are not in the new version. This situation occurs
when a user --force pushes a change and generates a repository
containing something like this:
* -- * -- B -- O -- O -- O (2db4afe1e)
\
N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...]
You should already have received notification emails for all of the O
revisions, and so the following emails describe only the N revisions
from the common base, B.
Any revisions marked "omits" are not gone; other references still
refer to them. Any revisions marked "discards" are gone forever.
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
01-reset_artifacts/console.log | 14 +-
02-prepare_abe/console.log | 338 +-
03-build_abe-binutils/console.log | 11697 ++++++-----
04-build_abe-stage1/console.log | 20365 +++++++++---------
05-build_linux/console.log | 740 +-
06-boot_linux/console.log | 2 +-
07-check_regression/console.log | 2 +-
07-check_regression/results.regressions | 4 +-
08-update_baseline/console.log | 10 +-
08-update_baseline/results.regressions | 4 +-
console.log | 33090 +++++++++++++++---------------
jenkins/manifest.sh | 12 +-
12 files changed, 33097 insertions(+), 33181 deletions(-)
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0
[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO updated (28b4928b1b -> 319d2a7b60)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO
in repository toolchain/ci/glibc.
from 28b4928b1b Fix nscd/cachedumper.c compile errors
adds cbd1569904 nscd/cachedumper.c : fix whitespace
adds 49348beafe Fix build with GCC 10 when long double = double.
adds 1fabdb9908 x86: Remove ARCH_CET_LEGACY_BITMAP [BZ #25397]
adds 649fdf039b oc_FR locale: Fix spelling of Thursday (bug 25639)
adds 4bad2e014e m68k: Remove mathinline.h
adds a2ce37b564 math: Remove mathinline
adds a8ce822234 Remove __LIBC_INTERNAL_MATH_INLINES
adds 1c15464ca0 math: Remove inline math tests
adds 39a05214fe Add NEWS entry for CVE-2020-1752 (bug 25414)
adds 3cc4a8367c stdio: Remove memory leak from multibyte convertion [BZ#25691]
adds 910a835dc9 stdio: Add tests for printf multibyte convertion leak [BZ#25691]
adds b8de7980c0 Extended Char Intro: Use getwc in example (Bug 25626)
adds 0334369949 y2038: fix: Add missing libc_hidden_def attribute for some s [...]
adds f09542c584 posix: Fix system error return value [BZ #25715]
adds 07d16a6deb Add NEWS entry for CVE-2020-1751 (bug 25423)
adds 5fce0e095b support/shell-container.c: Return 127 if execve fails
adds 5a5a3a3234 support/shell-container.c: Add builtin exit
adds 1c17100c43 support/shell-container.c: Add builtin kill
adds 4eda036f5b stdlib: Move tst-system to tests-container
adds 45ae17dd7e ldbl-128ibm-compat: PLT redirects for using ldbl redirects i [...]
adds d0d1811fb9 Fix tests which expose ldbl -> _Float128 redirects
adds 076d06e849 powerpc64le: Ensure correct ldouble compiler flags are used
adds 3618e5fece Makeconfig: sandwich gnulib-tests between libc/ld linking of tests
adds 39517c008f powerpc64le: add -mno-gnu-attribute to *f128 objects and difftime
adds 57651ee4c8 powerpc64: apply -mabi=ibmlongdouble to special files
adds e8a0f5831e ARC: add definitions to elf/elf.h
adds 4da2597af5 sysv/linux: Rename alpha functions to be alpha specific
adds d1876749a8 time: Add a timeval with a 32-bit tv_sec and tv_usec
adds 933dc0e570 time: Add a __itimerval64 struct
adds 642d5abaf1 Add benchtests for roundeven and roundevenf.
adds a1a486d70e Add Safe-Linking to fastbins and tcache
adds e095db0bc6 hurd: Make O_TRUNC update mtime/ctime
adds 5f34491510 math: Remove fenvinline.h
adds 4a30b6109c x86: Remove feraiseexcept optimization
adds ec07242c45 sparc: Move __fenv_{ld,st}fsr to fenv-private.h
adds 1a044511a3 Fix data race in setting function descriptors during lazy bi [...]
adds 66807aebad powerpc: Add support for fmaf128() in hardware
adds acdcca7294 Add new file missed in previous hppa commit.
adds 6b89dbc3ca Use Linux 5.6 and GMP 6.2.0 in build-many-glibcs.py.
adds 768358b6a8 Typo fixes and CR cleanup in Safe-Linking
adds 49c3c37651 Fix alignment bug in Safe-Linking
adds a9d42c09a3 math: Add inputs that yield larger errors for float type (x86_64)
adds 1c634e677f sysv: Define __KERNEL_OLD_TIMEVAL_MATCHES_TIMEVAL64
adds a51e035889 linux: Use long time_t __getitimer/__setitimer
adds 5d24ba82c4 resource: Add a __rusage64 struct
adds 600f00b747 linux: Use long time_t for wait4/getrusage
adds 0bcd0c5100 sysv/alpha: Use generic __timeval32 and helpers
adds 1c50d23a20 S390: Regenerate ULPs.
adds 6310d570bf Add tests for Safe-Linking
adds 0bdca3bd94 aarch64: update bits/hwcap.h
adds 17fd707f88 nptl: Remove x86_64 cancellation assembly implementations [B [...]
adds cea56af185 support: Change xgetline to return 0 on EOF
adds 4c6e0415ef elf: Simplify handling of lists of audit strings
adds 8f7a75d700 elf: Implement DT_AUDIT, DT_DEPAUDIT support [BZ #24943]
adds e788beaf09 Update syscall lists for Linux 5.6.
adds f9ac84f92f Add IPPROTO_ETHERNET and IPPROTO_MPTCP from Linux 5.6 to net [...]
adds f90a7e96df i386: Disable check_consistency for GCC 5 and above [BZ #25788]
adds bd98471eb2 ldbl-128ibm: simplify iscanonical.h
adds 25ee3931f0 powerpc64le/multiarch: don't generate strong aliases for fma [...]
adds 6f82d05034 powerpc64le: Enforce -mabi=ibmlongdouble when -mfloat128 used
adds 8e72163b16 powerpc64le: workaround ieee long double / _Float128 stdc++ bug
adds 4531ba8ebf powerpc64le: enforce non-specific long double in .gnu.attrib [...]
adds b9cde4e3aa malloc: ensure set_max_fast never stores zero [BZ #25733]
adds 390b5a4727 y2038: include: Move struct __timespec64 definition to a sep [...]
adds 6f5eb5b2e5 y2038: linux: Provide __mq_timedsend_time64 implementation
adds 0b65a8fbaf y2038: linux: Provide __mq_timedreceive_time64 implementation
adds a8d74ee47b Update hppa libm-test-ulps
adds 10b2cdc3b3 oc_FR locale: Fix spelling of April (bug 25639)
adds 93a0959ef2 i386: Remove build support for GCC older than GCC 6
adds bd6cdfc18c powerpc: Update ULPs and xfail more ibm128 outputs
adds 8a1d13d0c7 Updates to the shn_MM locale [BZ #25532]
adds 6a0474c769 Update aarch64 libm-test-ulps
adds 79943b37a0 Update arm libm-test-ulps
adds e379112b68 Update sparc libm-test-ulps
adds 8a7f8da168 Update ia64 libm-test-ulps
adds 17e7d1c5f8 Update alpha libm-test-ulps
adds b1caa144c7 Update mips libm-test-ulps
adds b56875d5e0 Update kernel version to 5.6 in tst-mman-consts.py.
adds 319d2a7b60 Add GRND_INSECURE from Linux 5.6 to sys/random.h
No new revisions were added by this update.
Summary of changes:
Makeconfig | 12 +-
NEWS | 11 +-
benchtests/Makefile | 6 +-
benchtests/{trunc-inputs => roundeven-inputs} | 0
benchtests/{truncf-inputs => roundevenf-inputs} | 0
bits/fenvinline.h | 8 -
bits/mathinline.h | 12 -
bits/typesizes.h | 6 +
elf/Makefile | 22 +-
elf/elf.h | 70 +-
elf/rtld.c | 246 +-
elf/tst-addr1.c | 11 +
support/xgetline.c => elf/tst-audit14.c | 37 +-
elf/tst-audit15.c | 50 +
elf/tst-audit16.c | 54 +
stdlib/tst-system.c => elf/tst-auditlogmod-1.c | 19 +-
stdlib/tst-system.c => elf/tst-auditlogmod-2.c | 19 +-
stdlib/tst-system.c => elf/tst-auditlogmod-3.c | 19 +-
hurd/lookup-retry.c | 13 +-
include/err.h | 12 +-
include/libc-symbols.h | 2 +
include/mqueue.h | 17 +
include/stdio.h | 52 +-
include/struct___timespec64.h | 27 +
include/sys/cdefs.h | 20 +
include/sys/resource.h | 121 +
include/sys/syslog.h | 2 +-
include/time.h | 91 +-
include/wchar.h | 2 +-
inet/netinet/in.h | 4 +
localedata/locales/oc_FR | 6 +-
localedata/locales/shn_MM | 131 +-
malloc/Makefile | 1 +
malloc/malloc.c | 81 +-
malloc/tst-safe-linking.c | 179 +
manual/charset.texi | 2 +-
manual/crypt.texi | 3 +
math/Makefile | 164 +-
math/README.libm-test | 33 +-
math/auto-libm-test-in | 148 +-
math/auto-libm-test-out-acosh | 826 +-
math/auto-libm-test-out-asinh | 301 +-
math/auto-libm-test-out-atanh | 1590 ++--
math/auto-libm-test-out-cos | 25 +
math/auto-libm-test-out-cosh | 2269 ++---
math/auto-libm-test-out-erfc | 25 +
math/auto-libm-test-out-exp | 25 +
math/auto-libm-test-out-exp10 | 25 +
math/auto-libm-test-out-hypot | 9442 ++++++++++----------
math/auto-libm-test-out-j0 | 25 +
math/auto-libm-test-out-j1 | 25 +
math/auto-libm-test-out-lgamma | 25 +
math/auto-libm-test-out-sin | 25 +
math/auto-libm-test-out-sinh | 1260 +--
math/auto-libm-test-out-tgamma | 25 +
math/auto-libm-test-out-y0 | 25 +
math/fenv.h | 4 -
math/gen-auto-libm-tests.c | 8 +-
math/gen-libm-test.py | 5 +-
math/libm-test-asinh.inc | 4 +-
math/libm-test-atanh.inc | 4 +-
math/libm-test-cosh.inc | 4 +-
math/libm-test-driver.c | 7 -
math/libm-test-exp.inc | 4 +-
math/libm-test-expm1.inc | 4 +-
math/libm-test-hypot.inc | 32 +-
math/libm-test-pow.inc | 118 +-
math/libm-test-sinh.inc | 4 +-
math/libm-test-support.c | 8 +-
math/libm-test-support.h | 2 -
math/libm-test-tanh.inc | 4 +-
math/math.h | 6 -
math/test-double-vlen2.h | 1 -
math/test-double-vlen4.h | 1 -
math/test-double-vlen8.h | 1 -
math/test-double.h | 1 -
math/test-fenvinline.c | 354 -
math/test-float-vlen16.h | 1 -
math/test-float-vlen4.h | 1 -
math/test-float-vlen8.h | 1 -
math/test-float.h | 1 -
math/test-float128.h | 2 -
math/test-float32.h | 1 -
math/test-float32x.h | 1 -
math/test-float64.h | 1 -
math/test-float64x.h | 2 -
math/test-ldouble.h | 3 -
math/test-math-inline.h | 26 -
math/test-math-no-inline.h | 23 -
math/test-signgam-main.c | 1 -
nscd/cachedumper.c | 8 +-
scripts/build-many-glibcs.py | 4 +-
stdio-common/Makefile | 9 +-
stdio-common/tst-printf-bz25691.c | 108 +
stdio-common/tst-vfprintf-user-type.c | 4 +
stdio-common/vfprintf-internal.c | 324 +-
stdlib/Makefile | 3 +-
stdlib/sys/random.h | 1 +
stdlib/tst-system.c | 124 +-
support/shell-container.c | 40 +-
support/support_process_state.c | 2 +-
support/xgetline.c | 22 +-
support/xstdio.h | 5 +-
sysdeps/aarch64/libm-test-ulps | 871 +-
sysdeps/alpha/fpu/libm-test-ulps | 892 +-
sysdeps/arm/libm-test-ulps | 607 +-
sysdeps/csky/fpu/libm-test-ulps | 536 --
sysdeps/csky/nofpu/libm-test-ulps | 554 --
sysdeps/hppa/dl-fptr.c | 26 +-
sysdeps/hppa/dl-machine.h | 36 +-
sysdeps/hppa/dl-runtime.c | 58 +
sysdeps/hppa/dl-trampoline.S | 74 +-
sysdeps/hppa/fpu/libm-test-ulps | 640 +-
sysdeps/i386/fpu/libm-test-ulps | 1095 ---
sysdeps/i386/i686/fpu/multiarch/libm-test-ulps | 1121 +--
sysdeps/i386/sysdep.h | 2 -
sysdeps/i386/tls-macros.h | 37 +-
sysdeps/ia64/fpu/libm-test-ulps | 943 +-
sysdeps/ieee754/ldbl-128ibm-compat/Makefile | 15 -
.../ieee754/ldbl-128ibm-compat/ieee128-asprintf.c | 5 +-
.../ieee754/ldbl-128ibm-compat/ieee128-dprintf.c | 1 +
sysdeps/ieee754/ldbl-128ibm-compat/ieee128-err.c | 7 +
.../ieee754/ldbl-128ibm-compat/ieee128-fprintf.c | 1 +
.../ldbl-128ibm-compat/ieee128-isoc99_sscanf.c | 1 +
.../ldbl-128ibm-compat/ieee128-isoc99_vfscanf.c | 2 +
.../ldbl-128ibm-compat/ieee128-isoc99_vsscanf.c | 1 +
.../ieee754/ldbl-128ibm-compat/ieee128-sprintf.c | 1 +
.../ieee754/ldbl-128ibm-compat/ieee128-syslog.c | 1 +
.../ieee754/ldbl-128ibm-compat/ieee128-vfprintf.c | 1 +
sysdeps/ieee754/ldbl-128ibm/bits/iscanonical.h | 10 +-
.../ieee754/ldbl-128ibm/include/bits/iscanonical.h | 2 +-
sysdeps/m68k/coldfire/fpu/libm-test-ulps | 68 -
sysdeps/m68k/m680x0/fpu/bits/mathinline.h | 378 -
sysdeps/m68k/m680x0/fpu/libm-test-ulps | 584 --
sysdeps/m68k/m680x0/fpu/mathimpl.h | 224 +
sysdeps/m68k/m680x0/fpu/s_atan_template.c | 1 +
sysdeps/m68k/m680x0/fpu/s_ceil_template.c | 1 +
sysdeps/m68k/m680x0/fpu/s_fabs_template.c | 1 +
sysdeps/m68k/m680x0/fpu/s_floor_template.c | 1 +
sysdeps/m68k/m680x0/fpu/s_isinf.c | 1 +
sysdeps/m68k/m680x0/fpu/s_log1p.c | 1 +
sysdeps/m68k/m680x0/fpu/s_lrint_template.c | 1 +
sysdeps/m68k/m680x0/fpu/s_nearbyint_template.c | 1 +
sysdeps/m68k/m680x0/fpu/s_rint_template.c | 1 +
sysdeps/m68k/m680x0/fpu/s_scalbn.c | 2 +
sysdeps/m68k/m680x0/fpu/s_sincos_template.c | 1 +
sysdeps/m68k/m680x0/fpu/s_tanh_template.c | 1 +
sysdeps/m68k/m680x0/fpu/s_trunc_template.c | 1 +
sysdeps/microblaze/libm-test-ulps | 124 -
sysdeps/mips/mips32/libm-test-ulps | 607 +-
sysdeps/mips/mips64/libm-test-ulps | 892 +-
sysdeps/nios2/libm-test-ulps | 128 -
sysdeps/posix/system.c | 18 +-
sysdeps/powerpc/bits/fenvinline.h | 108 -
sysdeps/powerpc/fpu/fegetround.c | 8 +-
sysdeps/powerpc/fpu/fraiseexcpt.c | 1 -
sysdeps/powerpc/fpu/libm-test-ulps | 1169 +--
sysdeps/powerpc/nofpu/fraiseexcpt.c | 1 -
sysdeps/powerpc/nofpu/libm-test-ulps | 862 --
sysdeps/powerpc/powerpc64/Makefile | 6 +
sysdeps/powerpc/powerpc64/le/Makefile | 206 +-
.../powerpc/powerpc64/le/fpu/multiarch/Makefile | 10 +-
.../powerpc64/le/fpu/multiarch/s_fmaf128-power9.c | 20 +-
.../powerpc64/le/fpu/multiarch/s_fmaf128-ppc64.c | 22 +-
.../powerpc/powerpc64/le/fpu/multiarch/s_fmaf128.c | 39 +-
.../powerpc64/le/no_ldbl_gnu_attribute.c} | 19 +-
.../powerpc/powerpc64/le/power9/fpu/s_fmaf128.c | 36 +
sysdeps/powerpc/powerpc64/power7/Makefile | 6 +-
sysdeps/riscv/nofpu/libm-test-ulps | 813 --
sysdeps/riscv/rv64/rvd/libm-test-ulps | 822 --
sysdeps/s390/fpu/libm-test-ulps | 851 +-
sysdeps/sh/libm-test-ulps | 265 -
sysdeps/sparc/fpu/bits/fenv.h | 9 -
sysdeps/sparc/fpu/fclrexcpt.c | 1 +
sysdeps/sparc/fpu/fedisblxcpt.c | 1 +
sysdeps/sparc/fpu/feenablxcpt.c | 1 +
sysdeps/sparc/fpu/fegetenv.c | 1 +
sysdeps/sparc/fpu/fegetexcept.c | 1 +
sysdeps/sparc/fpu/fegetmode.c | 1 +
sysdeps/sparc/fpu/fegetround.c | 1 +
sysdeps/sparc/fpu/feholdexcpt.c | 1 +
sysdeps/sparc/fpu/fenv_private.h | 9 +
sysdeps/sparc/fpu/fesetenv.c | 1 +
sysdeps/sparc/fpu/fesetexcept.c | 1 +
sysdeps/sparc/fpu/fesetmode.c | 1 +
sysdeps/sparc/fpu/fesetround.c | 1 +
sysdeps/sparc/fpu/feupdateenv.c | 1 +
sysdeps/sparc/fpu/fgetexcptflg.c | 1 +
sysdeps/sparc/fpu/fsetexcptflg.c | 1 +
sysdeps/sparc/fpu/ftestexcept.c | 1 +
sysdeps/sparc/fpu/libm-test-ulps | 892 +-
sysdeps/unix/syscalls.list | 3 -
sysdeps/unix/sysv/linux/aarch64/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h | 18 +
sysdeps/unix/sysv/linux/alpha/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/alpha/bits/typesizes.h | 3 +
sysdeps/unix/sysv/linux/alpha/osf_adjtime.c | 7 +-
sysdeps/unix/sysv/linux/alpha/osf_getitimer.c | 3 +-
sysdeps/unix/sysv/linux/alpha/osf_getrusage.c | 8 +-
sysdeps/unix/sysv/linux/alpha/osf_gettimeofday.c | 4 +-
sysdeps/unix/sysv/linux/alpha/osf_setitimer.c | 5 +-
sysdeps/unix/sysv/linux/alpha/osf_settimeofday.c | 4 +-
sysdeps/unix/sysv/linux/alpha/osf_utimes.c | 4 +-
sysdeps/unix/sysv/linux/alpha/osf_wait4.c | 8 +-
sysdeps/unix/sysv/linux/arm/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/clock_getres.c | 2 +
sysdeps/unix/sysv/linux/clock_gettime.c | 2 +
sysdeps/unix/sysv/linux/clock_nanosleep.c | 2 +
sysdeps/unix/sysv/linux/clock_settime.c | 2 +
sysdeps/unix/sysv/linux/csky/arch-syscall.h | 5 +
sysdeps/unix/sysv/linux/generic/bits/typesizes.h | 6 +
sysdeps/unix/sysv/linux/getitimer.c | 61 +
.../linux/{alpha/osf_getrusage.c => getrusage.c} | 41 +-
sysdeps/unix/sysv/linux/hppa/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/hppa/atomic-machine.h | 28 +
sysdeps/unix/sysv/linux/i386/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/i386/sysdep.h | 16 +-
sysdeps/unix/sysv/linux/ia64/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/m68k/arch-syscall.h | 3 +
sysdeps/unix/sysv/linux/microblaze/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/mips/mips32/arch-syscall.h | 2 +
.../unix/sysv/linux/mips/mips64/n32/arch-syscall.h | 2 +
.../unix/sysv/linux/mips/mips64/n64/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/mq_timedreceive.c | 51 +-
sysdeps/unix/sysv/linux/mq_timedsend.c | 49 +-
sysdeps/unix/sysv/linux/nios2/arch-syscall.h | 2 +
.../sysv/linux/powerpc/powerpc32/arch-syscall.h | 2 +
.../sysv/linux/powerpc/powerpc64/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/ppoll.c | 2 +
sysdeps/unix/sysv/linux/riscv/rv64/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/s390/bits/typesizes.h | 6 +
.../unix/sysv/linux/s390/s390-32/arch-syscall.h | 2 +
.../unix/sysv/linux/s390/s390-64/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/setitimer.c | 90 +
sysdeps/unix/sysv/linux/sh/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/sparc/bits/typesizes.h | 6 +
.../unix/sysv/linux/sparc/sparc32/arch-syscall.h | 2 +
.../unix/sysv/linux/sparc/sparc64/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/syscall-names.list | 6 +-
sysdeps/unix/sysv/linux/tst-mman-consts.py | 2 +-
sysdeps/unix/sysv/linux/{alpha => }/tv32-compat.h | 92 +-
sysdeps/unix/sysv/linux/wait4.c | 50 +-
sysdeps/unix/sysv/linux/x86/bits/typesizes.h | 5 +
sysdeps/unix/sysv/linux/x86/dl-cet.h | 20 -
sysdeps/unix/sysv/linux/x86/include/asm/prctl.h | 5 -
sysdeps/unix/sysv/linux/x86_64/64/arch-syscall.h | 2 +
sysdeps/unix/sysv/linux/x86_64/cancellation.S | 104 -
sysdeps/unix/sysv/linux/x86_64/libc-cancellation.S | 21 -
.../unix/sysv/linux/x86_64/librt-cancellation.S | 21 -
sysdeps/unix/sysv/linux/x86_64/x32/arch-syscall.h | 2 +
sysdeps/x86/Makefile | 9 +-
sysdeps/x86/dl-cet.c | 217 +-
sysdeps/x86/dl-procruntime.c | 11 -
sysdeps/x86/fpu/bits/fenv.h | 54 -
sysdeps/x86/fpu/include/bits/fenv.h | 57 -
sysdeps/x86/tst-cet-legacy-4.c | 19 +-
sysdeps/x86/tst-cet-legacy-5.c | 3 +-
sysdeps/x86/tst-cet-legacy-6.c | 3 +-
.../xgetline.c => sysdeps/x86/tst-cet-legacy-7.c | 31 +-
.../x86/{tst-cet-legacy-4.c => tst-cet-legacy-8.c} | 54 +-
sysdeps/x86_64/fpu/libm-test-ulps | 1204 +--
sysdeps/x86_64/nptl/tcb-offsets.sym | 7 -
262 files changed, 11633 insertions(+), 26555 deletions(-)
copy benchtests/{trunc-inputs => roundeven-inputs} (100%)
copy benchtests/{truncf-inputs => roundevenf-inputs} (100%)
delete mode 100644 bits/fenvinline.h
delete mode 100644 bits/mathinline.h
copy support/xgetline.c => elf/tst-audit14.c (52%)
create mode 100644 elf/tst-audit15.c
create mode 100644 elf/tst-audit16.c
copy stdlib/tst-system.c => elf/tst-auditlogmod-1.c (72%)
copy stdlib/tst-system.c => elf/tst-auditlogmod-2.c (72%)
copy stdlib/tst-system.c => elf/tst-auditlogmod-3.c (72%)
create mode 100644 include/struct___timespec64.h
create mode 100644 malloc/tst-safe-linking.c
delete mode 100644 math/test-fenvinline.c
delete mode 100644 math/test-math-inline.h
delete mode 100644 math/test-math-no-inline.h
create mode 100644 stdio-common/tst-printf-bz25691.c
create mode 100644 sysdeps/hppa/dl-runtime.c
delete mode 100644 sysdeps/m68k/m680x0/fpu/bits/mathinline.h
delete mode 100644 sysdeps/powerpc/bits/fenvinline.h
copy stdlib/tst-system.c => sysdeps/powerpc/powerpc64/le/fpu/multiarch/s_fmaf128-p [...]
copy stdlib/tst-system.c => sysdeps/powerpc/powerpc64/le/fpu/multiarch/s_fmaf128-p [...]
copy support/xgetline.c => sysdeps/powerpc/powerpc64/le/fpu/multiarch/s_fmaf128.c (57%)
copy sysdeps/{m68k/m680x0/fpu/s_ceil_template.c => powerpc/powerpc64/le/no_ldbl_gn [...]
create mode 100644 sysdeps/powerpc/powerpc64/le/power9/fpu/s_fmaf128.c
create mode 100644 sysdeps/unix/sysv/linux/getitimer.c
copy sysdeps/unix/sysv/linux/{alpha/osf_getrusage.c => getrusage.c} (52%)
create mode 100644 sysdeps/unix/sysv/linux/setitimer.c
rename sysdeps/unix/sysv/linux/{alpha => }/tv32-compat.h (55%)
delete mode 100644 sysdeps/unix/sysv/linux/x86_64/cancellation.S
delete mode 100644 sysdeps/unix/sysv/linux/x86_64/libc-cancellation.S
delete mode 100644 sysdeps/unix/sysv/linux/x86_64/librt-cancellation.S
delete mode 100644 sysdeps/x86/fpu/include/bits/fenv.h
copy support/xgetline.c => sysdeps/x86/tst-cet-legacy-7.c (60%)
copy sysdeps/x86/{tst-cet-legacy-4.c => tst-cet-legacy-8.c} (51%)
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0
[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO updated (e4e9a59105a -> bb87d5cc77d)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO
in repository toolchain/ci/gcc.
from e4e9a59105a Update post order number for merged SCC.
adds 5ba25b2ef17 tree-inline: Fix a -fcompare-debug issue in the inliner [PR94167]
adds 6d44c881286 tree-inline: Fix a -fcompare-debug issue in the inliner [PR94167]
adds f2d3807f580 libphobos: Merge upstream druntime 6c45dd3a, phobos 68cc18adb.
adds e41d4a0a567 d/dmd: Merge upstream dmd b061bd744
adds 5a3c42b227b i386: Use ix86_output_ssemov for SImode TYPE_SSEMOV
adds 136fec1e27f x32 does not support MS ABI, skip testcases that require it.
adds f19b40bd377 Fix ChangeLog formatting from my commit last friday.
adds bc093503d74 libphobos: Reset libtool_VERSION to 1:0:0
adds 63c8f7d6a08 [ARM][GCC][1/x]: MVE ACLE intrinsics framework patch.
adds c7be0832b54 [ARM][GCC][2/x]: MVE ACLE intrinsics framework patch.
adds 5dee500b359 [ARM][GCC][3/x]: MVE ACLE intrinsics framework patch.
adds f522810d2b5 [testsuite] Avoid duplicate test names in sizeless tests
adds bae7b38cf8a Fix PR94185: Do not reuse insn alternative after changing m [...]
adds c015ff8ccaf c: Handle MEM_REF in c_fully_fold* [PR94179]
adds 447d196e75d d: Fix multiple definition error when using mixins and interfaces.
adds c62f5e6e1f4 libstdc++: Add default constructor to net::service_already_ [...]
adds 2691ffe6dba d: Fix assignment to anonymous union member corrupts siblin [...]
adds b3f246f12b2 Daily bump.
adds 950183c7741 Update gcc sv.po.
adds 57e7ad5a8fd c++: Add test for PR 93901.
adds ecf2b69a629 Filter a test-case with gas.
adds 7afa3b82918 expand: Don't depend on warning flags in code generation of [...]
adds 741ff2a263f strlen: Punt on UB reads past end of string literal [PR94187]
adds fd857de8070 c: ignore initializers for elements of variable-size types [...]
adds 994d4862062 testsuite: Fix pr94185.C testcase on i686-linux with C++98 [...]
adds 14782c8123e [ARM][GCC][4/x]: MVE ACLE vector interleaving store intrinsics.
adds a50f6abffc3 [ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with [...]
adds 5db0eb95c34 [ARM][GCC][2/1x]: MVE intrinsics with unary operand.
adds a9a437ffc42 tree-ssa-strlen: Fix up count_nonzero_bytes* [PR94015]
adds f582ca0fd70 [GCC][PATCH][ARM] Add multilib mapping for Armv8.1-M+MVE wi [...]
adds 700d4cb08c8 Fix up duplicated duplicated words mostly in comments
adds 6df4618cac9 [ARM][GCC][3/1x]: MVE intrinsics with unary operand.
adds a475f153431 [ARM][GCC][4/1x]: MVE intrinsics with unary operand.
adds 4be8cf77026 [ARM][GCC][1/2x]: MVE intrinsics with binary operands.
adds 887085be635 c++: Fix access checks for __is_assignable and __is_constructible
adds f166a8cdf48 [ARM][GCC][2/2x]: MVE intrinsics with binary operands.
adds d71dba7b611 [ARM][GCC][3/2x]: MVE intrinsics with binary operands.
adds 33203b4c27d [ARM][GCC][4/2x]: MVE intrinsics with binary operands.
adds f9355dee93f [ARM][GCC][5/2x]: MVE intrinsics with binary operands.
adds 0dad5b33687 [ARM][GCC][1/3x]: MVE intrinsics with ternary operands.
adds e4596b66710 coroutines, testsuite: Fix single test execution.
adds 1fef0148be4 Fix the ChangeLog after the __is_assignable/__is_constructible fix
adds cf9c3bff39c aarch64: Fix bf16_v(ld|st)n.c failures for big-endian
adds 58a703f0726 testsuite: Fix gcc.target/aarch64/advsimd-intrinsics/bfcvt- [...]
adds cd0b7124273 c++: Fix parsing of invalid enum specifiers [PR90995]
adds 046c58907ec c: Handle C_TYPE_INCOMPLETE_VARS even for ENUMERAL_TYPEs [PR94172]
adds 2e30d3e3e88 testsuite: Fix g++.dg/debug/dwarf2/const2b.C target selector
adds 3b2cc34369a Daily bump.
adds 98f29f5638f libstdc++: Fix type-erasure in experimental::net::executor [...]
adds 80616e5b7a5 c++: Fix comment typo.
adds 52b3aa8be18 dwarf: Generate DIEs for external variables with -g1 [93751]
adds af8656be8df c++: Diagnose a deduction guide in a wrong scope [PR91759]
adds 4e3d3e40726 middle-end/94188 fix fold of addr expression generation
adds 4da9288745d libgomp testsuite - disable long double for AMDGCN
adds cb26919c857 aarch64: Treat p12-p15 as call-preserved in SVE PCS functions
adds d91480dee93 aarch64: Fix SYMBOL_TINY_GOT handling for ILP32 [PR94201]
adds d5029d45940 Fix up duplicated duplicated words in comments
adds 1ba9acb11e3 middle-end/94206 fix memset folding to avoid types with padding
adds 11cf25c40e3 PR c++/94147 - mangling of lambdas assigned to globals
adds 5a80a6c3e5f amdgcn: Add cond_add/sub/and/ior/xor for all vector modes
adds dbde9e2d595 amdgcn: Fix vector compare modes
adds 07522ae90b5 libstdc++: Fix compilation with released versions of Clang
adds e5de406f996 libstdc++ Fix compilation of <stop_token> with Clang
adds 0db2cd17702 analyzer: tweaks to exploded_node ctor
adds 7d9c107ab1e analyzer: introduce noop_region_model_context
adds f665beeba62 analyzer: add test coverage for fixed ICE [PR94047]
adds 884d9141112 analyzer: make summarized dumps more comprehensive
adds 26cbcfe5fce Fix libgomp.oacc-fortran/atomic_capture-1.f90
adds 8165795c155 [ARM][GCC][2/3x]: MVE intrinsics with ternary operands.
adds e3678b4464a [ARM][GCC][3/3x]: MVE intrinsics with ternary operands.
adds db5db9d2548 [ARM][GCC][1/4x]: MVE intrinsics with quaternary operands.
adds 8eb3b6b9cf2 [ARM][GCC][2/4x]: MVE intrinsics with quaternary operands.
adds f2170a379b0 [ARM][GCC][3/4x]: MVE intrinsics with quaternary operands.
adds 532e9e2402a [ARM][GCC][4/4x]: MVE intrinsics with quaternary operands.
adds 4ff68575991 [ARM][GCC][1/5x]: MVE store intrinsics.
adds 535a8645bb8 [ARM][GCC][2/5x]: MVE load intrinsics.
adds 405e918c314 [ARM][GCC][3/5x]: MVE store intrinsics with predicated suffix.
adds 429d607bc46 [ARM][GCC][4/5x]: MVE load intrinsics with zero(_z) suffix.
adds bf1e3d5afa1 [ARM][GCC][5/5x]: MVE ACLE load intrinsics which load a byt [...]
adds 4cc23303bad [ARM][GCC][6/5x]: Remaining MVE load intrinsics which loads [...]
adds 5cad47e0f85 [ARM][GCC][7/5x]: MVE store intrinsics which stores byte,ha [...]
adds 7a5fffa5ed0 [ARM][GCC][8/5x]: Remaining MVE store intrinsics which stor [...]
adds 3512dc0108a PR ipa/92799 - ICE on a weakref function definition followe [...]
adds 529ea7d9596 Complete change to resolve pr90275.
adds 07fe4af4d51 rs6000: Add back some w* constraints (PR91886)
adds b3341826531 libstdc++: Fix is_trivially_constructible (PR 94033)
adds b5562f1187d Daily bump.
adds 73bc09fa8c6 middle-end/94216 fix another build_fold_addr_expr use
adds f3280e4c0c9 ipa/94217 simplify offsetted address build
adds c7e90196818 phiopt: Avoid -fcompare-debug bug in phiopt [PR94211]
adds bb83e069eba libgomp/testsuite: ignore blank-line output for function-no [...]
adds 02f7334ac93 c++: Fix up handling of captured vars in lambdas in OpenMP [...]
adds f5389e17e4b Update include/plugin-api.h.
adds c8429c2aba8 API extension for binutils (type of symbols).
adds f22712bd8a2 Fix inliner ICE on alias with flatten attribute [PR92372]
adds 37482edc3f7 d/dmd: Merge upstream dmd d1a606599
adds 9def91e9f2a c: Fix up cfun->function_end_locus from the C FE [PR94029]
adds f7dceb4e658 Fix cgraph_node::function_symbol availability compuattion [ [...]
adds 3373d3e38ea Daily bump.
adds 94e2418780f c++: Avoid unnecessary empty class copy [94175].
adds 4a18f168f47 [rs6000] Rewrite the declaration of a variable
adds 05009698eeb gcc, Arm: Fix no_cond issue introduced by MVE
adds 4119cd693d2 store-merging: Fix up -fnon-call-exceptions handling [PR94224]
adds 0efe7d8796e gcc, Arm: Fix MVE move from GPR -> GPR
adds 005f6fc59e5 gcc, Arm: Fix testisms for MVE testsuite
adds 719c864225e gcc, Arm: Revert changes to {get,set}_fpscr
adds 8fefa21fcf6 tree-optimization/94266 - fix object type extraction heuristics
adds 7d4549b2cd2 Fix correct offset in ipa_get_jf_ancestor_result.
adds 3eff57aacfe [ARM][GCC][6x]:MVE ACLE vaddq intrinsics using arithmetic p [...]
adds 85a94e87901 [ARM][GCC][7x]: MVE vreinterpretq and vuninitializedq intrinsics.
adds 92f80065d10 [ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and vdwdup [...]
adds 41e1a7ffae9 [ARM][GCC][2/8x]: MVE ACLE gather load and scatter store in [...]
adds 3d42842c07f fix CTOR vectorization
adds 261014a1be4 [ARM][GCC][9x]: MVE ACLE predicated intrinsics with (dont-c [...]
adds 828878c35c8 c++: Include the constraint parameter mapping in diagnostic [...]
adds c3562f81042 [ARM][GCC][10x]: MVE ACLE intrinsics "add with carry across [...]
adds 1aa22b1916a c-family: Tighten vector handling in type_for_mode [PR94072]
adds b5446d0cc09 d: Fix SEGV in hash_table<odr_name_hasher, false, xcallocat [...]
adds 1dfcc3b541c [ARM][GCC][11x]: MVE ACLE vector interleaving store and dei [...]
adds a23eff1bd04 c++: Add testcases from PR c++/69694
adds a89349e664f adjust SLP tree dumping
adds 72b3bc895f0 Fix verifier ICE on wrong comdat local flag [PR93347]
adds 68dd57808f7 rs6000: Add command line and builtin compatibility check
adds cc3afc9db07 Regenerate gcc.pot.
adds 29f23ed79b6 sra: Cap number of sub-access propagations with a param (PR 93435)
adds 8416602026d Daily bump.
adds 15711e837b2 Fix comma at end of enumerator list seen with -std=c++98.
adds 497498c878d lra: Tighten check for reloading paradoxical subregs [PR94052]
adds b599bf9d6d1 c++: Reject changing active member of union during initiali [...]
adds 98eb7b2ed24 d: Fix ICE in add_symbol_to_partition_1, at lto/lto-partiti [...]
adds 837cece888f Darwin: Address translation comments (PR93694).
adds dfb25dfe3d3 Darwin: Handle NULL DECL_SIZE_TYPE in machopic_select_secti [...]
adds 9fc985118d9 libstdc++: Fix path::generic_string allocator handling (PR 94242)
adds a577c0c2693 libstdc++: Fix experimental::path::generic_string (PR 93245)
adds 424e39081f9 d: Fix typo in ChangeLog for last change
adds 4a01f7b1e73 d: Fix missing dependencies in depfile for imported files ( [...]
adds 88d7d0ce8fa testsuite: Fix lambda-vis.C for targets with user label pre [...]
adds 85e10e4f0fa Darwin: Fix i686 bootstrap when the assembler supports GOTO [...]
adds fbe60463bb8 d: Generate phony targets for content imported files (PR93038)
adds 83aa5aa313a Daily bump.
adds 6e00d8dcf32 Daily bump.
adds b809f0b6580 Set proper DECL_ALIGN in offload_handle_link_vars (PR94233)
adds 2fa4b1ffd6e Save ref->speculative_id before clone_reference.
adds 263ee1260bc tree-optimization/94266 - aovid propagating addresses of TA [...]
adds 7a2090b04e5 ipa/94245 - avoid folding when we want an ADDR_EXPR
adds 26b3e568a60 [PR94044] Fix ICE with sizeof<argumentpack>
adds a3586eeb884 AMDGCN offloading – use amdgcn-amdhsa
adds ce6413087de lto/lto.c – used $ or . in generated linkptr name
adds 4897bb0045d libgomp – fix declare target link handling (PR94251)
adds b0d84ecc55f fortran: ICE in gfc_match_assignment PR93600
adds 4dcc4502f31 tree-optimization/94261 - avoid IL adjustments in SLP analysis
adds 6debbff6ca3 arm: Add earlyclobber to MVE instructions that require it
adds 962406639c0 testsuite, arm: Change tests to assemble
adds 0cd55f9d3af libgccjit: handle long literals in playback::context::new_s [...]
adds 1a5c27b1b43 [ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane.
adds 85244449104 [ARM][GCC][13x]: MVE ACLE scalar shift intrinsics.
adds 88c9a831f3a [ARM][GCC][14x]: MVE ACLE whole vector left shift with carr [...]
adds d326e9586b4 driver: Improve the generated help text for alias options
adds 5db9e89323c c: Fix up cfun->function_end_locus on invalid function bodi [...]
adds ca6c722561c c++: Handle COMPOUND_EXPRs in get_narrower and warnings_for [...]
adds 1f6c1c82eb5 c++: Avoid a suspicious -Wnoexcept warning [PR93805]
adds 75fb811dfaa Verify the code used for the optimized comparison is valid [...]
adds c86c99e6950 Update gcc es.po, sv.po.
adds 75c24a08d69 Daily bump.
adds 047811579f0 cgraphunit: Avoid code generation differences based on -w/T [...]
adds a5a9400a846 if-conv: Fix -fcompare-debug bugs in ifcvt_local_dce [PR94283]
adds 565ab7efbdc loop-manip: Avoid -fcompare-debug issues in create_iv [PR94285]
adds 596c90d3559 arm: Fix arm {,u}subvdi4 and usubvsi4 expanders [PR94286]
adds 906b3eb9df6 Improve endianess detection.
adds c2211a60ff0 Fix OpenMP offload handling for target-link variables for n [...]
adds 04099157691 Define __BIG_ENDIAN__
adds 8001f59c82b [testsuite,arm] target-supports.exp: Add arm_fp_dp_ok effec [...]
adds 2a0eaca3e9c [testsuite,arm] cmp-2.c: Move double-precision tests to cmp-3.c
adds 07f8bcc6ea9 [testsuite,arm] use arm_fp_dp_ok effective-target
adds 6e771c087b1 c++: Give more expressions locations.
adds 5c161741843 c++: Fix template parm with dependent type in concepts.
adds fddfd3ce555 c++: Improve handling of ill-formed constraints [PR94186].
adds 75b7b7fdc45 c++: Fix wrong no post-decrement operator error in template [...]
adds 0c1c8d9f137 Daily bump.
adds adaf4b6c66e Test for sigsetjmp support in analyzer tests requiring that [...]
adds c2133167ad5 if-conv: Delete dead stmts backwards in ifcvt_local_dce [PR94283]
adds f1154b4d3c5 sccvn: Fix buffer overflow in push_partial_def [PR94300]
adds 158cccea0d0 middle-end: Avoid using DECL_UID in ASM_FORMAT_PRIVATE_NAME [...]
adds 5f18995e23e varasm: Fix output_constructor where a RANGE_EXPR index nee [...]
adds c38daa79768 fortran: ICE using undeclared symbol in array constructor PR93484
adds c8504ebef1d testsuite: Fix up FAILs in gfortran testsuite with -fcompar [...]
adds 0fb0240a051 Fix handling of --with{,out}-zstd option.
adds 724ec02c2c6 Make target_clones resolver fn static if possible.
adds d5ad8ee04a7 i386: Fix ix86_add_reg_usage_to_vzeroupper [PR94308]
adds 780f1cfd8ee testsuite: Mention cleanup-13.c test is incompatible with - [...]
adds 68c4570a4de Do not error about missing zstd unless --with-zstd.
adds 83dfa06cb5c coroutines: Fix missing dereference (PR94319).
adds 0fca105f8ca Fix gcc.dg/pr92301.c on targets that don't support argc/argv.
adds 05c13c43990 PR tree-optimization/94131 - ICE on printf with a VLA strin [...]
adds c7a252ba2d0 c++: Fix invalid -Wduplicated-cond warning [PR94265]
adds 713ecb3d417 rs6000: Allow FPRs to change between SDmode and DDmode [...]
adds b5228b1bc8c PR middle-end/94004 - missing -Walloca on calls to alloca d [...]
adds 6e4cd3cd259 arm: Fix ICE caused by arm_gen_dicompare_reg [PR94292]
adds eeb0c7c0713 Fix vector-compare-1 regressions on sh4/sh4eb caused by pat [...]
adds 48817fbd761 Fix vector-compare-1 regressions on sh4/sh4eb caused by [...]
adds fe4b53b2e7e testsuite: adjustments for amdgcn
adds bf1fc37bb4a libstdc++: Define and use chrono::is_clock for C++20
adds e3ef371982a libstdc++ Add missing tests for std::shared_timed_mutex
adds 9673d11ec53 libstdc++: Fix author in previous ChangeLog entry
adds e97929e20b2 [PATCH] rs6000: vec_rlnm fix to make builtin work according to ABI
adds 27f8c8c4c92 Daily bump.
adds d21dff5b4fe widening_mul: restrict ops to be defined in the same basic- [...]
adds 9708ca2be40 var-tracking: Mark as sp based more VALUEs [PR92264]
adds 5a1706f63a2 c++: Fix a -fcompare-debug issue with DEBUG_BEGIN_STMT stmt [...]
adds dab932d1519 c++: Fix up user_provided_p [PR81349]
adds 10ea09ee846 gimplify: Fix -fcompare-debug differences caused by gimplif [...]
adds d6730f06420 Skip test for non-x86 targets.
adds da920d0c46c tree: Fix -fcompare-debug issues due to protected_set_expr_ [...]
adds 40cdcddf274 Fix UNRESOLVED test-case.
adds e519d644999 arm: unified syntax for libgcc when built with -Os [PR94220]
adds 16948c54b75 libstdc++: Add some C++20 additions to <chrono>
adds 2a1f0f64160 coroutines: Implement n4849 changes to exception handling.
adds 6d85947d23a coroutines: Implement n4849 recommended symmetric transfer.
adds 517f5356bb0 c++: DR1710, template keyword in a typename-specifier [PR94057]
adds b1c905ba83e Update gcc .po files.
adds f9c38702e96 Daily bump.
adds 65937db83cd coroutines, testsuite: Fix symmetric-transfer-00-basic.C on Linux.
adds 54f58e9416d c++: Remove redundant calls to type_dependent_expression_p
adds 71d69548a1b c++: template keyword accepted before destructor names [PR94336]
adds 06d5d63d994 modulo-sched: fix bootstrap compare-debug issue
adds 72809d6fe8e c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339]
adds 2eea00c518d c++: Avoid calls in non-evaluated contexts affect whether f [...]
adds a76ff304f90 Fortran] Reject invalid association target (PR93363)
adds a9cd2d786ad fixup: move ChangeLog entry for last Arm fix to correct file.
adds 66e0e23c12d fixup: move ChangeLog entry for last Arm fix to correct file.
adds 8d689cf43b5 Fix PR90332 by extending half size vector mode
adds 62ede14d30f [Fortran] Fix ICE with deferred-rank arrays (PR93957)
adds 917e21e8bcd tree-optimization/94352 - fix uninitialized use of curr_order
adds 45cfaf9903d debug/94273 - avoid creating type DIEs for DINFO_LEVEL_TERSE
adds 4d661bb7a2e analyzer: tweaks to superedge::dump
adds 8f02357571a analyzer: improvements to diagnostic-manager.cc logging
adds 42c63313252 analyzer: add new supergraph visualization
adds 6969ac301f2 analyzer: fix malloc pointer NULL-ness
adds 9dba60130dc c++: Fix ICE after ambiguous inline namespace reopen [PR94257]
adds 04dd734b52d c++: avoid -Wredundant-tags on a first declaration in use [ [...]
adds 038769535a8 amdgcn: refactor mode iterators
adds ccacf77be55 PR c++/94098 - ICE on attribute access redeclaration
adds c7fc15f54b3 [pr84733] Fix ICE popping local scope
adds 52f24a9e989 PR c++/94346 - [9/10 Regression] ICE due to handle_copy_att [...]
adds 54de5afb4a9 c++: Handle COMPOUND_EXPRs in ocp_convert [PR94339]
adds 19e5389debb [RS6000] PR94145, make PLT loads volatile
adds 491009b609d Update gcc de.po.
adds 0302a2de7f1 libstdc++: Move definition earlier in file
adds ae6076b5bc1 libstdc++: Implement C++20 changes to insert iterators
adds 81a8d137c22 libstdc++: Add remaining C++20 changes to iterator adaptors
adds b8a28a06eaf libstdc++: Define __cpp_lib_ranges macro for C++20
adds c2781192292 Daily bump.
adds 679becf175c reassoc: Fix -fcompare-debug bug in reassociate_bb [PR94329]
adds c6a562de88c c: After issuing errors about array size, for error-recover [...]
adds 75defde9fb5 c++: Replay errors during diagnosis of constraint satisfact [...]
adds cd68edf894d c++: Respect current_constraint_diagnosis_depth in diagnose [...]
adds a7ea3d2ced7 c++: requires-expression outside of a template is misevalua [...]
adds 7981c06ae92 c++: Diagnose when "requires" is used instead of "requires [...]
adds 3fb7f2fbd5f [Fortran] Fix result-variable handling of MODULE PROCEDURE [...]
adds 7d57570b065 Patch for PR94246
adds 946a444df34 testsuite: adjust modulo-sched compare-debug tests
adds 42cda3ba45f libstdc++: Fix std::reverse_iterator relational operators
adds f6b2b79040d libstdc++: Fix two tests that fail in C++20 mode
adds 673bb288e62 Daily bump.
adds c76df72f1a9 testsuite: Split up gdc-test.exp into each subdirectory
adds 46b7d819f7c Delete duplicate .align output.
adds 85f6f317ec8 Fix typo in a warning related to flatten.
adds afd9da8b8ad testsuite: Move C++ tests in gdc.test into own subdirectory.
adds 60c254b279e testsuite: Handle more kinds of gdc.test test flags and dir [...]
adds dacc7effeea doc: Update -falign-functions/-falign-loops/-falign-jumps
adds 2a93fb6e962 Daily bump.
adds 07c48b61a08 [RS6000] Put call cookie back in AIX/ELFv2 call patterns
adds ec919cfcef8 Fix vextract* masked patterns [PR93069]
adds 3a9db91bee4 Fix scan pattern of vect-8.f90 dump.
adds 291aa50a631 XFAIL pr57193.c test-case.
adds 5abbfd3cd36 i386: Fix up *one_cmplv*2* insn with avx512f [PR94343]
adds 48c18af43fa Update bswap64-4 test for desired results
adds 841e721579b RS6000 Allow builtin initialization regardless of mask
adds 48e331d6382 Define TRY_EMPTY_VM_SPACE for riscv64-linux
adds 1cb1986cb59 c++: Fix handling of internal fn calls in statement express [...]
adds 5830f753559 c++: Fix comparison of fn() and ns::fn() [PR90711]
adds 9f6abd1b03e Update gcc sv.po.
adds 13a29fc5730 Daily bump.
adds 3809bcd6c0e lra: set insn_code_data to NULL when freeing
adds 56f0b32476c forwprop: Pattern recognize more rotates [PR94344]
adds 5ea39b24122 store-merging: Allow enums during bswap recognition [PR94403]
adds 1dcffc8ddc4 fold-const: Fix division folding with vector operands [PR94412]
adds a27c534794d aarch64: Fix up aarch64_compare_and_swaphi pattern [PR94368]
adds e81d0d9ec7a [ARM][PATCH]: Add support for MVE ACLE intrinsics polymorph [...]
adds cea1fc6f67d arc: Allow more ABIs in GLIBC_DYNAMIC_LINKER
adds 1ef979c6966 [ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_* polymorphic [...]
adds d08a318b4fd arc: Cleanup compilation warning
adds dc56917d111 arc: Update operand printing
adds 1165109b401 amdgcn: generalize vector insn modes
adds 48742e02d71 d: Use d_comdat_linkage on generated internal decl.
adds e06cde870ed Library-side tests for parenthesized aggregate init
adds f14b41d2712 vect: ICE: in vectorizable_load, at tree-vect-stmts.c:9173 [...]
adds e8e0acbaa38 d: Use memset to fill alignment holes with zeroes.
adds 331c438d5a6 Update cpplib sr.po.
adds 689418b97e5 libgomp – fix handling of 'target enter data'
adds 63b2923dc6f libgccjit: add new version entry point
adds 1c16f7fc903 d: Add always_inline to the internal attribute table.
adds 013fca64fc1 d: Merge UDAs between function prototype and definitions (PR90136)
adds 73dd051894b Daily bump.
adds 595f1b1274b c++: Adjust formatting.
adds 76f09260b7e c++: Fix DMI with lambda 'this' capture [PR94205]
adds bd0f22a8d5c Fix PR94043 by making vect_live_op generate lc-phi
adds 142d68f50b4 Fix typo in a macro usage.
adds 9ecb3ecc8cc objsz: Don't call replace_uses_by on SSA_NAME_OCCURS_IN_ABN [...]
adds d3ee88fdb4e Clear me from patch ownership.
adds 0c9a8a8c103 fortran : FAIL: gfortran.dg/pr93365.f90 PR94386
adds e899d4b7125 Add testcase for already fixed PR [PR94436]
adds 032f2366a4c rs6000: Make code questionably using r2 not ICE (PR94420)
adds dd5da571731 doc: Fix a typo in the documentation of the copy attribute
adds 43d011eb054 Whoops, forgot the changelog
adds b60bd122dc7 doc: Fix typo
adds 7546463b9f7 subreg: Fix PR94123, SVN r273240 causes gcc.target/powerpc/ [...]
adds a96f1c38a78 analyzer: handle compound assignments [PR94378]
adds 6c557ba5380 libstdc++: Move "free books" list from fsf.org to gnu.org
adds fb25041e11d d: Fix gdc.dg/pr92216.d FAILs on 32-bit targets
adds 918b89b7623 d: Fix new tests gdc.dg/pr93038.d and gdc.dg/pr93038b.d in [...]
adds 25839b6af9f Daily bump.
adds bf1f6d8819a fortran: ICE equivalence with an element of an array PR94030
adds 2c54eab5a30 fortran : ICE in gfc_resolve_findloc PR93498
adds b7a98f48e06 S/390: Remove superfluous commutative constraint modifiers
adds 224efaf7e1e [Fortran] Fix error cleanup of select rank (PR93522)
adds c1effaa209f libstdc++-v3/test: Better skip for "use_service.cc"
adds ff825b81583 [ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317).
adds 66e327517b1 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435]
adds df562b12d90 aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435]
adds 2c0fa3ecf70 cselib: Reuse VALUEs on sp adjustments [PR92264]
adds 86c92411320 params: Decrease -param=max-find-base-term-values= default [...]
adds d4ed2cd13d0 sra/doc: Document param sra-max-propagations
adds 68cbee9bf53 Fix up -Wliteral-suffix warning on mti-linux.h
adds 81ce375d1fd Fix PR94401 by considering reverse overrun
adds 879bc686a0a doc: RISC-V: Update binutils requirement to 2.30
adds 54af95767e8 debug/94450 - remove DW_TAG_imported_unit generated in LTRA [...]
adds 75efe9cb1f8 c/94392 - only enable -ffinite-loops for C++
adds b90061c6ec0 Prevent IPA-SRA from creating calls to local comdats (PR 92676)
adds 3ab216a4d2f [Fortran] Resolve formal args before checking DTIO
adds 0cd74f35889 Fix fortran/85982 ICE in resolve_component.
adds a950bb6e952 Fix check_effective_target_sigsetjmp for glibc targets.
adds 63f56527335 Fix some comment typos in alias.c.
adds 535ce76acbe Daily bump.
adds b749b5ec58a S/390 zTPF: Handle skip trace addresses when unwinding
adds 55a7380213a ICF: compare type attributes for gimple_call_fntypes.
adds 4441ecedc3d Fix PR94443 with gsi_insert_seq_before [PR94443]
adds 2b1e849b35b Revert "[nvptx, libgomp] Update pr85381-{2,4}.c test-cases" [...]
adds 24fe8c8e338 libstdc++: Fix std::to_address for debug iterators (PR 93960)
adds 1dff18a181b amdgcn: Support unordered floating-point comparison operators
adds fa4aab7f840 Improve svn-rev to search for pattern at line beginning.
adds ef6631051d4 middle-end/94465 - handle released SSA names in array_ref_l [...]
adds 53161358180 AArch64: Fix options canonicalization for assembler
adds 3b6e79ae0c3 arm: Do not process rest of MVE header file after unsupport [...]
adds a87cd913ae2 arm: MVE: Fix unintended change to tests
adds 51ecad3c032 c++: Add test for PR c++/93211
adds b8020a5aafd i386: Fix vph{add,subs?}[wd] 256-bit AVX2 RTL patterns [PR94460]
adds bcafd8748cf c++: alias template and parameter packs (PR91966).
adds a13d6ec867e i386: Fix up handling of OPTION_MASK_ISA_MMX builtins [PR94461]
adds b949f8e2acb Fix va-arg-22.c at -O1 on m32r.
adds bbcdf9bb3fd x86: Mark scratch operand in ssse3_pshufbv8qi3 as earlyclobber
adds 710d54ed4e3 libgcc: avoid mmap/munmap hooks in split-stack code on GNU/Linux
adds 0c809f727cd openmp: Fix ICE on #pragma omp parallel master in template [...]
adds 7f26e60c260 Fix stdarg-3 regression on xstormy16 port
adds 78e27649095 Daily bump.
adds aae5d08a8d4 c++: Fix further protected_set_expr_location related -fcomp [...]
adds bab8d9625f4 cselib: Don't consider SP_DERIVED_VALUE_P values as useless [...]
adds 2523d721cfc ipa: Fix wrong code with failed propagation to builtin_cons [...]
adds 9f143008c73 c++: Fix reuse of class constants [PR94453]
adds f1ad7bac76b c++: Fix invalid pointer-to-member in requires [PR67825]
adds 21e28527130 Fix previous commit.
adds 37244b217a7 c++: Fix constexpr evaluation of self-modifying CONSTRUCTOR [...]
adds 49a86fce1a8 c++: Refrain from using replace_placeholders in constexpr e [...]
adds 75c8d6e54a1 c++: Mangling of dependent conversions [PR91377]
adds 458ca332d10 libgcc: only use __mmap if glibc >- 2.26
adds 0be9efad938 debug: Improve debug info of c++14 deduced return type [PR94459]
adds 705510a708d Daily bump.
adds 971c3d0ea28 Microblaze: Modified trap instruction There is a bug in tra [...]
adds a2ccd780271 Microblaze: Fixed missing save of r18 in fast_interrupt. Re [...]
adds 999611489d7 Minor doc fix for ISO C90
adds 3b35e71d45a coroutines, testsuite: Renumber two tests (NFC).
adds 2a1a0c8c0db libstdc++: Refer to Git documentation
adds c72a1b6f8b2 Daily bump.
adds f84aded848f c++: Fix crash in gimplifier with paren init of aggregates [...]
adds b696698767b libstdc++: Make string_view::copy usable in constant expres [...]
adds e83714f65d1 lra: Stop eh_return data regs being incorrectly marked live [...]
adds 130f703da0c skip gcc.target/arm/div64-unwinding.c on vxworks_kernel targets
adds d42a2e465d8 Fix fortran/93686 -- ICE matching data statements with deri [...]
adds 6a38c697c6c Update cpplib eo.po.
adds e0fd9ce257c Update gcc sv.po.
adds 8662d059343 cselib: Fix endless cselib loop on (plus:P (reg) (const_int 0))
adds 5ff06d762a8 libatomic/test: Fix compilation for build sysroot
adds 749bd22ddc5 libgomp/test: Remove a build sysroot fix regression
adds 52fa80f853c libgo: update to almost the 1.14.2 release
adds 93a49d2d229 Daily bump.
adds 467fc7c83ab c++: Fix ICE with implicit operator== [PR94462]
adds bee27152f7e i386: Fix emit_reduc_half on V{64Q,32H}Imode [PR94500]
adds 42867b875c3 RTEMS: Delete useless mcpu=8540 multilib
adds 30d26118f96 d: Always set ASM_VOLATILE_P on asm statements (PR94425)
adds 7a6588fe654 aarch64: Fix {ash[lr],lshr}<mode>3 expanders [PR94488]
adds 4df50a059fb openmp: Fix parallel master error recovery [PR94512]
adds d51af82b4cf i386: Fix V{64QI,32HI}mode constant permutations [PR94509]
adds 23f1f679141 c++: Fix usage of CONSTRUCTOR_PLACEHOLDER_BOUNDARY inside a [...]
adds 434fe1a4092 S/390: Fix layout of struct sigaction_t
adds 0f3cc1b3994 arm: MVE: Fix polymorphism for scalars and constants
adds 3ce755a80d1 arm: MVE: Do not use typeof for pointer parameters
adds b094133c1c5 arm: MVE: Fix constant load pattern
adds 9ce780efc4a arm: MVE: Fix v[id]wdup's
adds 094bc16bb41 arm: MVE Don't use lsll for 32-bit shifts scalar
adds d2ce75fef9f arm: MVE Fix immediate constraints on some vector instructions
adds 302b6836280 arm: MVE: Fix vec extracts to memory
adds c431634b2f2 arm: MVE: make sure we only use the Arm namespace variant o [...]
adds f6d7098d761 arm: MVE: Fix -Wall testisms
adds ff0597dcd99 arm: MVE: Fixes for pointers used in intrinsics for c++
adds 6a90680bfff arm: MVE: Add C++ polymorphism and fix some more issues
adds 89b01e86ff8 coroutines, ensure placeholder var is properly declared.
adds c104e8f1b67 libstdc++: Restore ability to use <charconv> in C++14 (PR 94520)
adds 2daa92ac4b5 aarch64: Fix {ash[lr],lshr}<mode>3 expanders [PR94488]
adds 57391ddaf39 Fix PR fortran/93871 and re-implement degree-valued trigono [...]
adds 3d947f1f271 middle-end/94479 - fix gimplification of address
adds 50c7853216e libgcc: use syscall rather than __mmap/__munmap
adds 88e508f9f11 S/390: Fix PR91628
adds c23c899aedf combine: Fix split_i2i3 ICE [PR94291]
adds 31449cf8e11 c++: ICE on invalid concept placeholder [PR94481].
adds 14162197fd4 Fix a variety of testsuite failures on the H8 after recent [...]
adds 7e5367f34d7 Daily bump.
adds f1a6150ecb7 libphobos: Merge upstream phobos fb4f6a713
adds 845d451e1f7 c++: requires-expression and tentative parse [PR94480]
adds 38c3017f257 libphobos: Always build with warning flags enabled
adds 13e41d8b9d3 [C/C++, OpenACC] Reject vars of different scope in acc decl [...]
adds 54cb3baa82d Undo accidental commit to omp-grid.c
adds 4ed1ff7ecbf HSA: omp-grid.c – access proper clause code
adds 70b55b25aa1 postreload: Fix autoinc handling in reload_cse_move2add [PR94516]
adds 542f73539db update polytypes.c -flax-vector-conversions msg
adds a6479aa4c05 c++: ICE with defaulted comparison operator [PR94478]
adds 4cf6b06cb5b c++: Further fix for -fsanitize=vptr [PR94325]
adds 975e6670c42 arm: CLI for Custom Datapath Extension (CDE)
adds 12f55e030ed c++: Function type and parameter type disagreements [PR92010]
adds 07b9bfd02b8 arm: CDE intrinsics using FPU/MVE S/D registers
adds a5f3c89e1b7 [Arm] Implement scalar Custom Datapath Extension intrinsics
adds 78bf9163764 [Arm] Implement CDE intrinsics for MVE registers.
adds ef684c78273 [Arm] Implement CDE predicated intrinsics for MVE registers
adds e18cd376e0d libstdc++: Add comparison operators to <charconv> result types
adds 70df40cab6f Allow new/delete operator deletion only for replaceable.
adds e4b84abcc46 require tls_runtime for tls execution test
adds ef389dadd4f libstdc++: Add comparison operators to types from Numerics clause
adds faa0817311f Move gfortran.dg/dec_math_5.f90 to ./ieee/
adds 8bf5faa9c46 i386: Don't use AVX512F integral masks for V*TImode [PR94438]
adds c5f37965396 x86: Insert ENDBR if function will be called indirectly
adds 7dbfcb91a87 add missing fp16 options
adds dd9ca9d770a rtl-optimization/93946 - fix TBAA for redundant store remov [...]
adds 77d6dfc9298 c++: Fix ICE-on-invalid with lambda template [PR94507]
adds 08d1e7a5aab openacc: Fix up declare-pr94120.C testcase [PR94533]
adds 6c9a711575d testsuite: Fix up pr94314*.C tests [PR94314]
adds f52eb4f9889 vect: Fix up lowering of TRUNC_MOD_EXPR by negative constan [...]
adds d0cc1b79b39 cselib, reload: Fix cselib ICE on m68k/microblaze [PR94526]
adds 72c136c9007 libphobos: Remove --enable-unix configure option.
adds 48242b2c3ac rs6000: Link with libc128.a for long-double-128.
adds 6e286c8df45 libphobos: Remove --enable-thread-lib configure option.
adds c0dbfbd763a libphobos: Add --enable-libphobos-checking configure option
adds 4049edc23e4 Daily bump.
adds e7c4084d11b [testsuite] Fix PR94079 by respecting vect_hw_misalign [PR94079]
adds b4e8cd08326 Whoops, fix wrong PR number in the changelog
adds fe1837143f1 Require pthread effective target for test case using -pthre [...]
adds 926d39c3816 coroutines: Add cleanups, where required, to statements wit [...]
adds ed80b385418 Add unsigned type iv_cand for iv_use with non mode-precision type
adds af19e4d0e23 PR target/94530
adds bb40460646c testsuite/93369 - use -shared to avoid issue with ODR violation
adds 7ed2d6cbd09 testsuite: Tweak check-function-bodies interface
adds f60979edbfc Avoid g++.dg/lto/alias-4_0.C test failure on ARM [PR91322]
adds 14828900469 Fix typo in my previous change.
adds 830c5724287 c++: Fix wrong paren-init of aggregates interference [PR93790]
adds 2111d5406a4 sra: Fix sra_modify_expr handling of partial writes (PR 94482)
adds f9d09df0f35 Merge top-level configury changes from gdb
adds 93674a72309 [testsuite] scanasm.exp: Fix target-selector handling in ch [...]
adds 8b5bc7d12de [testsuite][arm] Fix cmse-15.c expected output
adds bbb0de4a4ac libphobos: Remove --enable-druntime-gc configure option.
adds a4d2774c9c1 [Arm] Allow the use of arm_cde.h for C++
adds 5002dae3df4 aarch64: Add a separate "SVE sizeless type" attribute
adds 38e62001c57 aarch64: Add support for arm_sve_vector_bits
adds 33c45e51b49 cselib, var-tracking: Improve debug info after the cselib s [...]
adds 07432a807ed MSP430: Indiciate that the epilogue_helper insn does not fallthru
adds 5b074864f8c libstdc++: Add comparison operators to std::unique_ptr
adds 3fd1c229ad1 libstdc++: Implement LWG 3324 for [cmp.alg] function object [...]
adds ef529765234 c++: constexpr static data member instantiation [PR94523]
adds 44facdb79f2 PR fortran/87923 -- fix ICE when resolving I/O tags and sim [...]
adds fef3d8b4a07 Daily bump.
adds d09f80ae014 compiler: look up composite literal keys in the global namespace
adds d79a22eddc6 libgo: update to final 1.14.2 release
adds 6c4a05f251a Simplify co_await_expander.
adds 7478addd84a libphobos: Use libdruntime as a convenience library for libphobos.
adds ff3f862b451 Handle 'omp declare target' attribute set for both OpenACC [...]
adds 6b816a5f0ed Add 'dg-do run' to 'libgomp.fortran/target-enter-data-1.f90'
adds be9862dd969 Test cases for mixed structured/dynamic data lifetimes with [...]
adds ecc66362ee5 Fix UNRESOLVED testcase gfortran.dg/asynchronous_5.f03.
adds e26bd694c79 Fix typo in gfortran.dg/asynchronous_5.f03 from last commit.
adds 62c25d7adb1 c++: make __is_constructible work with paren-init of aggrs [...]
adds 0666767eb4c coroutines: Revise await expansions [PR94528]
adds a02558a3953 Correct PR numbers in the last Changelog.
adds 47539a4acef Daily bump.
adds a615ea71bc8 cselib: Mark the cselib_record_sp_cfa_base_equiv VALUE as p [...]
adds bb87d5cc77d testsuite: Fix up pr94482.c testcase [PR94482]
No new revisions were added by this update.
Summary of changes:
ChangeLog | 10 +
Makefile.def | 16 +
Makefile.in | 933 +
configure | 39 +-
configure.ac | 36 +-
contrib/ChangeLog | 5 +
contrib/gcc-git-customization.sh | 2 +-
gcc/ChangeLog | 8902 +++-
gcc/DATESTAMP | 2 +-
gcc/alias.c | 14 +-
gcc/analyzer/ChangeLog | 196 +
gcc/analyzer/analyzer.h | 1 +
gcc/analyzer/checker-path.cc | 1 +
gcc/analyzer/constraint-manager.cc | 1 +
gcc/analyzer/diagnostic-manager.cc | 50 +-
gcc/analyzer/diagnostic-manager.h | 32 +
gcc/analyzer/engine.cc | 287 +-
gcc/analyzer/exploded-graph.h | 31 +-
gcc/analyzer/program-point.cc | 1 +
gcc/analyzer/program-state.cc | 3 +-
gcc/analyzer/region-model.cc | 638 +-
gcc/analyzer/region-model.h | 171 +-
gcc/analyzer/sm-malloc.cc | 2 +-
gcc/analyzer/state-purge.cc | 21 +-
gcc/analyzer/state-purge.h | 5 +-
gcc/analyzer/supergraph.cc | 56 +-
gcc/analyzer/supergraph.h | 19 +-
gcc/asan.c | 7 +-
gcc/builtins.c | 22 +-
gcc/c-family/ChangeLog | 41 +
gcc/c-family/c-attribs.c | 35 +-
gcc/c-family/c-common.c | 13 +-
gcc/c-family/c-opts.c | 4 +
gcc/c-family/c-warn.c | 5 +
gcc/c-family/c.opt | 4 +
gcc/c/ChangeLog | 59 +
gcc/c/c-decl.c | 65 +-
gcc/c/c-fold.c | 9 +
gcc/c/c-parser.c | 63 +-
gcc/c/c-tree.h | 15 +-
gcc/c/c-typeck.c | 5 +-
gcc/calls.c | 82 +-
gcc/cfgexpand.c | 2 +-
gcc/cfgloop.h | 4 +
gcc/cfgloopmanip.c | 1 +
gcc/cgraph.c | 97 +-
gcc/cgraph.h | 17 +-
gcc/cgraphunit.c | 32 +-
gcc/combine.c | 42 +-
gcc/common.opt | 2 +-
gcc/common/config/aarch64/aarch64-common.c | 17 +-
gcc/common/config/arm/arm-common.c | 3 +-
gcc/config.gcc | 2 +-
gcc/config/aarch64/aarch64-c.c | 2 +
gcc/config/aarch64/aarch64-protos.h | 1 +
gcc/config/aarch64/aarch64-simd.md | 100 +-
gcc/config/aarch64/aarch64-sve-builtins.cc | 104 +-
gcc/config/aarch64/aarch64-sve.md | 2 +-
gcc/config/aarch64/aarch64.c | 885 +-
gcc/config/aarch64/aarch64.md | 22 +-
gcc/config/aarch64/atomics.md | 5 +-
gcc/config/aarch64/constraints.md | 7 +
.../aarch64/falkor-tag-collision-avoidance.c | 5 +-
gcc/config/aarch64/iterators.md | 3 +-
gcc/config/arc/arc.c | 8 +-
gcc/config/arc/arc.h | 6 +-
gcc/config/arc/linux.h | 3 +-
gcc/config/arm/aout.h | 6 +-
gcc/config/arm/arm-builtins.c | 905 +-
gcc/config/arm/arm-builtins.h | 35 +
gcc/config/arm/arm-c.c | 131 +
gcc/config/arm/arm-cpus.in | 40 +-
gcc/config/arm/arm-protos.h | 3 +-
gcc/config/arm/arm.c | 292 +-
gcc/config/arm/arm.h | 87 +-
gcc/config/arm/arm.md | 107 +-
gcc/config/arm/arm_cde.h | 176 +
gcc/config/arm/arm_cde_builtins.def | 58 +
gcc/config/arm/arm_mve.h | 42125 +++++++++++++++++++
gcc/config/arm/arm_mve_builtins.def | 906 +
gcc/config/arm/arm_mve_types.h | 1490 +
gcc/config/arm/constraints.md | 54 +-
gcc/config/arm/iterators.md | 34 +-
gcc/config/arm/mve.md | 11416 +++++
gcc/config/arm/neon.md | 75 +-
gcc/config/arm/predicates.md | 87 +-
gcc/config/arm/t-arm | 5 +-
gcc/config/arm/t-rmprofile | 13 +-
gcc/config/arm/thumb2.md | 2 +-
gcc/config/arm/types.md | 18 +-
gcc/config/arm/unspecs.md | 6 +
gcc/config/arm/vec-common.md | 116 +-
gcc/config/arm/vfp.md | 199 +-
gcc/config/darwin.c | 29 +-
gcc/config/darwin.opt | 96 +-
gcc/config/fr30/fr30.c | 2 +-
gcc/config/gcn/gcn-run.c | 2 +-
gcc/config/gcn/gcn-valu.md | 2113 +-
gcc/config/gcn/gcn.c | 15 +
gcc/config/gcn/gcn.h | 4 +
gcc/config/gcn/gcn.md | 2 +
gcc/config/gcn/predicates.md | 2 +-
gcc/config/h8300/h8300.md | 1 +
gcc/config/host-linux.c | 2 +
gcc/config/i386/darwin.h | 10 +
gcc/config/i386/i386-builtin.def | 126 +-
gcc/config/i386/i386-builtins.c | 37 +-
gcc/config/i386/i386-expand.c | 95 +-
gcc/config/i386/i386-features.c | 13 +-
gcc/config/i386/i386.c | 6 +-
gcc/config/i386/i386.h | 5 +-
gcc/config/i386/i386.md | 25 +-
gcc/config/i386/predicates.md | 5 -
gcc/config/i386/sse.md | 89 +-
gcc/config/i386/x86-tune.def | 2 +-
gcc/config/m32r/m32r.c | 2 +-
gcc/config/microblaze/microblaze.c | 2 +-
gcc/config/microblaze/microblaze.md | 2 +-
gcc/config/mips/mti-linux.h | 2 +-
gcc/config/msp430/msp430.c | 4 +-
gcc/config/msp430/msp430.md | 4 +-
gcc/config/nds32/nds32-md-auxiliary.c | 12 +-
gcc/config/nvptx/nvptx.c | 2 +-
gcc/config/pa/pa.c | 1 -
gcc/config/pa/pa.h | 1 +
gcc/config/rs6000/aix61.h | 1 +
gcc/config/rs6000/aix71.h | 1 +
gcc/config/rs6000/aix72.h | 1 +
gcc/config/rs6000/altivec.h | 2 +-
gcc/config/rs6000/constraints.md | 11 +
gcc/config/rs6000/rs6000-c.c | 2 +-
gcc/config/rs6000/rs6000-call.c | 28 -
gcc/config/rs6000/rs6000-internal.h | 1 -
gcc/config/rs6000/rs6000-logue.c | 2 +-
gcc/config/rs6000/rs6000-p8swap.c | 2 +-
gcc/config/rs6000/rs6000-string.c | 2 +-
gcc/config/rs6000/rs6000.c | 57 +-
gcc/config/rs6000/rs6000.h | 1 +
gcc/config/rs6000/rs6000.md | 136 +-
gcc/config/rs6000/t-rtems | 1 -
gcc/config/s390/vector.md | 80 +-
gcc/config/s390/vx-builtins.md | 78 +-
gcc/config/sh/sh.md | 8 +-
gcc/config/stormy16/stormy16.c | 12 +-
gcc/configure | 13 +-
gcc/configure.ac | 9 +-
gcc/cp/ChangeLog | 527 +
gcc/cp/call.c | 34 +-
gcc/cp/class.c | 10 +-
gcc/cp/constexpr.c | 405 +-
gcc/cp/constraint.cc | 280 +-
gcc/cp/coroutines.cc | 768 +-
gcc/cp/cp-gimplify.c | 72 +-
gcc/cp/cp-tree.h | 8 +-
gcc/cp/cvt.c | 11 +
gcc/cp/cxx-pretty-print.c | 18 +-
gcc/cp/cxx-pretty-print.h | 1 +
gcc/cp/decl.c | 70 +-
gcc/cp/decl2.c | 3 +-
gcc/cp/error.c | 35 +-
gcc/cp/except.c | 5 +-
gcc/cp/expr.c | 22 +-
gcc/cp/init.c | 2 +
gcc/cp/logic.cc | 8 +-
gcc/cp/mangle.c | 1 +
gcc/cp/method.c | 59 +-
gcc/cp/name-lookup.c | 65 +-
gcc/cp/parser.c | 483 +-
gcc/cp/pt.c | 218 +-
gcc/cp/semantics.c | 9 +-
gcc/cp/tree.c | 44 +-
gcc/cp/typeck2.c | 20 +-
gcc/cse.c | 14 +-
gcc/cselib.c | 334 +-
gcc/cselib.h | 2 +
gcc/d/ChangeLog | 107 +
gcc/d/d-attribs.cc | 43 +-
gcc/d/d-codegen.cc | 44 -
gcc/d/d-lang.cc | 81 +-
gcc/d/d-spec.cc | 14 +-
gcc/d/d-target.cc | 2 +-
gcc/d/d-tree.h | 11 +-
gcc/d/decl.cc | 66 +-
gcc/d/dmd/MERGE | 2 +-
gcc/d/dmd/dclass.c | 1 -
gcc/d/dmd/expressionsem.c | 1 +
gcc/d/dmd/iasmgcc.c | 30 +-
gcc/d/dmd/module.h | 1 +
gcc/d/expr.cc | 22 +-
gcc/d/modules.cc | 2 +-
gcc/d/toir.cc | 5 +-
gcc/d/typeinfo.cc | 49 +-
gcc/d/types.cc | 89 +-
gcc/ddg.c | 169 +-
gcc/ddg.h | 3 -
gcc/doc/extend.texi | 6 +-
gcc/doc/install.texi | 28 +-
gcc/doc/invoke.texi | 36 +-
gcc/doc/sourcebuild.texi | 47 +-
gcc/doc/tm.texi | 4 +-
gcc/dse.c | 57 +-
gcc/dwarf2out.c | 108 +-
gcc/fold-const.c | 17 +-
gcc/fortran/ChangeLog | 182 +
gcc/fortran/arith.c | 12 +-
gcc/fortran/array.c | 2 +-
gcc/fortran/check.c | 4 +
gcc/fortran/class.c | 2 +-
gcc/fortran/decl.c | 51 +-
gcc/fortran/expr.c | 46 +-
gcc/fortran/frontend-passes.c | 2 +-
gcc/fortran/gfortran.h | 16 +-
gcc/fortran/interface.c | 4 +-
gcc/fortran/intrinsic.c | 193 +-
gcc/fortran/intrinsic.h | 12 +-
gcc/fortran/io.c | 858 +-
gcc/fortran/iresolve.c | 256 +-
gcc/fortran/match.c | 13 +-
gcc/fortran/module.c | 4 +-
gcc/fortran/resolve.c | 66 +-
gcc/fortran/simplify.c | 300 +-
gcc/fortran/trans-array.c | 6 +-
gcc/fortran/trans-expr.c | 2 +-
gcc/fortran/trans-intrinsic.c | 196 +
gcc/fortran/trans-types.c | 2 +-
gcc/fortran/trigd_fe.inc | 50 +
gcc/gimple-fold.c | 22 +-
gcc/gimple-loop-versioning.cc | 2 +-
gcc/gimple-ssa-sprintf.c | 10 +-
gcc/gimple-ssa-store-merging.c | 9 +-
gcc/gimple-ssa-warn-alloca.c | 65 +-
gcc/gimple-ssa-warn-restrict.c | 4 +-
gcc/gimple.c | 6 +-
gcc/gimple.h | 16 +-
gcc/gimplify.c | 39 +-
gcc/go/gofrontend/MERGE | 2 +-
gcc/go/gofrontend/expressions.cc | 14 +-
gcc/graphviz.cc | 44 +-
gcc/graphviz.h | 6 +
gcc/hsa-common.c | 2 +-
gcc/input.c | 4 +-
gcc/ipa-cp.c | 13 +-
gcc/ipa-fnsummary.c | 48 +-
gcc/ipa-icf-gimple.c | 6 +
gcc/ipa-icf.c | 4 +
gcc/ipa-inline-transform.c | 9 +-
gcc/ipa-inline.c | 4 +
gcc/ipa-param-manipulation.h | 2 +-
gcc/ipa-predicate.c | 2 +-
gcc/ipa-prop.c | 2 +-
gcc/ipa-prop.h | 2 +-
gcc/ipa-split.c | 2 +-
gcc/ipa-sra.c | 38 +-
gcc/ira-costs.c | 2 +-
gcc/jit/ChangeLog | 24 +
gcc/jit/docs/topics/compatibility.rst | 33 +
gcc/jit/jit-playback.c | 16 +-
gcc/jit/jit-playback.h | 1 -
gcc/jit/libgccjit++.h | 22 +
gcc/jit/libgccjit.c | 46 +
gcc/jit/libgccjit.h | 16 +
gcc/jit/libgccjit.map | 9 +-
gcc/langhooks.c | 5 +-
gcc/langhooks.h | 2 +-
gcc/lower-subreg.c | 3 +-
gcc/lra-constraints.c | 24 +-
gcc/lra-lives.c | 6 +
gcc/lra-spills.c | 12 +-
gcc/lra.c | 5 +-
gcc/lto-section-in.c | 1 +
gcc/lto-streamer-in.c | 1 +
gcc/lto-streamer-out.c | 83 +-
gcc/lto-streamer.h | 1 +
gcc/lto/ChangeLog | 28 +
gcc/lto/lto-common.c | 1 +
gcc/lto/lto-lang.c | 3 +-
gcc/lto/lto.c | 13 +-
gcc/modulo-sched.c | 13 +-
gcc/multiple_target.c | 4 -
gcc/omp-general.c | 13 +
gcc/omp-grid.c | 4 +-
gcc/omp-offload.c | 14 +-
gcc/optinfo-emit-json.cc | 2 +-
gcc/opts.c | 30 +-
gcc/params.opt | 6 +-
gcc/po/ChangeLog | 30 +
gcc/po/be.po | 15546 ++++---
gcc/po/da.po | 16726 ++++----
gcc/po/de.po | 15296 ++++---
gcc/po/el.po | 15654 ++++---
gcc/po/es.po | 15527 ++++---
gcc/po/fi.po | 17525 ++++----
gcc/po/fr.po | 15310 ++++---
gcc/po/gcc.pot | 15239 ++++---
gcc/po/hr.po | 15206 ++++---
gcc/po/id.po | 17084 ++++----
gcc/po/ja.po | 16929 ++++----
gcc/po/nl.po | 16172 +++----
gcc/po/ru.po | 15477 ++++---
gcc/po/sr.po | 16946 ++++----
gcc/po/sv.po | 16223 ++++---
gcc/po/tr.po | 17101 ++++----
gcc/po/uk.po | 17022 ++++----
gcc/po/vi.po | 15520 ++++---
gcc/po/zh_CN.po | 17326 ++++----
gcc/po/zh_TW.po | 17429 ++++----
gcc/postreload.c | 27 +-
gcc/read-rtl-function.c | 6 +-
gcc/reload1.c | 5 +-
gcc/rtl.c | 2 +-
gcc/rtl.h | 1 +
gcc/selftest.c | 2 +-
gcc/shrink-wrap.c | 2 +-
gcc/simplify-rtx.c | 51 +
gcc/spellcheck.c | 2 +-
gcc/symtab.c | 20 +-
gcc/target.def | 6 +-
gcc/testsuite/ChangeLog | 6447 ++-
gcc/testsuite/c-c++-common/attr-copy.c | 43 +
gcc/testsuite/c-c++-common/goacc-gomp/pr93465-1.c | 56 +
gcc/testsuite/c-c++-common/goacc/declare-pr94120.c | 23 +
.../c-c++-common/goacc/firstprivate-mappings-1.c | 12 +-
gcc/testsuite/c-c++-common/pr94385.c | 12 +
.../c-c++-common/ubsan/float-cast-overflow-1.c | 2 +-
.../c-c++-common/ubsan/float-cast-overflow-2.c | 2 +-
.../c-c++-common/ubsan/float-cast-overflow-4.c | 2 +-
gcc/testsuite/g++.dg/abi/empty30.C | 14 +
gcc/testsuite/g++.dg/abi/lambda-vis.C | 23 +
gcc/testsuite/g++.dg/abi/mangle74.C | 30 +
gcc/testsuite/g++.dg/abi/mangle75.C | 13 +
gcc/testsuite/g++.dg/concepts/diagnostic1.C | 1 +
gcc/testsuite/g++.dg/concepts/diagnostic2.C | 2 +-
gcc/testsuite/g++.dg/concepts/diagnostic5.C | 43 +
gcc/testsuite/g++.dg/concepts/diagnostic6.C | 14 +
gcc/testsuite/g++.dg/concepts/diagnostic7.C | 11 +
gcc/testsuite/g++.dg/concepts/diagnostic8.C | 6 +
gcc/testsuite/g++.dg/concepts/pr84330.C | 2 +-
gcc/testsuite/g++.dg/concepts/pr94252.C | 27 +
gcc/testsuite/g++.dg/conversion/op7.C | 22 +
.../g++.dg/coroutines/co-await-syntax-10.C | 40 +
.../g++.dg/coroutines/co-await-syntax-11.C | 205 +
gcc/testsuite/g++.dg/coroutines/pr94528.C | 64 +
...late-traits.C => co-await-16-template-traits.C} | 0
...e-comp-ref.C => co-await-17-capture-comp-ref.C} | 0
.../coroutines/torture/co-ret-09-bool-await-susp.C | 44 +-
.../g++.dg/coroutines/torture/coro-torture.exp | 14 +-
.../torture/exceptions-test-01-n4849-a.C | 213 +
.../torture/symmetric-transfer-00-basic.C | 111 +
gcc/testsuite/g++.dg/cpp0x/decltype74.C | 30 +
gcc/testsuite/g++.dg/cpp0x/decltype75.C | 24 +
gcc/testsuite/g++.dg/cpp0x/enum40.C | 26 +
.../g++.dg/cpp0x/lambda/lambda-constexpr1.C | 28 +
gcc/testsuite/g++.dg/cpp0x/noexcept57.C | 40 +
gcc/testsuite/g++.dg/cpp0x/variadic-alias2.C | 103 +
gcc/testsuite/g++.dg/cpp1y/alias-decl1.C | 9 +
gcc/testsuite/g++.dg/cpp1y/alias-decl2.C | 8 +
gcc/testsuite/g++.dg/cpp1y/alias-decl3.C | 9 +
gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi2.C | 20 +
gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi3.C | 19 +
gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi4.C | 21 +
gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi5.C | 22 +
gcc/testsuite/g++.dg/cpp1y/constexpr-static1.C | 10 +
gcc/testsuite/g++.dg/cpp1y/constexpr-union2.C | 9 +
gcc/testsuite/g++.dg/cpp1y/constexpr-union3.C | 9 +
gcc/testsuite/g++.dg/cpp1y/constexpr-union4.C | 9 +
gcc/testsuite/g++.dg/cpp1y/constexpr-union5.C | 15 +
gcc/testsuite/g++.dg/cpp1y/pr79937-5.C | 42 +
gcc/testsuite/g++.dg/cpp1y/pr90996.C | 17 +
gcc/testsuite/g++.dg/cpp1y/pr94066-2.C | 19 +
gcc/testsuite/g++.dg/cpp1y/pr94066-3.C | 16 +
gcc/testsuite/g++.dg/cpp1y/pr94066.C | 18 +
gcc/testsuite/g++.dg/cpp1z/class-deduction72.C | 11 +
gcc/testsuite/g++.dg/cpp1z/lambda-this4.C | 13 +
gcc/testsuite/g++.dg/cpp1z/lambda-this5.C | 11 +
gcc/testsuite/g++.dg/cpp1z/lambda-this6.C | 12 +
gcc/testsuite/g++.dg/cpp1z/pr81349.C | 29 +
gcc/testsuite/g++.dg/cpp2a/concepts-iconv1.C | 1 +
gcc/testsuite/g++.dg/cpp2a/concepts-nonbool1.C | 20 +
gcc/testsuite/g++.dg/cpp2a/concepts-nonbool2.C | 11 +
gcc/testsuite/g++.dg/cpp2a/concepts-placeholder2.C | 9 +
gcc/testsuite/g++.dg/cpp2a/concepts-pmf1.C | 22 +
gcc/testsuite/g++.dg/cpp2a/concepts-pr67825.C | 2 +-
gcc/testsuite/g++.dg/cpp2a/concepts-requires1.C | 4 +-
gcc/testsuite/g++.dg/cpp2a/concepts-requires18.C | 2 +-
gcc/testsuite/g++.dg/cpp2a/concepts-requires2.C | 12 +-
gcc/testsuite/g++.dg/cpp2a/concepts-requires21.C | 7 +
gcc/testsuite/g++.dg/cpp2a/concepts-requires5.C | 2 +-
gcc/testsuite/g++.dg/cpp2a/constexpr-union1.C | 18 +
gcc/testsuite/g++.dg/cpp2a/lambda-generic7.C | 10 +
gcc/testsuite/g++.dg/cpp2a/lambda-uneval11.C | 10 +
gcc/testsuite/g++.dg/cpp2a/paren-init22.C | 15 +
gcc/testsuite/g++.dg/cpp2a/paren-init23.C | 19 +
gcc/testsuite/g++.dg/cpp2a/paren-init24.C | 26 +
gcc/testsuite/g++.dg/cpp2a/paren-init25.C | 25 +
gcc/testsuite/g++.dg/cpp2a/spaceship-eq9.C | 17 +
gcc/testsuite/g++.dg/cpp2a/spaceship-err4.C | 7 +
gcc/testsuite/g++.dg/debug/dwarf2/const2b.C | 2 +-
gcc/testsuite/g++.dg/debug/pr94272.C | 14 +
gcc/testsuite/g++.dg/debug/pr94273.C | 4 +
gcc/testsuite/g++.dg/debug/pr94281.C | 11 +
gcc/testsuite/g++.dg/debug/pr94323.C | 13 +
gcc/testsuite/g++.dg/debug/pr94459.C | 58 +
gcc/testsuite/g++.dg/ext/attr-access-2.C | 88 +
gcc/testsuite/g++.dg/ext/is_constructible5.C | 16 +
gcc/testsuite/g++.dg/ext/pr94197.C | 74 +
gcc/testsuite/g++.dg/ext/stmtexpr15.C | 2 +-
gcc/testsuite/g++.dg/goacc/declare-pr94120.C | 30 +
.../g++.dg/goacc/firstprivate-mappings-1.C | 12 +-
gcc/testsuite/g++.dg/gomp/pr94477.C | 18 +
gcc/testsuite/g++.dg/gomp/pr94512.C | 18 +
gcc/testsuite/g++.dg/init/aggr14.C | 14 +
gcc/testsuite/g++.dg/lookup/pr84733.C | 21 +
gcc/testsuite/g++.dg/lookup/pr94257.C | 16 +
gcc/testsuite/g++.dg/lto/alias-4_0.C | 8 +-
gcc/testsuite/g++.dg/lto/pr64076_0.C | 4 +
gcc/testsuite/g++.dg/lto/pr64076_1.C | 2 +-
gcc/testsuite/g++.dg/opt/pr94223.C | 5 +
gcc/testsuite/g++.dg/opt/pr94441.C | 16 +
gcc/testsuite/g++.dg/opt/pr94468.C | 57 +
gcc/testsuite/g++.dg/other/pr94326.C | 19 +
gcc/testsuite/g++.dg/other/pr94339.C | 11 +
gcc/testsuite/g++.dg/parse/error26.C | 2 +-
gcc/testsuite/g++.dg/parse/missing-template1.C | 4 +-
gcc/testsuite/g++.dg/parse/template3.C | 5 +-
gcc/testsuite/g++.dg/pr93674.C | 16 +
gcc/testsuite/g++.dg/pr94314-2.C | 26 +
gcc/testsuite/g++.dg/pr94314-3.C | 55 +
gcc/testsuite/g++.dg/pr94314.C | 85 +
gcc/testsuite/g++.dg/template/array33.C | 63 +
gcc/testsuite/g++.dg/template/array34.C | 63 +
gcc/testsuite/g++.dg/template/defarg22.C | 13 +
gcc/testsuite/g++.dg/template/dependent-name10.C | 18 +
gcc/testsuite/g++.dg/template/dependent-name11.C | 15 +
gcc/testsuite/g++.dg/template/dependent-name12.C | 7 +
gcc/testsuite/g++.dg/template/dependent-name13.C | 8 +
gcc/testsuite/g++.dg/template/dependent-name14.C | 38 +
gcc/testsuite/g++.dg/template/dependent-name5.C | 2 -
gcc/testsuite/g++.dg/template/dependent-name7.C | 9 +
gcc/testsuite/g++.dg/template/dependent-name8.C | 9 +
gcc/testsuite/g++.dg/template/dependent-name9.C | 9 +
gcc/testsuite/g++.dg/template/dr1710-2.C | 10 +
gcc/testsuite/g++.dg/template/dr1710.C | 9 +
gcc/testsuite/g++.dg/template/dr1794.C | 14 +
gcc/testsuite/g++.dg/template/dr314.C | 15 +
gcc/testsuite/g++.dg/template/error4.C | 3 +-
gcc/testsuite/g++.dg/template/koenig11.C | 11 +
gcc/testsuite/g++.dg/template/meminit2.C | 4 +-
gcc/testsuite/g++.dg/template/template-keyword2.C | 5 +
gcc/testsuite/g++.dg/torture/pr93347.C | 306 +
gcc/testsuite/g++.dg/torture/pr94202.C | 22 +
gcc/testsuite/g++.dg/torture/pr94216.C | 45 +
gcc/testsuite/g++.dg/torture/pr94303.C | 17 +
gcc/testsuite/g++.dg/tree-ssa/pr93940.C | 39 +
gcc/testsuite/g++.dg/tree-ssa/pr94224.C | 34 +
gcc/testsuite/g++.dg/tree-ssa/pr94403.C | 37 +
gcc/testsuite/g++.dg/ubsan/pr91993.C | 17 +
gcc/testsuite/g++.dg/ubsan/vptr-15.C | 14 +
gcc/testsuite/g++.dg/warn/Wconversion-pr91993.C | 17 +
gcc/testsuite/g++.dg/warn/Wduplicated-cond1.C | 16 +
gcc/testsuite/g++.dg/warn/Wmismatched-tags-3.C | 14 +
gcc/testsuite/g++.dg/warn/Wmismatched-tags-4.C | 141 +
gcc/testsuite/g++.dg/warn/Wmismatched-tags-5.C | 117 +
gcc/testsuite/g++.dg/warn/Wmismatched-tags-6.C | 29 +
gcc/testsuite/g++.dg/warn/Wnoexcept1.C | 2 +-
gcc/testsuite/g++.dg/warn/Wnoexcept2.C | 15 +
gcc/testsuite/g++.dg/warn/Wredundant-tags-3.C | 6 +-
gcc/testsuite/g++.dg/warn/Wredundant-tags-6.C | 91 +
gcc/testsuite/g++.dg/warn/Wredundant-tags-7.C | 25 +
gcc/testsuite/g++.old-deja/g++.pt/crash38.C | 6 +-
gcc/testsuite/g++.target/aarch64/pr94052.C | 174 +
gcc/testsuite/g++.target/arm/cde_mve.C | 10 +
gcc/testsuite/g++.target/arm/mve.exp | 49 +
gcc/testsuite/g++.target/i386/pr94185.C | 33 +
gcc/testsuite/gcc.c-torture/compile/pr94144.c | 18 +
gcc/testsuite/gcc.c-torture/compile/pr94179.c | 9 +
gcc/testsuite/gcc.c-torture/compile/pr94238.c | 22 +
gcc/testsuite/gcc.c-torture/compile/pr94488.c | 22 +
gcc/testsuite/gcc.c-torture/execute/pr94412.c | 28 +
gcc/testsuite/gcc.c-torture/execute/pr94524-1.c | 19 +
gcc/testsuite/gcc.c-torture/execute/pr94524-2.c | 25 +
gcc/testsuite/gcc.c-torture/pr92372.c | 16 +
gcc/testsuite/gcc.dg/Walloca-larger-than-3.c | 38 +
gcc/testsuite/gcc.dg/Walloca-larger-than-3.h | 9 +
gcc/testsuite/gcc.dg/Wvla-larger-than-4.c | 30 +
.../gcc.dg/analyzer/compound-assignment-1.c | 71 +
.../gcc.dg/analyzer/compound-assignment-2.c | 24 +
.../gcc.dg/analyzer/compound-assignment-3.c | 25 +
gcc/testsuite/gcc.dg/analyzer/data-model-5b.c | 6 +-
gcc/testsuite/gcc.dg/analyzer/data-model-5c.c | 7 +-
gcc/testsuite/gcc.dg/analyzer/dot-output.c | 1 +
gcc/testsuite/gcc.dg/analyzer/malloc-5.c | 12 +
gcc/testsuite/gcc.dg/analyzer/pr94047.c | 23 +
gcc/testsuite/gcc.dg/analyzer/sigsetjmp-5.c | 2 +
gcc/testsuite/gcc.dg/analyzer/sigsetjmp-6.c | 2 +
gcc/testsuite/gcc.dg/attr-flatten-1.c | 18 +
gcc/testsuite/gcc.dg/attr-weakref-5.c | 31 +
gcc/testsuite/gcc.dg/cleanup-13.c | 4 +
gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-1.c | 6 +
gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-2.c | 6 +
gcc/testsuite/gcc.dg/lto/pr94157_0.c | 1 +
gcc/testsuite/gcc.dg/lto/pr94271_0.c | 15 +
gcc/testsuite/gcc.dg/lto/pr94271_1.c | 17 +
gcc/testsuite/gcc.dg/pr84131.c | 29 +
gcc/testsuite/gcc.dg/pr92301.c | 2 +-
gcc/testsuite/gcc.dg/pr93573-1.c | 12 +
gcc/testsuite/gcc.dg/pr93573-2.c | 6 +
gcc/testsuite/gcc.dg/pr94015.c | 107 +
gcc/testsuite/gcc.dg/pr94166.c | 24 +
gcc/testsuite/gcc.dg/pr94167.c | 33 +
gcc/testsuite/gcc.dg/pr94172-1.c | 12 +
gcc/testsuite/gcc.dg/pr94172-2.c | 19 +
gcc/testsuite/gcc.dg/pr94188.c | 10 +
gcc/testsuite/gcc.dg/pr94189.c | 11 +
gcc/testsuite/gcc.dg/pr94211.c | 12 +
gcc/testsuite/gcc.dg/pr94269.c | 26 +
gcc/testsuite/gcc.dg/pr94277.c | 11 +
gcc/testsuite/gcc.dg/pr94283.c | 16 +
gcc/testsuite/gcc.dg/pr94286.c | 11 +
gcc/testsuite/gcc.dg/pr94291.c | 14 +
gcc/testsuite/gcc.dg/pr94292.c | 13 +
gcc/testsuite/gcc.dg/pr94344.c | 53 +
gcc/testsuite/gcc.dg/pr94368.c | 25 +
gcc/testsuite/gcc.dg/pr94436.c | 13 +
gcc/testsuite/gcc.dg/pr94526.c | 21 +
gcc/testsuite/gcc.dg/sms-compare-debug-1.c | 36 +
gcc/testsuite/gcc.dg/sms-compare-debug-2.c | 24 +
gcc/testsuite/gcc.dg/tls/pr78796.c | 2 +-
gcc/testsuite/gcc.dg/torture/pr94206.c | 17 +
gcc/testsuite/gcc.dg/torture/pr94392.c | 22 +
gcc/testsuite/gcc.dg/torture/pr94479.c | 12 +
gcc/testsuite/gcc.dg/torture/pr94482.c | 36 +
gcc/testsuite/gcc.dg/torture/pr94516.c | 31 +
gcc/testsuite/gcc.dg/tree-ssa/pr93435.c | 159 +
gcc/testsuite/gcc.dg/tree-ssa/pr94482-2.c | 50 +
gcc/testsuite/gcc.dg/ubsan/pr94423.c | 17 +
gcc/testsuite/gcc.dg/vect/bb-slp-pr69907.c | 5 +-
gcc/testsuite/gcc.dg/vect/pr93069.c | 10 +
gcc/testsuite/gcc.dg/vect/pr94443.c | 13 +
gcc/testsuite/gcc.misc-tests/gcov-pr94029.c | 14 +
.../aarch64/advsimd-intrinsics/bfcvt-nosimd.c | 5 +-
gcc/testsuite/gcc.target/aarch64/options_set_11.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_12.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_13.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_14.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_15.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_16.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_17.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_18.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_19.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_20.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_21.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_22.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_23.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_24.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_25.c | 11 +
gcc/testsuite/gcc.target/aarch64/options_set_26.c | 11 +
gcc/testsuite/gcc.target/aarch64/pr94072.c | 9 +
gcc/testsuite/gcc.target/aarch64/pr94201.c | 13 +
gcc/testsuite/gcc.target/aarch64/pr94398.c | 24 +
gcc/testsuite/gcc.target/aarch64/pr94435.c | 25 +
gcc/testsuite/gcc.target/aarch64/pr94530.c | 9 +
.../aarch64/sve/acle/general-c/sizeless-1.c | 3 +-
.../aarch64/sve/acle/general-c/sizeless-2.c | 3 +-
.../aarch64/sve/acle/general/attributes_1.c | 205 +
.../aarch64/sve/acle/general/attributes_2.c | 3 +
.../aarch64/sve/acle/general/attributes_3.c | 3 +
.../aarch64/sve/acle/general/attributes_4.c | 3 +
.../aarch64/sve/acle/general/attributes_5.c | 7 +
.../aarch64/sve/acle/general/attributes_6.c | 97 +
.../aarch64/sve/acle/general/attributes_7.c | 181 +
.../gcc.target/aarch64/sve/acle/general/cpy_1.c | 4 +
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c | 8 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_1.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_1_1024.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_1_128.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_1_2048.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_1_256.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_1_512.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_2.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_3.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_4.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_4_1024.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_4_128.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_4_2048.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_4_256.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_4_512.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_5.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_5_1024.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_5_128.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_5_2048.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_5_256.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_5_512.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_6.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_6_1024.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_6_128.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_6_2048.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_6_256.c | 2 +-
.../gcc.target/aarch64/sve/pcs/return_6_512.c | 2 +-
.../gcc.target/aarch64/sve/pcs/saves_1_be_nowrap.c | 78 +-
.../gcc.target/aarch64/sve/pcs/saves_1_be_wrap.c | 78 +-
.../gcc.target/aarch64/sve/pcs/saves_1_le_nowrap.c | 78 +-
.../gcc.target/aarch64/sve/pcs/saves_1_le_wrap.c | 78 +-
.../gcc.target/aarch64/sve/pcs/saves_2_be_nowrap.c | 306 +-
.../gcc.target/aarch64/sve/pcs/saves_2_be_wrap.c | 306 +-
.../gcc.target/aarch64/sve/pcs/saves_2_le_nowrap.c | 306 +-
.../gcc.target/aarch64/sve/pcs/saves_2_le_wrap.c | 306 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/saves_3.c | 2 +-
.../gcc.target/aarch64/sve/pcs/saves_4_be.c | 80 +-
.../gcc.target/aarch64/sve/pcs/saves_4_le.c | 80 +-
.../gcc.target/aarch64/sve/pcs/saves_5_be.c | 76 +-
.../gcc.target/aarch64/sve/pcs/saves_5_le.c | 76 +-
.../gcc.target/aarch64/sve/pcs/stack_clash_1.c | 81 +-
.../aarch64/sve/pcs/stack_clash_1_1024.c | 82 +-
.../gcc.target/aarch64/sve/pcs/stack_clash_1_128.c | 78 +-
.../aarch64/sve/pcs/stack_clash_1_2048.c | 80 +-
.../gcc.target/aarch64/sve/pcs/stack_clash_1_256.c | 82 +-
.../gcc.target/aarch64/sve/pcs/stack_clash_1_512.c | 82 +-
.../aarch64/sve/pcs/stack_clash_2_1024.c | 66 +-
.../gcc.target/aarch64/sve/pcs/stack_clash_2_128.c | 2 +-
.../aarch64/sve/pcs/stack_clash_2_2048.c | 66 +-
.../gcc.target/aarch64/sve/pcs/stack_clash_2_256.c | 66 +-
.../gcc.target/aarch64/sve/pcs/stack_clash_2_512.c | 66 +-
gcc/testsuite/gcc.target/aarch64/sve/pcs/struct.h | 77 +
.../gcc.target/aarch64/sve/pcs/struct_1_1024.c | 4 +
.../gcc.target/aarch64/sve/pcs/struct_1_128.c | 405 +
.../gcc.target/aarch64/sve/pcs/struct_1_2048.c | 4 +
.../gcc.target/aarch64/sve/pcs/struct_1_256.c | 4 +
.../gcc.target/aarch64/sve/pcs/struct_1_512.c | 4 +
.../gcc.target/aarch64/sve/pcs/struct_2_1024.c | 4 +
.../gcc.target/aarch64/sve/pcs/struct_2_128.c | 701 +
.../gcc.target/aarch64/sve/pcs/struct_2_2048.c | 4 +
.../gcc.target/aarch64/sve/pcs/struct_2_256.c | 4 +
.../gcc.target/aarch64/sve/pcs/struct_2_512.c | 4 +
.../gcc.target/aarch64/sve/pcs/struct_3_128.c | 1092 +
.../gcc.target/aarch64/sve/pcs/struct_3_256.c | 1231 +
.../gcc.target/aarch64/sve/pcs/struct_3_512.c | 1197 +
.../gcc.target/aarch64/sve/pcs/varargs_1.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_f16.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_f32.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_f64.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_s16.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_s32.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_s64.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_s8.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_u16.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_u32.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_u64.c | 2 +-
.../gcc.target/aarch64/sve/pcs/varargs_2_u8.c | 2 +-
gcc/testsuite/gcc.target/arm/acle/cde-errors.c | 111 +
.../gcc.target/arm/acle/cde-mve-error-1.c | 62 +
.../gcc.target/arm/acle/cde-mve-error-2.c | 187 +
.../gcc.target/arm/acle/cde-mve-error-3.c | 114 +
.../gcc.target/arm/acle/cde-mve-full-assembly.c | 1151 +
gcc/testsuite/gcc.target/arm/acle/cde-mve-tests.c | 1283 +
gcc/testsuite/gcc.target/arm/acle/cde.c | 229 +
gcc/testsuite/gcc.target/arm/acle/cde_v_1.c | 94 +
gcc/testsuite/gcc.target/arm/acle/cde_v_1_err.c | 127 +
gcc/testsuite/gcc.target/arm/acle/cde_v_1_mve.c | 56 +
gcc/testsuite/gcc.target/arm/cmp-2.c | 4 +-
gcc/testsuite/gcc.target/arm/cmp-3.c | 49 +
gcc/testsuite/gcc.target/arm/cmse/cmse-15.c | 152 +-
gcc/testsuite/gcc.target/arm/div64-unwinding.c | 1 +
gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c | 3 +-
gcc/testsuite/gcc.target/arm/multilib.exp | 3 +
gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c | 13 +
gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c | 13 +
.../gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c | 14 +
.../gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c | 13 +
.../gcc.target/arm/mve/intrinsics/mve_fpu1.c | 14 +
.../gcc.target/arm/mve/intrinsics/mve_fpu2.c | 14 +
.../gcc.target/arm/mve/intrinsics/mve_fpu3.c | 12 +
.../arm/mve/intrinsics/mve_immediates_1_n.c | 62 +
.../gcc.target/arm/mve/intrinsics/mve_libcall1.c | 67 +
.../gcc.target/arm/mve/intrinsics/mve_libcall2.c | 67 +
.../arm/mve/intrinsics/mve_load_from_array.c | 19 +
.../arm/mve/intrinsics/mve_move_gpr_to_gpr.c | 17 +
.../mve/intrinsics/mve_vec_extracts_from_memory.c | 40 +
.../arm/mve/intrinsics/mve_vector_float.c | 19 +
.../arm/mve/intrinsics/mve_vector_float1.c | 23 +
.../arm/mve/intrinsics/mve_vector_float2.c | 27 +
.../gcc.target/arm/mve/intrinsics/mve_vector_int.c | 49 +
.../arm/mve/intrinsics/mve_vector_int1.c | 39 +
.../arm/mve/intrinsics/mve_vector_int2.c | 33 +
.../arm/mve/intrinsics/mve_vector_uint.c | 49 +
.../arm/mve/intrinsics/mve_vector_uint1.c | 54 +
.../arm/mve/intrinsics/mve_vector_uint2.c | 49 +
.../gcc.target/arm/mve/intrinsics/sqrshr.c | 13 +
.../gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c | 13 +
.../gcc.target/arm/mve/intrinsics/sqrshrl_sat64.c | 13 +
.../gcc.target/arm/mve/intrinsics/sqshl.c | 13 +
.../gcc.target/arm/mve/intrinsics/sqshll.c | 13 +
.../gcc.target/arm/mve/intrinsics/srshr.c | 13 +
.../gcc.target/arm/mve/intrinsics/srshrl.c | 13 +
.../gcc.target/arm/mve/intrinsics/uqrshl.c | 13 +
.../gcc.target/arm/mve/intrinsics/uqrshll_sat48.c | 13 +
.../gcc.target/arm/mve/intrinsics/uqrshll_sat64.c | 13 +
.../gcc.target/arm/mve/intrinsics/uqshl.c | 13 +
.../gcc.target/arm/mve/intrinsics/uqshll.c | 13 +
.../gcc.target/arm/mve/intrinsics/urshr.c | 13 +
.../gcc.target/arm/mve/intrinsics/urshrl.c | 13 +
.../gcc.target/arm/mve/intrinsics/vabavq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_p_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_p_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabavq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabdq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabdq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabdq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vabdq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vabdq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vabdq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vabdq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vabdq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vabdq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vabdq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vabdq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabdq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabdq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabdq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabdq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabdq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabdq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabdq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabdq_x_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vabdq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabdq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabdq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabdq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabdq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vabsq_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vabsq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabsq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabsq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vabsq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vabsq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vadciq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vadciq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vadciq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vadciq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vadcq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vadcq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vadcq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vadcq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddlvq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddlvq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddq_x_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvaq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vaddvq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vandq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vandq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vandq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vandq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vandq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vandq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vandq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vandq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vandq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vandq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vandq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vandq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vandq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vandq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vandq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vandq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vandq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vandq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vandq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vandq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vandq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vandq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vandq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vandq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbicq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbicq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbicq_n_s16.c | 19 +
.../gcc.target/arm/mve/intrinsics/vbicq_n_s32.c | 19 +
.../gcc.target/arm/mve/intrinsics/vbicq_n_u16.c | 19 +
.../gcc.target/arm/mve/intrinsics/vbicq_n_u32.c | 19 +
.../gcc.target/arm/mve/intrinsics/vbicq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbicq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbicq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbicq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbicq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbicq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbicq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbicq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot270_f16.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot270_f32.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot270_m_f32.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot270_m_s16.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot270_m_s32.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot270_m_s8.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot270_m_u16.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot270_m_u32.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot270_m_u8.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot270_s16.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot270_s32.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot270_s8.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot270_u16.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot270_u32.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot270_u8.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot270_x_f16.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot270_x_f32.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot270_x_s16.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot270_x_s32.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot270_x_s8.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot270_x_u16.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot270_x_u32.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot270_x_u8.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot90_f16.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot90_f32.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot90_m_f16.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot90_m_f32.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot90_m_s16.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot90_m_s32.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot90_m_s8.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot90_m_u16.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot90_m_u32.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot90_m_u8.c | 23 +
.../arm/mve/intrinsics/vcaddq_rot90_s16.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot90_s32.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot90_s8.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot90_u16.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot90_u32.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot90_u8.c | 21 +
.../arm/mve/intrinsics/vcaddq_rot90_x_f16.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot90_x_f32.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot90_x_s16.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot90_x_s32.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot90_x_s8.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot90_x_u16.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot90_x_u32.c | 22 +
.../arm/mve/intrinsics/vcaddq_rot90_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclsq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclsq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclsq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclsq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vclsq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vclsq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vclsq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclsq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclsq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vclzq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vclzq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vclzq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vclzq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vclzq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vclzq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vclzq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmlaq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmlaq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c | 23 +
.../arm/mve/intrinsics/vcmlaq_rot180_f16.c | 21 +
.../arm/mve/intrinsics/vcmlaq_rot180_f32.c | 21 +
.../arm/mve/intrinsics/vcmlaq_rot180_m_f16.c | 23 +
.../arm/mve/intrinsics/vcmlaq_rot180_m_f32.c | 23 +
.../arm/mve/intrinsics/vcmlaq_rot270_f16.c | 21 +
.../arm/mve/intrinsics/vcmlaq_rot270_f32.c | 21 +
.../arm/mve/intrinsics/vcmlaq_rot270_m_f16.c | 23 +
.../arm/mve/intrinsics/vcmlaq_rot270_m_f32.c | 23 +
.../arm/mve/intrinsics/vcmlaq_rot90_f16.c | 21 +
.../arm/mve/intrinsics/vcmlaq_rot90_f32.c | 21 +
.../arm/mve/intrinsics/vcmlaq_rot90_m_f16.c | 23 +
.../arm/mve/intrinsics/vcmlaq_rot90_m_f32.c | 23 +
.../arm/mve/intrinsics/vcmpcsq_m_n_u16.c | 22 +
.../arm/mve/intrinsics/vcmpcsq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c | 22 +
.../arm/mve/intrinsics/vcmpeqq_m_n_f16.c | 22 +
.../arm/mve/intrinsics/vcmpeqq_m_n_f32.c | 22 +
.../arm/mve/intrinsics/vcmpeqq_m_n_s16.c | 22 +
.../arm/mve/intrinsics/vcmpeqq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c | 22 +
.../arm/mve/intrinsics/vcmpeqq_m_n_u16.c | 22 +
.../arm/mve/intrinsics/vcmpeqq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c | 22 +
.../arm/mve/intrinsics/vcmpgeq_m_n_f16.c | 22 +
.../arm/mve/intrinsics/vcmpgeq_m_n_f32.c | 22 +
.../arm/mve/intrinsics/vcmpgeq_m_n_s16.c | 22 +
.../arm/mve/intrinsics/vcmpgeq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c | 22 +
.../arm/mve/intrinsics/vcmpgtq_m_n_f16.c | 22 +
.../arm/mve/intrinsics/vcmpgtq_m_n_f32.c | 22 +
.../arm/mve/intrinsics/vcmpgtq_m_n_s16.c | 22 +
.../arm/mve/intrinsics/vcmpgtq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c | 21 +
.../arm/mve/intrinsics/vcmphiq_m_n_u16.c | 22 +
.../arm/mve/intrinsics/vcmphiq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmphiq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c | 22 +
.../arm/mve/intrinsics/vcmpleq_m_n_f16.c | 22 +
.../arm/mve/intrinsics/vcmpleq_m_n_f32.c | 22 +
.../arm/mve/intrinsics/vcmpleq_m_n_s16.c | 22 +
.../arm/mve/intrinsics/vcmpleq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpleq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c | 22 +
.../arm/mve/intrinsics/vcmpltq_m_n_f16.c | 22 +
.../arm/mve/intrinsics/vcmpltq_m_n_f32.c | 22 +
.../arm/mve/intrinsics/vcmpltq_m_n_s16.c | 22 +
.../arm/mve/intrinsics/vcmpltq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpltq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c | 22 +
.../arm/mve/intrinsics/vcmpneq_m_n_f16.c | 22 +
.../arm/mve/intrinsics/vcmpneq_m_n_f32.c | 22 +
.../arm/mve/intrinsics/vcmpneq_m_n_s16.c | 22 +
.../arm/mve/intrinsics/vcmpneq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c | 22 +
.../arm/mve/intrinsics/vcmpneq_m_n_u16.c | 22 +
.../arm/mve/intrinsics/vcmpneq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmpneq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmulq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmulq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c | 23 +
.../arm/mve/intrinsics/vcmulq_rot180_f16.c | 21 +
.../arm/mve/intrinsics/vcmulq_rot180_f32.c | 21 +
.../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 23 +
.../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 23 +
.../arm/mve/intrinsics/vcmulq_rot180_x_f16.c | 22 +
.../arm/mve/intrinsics/vcmulq_rot180_x_f32.c | 22 +
.../arm/mve/intrinsics/vcmulq_rot270_f16.c | 21 +
.../arm/mve/intrinsics/vcmulq_rot270_f32.c | 21 +
.../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 23 +
.../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 23 +
.../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 22 +
.../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 22 +
.../arm/mve/intrinsics/vcmulq_rot90_f16.c | 21 +
.../arm/mve/intrinsics/vcmulq_rot90_f32.c | 21 +
.../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 23 +
.../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 23 +
.../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 23 +
.../arm/mve/intrinsics/vcmulq_rot90_x_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcreateq_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcreateq_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcreateq_s16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcreateq_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcreateq_s64.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcreateq_s8.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcreateq_u16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcreateq_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcreateq_u64.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcreateq_u8.c | 13 +
.../gcc.target/arm/mve/intrinsics/vctp16q.c | 21 +
.../gcc.target/arm/mve/intrinsics/vctp16q_m.c | 22 +
.../gcc.target/arm/mve/intrinsics/vctp32q.c | 21 +
.../gcc.target/arm/mve/intrinsics/vctp32q_m.c | 22 +
.../gcc.target/arm/mve/intrinsics/vctp64q.c | 21 +
.../gcc.target/arm/mve/intrinsics/vctp64q_m.c | 22 +
.../gcc.target/arm/mve/intrinsics/vctp8q.c | 21 +
.../gcc.target/arm/mve/intrinsics/vctp8q_m.c | 22 +
.../arm/mve/intrinsics/vcvtaq_m_s16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtaq_m_s32_f32.c | 22 +
.../arm/mve/intrinsics/vcvtaq_m_u16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtaq_m_u32_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c | 13 +
.../arm/mve/intrinsics/vcvtaq_x_s16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtaq_x_s32_f32.c | 14 +
.../arm/mve/intrinsics/vcvtaq_x_u16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtaq_x_u32_f32.c | 14 +
.../gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c | 13 +
.../arm/mve/intrinsics/vcvtbq_m_f16_f32.c | 22 +
.../arm/mve/intrinsics/vcvtbq_m_f32_f16.c | 22 +
.../arm/mve/intrinsics/vcvtbq_x_f32_f16.c | 14 +
.../arm/mve/intrinsics/vcvtmq_m_s16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtmq_m_s32_f32.c | 22 +
.../arm/mve/intrinsics/vcvtmq_m_u16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtmq_m_u32_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c | 13 +
.../arm/mve/intrinsics/vcvtmq_x_s16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtmq_x_s32_f32.c | 14 +
.../arm/mve/intrinsics/vcvtmq_x_u16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtmq_x_u32_f32.c | 14 +
.../arm/mve/intrinsics/vcvtnq_m_s16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtnq_m_s32_f32.c | 22 +
.../arm/mve/intrinsics/vcvtnq_m_u16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtnq_m_u32_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c | 13 +
.../arm/mve/intrinsics/vcvtnq_x_s16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtnq_x_s32_f32.c | 14 +
.../arm/mve/intrinsics/vcvtnq_x_u16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtnq_x_u32_f32.c | 14 +
.../arm/mve/intrinsics/vcvtpq_m_s16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtpq_m_s32_f32.c | 22 +
.../arm/mve/intrinsics/vcvtpq_m_u16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtpq_m_u32_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c | 13 +
.../arm/mve/intrinsics/vcvtpq_x_s16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtpq_x_s32_f32.c | 14 +
.../arm/mve/intrinsics/vcvtpq_x_u16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtpq_x_u32_f32.c | 14 +
.../gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c | 13 +
.../arm/mve/intrinsics/vcvtq_m_f16_s16.c | 22 +
.../arm/mve/intrinsics/vcvtq_m_f16_u16.c | 22 +
.../arm/mve/intrinsics/vcvtq_m_f32_s32.c | 22 +
.../arm/mve/intrinsics/vcvtq_m_f32_u32.c | 22 +
.../arm/mve/intrinsics/vcvtq_m_n_f16_s16.c | 23 +
.../arm/mve/intrinsics/vcvtq_m_n_f16_u16.c | 23 +
.../arm/mve/intrinsics/vcvtq_m_n_f32_s32.c | 23 +
.../arm/mve/intrinsics/vcvtq_m_n_f32_u32.c | 23 +
.../arm/mve/intrinsics/vcvtq_m_n_s16_f16.c | 23 +
.../arm/mve/intrinsics/vcvtq_m_n_s32_f32.c | 23 +
.../arm/mve/intrinsics/vcvtq_m_n_u16_f16.c | 23 +
.../arm/mve/intrinsics/vcvtq_m_n_u32_f32.c | 23 +
.../arm/mve/intrinsics/vcvtq_m_s16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtq_m_s32_f32.c | 22 +
.../arm/mve/intrinsics/vcvtq_m_u16_f16.c | 22 +
.../arm/mve/intrinsics/vcvtq_m_u32_f32.c | 22 +
.../arm/mve/intrinsics/vcvtq_n_f16_s16.c | 21 +
.../arm/mve/intrinsics/vcvtq_n_f16_u16.c | 21 +
.../arm/mve/intrinsics/vcvtq_n_f32_s32.c | 21 +
.../arm/mve/intrinsics/vcvtq_n_f32_u32.c | 21 +
.../arm/mve/intrinsics/vcvtq_n_s16_f16.c | 13 +
.../arm/mve/intrinsics/vcvtq_n_s32_f32.c | 13 +
.../arm/mve/intrinsics/vcvtq_n_u16_f16.c | 13 +
.../arm/mve/intrinsics/vcvtq_n_u32_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c | 13 +
.../arm/mve/intrinsics/vcvtq_x_f16_s16.c | 23 +
.../arm/mve/intrinsics/vcvtq_x_f16_u16.c | 23 +
.../arm/mve/intrinsics/vcvtq_x_f32_s32.c | 23 +
.../arm/mve/intrinsics/vcvtq_x_f32_u32.c | 23 +
.../arm/mve/intrinsics/vcvtq_x_n_f16_s16.c | 23 +
.../arm/mve/intrinsics/vcvtq_x_n_f16_u16.c | 23 +
.../arm/mve/intrinsics/vcvtq_x_n_f32_s32.c | 23 +
.../arm/mve/intrinsics/vcvtq_x_n_f32_u32.c | 23 +
.../arm/mve/intrinsics/vcvtq_x_n_s16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtq_x_n_s32_f32.c | 14 +
.../arm/mve/intrinsics/vcvtq_x_n_u16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtq_x_n_u32_f32.c | 14 +
.../arm/mve/intrinsics/vcvtq_x_s16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtq_x_s32_f32.c | 14 +
.../arm/mve/intrinsics/vcvtq_x_u16_f16.c | 14 +
.../arm/mve/intrinsics/vcvtq_x_u32_f32.c | 14 +
.../gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c | 13 +
.../arm/mve/intrinsics/vcvttq_m_f16_f32.c | 22 +
.../arm/mve/intrinsics/vcvttq_m_f32_f16.c | 22 +
.../arm/mve/intrinsics/vcvttq_x_f32_f16.c | 14 +
.../gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c | 23 +
.../arm/mve/intrinsics/vddupq_m_wb_u16.c | 23 +
.../arm/mve/intrinsics/vddupq_m_wb_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vddupq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vddupq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vddupq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c | 23 +
.../arm/mve/intrinsics/vddupq_x_wb_u16.c | 25 +
.../arm/mve/intrinsics/vddupq_x_wb_u32.c | 25 +
.../gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c | 25 +
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vdupq_n_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vdupq_n_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vdupq_n_s16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vdupq_n_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vdupq_n_s8.c | 13 +
.../gcc.target/arm/mve/intrinsics/vdupq_n_u16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vdupq_n_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vdupq_n_u8.c | 13 +
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c | 14 +
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c | 14 +
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c | 14 +
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c | 14 +
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c | 14 +
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c | 14 +
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c | 14 +
.../gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c | 14 +
.../arm/mve/intrinsics/vdwdupq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/vdwdupq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c | 23 +
.../arm/mve/intrinsics/vdwdupq_m_wb_u16.c | 23 +
.../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 23 +
.../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c | 21 +
.../arm/mve/intrinsics/vdwdupq_x_n_u16.c | 23 +
.../arm/mve/intrinsics/vdwdupq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c | 23 +
.../arm/mve/intrinsics/vdwdupq_x_wb_u16.c | 23 +
.../arm/mve/intrinsics/vdwdupq_x_wb_u32.c | 23 +
.../arm/mve/intrinsics/vdwdupq_x_wb_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/veorq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/veorq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/veorq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/veorq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/veorq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/veorq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/veorq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/veorq_x_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_x_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_x_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_x_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_x_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_x_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_x_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/veorq_x_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vfmaq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vfmaq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vfmsq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vfmsq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c | 22 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c | 22 +
.../gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c | 22 +
.../arm/mve/intrinsics/vhcaddq_rot270_m_s16.c | 23 +
.../arm/mve/intrinsics/vhcaddq_rot270_m_s32.c | 23 +
.../arm/mve/intrinsics/vhcaddq_rot270_m_s8.c | 23 +
.../arm/mve/intrinsics/vhcaddq_rot270_s16.c | 21 +
.../arm/mve/intrinsics/vhcaddq_rot270_s32.c | 21 +
.../arm/mve/intrinsics/vhcaddq_rot270_s8.c | 21 +
.../arm/mve/intrinsics/vhcaddq_rot270_x_s16.c | 22 +
.../arm/mve/intrinsics/vhcaddq_rot270_x_s32.c | 22 +
.../arm/mve/intrinsics/vhcaddq_rot270_x_s8.c | 22 +
.../arm/mve/intrinsics/vhcaddq_rot90_m_s16.c | 23 +
.../arm/mve/intrinsics/vhcaddq_rot90_m_s32.c | 23 +
.../arm/mve/intrinsics/vhcaddq_rot90_m_s8.c | 23 +
.../arm/mve/intrinsics/vhcaddq_rot90_s16.c | 21 +
.../arm/mve/intrinsics/vhcaddq_rot90_s32.c | 21 +
.../arm/mve/intrinsics/vhcaddq_rot90_s8.c | 21 +
.../arm/mve/intrinsics/vhcaddq_rot90_x_s16.c | 22 +
.../arm/mve/intrinsics/vhcaddq_rot90_x_s32.c | 22 +
.../arm/mve/intrinsics/vhcaddq_rot90_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c | 23 +
.../arm/mve/intrinsics/vidupq_m_wb_u16.c | 23 +
.../arm/mve/intrinsics/vidupq_m_wb_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vidupq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vidupq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vidupq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c | 23 +
.../arm/mve/intrinsics/vidupq_x_wb_u16.c | 25 +
.../arm/mve/intrinsics/vidupq_x_wb_u32.c | 25 +
.../gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c | 25 +
.../arm/mve/intrinsics/viwdupq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/viwdupq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c | 23 +
.../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 23 +
.../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 23 +
.../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c | 21 +
.../arm/mve/intrinsics/viwdupq_x_n_u16.c | 23 +
.../arm/mve/intrinsics/viwdupq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c | 23 +
.../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 23 +
.../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 23 +
.../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_z_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_z_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_z_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_z_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_z_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_z_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_z_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld1q_z_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vld4q_f16.c | 24 +
.../gcc.target/arm/mve/intrinsics/vld4q_f32.c | 24 +
.../gcc.target/arm/mve/intrinsics/vld4q_s16.c | 24 +
.../gcc.target/arm/mve/intrinsics/vld4q_s32.c | 24 +
.../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 24 +
.../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 24 +
.../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 24 +
.../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 24 +
.../arm/mve/intrinsics/vldrbq_gather_offset_s16.c | 21 +
.../arm/mve/intrinsics/vldrbq_gather_offset_s32.c | 21 +
.../arm/mve/intrinsics/vldrbq_gather_offset_s8.c | 21 +
.../arm/mve/intrinsics/vldrbq_gather_offset_u16.c | 21 +
.../arm/mve/intrinsics/vldrbq_gather_offset_u32.c | 21 +
.../arm/mve/intrinsics/vldrbq_gather_offset_u8.c | 21 +
.../mve/intrinsics/vldrbq_gather_offset_z_s16.c | 21 +
.../mve/intrinsics/vldrbq_gather_offset_z_s32.c | 21 +
.../arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c | 21 +
.../mve/intrinsics/vldrbq_gather_offset_z_u16.c | 21 +
.../mve/intrinsics/vldrbq_gather_offset_z_u32.c | 21 +
.../arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vldrbq_s16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_u16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c | 13 +
.../arm/mve/intrinsics/vldrdq_gather_base_s64.c | 13 +
.../arm/mve/intrinsics/vldrdq_gather_base_u64.c | 13 +
.../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 15 +
.../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 15 +
.../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 15 +
.../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 15 +
.../arm/mve/intrinsics/vldrdq_gather_base_z_s64.c | 13 +
.../arm/mve/intrinsics/vldrdq_gather_base_z_u64.c | 13 +
.../arm/mve/intrinsics/vldrdq_gather_offset_s64.c | 21 +
.../arm/mve/intrinsics/vldrdq_gather_offset_u64.c | 21 +
.../mve/intrinsics/vldrdq_gather_offset_z_s64.c | 21 +
.../mve/intrinsics/vldrdq_gather_offset_z_u64.c | 21 +
.../intrinsics/vldrdq_gather_shifted_offset_s64.c | 21 +
.../intrinsics/vldrdq_gather_shifted_offset_u64.c | 21 +
.../vldrdq_gather_shifted_offset_z_s64.c | 21 +
.../vldrdq_gather_shifted_offset_z_u64.c | 21 +
.../gcc.target/arm/mve/intrinsics/vldrhq_f16.c | 13 +
.../arm/mve/intrinsics/vldrhq_gather_offset_f16.c | 21 +
.../arm/mve/intrinsics/vldrhq_gather_offset_s16.c | 21 +
.../arm/mve/intrinsics/vldrhq_gather_offset_s32.c | 21 +
.../arm/mve/intrinsics/vldrhq_gather_offset_u16.c | 21 +
.../arm/mve/intrinsics/vldrhq_gather_offset_u32.c | 21 +
.../mve/intrinsics/vldrhq_gather_offset_z_f16.c | 21 +
.../mve/intrinsics/vldrhq_gather_offset_z_s16.c | 21 +
.../mve/intrinsics/vldrhq_gather_offset_z_s32.c | 21 +
.../mve/intrinsics/vldrhq_gather_offset_z_u16.c | 21 +
.../mve/intrinsics/vldrhq_gather_offset_z_u32.c | 21 +
.../intrinsics/vldrhq_gather_shifted_offset_f16.c | 21 +
.../intrinsics/vldrhq_gather_shifted_offset_s16.c | 21 +
.../intrinsics/vldrhq_gather_shifted_offset_s32.c | 21 +
.../intrinsics/vldrhq_gather_shifted_offset_u16.c | 21 +
.../intrinsics/vldrhq_gather_shifted_offset_u32.c | 21 +
.../vldrhq_gather_shifted_offset_z_f16.c | 21 +
.../vldrhq_gather_shifted_offset_z_s16.c | 21 +
.../vldrhq_gather_shifted_offset_z_s32.c | 21 +
.../vldrhq_gather_shifted_offset_z_u16.c | 21 +
.../vldrhq_gather_shifted_offset_z_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vldrhq_s16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrhq_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrhq_u16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrhq_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrwq_f32.c | 13 +
.../arm/mve/intrinsics/vldrwq_gather_base_f32.c | 13 +
.../arm/mve/intrinsics/vldrwq_gather_base_s32.c | 13 +
.../arm/mve/intrinsics/vldrwq_gather_base_u32.c | 13 +
.../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 15 +
.../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 15 +
.../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 15 +
.../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 17 +
.../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 17 +
.../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 17 +
.../arm/mve/intrinsics/vldrwq_gather_base_z_f32.c | 13 +
.../arm/mve/intrinsics/vldrwq_gather_base_z_s32.c | 13 +
.../arm/mve/intrinsics/vldrwq_gather_base_z_u32.c | 13 +
.../arm/mve/intrinsics/vldrwq_gather_offset_f32.c | 21 +
.../arm/mve/intrinsics/vldrwq_gather_offset_s32.c | 21 +
.../arm/mve/intrinsics/vldrwq_gather_offset_u32.c | 21 +
.../mve/intrinsics/vldrwq_gather_offset_z_f32.c | 21 +
.../mve/intrinsics/vldrwq_gather_offset_z_s32.c | 21 +
.../mve/intrinsics/vldrwq_gather_offset_z_u32.c | 21 +
.../intrinsics/vldrwq_gather_shifted_offset_f32.c | 21 +
.../intrinsics/vldrwq_gather_shifted_offset_s32.c | 21 +
.../intrinsics/vldrwq_gather_shifted_offset_u32.c | 21 +
.../vldrwq_gather_shifted_offset_z_f32.c | 21 +
.../vldrwq_gather_shifted_offset_z_s32.c | 21 +
.../vldrwq_gather_shifted_offset_z_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vldrwq_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrwq_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxaq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxaq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxavq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxavq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxavq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c | 21 +
.../arm/mve/intrinsics/vmaxnmavq_p_f16.c | 21 +
.../arm/mve/intrinsics/vmaxnmavq_p_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmaxq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminaq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminaq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminaq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminaq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminaq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminaq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminavq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminavq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminavq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminavq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminavq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminavq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmaq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmaq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminnmavq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmavq_f32.c | 21 +
.../arm/mve/intrinsics/vminnmavq_p_f16.c | 21 +
.../arm/mve/intrinsics/vminnmavq_p_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminnmvq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmvq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vminq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vminq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vminq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vminq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vminq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vminq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vminvq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_p_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_p_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vminvq_u8.c | 21 +
.../arm/mve/intrinsics/vmladavaq_p_s16.c | 22 +
.../arm/mve/intrinsics/vmladavaq_p_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c | 22 +
.../arm/mve/intrinsics/vmladavaq_p_u16.c | 22 +
.../arm/mve/intrinsics/vmladavaq_p_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmladavaq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavaq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavaq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavaq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavaq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavaq_u8.c | 21 +
.../arm/mve/intrinsics/vmladavaxq_p_s16.c | 22 +
.../arm/mve/intrinsics/vmladavaxq_p_s32.c | 22 +
.../arm/mve/intrinsics/vmladavaxq_p_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavq_u8.c | 21 +
.../arm/mve/intrinsics/vmladavxq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmladavxq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavxq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmladavxq_s8.c | 21 +
.../arm/mve/intrinsics/vmlaldavaq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmlaldavaq_p_s32.c | 21 +
.../arm/mve/intrinsics/vmlaldavaq_p_u16.c | 21 +
.../arm/mve/intrinsics/vmlaldavaq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c | 21 +
.../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 21 +
.../arm/mve/intrinsics/vmlaldavaxq_p_u16.c | 21 +
.../arm/mve/intrinsics/vmlaldavaxq_p_u32.c | 21 +
.../arm/mve/intrinsics/vmlaldavaxq_s16.c | 21 +
.../arm/mve/intrinsics/vmlaldavaxq_s32.c | 21 +
.../arm/mve/intrinsics/vmlaldavq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmlaldavq_p_s32.c | 21 +
.../arm/mve/intrinsics/vmlaldavq_p_u16.c | 21 +
.../arm/mve/intrinsics/vmlaldavq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c | 21 +
.../arm/mve/intrinsics/vmlaldavxq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmlaldavxq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c | 21 +
.../arm/mve/intrinsics/vmlsdavaq_p_s16.c | 22 +
.../arm/mve/intrinsics/vmlsdavaq_p_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c | 21 +
.../arm/mve/intrinsics/vmlsdavaxq_p_s16.c | 22 +
.../arm/mve/intrinsics/vmlsdavaxq_p_s32.c | 22 +
.../arm/mve/intrinsics/vmlsdavaxq_p_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c | 21 +
.../arm/mve/intrinsics/vmlsdavxq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmlsdavxq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c | 21 +
.../arm/mve/intrinsics/vmlsldavaq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmlsldavaq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c | 21 +
.../arm/mve/intrinsics/vmlsldavaxq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmlsldavaxq_p_s32.c | 21 +
.../arm/mve/intrinsics/vmlsldavaxq_s16.c | 21 +
.../arm/mve/intrinsics/vmlsldavaxq_s32.c | 21 +
.../arm/mve/intrinsics/vmlsldavq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmlsldavq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c | 21 +
.../arm/mve/intrinsics/vmlsldavxq_p_s16.c | 21 +
.../arm/mve/intrinsics/vmlsldavxq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovltq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovltq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovltq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovltq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovnbq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovnbq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovnbq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovnbq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmovntq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovntq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovntq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmovntq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulhq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulhq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulhq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulhq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulhq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulhq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c | 22 +
.../arm/mve/intrinsics/vmullbq_int_m_s16.c | 23 +
.../arm/mve/intrinsics/vmullbq_int_m_s32.c | 23 +
.../arm/mve/intrinsics/vmullbq_int_m_s8.c | 23 +
.../arm/mve/intrinsics/vmullbq_int_m_u16.c | 23 +
.../arm/mve/intrinsics/vmullbq_int_m_u32.c | 23 +
.../arm/mve/intrinsics/vmullbq_int_m_u8.c | 23 +
.../arm/mve/intrinsics/vmullbq_int_s16.c | 21 +
.../arm/mve/intrinsics/vmullbq_int_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c | 21 +
.../arm/mve/intrinsics/vmullbq_int_u16.c | 21 +
.../arm/mve/intrinsics/vmullbq_int_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c | 21 +
.../arm/mve/intrinsics/vmullbq_int_x_s16.c | 22 +
.../arm/mve/intrinsics/vmullbq_int_x_s32.c | 22 +
.../arm/mve/intrinsics/vmullbq_int_x_s8.c | 22 +
.../arm/mve/intrinsics/vmullbq_int_x_u16.c | 22 +
.../arm/mve/intrinsics/vmullbq_int_x_u32.c | 22 +
.../arm/mve/intrinsics/vmullbq_int_x_u8.c | 22 +
.../arm/mve/intrinsics/vmullbq_poly_m_p16.c | 23 +
.../arm/mve/intrinsics/vmullbq_poly_m_p8.c | 23 +
.../arm/mve/intrinsics/vmullbq_poly_p16.c | 21 +
.../arm/mve/intrinsics/vmullbq_poly_p8.c | 21 +
.../arm/mve/intrinsics/vmullbq_poly_x_p16.c | 22 +
.../arm/mve/intrinsics/vmullbq_poly_x_p8.c | 22 +
.../arm/mve/intrinsics/vmulltq_int_m_s16.c | 23 +
.../arm/mve/intrinsics/vmulltq_int_m_s32.c | 23 +
.../arm/mve/intrinsics/vmulltq_int_m_s8.c | 23 +
.../arm/mve/intrinsics/vmulltq_int_m_u16.c | 23 +
.../arm/mve/intrinsics/vmulltq_int_m_u32.c | 23 +
.../arm/mve/intrinsics/vmulltq_int_m_u8.c | 23 +
.../arm/mve/intrinsics/vmulltq_int_s16.c | 21 +
.../arm/mve/intrinsics/vmulltq_int_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c | 21 +
.../arm/mve/intrinsics/vmulltq_int_u16.c | 21 +
.../arm/mve/intrinsics/vmulltq_int_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c | 21 +
.../arm/mve/intrinsics/vmulltq_int_x_s16.c | 22 +
.../arm/mve/intrinsics/vmulltq_int_x_s32.c | 22 +
.../arm/mve/intrinsics/vmulltq_int_x_s8.c | 22 +
.../arm/mve/intrinsics/vmulltq_int_x_u16.c | 22 +
.../arm/mve/intrinsics/vmulltq_int_x_u32.c | 22 +
.../arm/mve/intrinsics/vmulltq_int_x_u8.c | 22 +
.../arm/mve/intrinsics/vmulltq_poly_m_p16.c | 23 +
.../arm/mve/intrinsics/vmulltq_poly_m_p8.c | 23 +
.../arm/mve/intrinsics/vmulltq_poly_p16.c | 21 +
.../arm/mve/intrinsics/vmulltq_poly_p8.c | 21 +
.../arm/mve/intrinsics/vmulltq_poly_x_p16.c | 22 +
.../arm/mve/intrinsics/vmulltq_poly_x_p8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmulq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmulq_x_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vmvnq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmvnq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmvnq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmvnq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmvnq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmvnq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c | 14 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c | 14 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c | 14 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c | 14 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vnegq_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vnegq_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vnegq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vnegq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vnegq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vnegq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vnegq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vnegq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vnegq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vnegq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vnegq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vnegq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vnegq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vnegq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vnegq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vornq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vornq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vornq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vornq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vornq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vornq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vornq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vornq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vornq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vornq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vornq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vornq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vornq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vornq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vornq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vornq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vornq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vornq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vornq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vornq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vornq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vornq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vornq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vornq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vorrq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vorrq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vorrq_n_s16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vorrq_n_s32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vorrq_n_u16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vorrq_n_u32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vorrq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vorrq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vorrq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vorrq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vorrq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vorrq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vorrq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vorrq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vpnot.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_s64.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_u64.c | 21 +
.../gcc.target/arm/mve/intrinsics/vpselq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqabsq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqabsq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqabsq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqaddq_u8.c | 21 +
.../arm/mve/intrinsics/vqdmladhq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqdmladhq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c | 21 +
.../arm/mve/intrinsics/vqdmladhxq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqdmladhxq_m_s32.c | 23 +
.../arm/mve/intrinsics/vqdmladhxq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c | 21 +
.../arm/mve/intrinsics/vqdmlahq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqdmlahq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqdmlahq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c | 21 +
.../arm/mve/intrinsics/vqdmlsdhq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqdmlsdhq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c | 21 +
.../arm/mve/intrinsics/vqdmlsdhxq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqdmlsdhxq_m_s32.c | 23 +
.../arm/mve/intrinsics/vqdmlsdhxq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c | 21 +
.../arm/mve/intrinsics/vqdmulhq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqdmulhq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqdmulhq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c | 21 +
.../arm/mve/intrinsics/vqdmullbq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqdmullbq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqdmullbq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqdmullbq_m_s32.c | 23 +
.../arm/mve/intrinsics/vqdmullbq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqdmullbq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c | 21 +
.../arm/mve/intrinsics/vqdmulltq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqdmulltq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqdmulltq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqdmulltq_m_s32.c | 23 +
.../arm/mve/intrinsics/vqdmulltq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqdmulltq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovntq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovntq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovntq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovntq_u32.c | 21 +
.../arm/mve/intrinsics/vqmovunbq_m_s16.c | 22 +
.../arm/mve/intrinsics/vqmovunbq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c | 21 +
.../arm/mve/intrinsics/vqmovuntq_m_s16.c | 22 +
.../arm/mve/intrinsics/vqmovuntq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqnegq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqnegq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqnegq_s8.c | 21 +
.../arm/mve/intrinsics/vqrdmladhq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqrdmladhq_m_s32.c | 23 +
.../arm/mve/intrinsics/vqrdmladhq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c | 21 +
.../arm/mve/intrinsics/vqrdmladhxq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqrdmladhxq_m_s32.c | 23 +
.../arm/mve/intrinsics/vqrdmladhxq_m_s8.c | 23 +
.../arm/mve/intrinsics/vqrdmladhxq_s16.c | 21 +
.../arm/mve/intrinsics/vqrdmladhxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c | 21 +
.../arm/mve/intrinsics/vqrdmlahq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqrdmlahq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqrdmlahq_m_n_s8.c | 23 +
.../arm/mve/intrinsics/vqrdmlahq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqrdmlahq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c | 21 +
.../arm/mve/intrinsics/vqrdmlahq_n_u16.c | 21 +
.../arm/mve/intrinsics/vqrdmlahq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c | 21 +
.../arm/mve/intrinsics/vqrdmlashq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqrdmlashq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqrdmlashq_m_n_s8.c | 23 +
.../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqrdmlashq_n_s32.c | 21 +
.../arm/mve/intrinsics/vqrdmlashq_n_s8.c | 21 +
.../arm/mve/intrinsics/vqrdmlashq_n_u16.c | 21 +
.../arm/mve/intrinsics/vqrdmlashq_n_u32.c | 21 +
.../arm/mve/intrinsics/vqrdmlashq_n_u8.c | 21 +
.../arm/mve/intrinsics/vqrdmlsdhq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqrdmlsdhq_m_s32.c | 23 +
.../arm/mve/intrinsics/vqrdmlsdhq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c | 21 +
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c | 23 +
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c | 23 +
.../arm/mve/intrinsics/vqrdmlsdhxq_s16.c | 21 +
.../arm/mve/intrinsics/vqrdmlsdhxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c | 21 +
.../arm/mve/intrinsics/vqrdmulhq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqrdmulhq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqrdmulhq_m_n_s8.c | 23 +
.../arm/mve/intrinsics/vqrdmulhq_m_s16.c | 23 +
.../arm/mve/intrinsics/vqrdmulhq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c | 23 +
.../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c | 21 +
.../arm/mve/intrinsics/vqrshlq_m_n_s16.c | 22 +
.../arm/mve/intrinsics/vqrshlq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c | 22 +
.../arm/mve/intrinsics/vqrshlq_m_n_u16.c | 22 +
.../arm/mve/intrinsics/vqrshlq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqrshlq_u8.c | 21 +
.../arm/mve/intrinsics/vqrshrnbq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqrshrnbq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqrshrnbq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/vqrshrnbq_m_n_u32.c | 23 +
.../arm/mve/intrinsics/vqrshrnbq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqrshrnbq_n_s32.c | 21 +
.../arm/mve/intrinsics/vqrshrnbq_n_u16.c | 21 +
.../arm/mve/intrinsics/vqrshrnbq_n_u32.c | 21 +
.../arm/mve/intrinsics/vqrshrntq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqrshrntq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqrshrntq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/vqrshrntq_m_n_u32.c | 23 +
.../arm/mve/intrinsics/vqrshrntq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqrshrntq_n_s32.c | 21 +
.../arm/mve/intrinsics/vqrshrntq_n_u16.c | 21 +
.../arm/mve/intrinsics/vqrshrntq_n_u32.c | 21 +
.../arm/mve/intrinsics/vqrshrunbq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqrshrunbq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqrshrunbq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqrshrunbq_n_s32.c | 21 +
.../arm/mve/intrinsics/vqrshruntq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqrshruntq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqrshruntq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqrshruntq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshlq_u8.c | 21 +
.../arm/mve/intrinsics/vqshluq_m_n_s16.c | 22 +
.../arm/mve/intrinsics/vqshluq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c | 21 +
.../arm/mve/intrinsics/vqshrnbq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqshrnbq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqshrnbq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/vqshrnbq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c | 21 +
.../arm/mve/intrinsics/vqshrntq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqshrntq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqshrntq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/vqshrntq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c | 21 +
.../arm/mve/intrinsics/vqshrunbq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqshrunbq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqshrunbq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqshrunbq_n_s32.c | 21 +
.../arm/mve/intrinsics/vqshruntq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vqshruntq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vqshruntq_n_s16.c | 21 +
.../arm/mve/intrinsics/vqshruntq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vqsubq_u8.c | 21 +
.../arm/mve/intrinsics/vreinterpretq_f16.c | 44 +
.../arm/mve/intrinsics/vreinterpretq_f32.c | 44 +
.../arm/mve/intrinsics/vreinterpretq_s16.c | 44 +
.../arm/mve/intrinsics/vreinterpretq_s32.c | 44 +
.../arm/mve/intrinsics/vreinterpretq_s64.c | 45 +
.../arm/mve/intrinsics/vreinterpretq_s8.c | 44 +
.../arm/mve/intrinsics/vreinterpretq_u16.c | 44 +
.../arm/mve/intrinsics/vreinterpretq_u32.c | 44 +
.../arm/mve/intrinsics/vreinterpretq_u64.c | 45 +
.../arm/mve/intrinsics/vreinterpretq_u8.c | 44 +
.../gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev16q_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev16q_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev32q_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev32q_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev32q_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrev64q_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev64q_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev64q_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev64q_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev64q_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev64q_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c | 22 +
.../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhaq_s32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhaq_u32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhaxq_s32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhq_p_s32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhq_p_u32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhq_s32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhq_u32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhxq_p_s32.c | 21 +
.../arm/mve/intrinsics/vrmlaldavhxq_s32.c | 21 +
.../arm/mve/intrinsics/vrmlsldavhaq_p_s32.c | 21 +
.../arm/mve/intrinsics/vrmlsldavhaq_s32.c | 21 +
.../arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c | 21 +
.../arm/mve/intrinsics/vrmlsldavhaxq_s32.c | 21 +
.../arm/mve/intrinsics/vrmlsldavhq_p_s32.c | 21 +
.../arm/mve/intrinsics/vrmlsldavhq_s32.c | 21 +
.../arm/mve/intrinsics/vrmlsldavhxq_p_s32.c | 21 +
.../arm/mve/intrinsics/vrmlsldavhxq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndaq_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndaq_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndmq_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndmq_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndnq_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndnq_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndpq_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndpq_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndq_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndq_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndxq_f16.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndxq_f32.c | 13 +
.../gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c | 22 +
.../arm/mve/intrinsics/vrshrnbq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vrshrnbq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vrshrnbq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/vrshrnbq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c | 21 +
.../arm/mve/intrinsics/vrshrntq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vrshrntq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vrshrntq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/vrshrntq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsbciq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsbciq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsbcq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsbcq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlcq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlcq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlcq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlcq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlcq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlcq_u8.c | 21 +
.../arm/mve/intrinsics/vshllbq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c | 23 +
.../arm/mve/intrinsics/vshllbq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c | 21 +
.../arm/mve/intrinsics/vshllbq_x_n_s16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c | 15 +
.../arm/mve/intrinsics/vshllbq_x_n_u16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c | 15 +
.../arm/mve/intrinsics/vshlltq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c | 23 +
.../arm/mve/intrinsics/vshlltq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c | 21 +
.../arm/mve/intrinsics/vshlltq_x_n_s16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c | 15 +
.../arm/mve/intrinsics/vshlltq_x_n_u16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vshlq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_r_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_r_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_r_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_r_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_r_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_r_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_s16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_s32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_s8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_u16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_u32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshlq_x_u8.c | 15 +
.../arm/mve/intrinsics/vshrnbq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vshrnbq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vshrnbq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/vshrnbq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c | 21 +
.../arm/mve/intrinsics/vshrntq_m_n_s16.c | 23 +
.../arm/mve/intrinsics/vshrntq_m_n_s32.c | 23 +
.../arm/mve/intrinsics/vshrntq_m_n_u16.c | 23 +
.../arm/mve/intrinsics/vshrntq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vshrq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsliq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsliq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsliq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsliq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsliq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsliq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsriq_n_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsriq_n_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsriq_n_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsriq_n_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsriq_n_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsriq_n_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_p_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_p_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_p_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_p_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst1q_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vst2q_f16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vst2q_f32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vst2q_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vst2q_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vst2q_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vst2q_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vst2q_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vst2q_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vst4q_f16.c | 37 +
.../gcc.target/arm/mve/intrinsics/vst4q_f32.c | 37 +
.../gcc.target/arm/mve/intrinsics/vst4q_s16.c | 37 +
.../gcc.target/arm/mve/intrinsics/vst4q_s32.c | 37 +
.../gcc.target/arm/mve/intrinsics/vst4q_s8.c | 37 +
.../gcc.target/arm/mve/intrinsics/vst4q_u16.c | 37 +
.../gcc.target/arm/mve/intrinsics/vst4q_u32.c | 37 +
.../gcc.target/arm/mve/intrinsics/vst4q_u8.c | 37 +
.../gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_s8.c | 21 +
.../mve/intrinsics/vstrbq_scatter_offset_p_s16.c | 21 +
.../mve/intrinsics/vstrbq_scatter_offset_p_s32.c | 21 +
.../mve/intrinsics/vstrbq_scatter_offset_p_s8.c | 21 +
.../mve/intrinsics/vstrbq_scatter_offset_p_u16.c | 21 +
.../mve/intrinsics/vstrbq_scatter_offset_p_u32.c | 21 +
.../mve/intrinsics/vstrbq_scatter_offset_p_u8.c | 21 +
.../arm/mve/intrinsics/vstrbq_scatter_offset_s16.c | 21 +
.../arm/mve/intrinsics/vstrbq_scatter_offset_s32.c | 21 +
.../arm/mve/intrinsics/vstrbq_scatter_offset_s8.c | 21 +
.../arm/mve/intrinsics/vstrbq_scatter_offset_u16.c | 21 +
.../arm/mve/intrinsics/vstrbq_scatter_offset_u32.c | 21 +
.../arm/mve/intrinsics/vstrbq_scatter_offset_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrbq_u8.c | 21 +
.../arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c | 21 +
.../arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c | 21 +
.../arm/mve/intrinsics/vstrdq_scatter_base_s64.c | 21 +
.../arm/mve/intrinsics/vstrdq_scatter_base_u64.c | 21 +
.../mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c | 21 +
.../mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c | 21 +
.../mve/intrinsics/vstrdq_scatter_base_wb_s64.c | 21 +
.../mve/intrinsics/vstrdq_scatter_base_wb_u64.c | 21 +
.../mve/intrinsics/vstrdq_scatter_offset_p_s64.c | 21 +
.../mve/intrinsics/vstrdq_scatter_offset_p_u64.c | 21 +
.../arm/mve/intrinsics/vstrdq_scatter_offset_s64.c | 21 +
.../arm/mve/intrinsics/vstrdq_scatter_offset_u64.c | 21 +
.../vstrdq_scatter_shifted_offset_p_s64.c | 21 +
.../vstrdq_scatter_shifted_offset_p_u64.c | 21 +
.../intrinsics/vstrdq_scatter_shifted_offset_s64.c | 21 +
.../intrinsics/vstrdq_scatter_shifted_offset_u64.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_s32.c | 21 +
.../arm/mve/intrinsics/vstrhq_scatter_offset_f16.c | 21 +
.../mve/intrinsics/vstrhq_scatter_offset_p_f16.c | 21 +
.../mve/intrinsics/vstrhq_scatter_offset_p_s16.c | 21 +
.../mve/intrinsics/vstrhq_scatter_offset_p_s32.c | 21 +
.../mve/intrinsics/vstrhq_scatter_offset_p_u16.c | 21 +
.../mve/intrinsics/vstrhq_scatter_offset_p_u32.c | 21 +
.../arm/mve/intrinsics/vstrhq_scatter_offset_s16.c | 21 +
.../arm/mve/intrinsics/vstrhq_scatter_offset_s32.c | 21 +
.../arm/mve/intrinsics/vstrhq_scatter_offset_u16.c | 21 +
.../arm/mve/intrinsics/vstrhq_scatter_offset_u32.c | 21 +
.../intrinsics/vstrhq_scatter_shifted_offset_f16.c | 21 +
.../vstrhq_scatter_shifted_offset_p_f16.c | 21 +
.../vstrhq_scatter_shifted_offset_p_s16.c | 21 +
.../vstrhq_scatter_shifted_offset_p_s32.c | 21 +
.../vstrhq_scatter_shifted_offset_p_u16.c | 21 +
.../vstrhq_scatter_shifted_offset_p_u32.c | 21 +
.../intrinsics/vstrhq_scatter_shifted_offset_s16.c | 21 +
.../intrinsics/vstrhq_scatter_shifted_offset_s32.c | 21 +
.../intrinsics/vstrhq_scatter_shifted_offset_u16.c | 21 +
.../intrinsics/vstrhq_scatter_shifted_offset_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrhq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrwq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrwq_s32.c | 21 +
.../arm/mve/intrinsics/vstrwq_scatter_base_f32.c | 21 +
.../arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c | 21 +
.../arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c | 21 +
.../arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c | 21 +
.../arm/mve/intrinsics/vstrwq_scatter_base_s32.c | 21 +
.../arm/mve/intrinsics/vstrwq_scatter_base_u32.c | 21 +
.../mve/intrinsics/vstrwq_scatter_base_wb_f32.c | 21 +
.../mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c | 21 +
.../mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c | 21 +
.../mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c | 21 +
.../mve/intrinsics/vstrwq_scatter_base_wb_s32.c | 21 +
.../mve/intrinsics/vstrwq_scatter_base_wb_u32.c | 21 +
.../arm/mve/intrinsics/vstrwq_scatter_offset_f32.c | 21 +
.../mve/intrinsics/vstrwq_scatter_offset_p_f32.c | 21 +
.../mve/intrinsics/vstrwq_scatter_offset_p_s32.c | 21 +
.../mve/intrinsics/vstrwq_scatter_offset_p_u32.c | 21 +
.../arm/mve/intrinsics/vstrwq_scatter_offset_s32.c | 21 +
.../arm/mve/intrinsics/vstrwq_scatter_offset_u32.c | 21 +
.../intrinsics/vstrwq_scatter_shifted_offset_f32.c | 21 +
.../vstrwq_scatter_shifted_offset_p_f32.c | 21 +
.../vstrwq_scatter_shifted_offset_p_s32.c | 21 +
.../vstrwq_scatter_shifted_offset_p_u32.c | 21 +
.../intrinsics/vstrwq_scatter_shifted_offset_s32.c | 21 +
.../intrinsics/vstrwq_scatter_shifted_offset_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vstrwq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c | 23 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_m_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_n_f16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_n_f32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_n_s16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_n_s32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_n_s8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_n_u16.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_n_u32.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_n_u8.c | 22 +
.../gcc.target/arm/mve/intrinsics/vsubq_s16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_s32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_s8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_u16.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_u32.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_u8.c | 21 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_f16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_f32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_s16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_s32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_s8.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_u16.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_u32.c | 15 +
.../gcc.target/arm/mve/intrinsics/vsubq_x_u8.c | 15 +
.../arm/mve/intrinsics/vuninitializedq_float.c | 17 +
.../arm/mve/intrinsics/vuninitializedq_float1.c | 17 +
.../arm/mve/intrinsics/vuninitializedq_int.c | 28 +
.../arm/mve/intrinsics/vuninitializedq_int1.c | 29 +
gcc/testsuite/gcc.target/arm/mve/mve.exp | 49 +
gcc/testsuite/gcc.target/arm/polytypes.c | 2 +-
gcc/testsuite/gcc.target/arm/pragma_cde.c | 98 +
gcc/testsuite/gcc.target/arm/vfp-1.c | 4 +-
gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c | 4 +-
gcc/testsuite/gcc.target/arm/vfp-ldmiad.c | 4 +-
gcc/testsuite/gcc.target/arm/vfp-stmdbd.c | 4 +-
gcc/testsuite/gcc.target/arm/vfp-stmiad.c | 4 +-
gcc/testsuite/gcc.target/arm/vnmul-1.c | 4 +-
gcc/testsuite/gcc.target/arm/vnmul-3.c | 4 +-
gcc/testsuite/gcc.target/arm/vnmul-4.c | 4 +-
gcc/testsuite/gcc.target/i386/avx2-pr94460.c | 31 +
gcc/testsuite/gcc.target/i386/avx512bw-pr94438.c | 13 +
gcc/testsuite/gcc.target/i386/avx512bw-pr94500.c | 28 +
gcc/testsuite/gcc.target/i386/avx512bw-pr94509-1.c | 30 +
gcc/testsuite/gcc.target/i386/avx512bw-pr94509-2.c | 38 +
gcc/testsuite/gcc.target/i386/avx512f-pr94300.c | 21 +
gcc/testsuite/gcc.target/i386/avx512f-pr94343.c | 12 +
gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c | 12 +
gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c | 12 +
gcc/testsuite/gcc.target/i386/avx512vlbw-pr94438.c | 13 +
gcc/testsuite/gcc.target/i386/pr57193.c | 3 +-
gcc/testsuite/gcc.target/i386/pr81213-2.c | 12 +
gcc/testsuite/gcc.target/i386/pr81213.c | 12 +-
gcc/testsuite/gcc.target/i386/pr89229-7a.c | 17 +
gcc/testsuite/gcc.target/i386/pr89229-7b.c | 6 +
gcc/testsuite/gcc.target/i386/pr89229-7c.c | 7 +
gcc/testsuite/gcc.target/i386/pr94283.c | 5 +
gcc/testsuite/gcc.target/i386/pr94308.c | 31 +
gcc/testsuite/gcc.target/i386/pr94417-1.c | 20 +
gcc/testsuite/gcc.target/i386/pr94417-2.c | 21 +
gcc/testsuite/gcc.target/i386/pr94417-3.c | 19 +
gcc/testsuite/gcc.target/i386/pr94461.c | 12 +
gcc/testsuite/gcc.target/i386/pr94467-1.c | 40 +
gcc/testsuite/gcc.target/i386/pr94467-2.c | 48 +
.../gcc.target/microblaze/others/builtin-trap.c | 2 +-
gcc/testsuite/gcc.target/powerpc/bswap64-4.c | 6 +-
gcc/testsuite/gcc.target/powerpc/pragma_misc9.c | 47 +
gcc/testsuite/gcc.target/powerpc/pragma_power6.c | 17 +
gcc/testsuite/gcc.target/powerpc/pragma_power7.c | 32 +
gcc/testsuite/gcc.target/powerpc/pragma_power8.c | 52 +
gcc/testsuite/gcc.target/powerpc/pragma_power9.c | 63 +
.../gcc.target/powerpc/vsu/vec-all-nez-7.c | 3 +-
.../gcc.target/powerpc/vsu/vec-any-eqz-7.c | 3 +-
gcc/testsuite/gdc.dg/asm1.d | 9 +
gcc/testsuite/gdc.dg/asm5.d | 12 +
gcc/testsuite/gdc.dg/fileimports/pr93038.txt | 1 +
gcc/testsuite/gdc.dg/imports/pr92216.d | 22 +
gcc/testsuite/gdc.dg/pr90136a.d | 21 +
gcc/testsuite/gdc.dg/pr90136b.d | 21 +
gcc/testsuite/gdc.dg/pr90136c.d | 9 +
gcc/testsuite/gdc.dg/pr92216.d | 13 +
gcc/testsuite/gdc.dg/pr92309.d | 25 +
gcc/testsuite/gdc.dg/pr93038.d | 10 +
gcc/testsuite/gdc.dg/pr93038b.d | 11 +
gcc/testsuite/gdc.dg/pr94424.d | 19 +
gcc/testsuite/gdc.test/compilable/compilable.exp | 30 +
.../gdc.test/compilable/imports/pr9471a.d | 2 +
.../gdc.test/compilable/imports/pr9471b.d | 5 +
.../gdc.test/compilable/imports/pr9471c.d | 18 +
.../gdc.test/compilable/imports/pr9471d.d | 1 +
gcc/testsuite/gdc.test/compilable/pr9471.d | 6 +
.../gdc.test/fail_compilation/fail_compilation.exp | 30 +
gcc/testsuite/gdc.test/gdc-test.exp | 469 -
gcc/testsuite/gdc.test/runnable/runnable.exp | 35 +
gcc/testsuite/gdc.test/runnable/traits.d | 4 +-
.../gdc.test/{runnable => runnable_cxx}/cabi1.d | 0
.../{runnable => runnable_cxx}/cpp_abi_tests.d | 0
.../gdc.test/{runnable => runnable_cxx}/cppa.d | 0
.../{runnable => runnable_cxx}/externmangle.d | 0
.../{runnable => runnable_cxx}/externmangle2.d | 0
.../extra-files/cabi2.cpp | 0
.../extra-files/cpp_abi_tests.cpp | 0
.../extra-files/cppb.cpp | 0
.../extra-files/externmangle.cpp | 0
.../extra-files/externmangle2.cpp | 0
.../gdc.test/runnable_cxx/runnable_cxx.exp | 46 +
gcc/testsuite/gfortran.dg/associate_51.f90 | 2 +-
gcc/testsuite/gfortran.dg/associate_53.f90 | 71 +
gcc/testsuite/gfortran.dg/assumed_rank_19.f90 | 37 +
gcc/testsuite/gfortran.dg/asynchronous_5.f03 | 41 +
gcc/testsuite/gfortran.dg/bessel_5_redux.f90 | 85 +
gcc/testsuite/gfortran.dg/dec_math.f90 | 801 +-
gcc/testsuite/gfortran.dg/dec_math_2.f90 | 14 +
gcc/testsuite/gfortran.dg/dec_math_3.f90 | 8 +
gcc/testsuite/gfortran.dg/dec_math_4.f90 | 8 +
gcc/testsuite/gfortran.dg/dec_structure_28.f90 | 35 +
gcc/testsuite/gfortran.dg/dtio_35.f90 | 50 +
gcc/testsuite/gfortran.dg/f2003_io_8.f03 | 2 +-
.../gfortran.dg/graphite/vect-pr94043.f90 | 18 +
gcc/testsuite/gfortran.dg/ieee/dec_math_1.f90 | 231 +
gcc/testsuite/gfortran.dg/io_constraints_15.f90 | 11 +
gcc/testsuite/gfortran.dg/io_constraints_16.f90 | 11 +
gcc/testsuite/gfortran.dg/io_constraints_17.f90 | 11 +
gcc/testsuite/gfortran.dg/io_constraints_18.f90 | 9 +
gcc/testsuite/gfortran.dg/io_constraints_8.f90 | 2 +-
gcc/testsuite/gfortran.dg/io_tags_1.f90 | 19 +
gcc/testsuite/gfortran.dg/io_tags_10.f90 | 103 +
gcc/testsuite/gfortran.dg/io_tags_2.f90 | 30 +
gcc/testsuite/gfortran.dg/io_tags_3.f90 | 17 +
gcc/testsuite/gfortran.dg/io_tags_4.f90 | 17 +
gcc/testsuite/gfortran.dg/io_tags_5.f90 | 17 +
gcc/testsuite/gfortran.dg/io_tags_6.f90 | 175 +
gcc/testsuite/gfortran.dg/io_tags_7.f90 | 103 +
gcc/testsuite/gfortran.dg/io_tags_8.f90 | 18 +
gcc/testsuite/gfortran.dg/io_tags_9.f90 | 18 +
gcc/testsuite/gfortran.dg/iomsg_2.f90 | 36 +-
.../gfortran.dg/iso_c_binding_compiler_1.f90 | 3 +
.../gfortran.dg/iso_c_binding_compiler_3.f90 | 3 +
gcc/testsuite/gfortran.dg/module_procedure_3.f90 | 27 +
gcc/testsuite/gfortran.dg/pr66725.f90 | 42 +-
gcc/testsuite/gfortran.dg/pr88205.f90 | 6 +-
gcc/testsuite/gfortran.dg/pr93365.f90 | 15 +
gcc/testsuite/gfortran.dg/pr93484_1.f90 | 8 +
gcc/testsuite/gfortran.dg/pr93484_2.f90 | 8 +
gcc/testsuite/gfortran.dg/pr93498_1.f90 | 11 +
gcc/testsuite/gfortran.dg/pr93498_2.f90 | 12 +
gcc/testsuite/gfortran.dg/pr93600_1.f90 | 9 +
gcc/testsuite/gfortran.dg/pr93600_2.f90 | 10 +
gcc/testsuite/gfortran.dg/pr93686_1.f90 | 10 +
gcc/testsuite/gfortran.dg/pr93686_2.f90 | 10 +
gcc/testsuite/gfortran.dg/pr93686_3.f90 | 9 +
gcc/testsuite/gfortran.dg/pr93686_4.f90 | 8 +
gcc/testsuite/gfortran.dg/pr94030_1.f90 | 11 +
gcc/testsuite/gfortran.dg/pr94030_2.f90 | 33 +
gcc/testsuite/gfortran.dg/pr94285.f90 | 5 +
gcc/testsuite/gfortran.dg/pr94329.f90 | 12 +
gcc/testsuite/gfortran.dg/select_rank_4.f90 | 26 +
.../gfortran.dg/unlimited_polymorphic_31.f03 | 3 +
gcc/testsuite/gfortran.dg/vect/pr83232.f90 | 6 +-
gcc/testsuite/gfortran.dg/vect/vect-8.f90 | 2 +-
gcc/testsuite/gfortran.dg/write_check4.f90 | 4 +-
gcc/testsuite/gfortran.dg/write_check5.f90 | 24 +
gcc/testsuite/jit.dg/all-non-failing-tests.h | 30 +
gcc/testsuite/jit.dg/test-long-string-literal.c | 54 +
gcc/testsuite/jit.dg/test-version.c | 26 +
gcc/testsuite/lib/gdc-utils.exp | 475 +
gcc/testsuite/lib/gdc.exp | 120 +-
gcc/testsuite/lib/scanasm.exp | 18 +-
gcc/testsuite/lib/target-supports.exp | 184 +-
gcc/tree-call-cdce.c | 2 +-
gcc/tree-cfg.c | 3 +
gcc/tree-core.h | 3 +-
gcc/tree-data-ref.c | 2 +-
gcc/tree-if-conv.c | 24 +-
gcc/tree-inline.c | 4 +-
gcc/tree-iterator.c | 41 +
gcc/tree-iterator.h | 1 +
gcc/tree-object-size.c | 5 +-
gcc/tree-sra.c | 70 +-
gcc/tree-ssa-dce.c | 8 +-
gcc/tree-ssa-dom.c | 11 +-
gcc/tree-ssa-dse.c | 4 +-
gcc/tree-ssa-forwprop.c | 66 +-
gcc/tree-ssa-loop-im.c | 3 +-
gcc/tree-ssa-loop-ivopts.c | 18 +-
gcc/tree-ssa-loop-manip.c | 12 +-
gcc/tree-ssa-loop-niter.c | 2 +-
gcc/tree-ssa-loop-split.c | 2 +-
gcc/tree-ssa-math-opts.c | 8 +-
gcc/tree-ssa-phiopt.c | 10 +-
gcc/tree-ssa-propagate.c | 19 +-
gcc/tree-ssa-reassoc.c | 23 +-
gcc/tree-ssa-sccvn.c | 2 +
gcc/tree-ssa-strlen.c | 259 +-
gcc/tree-ssa-strlen.h | 2 +-
gcc/tree-streamer-in.c | 1 +
gcc/tree-streamer-out.c | 1 +
gcc/tree-vect-generic.c | 25 +-
gcc/tree-vect-loop.c | 52 +-
gcc/tree-vect-patterns.c | 4 +-
gcc/tree-vect-slp.c | 58 +-
gcc/tree-vect-stmts.c | 210 +-
gcc/tree.c | 38 +-
gcc/tree.def | 2 +-
gcc/tree.h | 11 +-
gcc/var-tracking.c | 50 +-
gcc/varasm.c | 20 +
include/ChangeLog | 29 +
include/lto-symtab.h | 13 +
include/plugin-api.h | 93 +-
libatomic/ChangeLog | 10 +
libatomic/configure | 3 +
libatomic/configure.ac | 1 +
libatomic/testsuite/Makefile.am | 2 +
libatomic/testsuite/Makefile.in | 5 +-
libatomic/testsuite/libatomic-site-extra.exp.in | 1 +
libcpp/po/ChangeLog | 8 +
libcpp/po/eo.po | 81 +-
libcpp/po/sr.po | 78 +-
libgcc/ChangeLog | 42 +
libgcc/config/arm/lib1funcs.S | 33 +-
libgcc/config/arm/t-arm | 3 +
libgcc/config/s390/tpf-unwind.h | 132 +-
libgcc/generic-morestack.c | 56 +
libgfortran/ChangeLog | 9 +
libgfortran/Makefile.am | 1 +
libgfortran/Makefile.in | 19 +-
libgfortran/gfortran.map | 12 +
libgfortran/intrinsics/trigd.c | 205 +
libgfortran/intrinsics/trigd.inc | 464 +
libgfortran/intrinsics/trigd_lib.inc | 147 +
libgo/MERGE | 2 +-
libgo/VERSION | 2 +-
libgo/go/cmd/cgo/gcc.go | 19 +-
libgo/go/cmd/go/alldocs.go | 52 +-
libgo/go/cmd/go/internal/generate/generate.go | 3 +-
libgo/go/cmd/go/internal/modcmd/verify.go | 11 +-
libgo/go/cmd/go/internal/modfetch/cache.go | 40 +-
libgo/go/cmd/go/internal/modfetch/fetch.go | 61 +-
libgo/go/cmd/go/internal/modload/build.go | 4 +-
libgo/go/cmd/go/internal/modload/help.go | 52 +-
.../go/cmd/go/internal/robustio/robustio_flaky.go | 2 +-
libgo/go/cmd/go/internal/test/test.go | 10 +-
libgo/go/cmd/go/internal/work/exec.go | 3 +
libgo/go/cmd/go/testdata/script/mod_edit_go.txt | 7 +
libgo/go/go/build/deps_test.go | 5 +-
.../go/internal/syscall/execenv/execenv_default.go | 19 +
.../go/internal/syscall/execenv/execenv_windows.go | 54 +
libgo/go/os/env_default.go | 13 -
libgo/go/os/env_windows.go | 44 -
libgo/go/os/exec/exec.go | 15 +-
libgo/go/os/exec_posix.go | 3 +-
libgo/go/runtime/alg.go | 12 +-
libgo/go/runtime/checkptr.go | 4 +-
libgo/go/runtime/checkptr_test.go | 9 +-
libgo/go/runtime/defer_test.go | 120 +
libgo/go/runtime/export_test.go | 25 +
libgo/go/runtime/hash_test.go | 49 +
libgo/go/runtime/mbitmap.go | 6 +-
libgo/go/runtime/mgc.go | 48 +-
libgo/go/runtime/mkpreempt.go | 43 +-
libgo/go/runtime/panic.go | 15 +-
libgo/go/runtime/pprof/map.go | 3 +-
libgo/go/runtime/pprof/pprof_test.go | 59 +-
libgo/go/runtime/pprof/proto.go | 45 +-
libgo/go/runtime/pprof/proto_test.go | 13 +
libgo/go/runtime/pprof/runtime.go | 3 +
libgo/go/runtime/runtime2.go | 4 +
libgo/go/runtime/signal_unix.go | 1 +
libgo/go/runtime/stubs.go | 7 +
libgo/go/runtime/symtab.go | 31 +
libgo/go/runtime/testdata/testprog/checkptr.go | 11 +-
libgo/go/runtime/time.go | 256 +-
libgo/go/testing/testing.go | 11 +-
libgo/go/time/time_test.go | 40 +-
libgo/libgo-packages.txt | 1 +
libgo/misc/cgo/testgodefs/testdata/issue37479.go | 33 +
libgo/misc/cgo/testgodefs/testdata/issue37621.go | 23 +
libgo/misc/cgo/testgodefs/testdata/main.go | 8 +
libgo/misc/cgo/testgodefs/testgodefs_test.go | 2 +
libgo/runtime/go-callers.c | 36 +
libgomp/ChangeLog | 105 +
libgomp/configure | 3 +
libgomp/configure.ac | 1 +
libgomp/target.c | 18 +-
libgomp/testsuite/Makefile.am | 2 +
libgomp/testsuite/Makefile.in | 6 +-
libgomp/testsuite/libgomp-site-extra.exp.in | 1 +
libgomp/testsuite/libgomp-test-support.exp.in | 2 -
libgomp/testsuite/libgomp.c++/pr93931.C | 120 +
.../libgomp.c-c++-common/function-not-offloaded.c | 1 +
libgomp/testsuite/libgomp.c/target-link-1.c | 3 -
.../libgomp.fortran/target-enter-data-1.f90 | 38 +
.../testsuite/libgomp.oacc-c++/declare-pr94120.C | 57 +
.../libgomp.oacc-c++/firstprivate-mappings-1.C | 9 +
.../firstprivate-mappings-1.c | 9 +
.../libgomp.oacc-c-c++-common/pr85381-2.c | 20 +-
.../libgomp.oacc-c-c++-common/pr85381-4.c | 5 +-
.../static-dynamic-lifetimes-1-lib.c | 3 +
.../static-dynamic-lifetimes-1.c | 160 +
.../static-dynamic-lifetimes-2-lib.c | 3 +
.../static-dynamic-lifetimes-2.c | 166 +
.../static-dynamic-lifetimes-3-lib.c | 3 +
.../static-dynamic-lifetimes-3.c | 183 +
.../static-dynamic-lifetimes-4-lib.c | 3 +
.../static-dynamic-lifetimes-4.c | 64 +
.../static-dynamic-lifetimes-5-lib.c | 3 +
.../static-dynamic-lifetimes-5.c | 56 +
.../static-dynamic-lifetimes-6-lib.c | 3 +
.../static-dynamic-lifetimes-6.c | 42 +
.../static-dynamic-lifetimes-7-lib.c | 3 +
.../static-dynamic-lifetimes-7.c | 42 +
.../static-dynamic-lifetimes-8-lib.c | 3 +
.../static-dynamic-lifetimes-8.c | 47 +
.../libgomp.oacc-fortran/atomic_capture-1.f90 | 30 +-
libphobos/ChangeLog | 94 +
libphobos/Makefile.in | 4 +-
libphobos/configure | 232 +-
libphobos/configure.ac | 37 +-
libphobos/d_rules.am | 11 -
libphobos/libdruntime/MERGE | 2 +-
libphobos/libdruntime/Makefile.am | 46 +-
libphobos/libdruntime/Makefile.in | 339 +-
libphobos/libdruntime/config/s390/get_tls_offset.S | 25 +
.../libdruntime/config/systemz/get_tls_offset.S | 79 +
libphobos/libdruntime/core/cpuid.d | 36 +-
libphobos/libdruntime/core/sys/posix/signal.d | 47 +-
libphobos/libdruntime/gcc/sections/elf_shared.d | 10 +-
libphobos/libdruntime/gcstub/gc.d | 388 -
libphobos/m4/druntime.m4 | 16 -
libphobos/m4/druntime/cpu.m4 | 10 +
libphobos/m4/druntime/libraries.m4 | 26 -
libphobos/m4/druntime/os.m4 | 31 +-
libphobos/src/MERGE | 2 +-
libphobos/src/Makefile.am | 17 +-
libphobos/src/Makefile.in | 35 +-
libphobos/src/std/algorithm/iteration.d | 2 +-
libphobos/src/std/math.d | 312 +-
libphobos/testsuite/Makefile.in | 2 +
libphobos/testsuite/lib/libphobos.exp | 4 -
libphobos/testsuite/testsuite_flags.in | 3 +-
libstdc++-v3/ChangeLog | 331 +
.../doc/html/manual/appendix_contributing.html | 2 +-
libstdc++-v3/doc/html/manual/appendix_free.html | 2 +-
.../doc/xml/manual/appendix_contributing.xml | 2 +-
libstdc++-v3/doc/xml/manual/appendix_free.xml | 2 +-
libstdc++-v3/include/bits/char_traits.h | 101 +-
libstdc++-v3/include/bits/fs_fwd.h | 42 -
libstdc++-v3/include/bits/fs_path.h | 11 +-
libstdc++-v3/include/bits/iterator_concepts.h | 50 +
libstdc++-v3/include/bits/ptr_traits.h | 11 +-
libstdc++-v3/include/bits/range_access.h | 27 +-
libstdc++-v3/include/bits/range_cmp.h | 3 +
libstdc++-v3/include/bits/slice_array.h | 5 +
libstdc++-v3/include/bits/stl_algobase.h | 2 +-
libstdc++-v3/include/bits/stl_iterator.h | 276 +-
.../include/bits/stl_iterator_base_types.h | 4 +-
libstdc++-v3/include/bits/stream_iterator.h | 4 +-
libstdc++-v3/include/bits/streambuf_iterator.h | 4 +-
libstdc++-v3/include/bits/unique_ptr.h | 25 +
libstdc++-v3/include/experimental/bits/fs_path.h | 40 +-
libstdc++-v3/include/experimental/executor | 235 +-
libstdc++-v3/include/experimental/socket | 18 +-
libstdc++-v3/include/std/charconv | 25 +-
libstdc++-v3/include/std/chrono | 206 +-
libstdc++-v3/include/std/complex | 2 +
libstdc++-v3/include/std/concepts | 2 +-
libstdc++-v3/include/std/condition_variable | 3 +
libstdc++-v3/include/std/future | 3 +
libstdc++-v3/include/std/mutex | 3 +
libstdc++-v3/include/std/shared_mutex | 6 +
libstdc++-v3/include/std/stop_token | 12 +
libstdc++-v3/include/std/string_view | 1 +
libstdc++-v3/include/std/thread | 3 +
libstdc++-v3/include/std/type_traits | 80 +-
libstdc++-v3/include/std/version | 7 +-
libstdc++-v3/libsupc++/compare | 49 +-
.../comparisons/algorithms/partial_order.cc | 4 +
.../comparisons/algorithms/strong_order.cc | 4 +
.../comparisons/algorithms/weak_order.cc | 4 +
.../allocator_traits/members/92878_92947.cc | 51 +
.../testsuite/20_util/any/assign/92878_92947.cc | 46 +
.../testsuite/20_util/any/cons/92878_92947.cc | 46 +
libstdc++-v3/testsuite/20_util/bind/91371.cc | 2 +-
.../testsuite/20_util/default_delete/48631_neg.cc | 2 +-
.../testsuite/20_util/default_delete/void_neg.cc | 2 +-
libstdc++-v3/testsuite/20_util/from_chars/1.cc | 16 +-
libstdc++-v3/testsuite/20_util/from_chars/2.cc | 130 +-
.../testsuite/20_util/from_chars/compare.cc | 50 +
.../20_util/is_constructible/92878_92947.cc | 49 +
.../testsuite/20_util/is_constructible/value-2.cc | 4 +
.../testsuite/20_util/is_function/91371.cc | 2 +-
.../20_util/is_member_function_pointer/91371.cc | 2 +-
.../20_util/is_nothrow_constructible/94003.cc | 46 +
libstdc++-v3/testsuite/20_util/is_object/91371.cc | 2 +-
.../20_util/optional/assignment/92878_92947.cc | 47 +
.../testsuite/20_util/optional/cons/92878_92947.cc | 46 +
.../testsuite/20_util/pair/cons/92878_92947.cc | 49 +
.../20_util/shared_ptr/creation/92878_92947.cc | 46 +
.../construct_at/92878_92947.cc | 50 +
.../testsuite/20_util/time_point/cons/81468.cc | 8 +-
.../time_point/requirements/duration_neg.cc | 32 +
libstdc++-v3/testsuite/20_util/to_address/1_neg.cc | 2 +-
libstdc++-v3/testsuite/20_util/to_address/debug.cc | 36 +
libstdc++-v3/testsuite/20_util/to_chars/1.cc | 30 +-
libstdc++-v3/testsuite/20_util/to_chars/2.cc | 4 +-
libstdc++-v3/testsuite/20_util/to_chars/compare.cc | 51 +
.../20_util/unique_ptr/comparison/compare.cc | 88 +
.../20_util/unique_ptr/comparison/compare_c++20.cc | 98 +
.../20_util/unique_ptr/creation/92878_92947.cc | 46 +
.../20_util/uses_allocator/92878_92947.cc | 67 +
.../testsuite/20_util/variant/92878_92947.cc | 91 +
.../operations/copy/char/constexpr.cc | 32 +
.../operations/copy/wchar_t/constexpr.cc | 32 +
.../deque/modifiers/emplace/92878_92947.cc | 62 +
.../forward_list/modifiers/92878_92947.cc | 62 +
.../list/modifiers/emplace/92878_92947.cc | 78 +
.../map/modifiers/emplace/92878_92947.cc | 137 +
.../multimap/modifiers/emplace/92878_92947.cc | 71 +
.../multiset/modifiers/emplace/92878_92947.cc | 70 +
.../23_containers/priority_queue/92878_92947.cc | 52 +
.../testsuite/23_containers/queue/92878_92947.cc | 47 +
.../set/modifiers/emplace/92878_92947.cc | 70 +
.../testsuite/23_containers/stack/92878_92947.cc | 47 +
.../unordered_map/modifiers/92878_92947.cc | 137 +
.../unordered_multimap/modifiers/92878_92947.cc | 71 +
.../unordered_multiset/modifiers/92878_92947.cc | 78 +
.../unordered_set/modifiers/92878_92947.cc | 78 +
.../vector/modifiers/emplace/92878_92947.cc | 61 +
.../24_iterators/back_insert_iterator/constexpr.cc | 54 +
.../front_insert_iterator/constexpr.cc | 54 +
.../headers/iterator/synopsis_c++17.cc | 18 +
.../24_iterators/insert_iterator/constexpr.cc | 57 +
.../24_iterators/move_iterator/greedy_ops.cc | 8 +-
.../24_iterators/move_iterator/input_iterator.cc | 42 +
.../24_iterators/move_iterator/move_only.cc | 61 +
.../24_iterators/move_iterator/rel_ops_c++20.cc | 163 +
.../24_iterators/reverse_iterator/greedy_ops.cc | 8 +-
.../24_iterators/reverse_iterator/rel_ops_c++20.cc | 193 +
.../testsuite/26_numerics/slice/compare.cc | 48 +
.../27_io/filesystem/path/generic/94242.cc | 52 +
.../filesystem/path/generic/generic_string.cc | 32 +
.../30_threads/condition_variable/members/2.cc | 2 +
.../condition_variable/members/clock_neg.cc | 61 +
.../condition_variable_any/members/clock_neg.cc | 61 +
.../30_threads/future/members/clock_neg.cc | 59 +
.../recursive_timed_mutex/try_lock_until/3.cc | 2 +-
.../try_lock_until/clock_neg.cc | 57 +
.../30_threads/shared_future/members/clock_neg.cc | 59 +
.../30_threads/shared_lock/locking/clock_neg.cc | 59 +
.../shared_timed_mutex/try_lock_until/1.cc | 87 +
.../shared_timed_mutex/try_lock_until/2.cc | 74 +
.../shared_timed_mutex/try_lock_until/clock_neg.cc | 57 +
.../30_threads/timed_mutex/try_lock_until/3.cc | 2 +-
.../30_threads/timed_mutex/try_lock_until/4.cc | 2 +-
.../timed_mutex/try_lock_until/clock_neg.cc | 57 +
.../30_threads/unique_lock/locking/clock_neg.cc | 59 +
.../filesystem/path/generic/generic_string.cc | 46 +-
.../net/execution_context/make_service.cc | 36 +
.../net/execution_context/use_service.cc | 6 +-
.../testsuite/experimental/net/executor/1.cc | 93 +
.../std/ranges/headers/ranges/synopsis.cc | 6 +
.../testsuite/std/time/clock/file/members.cc | 39 +
.../testsuite/std/time/clock/file/overview.cc | 43 +
libstdc++-v3/testsuite/std/time/syn_c++20.cc | 199 +
libstdc++-v3/testsuite/std/time/traits/is_clock.cc | 141 +
libstdc++-v3/testsuite/util/slow_clock.h | 3 +
lto-plugin/ChangeLog | 20 +
lto-plugin/lto-plugin.c | 141 +-
3515 files changed, 350798 insertions(+), 150306 deletions(-)
create mode 100644 gcc/config/arm/arm-builtins.h
create mode 100644 gcc/config/arm/arm_cde.h
create mode 100644 gcc/config/arm/arm_cde_builtins.def
create mode 100644 gcc/config/arm/arm_mve.h
create mode 100644 gcc/config/arm/arm_mve_builtins.def
create mode 100644 gcc/config/arm/arm_mve_types.h
create mode 100644 gcc/config/arm/mve.md
create mode 100644 gcc/fortran/trigd_fe.inc
create mode 100644 gcc/testsuite/c-c++-common/attr-copy.c
create mode 100644 gcc/testsuite/c-c++-common/goacc-gomp/pr93465-1.c
create mode 100644 gcc/testsuite/c-c++-common/goacc/declare-pr94120.c
create mode 100644 gcc/testsuite/c-c++-common/pr94385.c
create mode 100644 gcc/testsuite/g++.dg/abi/empty30.C
create mode 100644 gcc/testsuite/g++.dg/abi/lambda-vis.C
create mode 100644 gcc/testsuite/g++.dg/abi/mangle74.C
create mode 100644 gcc/testsuite/g++.dg/abi/mangle75.C
create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic5.C
create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic6.C
create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic7.C
create mode 100644 gcc/testsuite/g++.dg/concepts/diagnostic8.C
create mode 100644 gcc/testsuite/g++.dg/concepts/pr94252.C
create mode 100644 gcc/testsuite/g++.dg/conversion/op7.C
create mode 100644 gcc/testsuite/g++.dg/coroutines/co-await-syntax-10.C
create mode 100644 gcc/testsuite/g++.dg/coroutines/co-await-syntax-11.C
create mode 100644 gcc/testsuite/g++.dg/coroutines/pr94528.C
rename gcc/testsuite/g++.dg/coroutines/torture/{co-await-14-template-traits.C => c [...]
rename gcc/testsuite/g++.dg/coroutines/torture/{co-await-15-capture-comp-ref.C => [...]
create mode 100644 gcc/testsuite/g++.dg/coroutines/torture/exceptions-test-01-n4849-a.C
create mode 100644 gcc/testsuite/g++.dg/coroutines/torture/symmetric-transfer-00-basic.C
create mode 100644 gcc/testsuite/g++.dg/cpp0x/decltype74.C
create mode 100644 gcc/testsuite/g++.dg/cpp0x/decltype75.C
create mode 100644 gcc/testsuite/g++.dg/cpp0x/enum40.C
create mode 100644 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-constexpr1.C
create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept57.C
create mode 100644 gcc/testsuite/g++.dg/cpp0x/variadic-alias2.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/alias-decl1.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/alias-decl2.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/alias-decl3.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi2.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi3.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi4.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-nsdmi5.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-static1.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union2.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union3.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union4.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/constexpr-union5.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr79937-5.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr90996.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr94066-2.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr94066-3.C
create mode 100644 gcc/testsuite/g++.dg/cpp1y/pr94066.C
create mode 100644 gcc/testsuite/g++.dg/cpp1z/class-deduction72.C
create mode 100644 gcc/testsuite/g++.dg/cpp1z/lambda-this4.C
create mode 100644 gcc/testsuite/g++.dg/cpp1z/lambda-this5.C
create mode 100644 gcc/testsuite/g++.dg/cpp1z/lambda-this6.C
create mode 100644 gcc/testsuite/g++.dg/cpp1z/pr81349.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-nonbool1.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-nonbool2.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-placeholder2.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-pmf1.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-requires21.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/constexpr-union1.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/lambda-generic7.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/lambda-uneval11.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/paren-init22.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/paren-init23.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/paren-init24.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/paren-init25.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/spaceship-eq9.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/spaceship-err4.C
create mode 100644 gcc/testsuite/g++.dg/debug/pr94272.C
create mode 100644 gcc/testsuite/g++.dg/debug/pr94273.C
create mode 100644 gcc/testsuite/g++.dg/debug/pr94281.C
create mode 100644 gcc/testsuite/g++.dg/debug/pr94323.C
create mode 100644 gcc/testsuite/g++.dg/debug/pr94459.C
create mode 100644 gcc/testsuite/g++.dg/ext/attr-access-2.C
create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible5.C
create mode 100644 gcc/testsuite/g++.dg/ext/pr94197.C
create mode 100644 gcc/testsuite/g++.dg/goacc/declare-pr94120.C
create mode 100644 gcc/testsuite/g++.dg/gomp/pr94477.C
create mode 100644 gcc/testsuite/g++.dg/gomp/pr94512.C
create mode 100644 gcc/testsuite/g++.dg/init/aggr14.C
create mode 100644 gcc/testsuite/g++.dg/lookup/pr84733.C
create mode 100644 gcc/testsuite/g++.dg/lookup/pr94257.C
create mode 100644 gcc/testsuite/g++.dg/opt/pr94223.C
create mode 100644 gcc/testsuite/g++.dg/opt/pr94441.C
create mode 100644 gcc/testsuite/g++.dg/opt/pr94468.C
create mode 100644 gcc/testsuite/g++.dg/other/pr94326.C
create mode 100644 gcc/testsuite/g++.dg/other/pr94339.C
create mode 100644 gcc/testsuite/g++.dg/pr93674.C
create mode 100644 gcc/testsuite/g++.dg/pr94314-2.C
create mode 100644 gcc/testsuite/g++.dg/pr94314-3.C
create mode 100644 gcc/testsuite/g++.dg/pr94314.C
create mode 100644 gcc/testsuite/g++.dg/template/array33.C
create mode 100644 gcc/testsuite/g++.dg/template/array34.C
create mode 100644 gcc/testsuite/g++.dg/template/defarg22.C
create mode 100644 gcc/testsuite/g++.dg/template/dependent-name10.C
create mode 100644 gcc/testsuite/g++.dg/template/dependent-name11.C
create mode 100644 gcc/testsuite/g++.dg/template/dependent-name12.C
create mode 100644 gcc/testsuite/g++.dg/template/dependent-name13.C
create mode 100644 gcc/testsuite/g++.dg/template/dependent-name14.C
create mode 100644 gcc/testsuite/g++.dg/template/dependent-name7.C
create mode 100644 gcc/testsuite/g++.dg/template/dependent-name8.C
create mode 100644 gcc/testsuite/g++.dg/template/dependent-name9.C
create mode 100644 gcc/testsuite/g++.dg/template/dr1710-2.C
create mode 100644 gcc/testsuite/g++.dg/template/dr1710.C
create mode 100644 gcc/testsuite/g++.dg/template/dr1794.C
create mode 100644 gcc/testsuite/g++.dg/template/dr314.C
create mode 100644 gcc/testsuite/g++.dg/template/koenig11.C
create mode 100644 gcc/testsuite/g++.dg/template/template-keyword2.C
create mode 100644 gcc/testsuite/g++.dg/torture/pr93347.C
create mode 100644 gcc/testsuite/g++.dg/torture/pr94202.C
create mode 100644 gcc/testsuite/g++.dg/torture/pr94216.C
create mode 100644 gcc/testsuite/g++.dg/torture/pr94303.C
create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr93940.C
create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr94224.C
create mode 100644 gcc/testsuite/g++.dg/tree-ssa/pr94403.C
create mode 100644 gcc/testsuite/g++.dg/ubsan/pr91993.C
create mode 100644 gcc/testsuite/g++.dg/ubsan/vptr-15.C
create mode 100644 gcc/testsuite/g++.dg/warn/Wconversion-pr91993.C
create mode 100644 gcc/testsuite/g++.dg/warn/Wduplicated-cond1.C
create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-3.C
create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-4.C
create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-5.C
create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-tags-6.C
create mode 100644 gcc/testsuite/g++.dg/warn/Wnoexcept2.C
create mode 100644 gcc/testsuite/g++.dg/warn/Wredundant-tags-6.C
create mode 100644 gcc/testsuite/g++.dg/warn/Wredundant-tags-7.C
create mode 100644 gcc/testsuite/g++.target/aarch64/pr94052.C
create mode 100644 gcc/testsuite/g++.target/arm/cde_mve.C
create mode 100644 gcc/testsuite/g++.target/arm/mve.exp
create mode 100644 gcc/testsuite/g++.target/i386/pr94185.C
create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr94144.c
create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr94179.c
create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr94238.c
create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr94488.c
create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr94412.c
create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr94524-1.c
create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr94524-2.c
create mode 100644 gcc/testsuite/gcc.c-torture/pr92372.c
create mode 100644 gcc/testsuite/gcc.dg/Walloca-larger-than-3.c
create mode 100644 gcc/testsuite/gcc.dg/Walloca-larger-than-3.h
create mode 100644 gcc/testsuite/gcc.dg/Wvla-larger-than-4.c
create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-1.c
create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-2.c
create mode 100644 gcc/testsuite/gcc.dg/analyzer/compound-assignment-3.c
create mode 100644 gcc/testsuite/gcc.dg/analyzer/malloc-5.c
create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr94047.c
create mode 100644 gcc/testsuite/gcc.dg/attr-flatten-1.c
create mode 100644 gcc/testsuite/gcc.dg/attr-weakref-5.c
create mode 100644 gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-1.c
create mode 100644 gcc/testsuite/gcc.dg/debug/dwarf2/pr93751-2.c
create mode 100644 gcc/testsuite/gcc.dg/lto/pr94271_0.c
create mode 100644 gcc/testsuite/gcc.dg/lto/pr94271_1.c
create mode 100644 gcc/testsuite/gcc.dg/pr84131.c
create mode 100644 gcc/testsuite/gcc.dg/pr93573-1.c
create mode 100644 gcc/testsuite/gcc.dg/pr93573-2.c
create mode 100644 gcc/testsuite/gcc.dg/pr94015.c
create mode 100644 gcc/testsuite/gcc.dg/pr94166.c
create mode 100644 gcc/testsuite/gcc.dg/pr94167.c
create mode 100644 gcc/testsuite/gcc.dg/pr94172-1.c
create mode 100644 gcc/testsuite/gcc.dg/pr94172-2.c
create mode 100644 gcc/testsuite/gcc.dg/pr94188.c
create mode 100644 gcc/testsuite/gcc.dg/pr94189.c
create mode 100644 gcc/testsuite/gcc.dg/pr94211.c
create mode 100644 gcc/testsuite/gcc.dg/pr94269.c
create mode 100644 gcc/testsuite/gcc.dg/pr94277.c
create mode 100644 gcc/testsuite/gcc.dg/pr94283.c
create mode 100644 gcc/testsuite/gcc.dg/pr94286.c
create mode 100644 gcc/testsuite/gcc.dg/pr94291.c
create mode 100644 gcc/testsuite/gcc.dg/pr94292.c
create mode 100644 gcc/testsuite/gcc.dg/pr94344.c
create mode 100644 gcc/testsuite/gcc.dg/pr94368.c
create mode 100644 gcc/testsuite/gcc.dg/pr94436.c
create mode 100644 gcc/testsuite/gcc.dg/pr94526.c
create mode 100644 gcc/testsuite/gcc.dg/sms-compare-debug-1.c
create mode 100644 gcc/testsuite/gcc.dg/sms-compare-debug-2.c
create mode 100644 gcc/testsuite/gcc.dg/torture/pr94206.c
create mode 100644 gcc/testsuite/gcc.dg/torture/pr94392.c
create mode 100644 gcc/testsuite/gcc.dg/torture/pr94479.c
create mode 100644 gcc/testsuite/gcc.dg/torture/pr94482.c
create mode 100644 gcc/testsuite/gcc.dg/torture/pr94516.c
create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr93435.c
create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr94482-2.c
create mode 100644 gcc/testsuite/gcc.dg/ubsan/pr94423.c
create mode 100644 gcc/testsuite/gcc.dg/vect/pr93069.c
create mode 100644 gcc/testsuite/gcc.dg/vect/pr94443.c
create mode 100644 gcc/testsuite/gcc.misc-tests/gcov-pr94029.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_11.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_12.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_13.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_14.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_15.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_16.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_17.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_18.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_19.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_20.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_21.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_22.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_23.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_24.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_25.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/options_set_26.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94072.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94201.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94398.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94435.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr94530.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_2.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_3.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_4.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_5.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_6.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/attributes_7.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct.h
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_1_1024.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_1_128.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_1_2048.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_1_256.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_1_512.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_2_1024.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_2_128.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_2_2048.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_2_256.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_2_512.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_3_128.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_3_256.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pcs/struct_3_512.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde-errors.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde-mve-error-1.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde-mve-error-2.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde-mve-error-3.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde-mve-full-assembly.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde-mve-tests.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde_v_1.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde_v_1_err.c
create mode 100644 gcc/testsuite/gcc.target/arm/acle/cde_v_1_mve.c
create mode 100644 gcc/testsuite/gcc.target/arm/cmp-3.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu1.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu2.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu3.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_immediates_1_n.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_load_from_array.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_move_gpr_to_gpr.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vec_extracts_fr [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float1.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float2.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int1.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int2.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint1.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint2.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_p_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabavq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddlvq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_p_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvaq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_p_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddvq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_m_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_ [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offse [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shift [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxaq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxavq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxvq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminaq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminavq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_p_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminvq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_offs [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_shif [...]
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_s8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u16.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u32.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_u8.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_float.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_float1.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_int.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vuninitializedq_int1.c
create mode 100644 gcc/testsuite/gcc.target/arm/mve/mve.exp
create mode 100644 gcc/testsuite/gcc.target/arm/pragma_cde.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx2-pr94460.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512bw-pr94438.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512bw-pr94500.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512bw-pr94509-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512bw-pr94509-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-pr94300.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-pr94343.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-pr93069.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512vlbw-pr94438.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr81213-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89229-7a.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89229-7b.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr89229-7c.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr94283.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr94308.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr94417-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr94417-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr94417-3.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr94461.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr94467-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr94467-2.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_misc9.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power6.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power7.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power8.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma_power9.c
create mode 100644 gcc/testsuite/gdc.dg/asm5.d
create mode 100644 gcc/testsuite/gdc.dg/fileimports/pr93038.txt
create mode 100644 gcc/testsuite/gdc.dg/imports/pr92216.d
create mode 100644 gcc/testsuite/gdc.dg/pr90136a.d
create mode 100644 gcc/testsuite/gdc.dg/pr90136b.d
create mode 100644 gcc/testsuite/gdc.dg/pr90136c.d
create mode 100644 gcc/testsuite/gdc.dg/pr92216.d
create mode 100644 gcc/testsuite/gdc.dg/pr92309.d
create mode 100644 gcc/testsuite/gdc.dg/pr93038.d
create mode 100644 gcc/testsuite/gdc.dg/pr93038b.d
create mode 100644 gcc/testsuite/gdc.dg/pr94424.d
create mode 100644 gcc/testsuite/gdc.test/compilable/compilable.exp
create mode 100644 gcc/testsuite/gdc.test/compilable/imports/pr9471a.d
create mode 100644 gcc/testsuite/gdc.test/compilable/imports/pr9471b.d
create mode 100644 gcc/testsuite/gdc.test/compilable/imports/pr9471c.d
create mode 100644 gcc/testsuite/gdc.test/compilable/imports/pr9471d.d
create mode 100644 gcc/testsuite/gdc.test/compilable/pr9471.d
create mode 100644 gcc/testsuite/gdc.test/fail_compilation/fail_compilation.exp
delete mode 100644 gcc/testsuite/gdc.test/gdc-test.exp
create mode 100644 gcc/testsuite/gdc.test/runnable/runnable.exp
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cabi1.d (100%)
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cpp_abi_tests.d (100%)
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/cppa.d (100%)
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/externmangle.d (100%)
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/externmangle2.d (100%)
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cabi2.cpp (100%)
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cpp_abi_tests [...]
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/cppb.cpp (100%)
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/externmangle. [...]
rename gcc/testsuite/gdc.test/{runnable => runnable_cxx}/extra-files/externmangle2 [...]
create mode 100644 gcc/testsuite/gdc.test/runnable_cxx/runnable_cxx.exp
create mode 100644 gcc/testsuite/gfortran.dg/associate_53.f90
create mode 100644 gcc/testsuite/gfortran.dg/assumed_rank_19.f90
create mode 100644 gcc/testsuite/gfortran.dg/asynchronous_5.f03
create mode 100644 gcc/testsuite/gfortran.dg/bessel_5_redux.f90
create mode 100644 gcc/testsuite/gfortran.dg/dec_math_2.f90
create mode 100644 gcc/testsuite/gfortran.dg/dec_math_3.f90
create mode 100644 gcc/testsuite/gfortran.dg/dec_math_4.f90
create mode 100644 gcc/testsuite/gfortran.dg/dec_structure_28.f90
create mode 100644 gcc/testsuite/gfortran.dg/dtio_35.f90
create mode 100644 gcc/testsuite/gfortran.dg/graphite/vect-pr94043.f90
create mode 100644 gcc/testsuite/gfortran.dg/ieee/dec_math_1.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_constraints_15.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_constraints_16.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_constraints_17.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_constraints_18.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_1.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_10.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_2.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_3.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_4.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_5.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_6.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_7.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_8.f90
create mode 100644 gcc/testsuite/gfortran.dg/io_tags_9.f90
create mode 100644 gcc/testsuite/gfortran.dg/module_procedure_3.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93365.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93484_1.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93484_2.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93498_1.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93498_2.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93600_1.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93600_2.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93686_1.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93686_2.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93686_3.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr93686_4.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr94030_1.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr94030_2.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr94285.f90
create mode 100644 gcc/testsuite/gfortran.dg/pr94329.f90
create mode 100644 gcc/testsuite/gfortran.dg/select_rank_4.f90
create mode 100644 gcc/testsuite/gfortran.dg/write_check5.f90
create mode 100644 gcc/testsuite/jit.dg/test-long-string-literal.c
create mode 100644 gcc/testsuite/jit.dg/test-version.c
create mode 100644 gcc/testsuite/lib/gdc-utils.exp
create mode 100644 libatomic/testsuite/libatomic-site-extra.exp.in
create mode 100644 libgfortran/intrinsics/trigd.c
create mode 100644 libgfortran/intrinsics/trigd.inc
create mode 100644 libgfortran/intrinsics/trigd_lib.inc
create mode 100644 libgo/go/internal/syscall/execenv/execenv_default.go
create mode 100644 libgo/go/internal/syscall/execenv/execenv_windows.go
delete mode 100644 libgo/go/os/env_default.go
delete mode 100644 libgo/go/os/env_windows.go
create mode 100644 libgo/misc/cgo/testgodefs/testdata/issue37479.go
create mode 100644 libgo/misc/cgo/testgodefs/testdata/issue37621.go
create mode 100644 libgomp/testsuite/libgomp-site-extra.exp.in
create mode 100644 libgomp/testsuite/libgomp.c++/pr93931.C
create mode 100644 libgomp/testsuite/libgomp.fortran/target-enter-data-1.f90
create mode 100644 libgomp/testsuite/libgomp.oacc-c++/declare-pr94120.C
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libphobos/libdruntime/config/s390/get_tls_offset.S
create mode 100644 libphobos/libdruntime/config/systemz/get_tls_offset.S
delete mode 100644 libphobos/libdruntime/gcstub/gc.d
create mode 100644 libstdc++-v3/testsuite/20_util/allocator_traits/members/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/any/assign/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/any/cons/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/from_chars/compare.cc
create mode 100644 libstdc++-v3/testsuite/20_util/is_constructible/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/is_nothrow_constructible/94003.cc
create mode 100644 libstdc++-v3/testsuite/20_util/optional/assignment/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/optional/cons/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/pair/cons/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/shared_ptr/creation/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/specialized_algorithms/construct [...]
create mode 100644 libstdc++-v3/testsuite/20_util/time_point/requirements/duration_neg.cc
create mode 100644 libstdc++-v3/testsuite/20_util/to_address/debug.cc
create mode 100644 libstdc++-v3/testsuite/20_util/to_chars/compare.cc
create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/comparison/compare.cc
create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/comparison/compare_c++20.cc
create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/creation/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/uses_allocator/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/20_util/variant/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/21_strings/basic_string_view/operations/ [...]
create mode 100644 libstdc++-v3/testsuite/21_strings/basic_string_view/operations/ [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/deque/modifiers/emplace/92 [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/forward_list/modifiers/928 [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/list/modifiers/emplace/928 [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/map/modifiers/emplace/9287 [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/multimap/modifiers/emplace [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/multiset/modifiers/emplace [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/priority_queue/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/23_containers/queue/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/23_containers/set/modifiers/emplace/9287 [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/stack/92878_92947.cc
create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_map/modifiers/92 [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_multimap/modifie [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_multiset/modifie [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_set/modifiers/92 [...]
create mode 100644 libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/9 [...]
create mode 100644 libstdc++-v3/testsuite/24_iterators/back_insert_iterator/constexpr.cc
create mode 100644 libstdc++-v3/testsuite/24_iterators/front_insert_iterator/constexpr.cc
create mode 100644 libstdc++-v3/testsuite/24_iterators/insert_iterator/constexpr.cc
create mode 100644 libstdc++-v3/testsuite/24_iterators/move_iterator/input_iterator.cc
create mode 100644 libstdc++-v3/testsuite/24_iterators/move_iterator/move_only.cc
create mode 100644 libstdc++-v3/testsuite/24_iterators/move_iterator/rel_ops_c++20.cc
create mode 100644 libstdc++-v3/testsuite/24_iterators/reverse_iterator/rel_ops_c++20.cc
create mode 100644 libstdc++-v3/testsuite/26_numerics/slice/compare.cc
create mode 100644 libstdc++-v3/testsuite/27_io/filesystem/path/generic/94242.cc
create mode 100644 libstdc++-v3/testsuite/30_threads/condition_variable/members/cl [...]
create mode 100644 libstdc++-v3/testsuite/30_threads/condition_variable_any/member [...]
create mode 100644 libstdc++-v3/testsuite/30_threads/future/members/clock_neg.cc
create mode 100644 libstdc++-v3/testsuite/30_threads/recursive_timed_mutex/try_loc [...]
create mode 100644 libstdc++-v3/testsuite/30_threads/shared_future/members/clock_neg.cc
create mode 100644 libstdc++-v3/testsuite/30_threads/shared_lock/locking/clock_neg.cc
create mode 100644 libstdc++-v3/testsuite/30_threads/shared_timed_mutex/try_lock_u [...]
create mode 100644 libstdc++-v3/testsuite/30_threads/shared_timed_mutex/try_lock_u [...]
create mode 100644 libstdc++-v3/testsuite/30_threads/shared_timed_mutex/try_lock_u [...]
create mode 100644 libstdc++-v3/testsuite/30_threads/timed_mutex/try_lock_until/cl [...]
create mode 100644 libstdc++-v3/testsuite/30_threads/unique_lock/locking/clock_neg.cc
create mode 100644 libstdc++-v3/testsuite/experimental/net/execution_context/make_ [...]
create mode 100644 libstdc++-v3/testsuite/experimental/net/executor/1.cc
create mode 100644 libstdc++-v3/testsuite/std/time/clock/file/members.cc
create mode 100644 libstdc++-v3/testsuite/std/time/clock/file/overview.cc
create mode 100644 libstdc++-v3/testsuite/std/time/syn_c++20.cc
create mode 100644 libstdc++-v3/testsuite/std/time/traits/is_clock.cc
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0
[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO updated (28d1356774 -> cf83625da2)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO
in repository toolchain/ci/binutils-gdb.
from 28d1356774 asan: readelf leak in hppa_process_unwind
adds 4b3ecb3b91 PR25675: SIGSEGV in bfd_octets_per_byte
adds 2f89101fe8 [gdb/testsuite] Add cache_verify option for gdb_caching_procs
adds cb9b645d3e gdb: recognize 64 bits Windows executables as Cygwin osabi
adds fe4b2ee65c gdb: move enum gdb_osabi to osabi.h
adds 053205cc40 gdb: add Windows OS ABI
adds 7a1998dffb gdb: rename i386-cygwin-tdep.c to i386-windows-tdep.c
adds 5982a56ab9 gdb: rename content of i386-windows-tdep.c, cygwin to windows
adds 8db5243724 gdb: select "Cygwin" OS ABI for Cygwin binaries
adds 30efb6c7af gdb: define builtin long type to be 64 bits on amd64 Cygwin
adds 67430cd00a Fix dwarf2_name caching bug
adds 817a758576 arc: Migrate to new target features
adds 771dd3a88b Initialize base_value in pascal_object_print_value
adds 7325b16ba4 [gdb/testsuite] Give up after consecutive timeouts in comple [...]
adds 589902954d [gdb] Skip imports of c++ CUs
adds a2ecbe9fb7 Rewrite nbsd_nat_target::pid_to_exec_file to sysctl(3)
adds 9e38d61910 Include missing header to get missing declarations
adds 946ffddcae Automatic date update in version.in
adds 9809762324 Inherit sh_nbsd_nat_target from nbsd_nat_target
adds a225c9a869 Add support for NetBSD threads in sh-nbsd-nat.c
adds ecbbbdba71 Remove a double free in the BFD library triggered when parsi [...]
adds 68e52bc7ec Fix a small set of Z80 problems.
adds 327ef784ba Replace a couple of assertions in the BFD library that can b [...]
adds d3c3c54293 Fix PR number in previous delta
adds 2108a63a5a Add support for NetBSD threads in sparc-nat.c
adds fe64b263e0 Automatic date update in version.in
adds 5ccd2fb722 Rename the read symbol to xread
adds d3e2a5e85d Include <alloca.h> conditionally
adds 1c0aa1fbb2 Add support for NetBSD threads in amd64-bsd-nat.c
adds fb516a6913 Add support for NetBSD threads in i386-bsd-nat.c
adds 5a82b8a12b Namespace the reg class to avoid clashes with OS headers
adds 53215f214c Non-contiguous memory regions support: Avoid calls to abort
adds ac4bf06ca2 Fix seg-fault in strip when copying a file containing corrup [...]
adds aef397a154 Non-contiguous memory regions support: Fix testcases after p [...]
adds a9933ccf46 [gdb/testsuite] Add test-case gdb.dwarf2/break-inline-psymtab.exp
adds cdf236890c Automatic date update in version.in
adds 645ba68105 setup_archive parameter mismatch
adds b966f55ffa Invalid read in process_netbsd_elf_note
adds 1cb7d8b1af readelf leak in process_archive
adds 81a65eb338 Don't use bfd.h in binutils/elfcomm.c
adds effc14f54c Additional c99 elfxx-riscv.c fix
adds d8c8b84859 [gdb/testsuite] Fix gdb.opt/inline-locals.exp KFAILs
adds 724fd9ba43 gdb: Restructure the completion_tracker class
adds 19a2740f7f gdb: Remove C++ symbol aliases from completion list
adds 6b8c53f2f1 gdb/testsuite/fortran: Add mixed language stack test
adds cada5fc921 gdb: Handle W and X remote packets without giving a warning
adds ef3df11042 readelf.c: Use unsigned long to iterate over num_syms
adds fcc7376e0a Avoid get_ptrace_pid() usage on NetBSD in x86-bsd-nat.c
adds 6a541707f3 Fix assertion failure in the BFD library when called to pars [...]
adds 2d07da271e [AArch64] When unavailable, fetch VG from ptrace.
adds 3734bec833 Include: Sync lto-symtab.h and plugin-api.h with GCC
adds f3a08f7778 Fix discrepancies in nm's --line-number output by adding sup [...]
adds f09db38094 Disable get_ptrace_pid for NetBSD
adds 9a6c68caa9 Add support for --no-rosegment option.
adds ce2ea1c7e0 Automatic date update in version.in
adds a859124df2 tidy elf_backend calls
adds 833d919c93 PowerPC disassembly of odd sized sections
adds fe90ae8a9f NDS32 disassembly of odd sized sections
adds 340f3ac808 metag uninitialized memory read
adds 67338173a4 XCOFF uninitialized read
adds c02d66610b Silence warnings due to plugin API change
adds c3a1714ce7 plugin: Use LDPT_ADD_SYMBOLS_V2 to get symbol type
adds 3d98c46092 plugin: Don't invoke LTO-wrapper
adds 5844b4657a Fix compile time warnings about the possibility of using uni [...]
adds c7da12c72c Add support for NetBSD threads in ppc-nbsd-nat.c
adds 0d832e7f5e Add support for the xdef and xref pseudo-ops to the Z80 assembler.
adds 0dd7b8f788 [gdb/testsuite] Fix timeouts in gdb.threads/step-over-*.exp
adds 4a90f06205 Add support for NetBSD threads in hppa-nbsd-nat.c
adds 9faa006d11 Inherit ppc_nbsd_nat_target from nbsd_nat_target
adds 70304be939 Fix Ada val_print removal regression
adds 1773be9ea2 Fix column alignment in "maint info line-table"
adds f67210ff1c Avoid stringop-truncation errors
adds f7d4f0b1b9 Fix assert in c-exp.y
adds 1ff700c202 Update the return type of gdb_ptrace to be more flexible
adds c884cc4619 gdb: remove HAVE_DECL_PTRACE
adds c623cc9089 [gdb/testsuite] Fix gdb.threads/omp-par-scope.exp XPASS
adds fe26d3a34a Make dwarf2_evaluate_property parameter const
adds d9fb0d7136 Automatic date update in version.in
adds e3b1fa32c2 include: Sync lto-symtab.h and plugin-api.h with GCC
adds da2efc2050 Automatic date update in version.in
adds d1023b5d1e s12z disassembler tidy
adds 03704c7704 NS32K arg_bufs uninitialised
adds beea5cc1bc ARC: Use of uninitialised value
adds 57cb32b3c3 H8300 use of uninitialised value
adds c15a8f173e XCOFF64 uninitialised read
adds 2957d8d054 Automatic date update in version.in
adds 5935fd1530 gdb/testsuite: Remove hard coded addresses from expected results
adds 5e737279c6 i386msdos uninitialised read
adds cf28cfef60 ECOFF archive uninitialised read
adds fdde2fb60c Mention .tdata in comment in _bfd_elf_tls_setup()
adds 0636b24556 Avoid trigger an assertion failure in the STABS parser by re [...]
adds 1ce0847daa Automatic date update in version.in
adds 5a814d6d96 readelf memory leak in process_mips_specific
adds 65109548f8 Overlarge allocation in _bfd_generic_read_ar_hdr_mag
adds a64fafb545 [gdb] Print user for maint info psymtabs
adds 7e6e972f74 bfd: Display symbol version for nm -D
adds dfb68cc358 include: Sync plugin-api.h with GCC
adds cda7e5603f bfd: Change num_group to unsigned int
adds ec2e748ad3 Fix assertion failure in the BFD library when linking with - [...]
adds 0b8448af68 Add code to the BFD library to handle opening files with pat [...]
adds e11cd7c491 Update changelog.
adds 5ab2fbf185 gdb: bool-ify follow_fork
adds a18cd0cab4 Uninitialised memory read in z80-dis.c
adds 1081065c51 bfd: Add a bfd_boolean argument to bfd_get_symbol_version_string
adds 0d4a4bc56f Automatic date update in version.in
adds d16e3d2e5b PR25662, invalid sh_offset for first section in segment with phdrs
adds 86fd7e2e10 h8300-linux ld testsuite
adds cf2611febc arc: Use correct string when printing bfd DEBUG data
adds dd8953924b gdb/riscv: Apply NaN boxing when writing return values into [...]
adds 7b1eff95be [gdb] Print user/includes fields for maint commands
adds b778095777 The "b" flag for COFF sections only unsets the LOAD attribut [...]
adds aac88046e6 Add a new function to the BFD library to allow users access [...]
adds 4c83662712 readelf looping in process_archive
adds d503b685c6 Fix WOW64 process system DLL paths
adds 33aa3c10f6 Fix error message in compile-object-load.c
adds 46b438bb73 Automatic date update in version.in
adds f75fbe8ad2 alpha-vms: Sanity check ETIR__C_CTL_DFLOC index
adds 4c4addbe57 Re: ARC: Use of uninitialised value
adds ff76851054 Re: i386msdos uninitialised read
adds 832a580781 Re: H8300 use of uninitialised value
adds aa49fc22c1 Revert earlier delta adding bfd_coff_get_internal_extra_pe_a [...]
adds 9fda78b611 Introduce dwarf2/dwz.h
adds 0314b3901c Add dwz.c and dwz_file::read_string
adds bf80d71052 Change dwarf_decode_macro_bytes calling convention
adds 9eac9650ce Split dwarf_decode_macros into two overloads
adds 3d27bbdb4b Move dwarf2_section_buffer_overflow_complaint to dwarf2/section.c
adds a0194fa8f2 Convert dwarf2_section_buffer_overflow_complaint to a method
adds 4f44ae6c69 Add dwarf2_section_info::read_string method
adds c90ec28ae4 Move code to new file dwarf2/macro.c
adds 8844c11b8b Make some line_header methods const
adds 5a0e026fe1 Use a const line_header in macro reader
adds 4f9c1eda9f Use a const dwarf2_section_info in macro reader
adds 2ef46c2fbb Trivial fix in dwarf_decode_macro_bytes
adds 86c0bb4c57 Convert read_indirect_line_string to a method
adds 0df7ad3a67 Move more code to line-header.c
adds c2d50fd0b3 Move die_info to new header
adds 2b24b6e4a6 Remove dwarf2_cu::base_known
adds 052c8bb83a Change dwarf2_attr_no_follow to be a method
adds 436c571c6a Remove sibling_die
adds a39fdb411d Change two more functions to be methods on die_info
adds eeb647814f Rewrite new die_info methods
adds 2b2558bfac Move DWARF-constant stringifying code to new file
adds 0826b30a9f Change two functions to be methods on struct attribute
adds a879b4d5a6 Support AT_BSDFLAGS on FreeBSD.
adds 89ff19d45e Automatic date update in version.in
adds 80e2a3b66e Re: readelf looping in process_archive
adds 1fafefd594 Add testcase for PR 25662 invalid sh_offset for section
adds 8f2dae6a6a gdbsupport: Resolve shellcheck issues in create-version.sh script
adds cacb9d8713 ld: Skip some x86 IFUNC tests for Solaris
adds 258e884429 ld: Xfail pr20995-2 tests for Solaris
adds ebea762639 Always fix system DLL paths for 32bit programs
adds 8f4afc7112 Automatic date update in version.in
adds 6a81c59be7 Adjust objcopy_test
adds 0a6a8b596b Re: Adjust objcopy_test
adds 767be9d907 ld: Set COMMONPAGESIZE for i386 Solaris
adds f1749218ff Fix formatting of read_attribute_reprocess
adds 4d1b9ab645 Fix comment in dwarf2/attribute.h
adds 37d59eacfe Automatic date update in version.in
adds 3ad830466f gdb: remove discard_psymtab function
adds 48993951ce gdb: rename partial_symtab::read_dependencies to expand_depe [...]
adds 69b037c30c gdb: rename partial symtab expand functions of debug info re [...]
adds 988b7300bc PR25745, powerpc64-ld overflows string buffer in --stats mode
adds c9fef64dab Automatic date update in version.in
adds c0502da688 [gdb/testsuite] Fix c-linkage-name.exp with {cc-with-gdb-ind [...]
adds 1310c1b066 Add low_new_clone method to linux_nat_target.
adds 4db10d8f49 [PowerPC] Move up some register access routines
adds 227c0bf4b3 [PowerPC] Fix debug register issues in ppc-linux-nat
adds 00386881a3 Fix objcopy's --preserve-dates command line option so that i [...]
adds d8af906814 Change ada_which_variant_applies to value API
adds d1a89da5de RISC-V: Update CSR to privileged spec 1.11.
adds d262797294 Automatic date update in version.in
adds b3b360dec7 tekhex: Uninitialised read
adds 8169954446 alpha-vms: sanity checks for image_write
adds 89b599df37 alpha-coff: unitialised read
adds 16b0db75af [gdb/testsuite] Fix c-linkage-name.exp with -flto
adds af62665e13 Don't pass NULL to memcpy in gdb
adds 6f29a53415 Fix py-tui.c build problem
adds 876678f05e PR 25611, PR 25614: GAS: Remove a double inclusion of "bignum.h"
adds 283b7aa134 Automatic date update in version.in
adds 7b948a2580 mmo.c: Fix ld testsuite regression "objcopy executable (pr25662)".
adds 41ff29bf5d ld/testsuite/ld-scripts/defined4.d: Don't xfail mmix-*-*.
adds 40bd13ced9 include: Sync plugin-api.h with GCC
adds 15ccbdd717 Arm: Fix thumb2 PLT branch offsets.
adds a7618269b7 Arm: Fix LSB of GOT for Thumb2 only PLT.
adds 15d47c3a70 gas: Fix some x86_64 testcases for Solaris not using R_X86_6 [...]
adds efc3a95039 x86: Force relocation against local absolute symbol
adds 81e3a1d00c Updated Serbian translation for the gprof subdirectory
adds 8c072cb6a1 Avoid some copying in psymtab.c
adds e0802d5996 Avoid copying in lookup_name_info
adds e139a727be gdb/remote: do not check for null_ptid in stop reply
adds 77bf7b5317 Extend the linker's error message for missing libraries if t [...]
adds 60e22c1eac Allow pointer arithmetic with integer references
adds 3ce23ca1de Arm: Skip Thumb2 PLT tests on NaCL.
adds a0714d305f gdb: define convenience function 'exists_non_stop_target'
adds 53cccef118 gdb/infrun: stop all threads if there exists a non-stop target
adds e033dfa92f Remove local variable from simple.rs test case
adds 3d1cfd43be Move Rust union tests to new file
adds 5b930b4538 Change how complex types are created
adds 4c99290df0 Add accessors for members of complex numbers
adds 981c08ce72 Change how complex types are printed in C
adds fa649bb7d3 Change the C parser to allow complex constants
adds c34e871466 Implement complex arithmetic
adds 3638a098a2 Add _Complex type support to C parser
adds 6b4a335bf7 Fix value_literal_complex comment
adds 382aae0632 x86: Only allow S + A relocations against absolute symbol
adds bbe3dc410b Fix the resizing condition of the line table
adds 64dc2d4bd2 Fix an undefined behavior in record_line
adds 2836752f8f gdb: fix style issues in is_linked_with_cygwin_dll
adds 15f89256af Automatic date update in version.in
adds cc77ed241b [gdb/testsuite] Accept new complex print style in mixed-lang [...]
adds d321419811 [gdb] Use partial symbol table to find language for main
adds 1aa98955b1 [gdb/ada] Fix -readnow FAILs
adds 4f5bd88505 Replace "use use" in a warning message with "use".
adds f32682eaca [gdb/testsuite] Fix silent timeout in gdb.multi/multi-target.exp
adds 59e28a9767 [PATCH gas/m68k] Fix a register range check
adds bb89747721 ld: Disable ifunc tests on Solaris
adds 516231b7c7 linux-x86.exp: Compile with -I../bfd
adds 4b27d27c07 Add support for intel SERIALIZE instruction
adds a5863204fb gdbserver: make linux target op 'cannot_store_register' a pr [...]
adds d16f3f6c70 gdbserver/linux-low: turn some static functions into private [...]
adds ef0478f611 gdbserver/linux-low: start turning linux target ops into methods
adds 797bcff595 gdbserver/linux-low: turn 'arch_setup' into a method
adds aa8d21c9bb gdbserver/linux-low: turn 'regs_info' into a method
adds daca57a7de gdbserver/linux-low: turn 'cannot_{fetch/store}_register' in [...]
adds bd70b1f240 gdbserver/linux-low: turn 'fetch_register' into a method
adds df95181f00 gdbserver/linux-low: turn some more static functions into pr [...]
adds bf9ae9d8c3 gdbserver/linux-low: turn 'get_pc' and 'set_pc' into methods
adds 06250e4e67 gdbserver/linux-low: turn 'breakpoint_kind_from_{pc, current [...]
adds 3ca4edb661 gdbserver/linux-low: turn 'sw_breakpoint_from_kind' into a method
adds 7582c77c1d gdbserver/linux-low: turn 'supports_software_single_step' an [...]
adds d4807ea231 gdbserver/linux-low: turn the 'decr_pc_after_break' field in [...]
adds d7146cda56 gdbserver/linux-low: turn 'breakpoint_at' into a method
adds 007c9b975d gdbserver/linux-low: turn 'supports_z_point_type' into a method
adds 9db9aa232a gdbserver/linux-low: turn 'insert_point' and 'remove_point' [...]
adds ac1bbaca10 gdbserver/linux-low: turn watchpoint ops into methods
adds b35db73327 gdbserver/linux-low: turn '{collect, supply}_ptrace_register [...]
adds cb63de7ca8 gdbserver/linux-low: turn 'siginfo_fixup' into a method
adds fd000fb3df gdbserver/linux-low: turn process/thread addition/deletion o [...]
adds d7599cc082 gdbserver/linux-low: turn 'prepare_to_resume' into a method
adds a5b5da9258 gdbserver/linux-low: turn 'process_qsupported' into a method
adds 47f70aa768 gdbserver/linux-low: turn 'supports_tracepoints' into a method
adds 13e567af27 gdbserver/linux-low: turn 'get_thread_area' into a method
adds 809a0c354b gdbserver/linux-low: turn fast tracepoint ops into methods
adds ab64c99982 gdbserver/linux-low: turn 'emit_ops' into a method
adds 9cfd871551 gdbserver/linux-low: turn 'supports_range_stepping' into a method
adds b31cdfa69f gdbserver/linux-low: turn 'supports_hardware_single_step' in [...]
adds 9eedd27d42 gdbserver/linux-low: turn 'get_syscall_trapinfo' into a method
adds fc5ecdb630 gdbserver/linux-low: turn 'get_ipa_tdesc_idx' into a method
adds 0dd7b52ede gdbserver/linux-low: delete 'linux_target_ops' and 'the_low_target'
adds 4d095f5b5e coff-go32-exe: support variable-length stubs
adds 8be5def63b ld: Add NOCF_PROTECTION_CFLAGS to turn off -fcf-protection
adds aa350065a4 NOCF_PROTECTION_CFLAGS: Replace nopie with available
adds 880d97770b [gdb/testsuite] Don't use O2 for inlining in break-inline-ps [...]
adds 6a35491162 gdb/testsuite: Add compiler options parameter to function_ra [...]
adds 34e9a9fa0a gdb/testsuite: Add support for DW_LNS_set_file to DWARF compiler
adds c90d28ac89 gdb: Don't remove duplicate entries from the line table
adds e7da7f8f71 Micro-optimize partial_die_info::read
adds 0830d30190 Avoid assertion failure due to complex type change
adds e2ff18a0a5 gdb: replace some calls to internal_error with gdb_assert
adds e0fc5c3fcb gdb: use bfd_get_section_contents to read section contents i [...]
adds 492c3f03c7 Automatic date update in version.in
adds d9e49b6169 Fix DWARF disassembly of DW_OP_const_type
adds 9e7c9a03ee Fix attributes of typed enums of typedefs
adds 2612e26d4d Automatic date update in version.in
adds 3349112e38 elf: Remove zero-sized relocation section from section group
adds d87e3802d9 Automatic date update in version.in
adds 8707c52201 Automatic date update in version.in
adds 7974396223 Add signal number conversions for NetBSD
adds 93689ce912 Handle complex error type in read_base_type
adds dea34e8cc3 Fix build breakage in NetBSD tdep files
adds 6ee448cc2d Select variant field when printing variant
adds 05f00e223d Implement basic threading support in the NetBSD target
adds f4a220077b Automatic date update in version.in
adds bb651e8b7f Add support for intel TSXLDTRK instructions$
adds 5707e24baa [gdb/symtab] Fix check-psymtab failure for inline function
adds 266803a291 gas/doc/c-z80.texi: Fix @xref warnings
adds 6e0e8b4502 gas: Mention support for Intel SERIALIZE and TSXLDTRK
adds 3e97ba7d58 ld: Fix several 32-bit SPARC plugin tests
adds a0543b0b4c ChangeLog entry for last change.
adds 25c11acac3 [gdb/symtab] Add symbol with inherited DW_AT_const_value to [...]
adds 9f4e76a4b3 gdb: small cleanups in dwarf2_psymtab constructors
adds 4114425321 Support for DW_AT_loclists_base and DW_FORM_loclistx.
adds 9fc3eaae69 DWARFv5: Handle location list for split dwarf.
adds 85a9510ccb DWARFv5: Info address command error in gdb with DWARFfv5.
adds 063f8e80b0 Define NetBSD specific skip_solib_resolver
adds cc9411f8dc Automatic date update in version.in
adds e21d048f8a [gdb/testsuite] Add gcc/94469 xfails to gdb.ada/call_pn.exp
adds 14ca8ecfcb [gdb/testsuite] Fix imported-unit.exp FAIL without psymtabs
adds 6a3ab9239a [PATCH 2/4]: moxie: use generic pcrel support
adds d9f1988553 [PATCH 3/4]: m32c: remove duplicate define and prototype
adds 9ad4cfa8c3 [PATCH 4/4]: Add generic prototype for md_pcrel_from_section
adds 4c09b8c4e7 [PATCH 1/4]: microblaze: remove duplicate prototypes
adds 3810f182ee Remove objfile parameter from read_gdb_index_from_buffer
adds 0f2265e246 gdb: stop using host-dependent signal numbers in windows-tdep.c
adds 93366324f5 Remove the "next" field from windows_thread_info
adds e56f8ccb07 Rename win32_thread_info to windows_thread_info
adds 55a1e039f9 Rename windows_thread_info::id to "tid"
adds ae1f888075 Share windows_thread_info between gdb and gdbserver
adds e9534bd257 Use new and delete for windows_thread_info
adds 62fe396b1c Change two windows_thread_info members to "bool"
adds 2950fdf742 Make windows_thread_info::name a unique_xmalloc_ptr
adds 7c7411bcab Use lwp, not tid, for Windows thread id
adds 98a0328732 Share Windows thread-suspend and -resume code
adds 8e61ebec34 Change type of argument to windows-nat.c:thread_rec
adds 0a4afda3c6 Handle pending stops from the Windows kernel
adds 65bafd5b15 Call CloseHandle from ~windows_thread_info
adds 4834dad062 Wrap shared windows-nat code in windows_nat namespace
adds 28688adf8f Share thread_rec between gdb and gdbserver
adds 9d8679cc71 Share get_image_name between gdb and gdbserver
adds 3c76026df8 Share some Windows-related globals
adds d41b524f45 Normalize handle_output_debug_string API
adds a00caa1279 Fix up complaints.h for namespace use
adds a816ba1897 Share handle_load_dll and handle_unload_dll declarations
adds 29de418dee Remove some globals from windows-nat.c
adds 8d30e39577 Share handle_exception
adds e758e19c59 Share some inferior-related Windows code
adds d2977bc425 Introduce fetch_pending_stop
adds 2c1d95e869 Move wait_for_debug_event to nat/windows-nat.c
adds 71fbdbafe0 Make last_wait_event static
adds d6225aff7a Add read_pc / write_pc support to win32-low
adds e54e59297a Introduce win32_target_ops::decr_pc_after_break
adds 523d4f80c3 Implement stopped_by_sw_breakpoint for Windows gdbserver
adds 360ad8b350 Add pending stop support to gdbserver's Windows port
adds 6b0f946d41 Automatic date update in version.in
adds 3071b197da x86: Correct -mlfence-before-indirect-branch= documentation
adds ae4b1d73f9 ld: Fix pr22269-1 on 32-bit Solaris/SPARC
adds 206c98a650 Add SVR4 psABI specific parser for AUXV entries
adds a25198bba2 Partially revert my UB fix in record_line
adds f4460aec69 gdb: move Tom de Vries to Global Maintainers
adds 6993bae074 Automatic date update in version.in
adds bdfc1e8a0b [gdb/cli] Don't let python colorize strip leading newlines
adds 71ea2b6be8 [gdb/testsuite] Fix -readnow FAIL in gdb.base/style.exp
adds a5d214978f ld: xfail several shared (non PIC) tests on Solaris
adds 13302e956f Fix debugging of WOW64 processes
adds 3e65b3e9af Skip separate debug files when handling copy relocations
adds 0c4311ab90 Avoid infinite recursion in get_msymbol_address
adds de7ac122a7 Automatic date update in version.in
adds cf83625da2 gdb: fix undefined behavior reported in copy_bitwise
No new revisions were added by this update.
Summary of changes:
bfd/ChangeLog | 354 +
bfd/archive.c | 15 +-
bfd/bfd-in2.h | 10 +-
bfd/bfd.c | 5 +-
bfd/bfdio.c | 40 +-
bfd/bfdwin.c | 1 +
bfd/coff-alpha.c | 2 +-
bfd/coff-i386.c | 22 +-
bfd/coff-rs6000.c | 8 +-
bfd/coff-stgo32.c | 449 +-
bfd/coff64-rs6000.c | 4 +-
bfd/coffcode.h | 9 -
bfd/config.in | 6 -
bfd/configure | 10 -
bfd/configure.ac | 6 -
bfd/dwarf2.c | 86 +-
bfd/ecoff.c | 35 +-
bfd/elf-bfd.h | 4 +-
bfd/elf.c | 308 +-
bfd/elf32-arc.c | 4 +-
bfd/elf32-arm.c | 19 +-
bfd/elf32-csky.c | 9 +-
bfd/elf32-hppa.c | 32 +-
bfd/elf32-i386.c | 40 +-
bfd/elf32-m68hc11.c | 9 +-
bfd/elf32-m68hc12.c | 9 +-
bfd/elf32-metag.c | 9 +-
bfd/elf32-nios2.c | 10 +-
bfd/elf32-sparc.c | 34 +-
bfd/elf64-ppc.c | 120 +-
bfd/elf64-x86-64.c | 81 +-
bfd/elfcode.h | 14 +-
bfd/elflink.c | 4 +-
bfd/elfnn-aarch64.c | 10 +-
bfd/elfnn-ia64.c | 7 +-
bfd/elfxx-riscv.c | 3 +-
bfd/elfxx-x86.c | 103 +-
bfd/elfxx-x86.h | 29 +-
bfd/i386msdos.c | 14 +-
bfd/libbfd-in.h | 2 +-
bfd/libbfd.h | 2 +-
bfd/libcoff-in.h | 12 +-
bfd/libcoff.h | 12 +-
bfd/mmo.c | 6 +-
bfd/peXXigen.c | 4 +-
bfd/plugin.c | 487 +-
bfd/plugin.h | 5 +-
bfd/syms.c | 1 +
bfd/targets.c | 5 +-
bfd/tekhex.c | 2 +-
bfd/version.h | 2 +-
bfd/vms-alpha.c | 96 +-
binutils/ChangeLog | 140 +
binutils/ar.c | 2 +-
binutils/elfcomm.c | 56 +-
binutils/elfcomm.h | 6 +-
binutils/nm.c | 30 +-
binutils/objcopy.c | 5 +
binutils/objdump.c | 3 +-
binutils/readelf.c | 239 +-
binutils/testsuite/binutils-all/dw4.s | 1974 +++++
binutils/testsuite/binutils-all/nm.exp | 47 +
binutils/testsuite/binutils-all/objcopy.exp | 97 +-
binutils/testsuite/binutils-all/pr25662.ld | 15 +
binutils/testsuite/binutils-all/pr25662.s | 34 +
binutils/testsuite/lib/binutils-common.exp | 3 +-
binutils/wrstabs.c | 56 +-
gas/ChangeLog | 188 +
gas/NEWS | 2 +
gas/config/obj-coff.c | 5 +
gas/config/tc-aarch64.h | 1 -
gas/config/tc-arc.h | 1 -
gas/config/tc-arm.h | 1 -
gas/config/tc-avr.h | 1 -
gas/config/tc-bfin.h | 1 -
gas/config/tc-bpf.h | 1 -
gas/config/tc-csky.h | 1 -
gas/config/tc-d10v.h | 4 +-
gas/config/tc-d30v.h | 2 -
gas/config/tc-epiphany.h | 1 -
gas/config/tc-fr30.h | 1 -
gas/config/tc-frv.h | 1 -
gas/config/tc-i386.c | 6 +
gas/config/tc-i386.h | 8 +
gas/config/tc-iq2000.h | 1 -
gas/config/tc-lm32.h | 1 -
gas/config/tc-m32c.h | 5 -
gas/config/tc-m32r.h | 1 -
gas/config/tc-m68k.c | 2 +-
gas/config/tc-mcore.h | 1 -
gas/config/tc-mep.h | 1 -
gas/config/tc-metag.h | 1 -
gas/config/tc-microblaze.h | 15 -
gas/config/tc-mmix.h | 1 -
gas/config/tc-moxie.h | 8 -
gas/config/tc-msp430.h | 2 -
gas/config/tc-mt.h | 1 -
gas/config/tc-or1k.h | 1 -
gas/config/tc-ppc.h | 1 -
gas/config/tc-rl78.h | 1 -
gas/config/tc-rx.h | 1 -
gas/config/tc-s390.h | 1 -
gas/config/tc-sh.h | 1 -
gas/config/tc-xc16x.h | 1 -
gas/config/tc-xstormy16.h | 1 -
gas/config/tc-z80.c | 133 +-
gas/config/tc-z80.h | 3 +
gas/doc/c-i386.texi | 12 +-
gas/doc/c-z80.texi | 87 +-
gas/dwarf2dbg.c | 1 -
gas/tc.h | 3 +
gas/testsuite/gas/elf/section12a.d | 2 +-
gas/testsuite/gas/elf/section12b.d | 2 +-
gas/testsuite/gas/elf/section16a.d | 2 +-
gas/testsuite/gas/elf/section16b.d | 2 +-
gas/testsuite/gas/i386/i386.exp | 4 +
gas/testsuite/gas/i386/ilp32/x86-64-localpic.d | 4 +-
gas/testsuite/gas/i386/localpic.d | 4 +-
gas/testsuite/gas/i386/localpic.s | 2 +
gas/testsuite/gas/i386/serialize.d | 12 +
gas/testsuite/gas/i386/serialize.s | 5 +
.../gas/i386/{ => solaris}/x86-64-branch-2.d | 5 +-
.../gas/i386/{ => solaris}/x86-64-branch-3.d | 11 +-
gas/testsuite/gas/i386/solaris/x86-64-jump.d | 16 +-
.../gas/i386/solaris/x86-64-mpx-branch-1.d | 36 +-
.../gas/i386/solaris/x86-64-mpx-branch-2.d | 28 +-
gas/testsuite/gas/i386/tsxldtrk.d | 13 +
gas/testsuite/gas/i386/tsxldtrk.s | 6 +
gas/testsuite/gas/i386/x86-64-branch-2.d | 1 +
gas/testsuite/gas/i386/x86-64-branch-3.d | 1 +
gas/testsuite/gas/i386/x86-64-localpic.d | 4 +-
gas/testsuite/gas/i386/x86-64-localpic.s | 2 +
gas/testsuite/gas/i386/x86-64-serialize.d | 12 +
gas/testsuite/gas/i386/x86-64-tsxldtrk.d | 13 +
gas/testsuite/gas/riscv/alias-csr.d | 23 -
gas/testsuite/gas/riscv/alias-csr.s | 14 -
gas/testsuite/gas/riscv/bad-csr.d | 3 -
gas/testsuite/gas/riscv/csr-dw-regnums.d | 7 +-
gas/testsuite/gas/riscv/csr-dw-regnums.s | 9 +-
gas/testsuite/gas/riscv/no-aliases-csr.d | 23 -
.../gas/riscv/priv-reg-fail-nonexistent.d | 3 +
.../{bad-csr.l => priv-reg-fail-nonexistent.l} | 0
.../{bad-csr.s => priv-reg-fail-nonexistent.s} | 0
gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l | 4 +-
gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d | 36 +
gas/testsuite/gas/riscv/priv-reg-pseudo.d | 36 +
gas/testsuite/gas/riscv/priv-reg-pseudo.s | 33 +
gas/testsuite/gas/riscv/priv-reg.d | 491 +-
gas/testsuite/gas/riscv/priv-reg.s | 114 +-
gas/testsuite/gas/riscv/satp.d | 11 -
gas/testsuite/gas/riscv/satp.s | 3 -
gas/testsuite/gas/s12z/truncated.d | 6 +-
gas/testsuite/gas/z80/colonless.d | 12 +-
gas/testsuite/gas/z80/colonless.s | 4 +
gas/testsuite/gas/z80/ez80_adl_all.d | 8 +-
gas/testsuite/gas/z80/ez80_unsup_regs.d | 34 +
gas/testsuite/gas/z80/ez80_z80_all.d | 8 +-
gas/testsuite/gas/z80/gbz80_unsup_regs.d | 45 +
gas/testsuite/gas/z80/r800_unsup_regs.d | 35 +
gas/testsuite/gas/z80/unsup_regs.s | 71 +
gas/testsuite/gas/z80/z180_unsup_regs.d | 39 +
gas/testsuite/gas/z80/z80.exp | 87 +-
gas/testsuite/gas/z80/z80_strict_unsup_regs.d | 39 +
gas/testsuite/gas/z80/z80_unsup_regs.d | 34 +
gas/testsuite/gas/z80/z80n_unsup_regs.d | 34 +
gdb/ChangeLog | 1345 ++++
gdb/MAINTAINERS | 2 +-
gdb/Makefile.in | 9 +-
gdb/ada-lang.c | 49 +-
gdb/ada-lang.h | 3 +-
gdb/ada-tasks.c | 3 +-
gdb/ada-valprint.c | 99 +-
gdb/alpha-nbsd-tdep.c | 2 +
gdb/amd64-bsd-nat.c | 48 +-
gdb/amd64-nbsd-tdep.c | 1 +
gdb/amd64-windows-tdep.c | 51 +-
gdb/arc-tdep.c | 59 +-
gdb/arc-tdep.h | 4 +
gdb/arch/arc.c | 58 +
gdb/arch/arc.h | 48 +
gdb/arm-nbsd-tdep.c | 4 +
gdb/auxv.c | 61 +-
gdb/auxv.h | 17 +-
gdb/buildsym.c | 25 +-
gdb/c-exp.y | 160 +-
gdb/c-valprint.c | 2 +-
gdb/compile/compile-object-load.c | 2 +-
gdb/complaints.h | 6 +-
gdb/completer.c | 209 +-
gdb/completer.h | 45 +-
gdb/config.in | 4 -
gdb/configure | 20 -
gdb/configure.nat | 4 +-
gdb/configure.tgt | 12 +-
gdb/ctfread.c | 2 +-
gdb/d-lang.c | 9 +-
gdb/dbxread.c | 10 +-
gdb/defs.h | 31 -
gdb/dwarf2/abbrev.c | 5 +-
gdb/dwarf2/attribute.c | 40 +-
gdb/dwarf2/attribute.h | 18 +-
gdb/dwarf2/die.h | 103 +
gdb/{vax-nbsd-tdep.c => dwarf2/dwz.c} | 41 +-
gdb/dwarf2/dwz.h | 65 +
gdb/dwarf2/index-cache.c | 1 +
gdb/dwarf2/index-write.c | 1 +
gdb/dwarf2/line-header.c | 339 +-
gdb/dwarf2/line-header.h | 32 +-
gdb/dwarf2/loc.c | 51 +-
gdb/dwarf2/loc.h | 2 +-
gdb/dwarf2/macro.c | 868 +++
gdb/{nbsd-nat.h => dwarf2/macro.h} | 25 +-
gdb/dwarf2/read.c | 1967 +----
gdb/dwarf2/read.h | 55 +-
gdb/dwarf2/section.c | 26 +
gdb/dwarf2/section.h | 9 +
gdb/dwarf2/stringify.c | 114 +
gdb/dwarf2/stringify.h | 38 +
gdb/eval.c | 20 +-
gdb/exec.c | 10 +-
gdb/f-lang.c | 16 +-
gdb/fbsd-nat.c | 6 +-
gdb/fbsd-nat.h | 2 +-
gdb/fbsd-tdep.c | 1 +
gdb/features/Makefile | 6 +-
gdb/features/arc-arcompact.c | 74 -
gdb/features/arc-arcompact.xml | 85 -
gdb/features/arc-v2.c | 78 -
gdb/features/arc-v2.xml | 92 -
gdb/features/arc/aux-arcompact.c | 31 +
gdb/features/arc/aux-arcompact.xml | 28 +
gdb/features/arc/aux-v2.c | 35 +
gdb/features/arc/aux-v2.xml | 32 +
gdb/features/arc/core-arcompact.c | 47 +
gdb/features/arc/core-arcompact.xml | 58 +
gdb/features/arc/core-v2.c | 47 +
gdb/features/arc/core-v2.xml | 61 +
gdb/features/riscv/32bit-csr.xml | 5 +-
gdb/features/riscv/64bit-csr.xml | 5 +-
gdb/gdb_bfd.c | 14 +-
gdb/gdb_bfd.h | 9 +
gdb/gdbarch.h | 1 +
gdb/gdbarch.sh | 1 +
gdb/gdbtypes.c | 58 +-
gdb/gdbtypes.h | 9 +-
gdb/go-lang.c | 6 +-
gdb/hppa-nbsd-nat.c | 14 +-
gdb/hppa-nbsd-tdep.c | 3 +
gdb/i386-bsd-nat.c | 63 +-
gdb/i386-nbsd-tdep.c | 2 +
gdb/{i386-cygwin-tdep.c => i386-windows-tdep.c} | 66 +-
gdb/inf-ptrace.c | 53 +-
gdb/inf-ptrace.h | 9 +-
gdb/infrun.c | 41 +-
gdb/language.c | 4 +-
gdb/linux-nat.c | 10 +-
gdb/linux-nat.h | 6 +-
gdb/linux-tdep.c | 4 +-
gdb/mdebugread.c | 23 +-
gdb/minsyms.c | 2 +-
gdb/mips-nbsd-tdep.c | 2 +
gdb/nat/aarch64-sve-linux-ptrace.c | 21 +-
gdb/nat/gdb_ptrace.h | 8 -
gdb/nat/windows-nat.c | 407 +
gdb/nat/windows-nat.h | 256 +
gdb/nbsd-nat.c | 174 +-
gdb/nbsd-nat.h | 8 +
gdb/nbsd-tdep.c | 318 +
gdb/nbsd-tdep.h | 4 +
gdb/obsd-tdep.c | 30 +-
gdb/osabi.c | 1 +
gdb/osabi.h | 32 +
gdb/p-valprint.c | 1 +
gdb/ppc-linux-nat.c | 1518 ++--
gdb/ppc-nbsd-nat.c | 17 +-
gdb/ppc-nbsd-tdep.c | 5 +-
gdb/psympriv.h | 8 +-
gdb/psymtab.c | 127 +-
gdb/ptrace.m4 | 6 +-
gdb/python/lib/gdb/__init__.py | 2 +-
gdb/python/py-tui.c | 8 +-
gdb/regformats/regdef.h | 4 +
gdb/remote.c | 58 +-
gdb/riscv-tdep.c | 69 +-
gdb/sh-nbsd-nat.c | 11 +-
gdb/sh-nbsd-tdep.c | 2 +
gdb/sparc-nat.c | 50 +-
gdb/sparc-nbsd-tdep.c | 2 +
gdb/sparc64-nbsd-tdep.c | 2 +
gdb/stabsread.c | 8 +-
gdb/symfile-debug.c | 1 +
gdb/symfile.c | 13 +-
gdb/symfile.h | 11 +
gdb/symmisc.c | 83 +-
gdb/symtab.c | 72 +-
gdb/symtab.h | 62 +-
gdb/target-delegates.c | 24 +-
gdb/target-descriptions.c | 3 +-
gdb/target.c | 33 +-
gdb/target.h | 9 +-
gdb/testsuite/ChangeLog | 206 +
gdb/testsuite/gdb.ada/call_pn.exp | 50 +-
.../gdb.ada/{call_pn.exp => sub_variant.exp} | 28 +-
gdb/testsuite/gdb.ada/sub_variant/subv.adb | 45 +
.../complex.exp => gdb.ada/variant-record.exp} | 33 +-
gdb/testsuite/gdb.ada/variant-record/proc.adb | 21 +
gdb/testsuite/gdb.ada/variant-record/value.adb | 30 +
gdb/testsuite/gdb.ada/variant-record/value.ads | 48 +
gdb/testsuite/gdb.base/c-linkage-name.exp | 45 +-
gdb/testsuite/gdb.base/callfuncs.exp | 6 +-
.../gdb.base/check-psymtab.c} | 26 +-
.../gdb.base/{complex.exp => check-psymtab.exp} | 29 +-
gdb/testsuite/gdb.base/complex-parts.exp | 37 +-
gdb/testsuite/gdb.base/complex.exp | 4 +-
gdb/testsuite/gdb.base/endianity.exp | 4 +-
gdb/testsuite/gdb.base/floatn.exp | 13 +-
gdb/testsuite/gdb.base/funcargs.exp | 20 +-
.../gdb.base/{complex.exp => main-psymtab.exp} | 33 +-
gdb/testsuite/gdb.base/style.c | 4 +
gdb/testsuite/gdb.base/style.exp | 19 +-
gdb/testsuite/gdb.base/varargs.exp | 6 +-
gdb/testsuite/gdb.compile/compile-cplus.exp | 2 +-
gdb/testsuite/gdb.compile/compile.exp | 2 +-
gdb/testsuite/gdb.cp/misc.cc | 3 +
gdb/testsuite/gdb.cp/misc.exp | 8 +
gdb/{nbsd-nat.h => testsuite/gdb.cp/typed-enum.cc} | 27 +-
.../complex.exp => gdb.cp/typed-enum.exp} | 28 +-
.../gdb.dwarf2/break-inline-psymtab-2.c} | 27 +-
.../gdb.dwarf2/break-inline-psymtab.c} | 22 +-
.../break-inline-psymtab.exp} | 30 +-
.../dw2-inline-small-func-lbls.c} | 41 +-
.../gdb.dwarf2/dw2-inline-small-func.c} | 24 +-
gdb/testsuite/gdb.dwarf2/dw2-inline-small-func.exp | 158 +
.../gdb.dwarf2/dw2-inline-small-func.h} | 23 +-
gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 6 +-
.../imported-unit-abstract-const-value.exp | 98 +
gdb/testsuite/gdb.dwarf2/imported-unit.exp | 26 +-
.../style.c => gdb.fortran/mixed-lang-stack.c} | 35 +-
gdb/testsuite/gdb.fortran/mixed-lang-stack.cpp | 85 +
gdb/testsuite/gdb.fortran/mixed-lang-stack.exp | 163 +
gdb/testsuite/gdb.fortran/mixed-lang-stack.f90 | 116 +
.../gdb.linespec/cp-completion-aliases.cc | 73 +
.../gdb.linespec/cp-completion-aliases.exp | 54 +
gdb/testsuite/gdb.multi/multi-target.exp | 24 +-
.../gdb.multi/stop-all-on-exit.c} | 23 +-
gdb/testsuite/gdb.multi/stop-all-on-exit.exp | 64 +
gdb/testsuite/gdb.opt/inline-locals.exp | 26 +-
.../gdb.opt/inline-small-func.c} | 24 +-
gdb/testsuite/gdb.opt/inline-small-func.exp | 60 +
.../gdb.opt/inline-small-func.h} | 23 +-
gdb/testsuite/gdb.rust/simple.exp | 13 -
gdb/testsuite/gdb.rust/simple.rs | 13 -
.../{gdb.base/complex.exp => gdb.rust/union.exp} | 36 +-
gdb/testsuite/gdb.rust/union.rs | 35 +
gdb/testsuite/gdb.server/exit-multiple-threads.c | 202 +
gdb/testsuite/gdb.server/exit-multiple-threads.exp | 136 +
gdb/testsuite/gdb.server/stop-reply-no-thread.exp | 24 +-
gdb/testsuite/gdb.threads/omp-par-scope.exp | 4 +-
.../gdb.threads/step-over-lands-on-breakpoint.exp | 5 +-
.../gdb.threads/step-over-trips-on-watchpoint.exp | 5 +-
gdb/testsuite/lib/cache.exp | 37 +-
gdb/testsuite/lib/completion-support.exp | 27 +-
gdb/testsuite/lib/dwarf.exp | 9 +-
gdb/testsuite/lib/gdb.exp | 80 +
gdb/testsuite/lib/gdbserver-support.exp | 40 +-
gdb/user-regs.c | 21 +-
gdb/utils.c | 6 +-
gdb/valarith.c | 199 +-
gdb/valops.c | 31 +-
gdb/valprint.c | 9 +-
gdb/value.c | 5 +-
gdb/value.h | 12 +
gdb/vax-nbsd-tdep.c | 3 +
gdb/windows-nat.c | 747 +-
gdb/windows-tdep.c | 312 +-
gdb/windows-tdep.h | 15 +
gdb/x86-bsd-nat.c | 43 +-
gdb/xcoffread.c | 8 +-
gdbserver/ChangeLog | 2137 ++++++
gdbserver/config.in | 4 -
gdbserver/configure | 20 -
gdbserver/configure.srv | 7 +-
gdbserver/linux-aarch64-low.cc | 377 +-
gdbserver/linux-arm-low.cc | 262 +-
gdbserver/linux-bfin-low.cc | 138 +-
gdbserver/linux-cris-low.cc | 107 +-
gdbserver/linux-crisv32-low.cc | 180 +-
gdbserver/linux-ia64-low.cc | 86 +-
gdbserver/linux-low.cc | 1105 ++-
gdbserver/linux-low.h | 549 +-
gdbserver/linux-m32r-low.cc | 134 +-
gdbserver/linux-m68k-low.cc | 139 +-
gdbserver/linux-mips-low.cc | 290 +-
gdbserver/linux-nios2-low.cc | 125 +-
gdbserver/linux-ppc-low.cc | 281 +-
gdbserver/linux-riscv-low.cc | 130 +-
gdbserver/linux-s390-low.cc | 258 +-
gdbserver/linux-sh-low.cc | 137 +-
gdbserver/linux-sparc-low.cc | 100 +-
gdbserver/linux-tic6x-low.cc | 133 +-
gdbserver/linux-tile-low.cc | 145 +-
gdbserver/linux-x86-low.cc | 371 +-
gdbserver/linux-xtensa-low.cc | 135 +-
gdbserver/proc-service.cc | 2 +-
gdbserver/regcache.cc | 2 +-
gdbserver/tdesc.cc | 2 +-
gdbserver/tdesc.h | 2 +-
gdbserver/thread-db.cc | 2 +-
gdbserver/win32-arm-low.cc | 32 +-
gdbserver/win32-i386-low.cc | 73 +-
gdbserver/win32-low.cc | 447 +-
gdbserver/win32-low.h | 63 +-
gdbsupport/ChangeLog | 18 +
gdbsupport/btrace-common.cc | 3 +-
gdbsupport/common-defs.h | 2 +
gdbsupport/config.in | 4 -
gdbsupport/configure | 20 -
gdbsupport/create-version.sh | 18 +-
gold/ChangeLog | 4 +
gold/options.h | 2 +-
gprof/ChangeLog | 4 +
gprof/po/sr.po | 49 +-
include/ChangeLog | 44 +
include/coff/go32exe.h | 36 -
include/coff/internal.h | 13 +-
include/elf/common.h | 1 +
include/lto-symtab.h | 13 +
include/opcode/riscv-opc.h | 25 +-
include/plugin-api.h | 93 +-
ld/ChangeLog | 300 +
ld/Makefile.am | 2 +
ld/Makefile.in | 3 +
ld/emulparams/elf_i386_ldso.sh | 1 +
ld/emultempl/pe.em | 5 +-
ld/emultempl/pep.em | 5 +-
ld/emultempl/xtensaelf.em | 6 +-
ld/ldfile.c | 16 +
ld/ldlang.c | 20 +-
ld/pe-dll.c | 4 +-
ld/po/BLD-POTFILES.in | 1 +
ld/testplug.c | 5 +-
ld/testplug2.c | 5 +-
ld/testplug3.c | 5 +-
ld/testplug4.c | 5 +-
ld/testsuite/config/default.exp | 38 +
ld/testsuite/ld-arm/arm-elf.exp | 5 +
ld/testsuite/ld-arm/non-contiguous-arm4.d | 2 +-
ld/testsuite/ld-arm/thumb-plt-got.d | 14 +
ld/testsuite/ld-arm/thumb-plt.d | 34 +
ld/testsuite/ld-arm/thumb-plt.s | 18 +
ld/testsuite/ld-elf/compress1c.d | 1 +
ld/testsuite/ld-elf/compressed1c.d | 1 +
ld/testsuite/ld-elf/compressed1e.d | 2 +-
ld/testsuite/ld-elf/dynamic1.d | 1 +
ld/testsuite/ld-elf/dynsym1.d | 1 +
ld/testsuite/ld-elf/ehdr_start-shared.d | 2 +-
ld/testsuite/ld-elf/exclude3b.d | 1 +
ld/testsuite/ld-elf/export-class.exp | 2 +-
ld/testsuite/ld-elf/global1.d | 1 +
ld/testsuite/ld-elf/hash.d | 1 +
ld/testsuite/ld-elf/linux-x86.exp | 167 +
ld/testsuite/ld-elf/loadaddr1.d | 1 +
ld/testsuite/ld-elf/loadaddr2.d | 1 +
ld/testsuite/ld-elf/local1.d | 1 +
ld/testsuite/ld-elf/mbind1b.d | 1 +
ld/testsuite/ld-elf/mbind1c.d | 1 +
ld/testsuite/ld-elf/now-1.d | 1 +
ld/testsuite/ld-elf/now-2.d | 1 +
ld/testsuite/ld-elf/now-3.d | 1 +
ld/testsuite/ld-elf/now-4.d | 1 +
ld/testsuite/ld-elf/pie.d | 1 +
ld/testsuite/ld-elf/pr12975.d | 2 +-
ld/testsuite/ld-elf/pr13177.d | 2 +-
ld/testsuite/ld-elf/pr13195.d | 2 +-
ld/testsuite/ld-elf/pr16322.d | 1 +
ld/testsuite/ld-elf/pr16498a.d | 1 +
ld/testsuite/ld-elf/pr16498b.d | 1 +
ld/testsuite/ld-elf/pr17615.d | 2 +-
ld/testsuite/ld-elf/pr19162.d | 2 +-
ld/testsuite/ld-elf/pr19539.d | 2 +-
ld/testsuite/ld-elf/pr19617a.d | 1 +
ld/testsuite/ld-elf/pr19698.d | 1 +
ld/testsuite/ld-elf/pr20513c.d | 1 +
ld/testsuite/ld-elf/pr20513d.d | 1 +
ld/testsuite/ld-elf/pr21389a.d | 1 +
ld/testsuite/ld-elf/pr21389b.d | 1 +
ld/testsuite/ld-elf/pr21389c.d | 1 +
ld/testsuite/ld-elf/pr21562a.d | 2 +-
ld/testsuite/ld-elf/pr21562b.d | 2 +-
ld/testsuite/ld-elf/pr21562c.d | 2 +-
ld/testsuite/ld-elf/pr21562d.d | 2 +-
ld/testsuite/ld-elf/pr21562e.d | 1 +
ld/testsuite/ld-elf/pr21562f.d | 1 +
ld/testsuite/ld-elf/pr21562g.d | 1 +
ld/testsuite/ld-elf/pr21562h.d | 1 +
ld/testsuite/ld-elf/pr21562i.d | 2 +-
ld/testsuite/ld-elf/pr21562j.d | 2 +-
ld/testsuite/ld-elf/pr21562k.d | 2 +-
ld/testsuite/ld-elf/pr21562l.d | 2 +-
ld/testsuite/ld-elf/pr21562m.d | 2 +-
ld/testsuite/ld-elf/pr21562n.d | 2 +-
ld/testsuite/ld-elf/pr21903a.d | 1 +
ld/testsuite/ld-elf/pr21903b.d | 1 +
ld/testsuite/ld-elf/pr21903d.d | 1 +
ld/testsuite/ld-elf/pr22269a.d | 1 +
ld/testsuite/ld-elf/pr22269b.d | 1 +
ld/testsuite/ld-elf/pr22393-1a.d | 1 +
ld/testsuite/ld-elf/pr22393-1b.d | 1 +
ld/testsuite/ld-elf/pr22393-1c.d | 1 +
ld/testsuite/ld-elf/pr22393-1d.d | 1 +
ld/testsuite/ld-elf/pr22393-1e.d | 1 +
ld/testsuite/ld-elf/pr22393-1f.d | 1 +
ld/testsuite/ld-elf/pr22423.d | 1 +
ld/testsuite/ld-elf/pr22450.d | 2 +-
ld/testsuite/ld-elf/pr23658-1c.d | 1 +
ld/testsuite/ld-elf/pr25708.d | 11 +
ld/testsuite/ld-elf/pr25749-1.c | 12 +
ld/testsuite/ld-elf/pr25749-1a.c | 11 +
ld/testsuite/ld-elf/pr25749-1b.c | 9 +
ld/testsuite/ld-elf/pr25749-1b.err | 3 +
ld/testsuite/ld-elf/pr25749-1c.c | 9 +
ld/testsuite/ld-elf/pr25749-1d.c | 19 +
ld/testsuite/ld-elf/pr25749-2.c | 12 +
ld/testsuite/ld-elf/pr25749-2a.s | 6 +
ld/testsuite/ld-elf/pr25749-2b.s | 7 +
ld/testsuite/ld-elf/pr25749.rd | 4 +
ld/testsuite/ld-elf/pr25754-1a.c | 19 +
ld/testsuite/ld-elf/pr25754-1b.s | 3 +
ld/testsuite/ld-elf/pr25754-2a.c | 20 +
ld/testsuite/ld-elf/pr25754-2b.s | 3 +
ld/testsuite/ld-elf/pr25754-3a.c | 19 +
ld/testsuite/ld-elf/pr25754-3b.s | 3 +
ld/testsuite/ld-elf/pr25754-4a.c | 12 +
ld/testsuite/ld-elf/pr25754-4b.s | 23 +
ld/testsuite/ld-elf/pr25754-4c.s | 12 +
ld/testsuite/ld-elf/pr25754-5a.c | 12 +
ld/testsuite/ld-elf/pr25754-5b.s | 23 +
ld/testsuite/ld-elf/pr25754-5c.s | 12 +
ld/testsuite/ld-elf/pr25754-6a.c | 12 +
ld/testsuite/ld-elf/pr25754-6b.s | 12 +
ld/testsuite/ld-elf/rpath-1.d | 1 +
ld/testsuite/ld-elf/rpath-2.d | 1 +
ld/testsuite/ld-elf/runpath-1.d | 1 +
ld/testsuite/ld-elf/runpath-2.d | 1 +
ld/testsuite/ld-elf/shared.exp | 2 +-
ld/testsuite/ld-elf/sizeofb.d | 1 +
ld/testsuite/ld-elf/startofb.d | 1 +
ld/testsuite/ld-elf/strtab.d | 1 +
ld/testsuite/ld-elf/textaddr1.d | 1 +
ld/testsuite/ld-elf/textaddr2.d | 1 +
ld/testsuite/ld-elf/textaddr4.d | 1 +
ld/testsuite/ld-elf/textaddr5.d | 1 +
ld/testsuite/ld-elf/textaddr6.d | 1 +
ld/testsuite/ld-elf/unknown2.d | 1 +
ld/testsuite/ld-h8300/gcsection.d | 5 +-
ld/testsuite/ld-h8300/h8300.exp | 19 +-
ld/testsuite/ld-h8300/relax-2.d | 4 +-
ld/testsuite/ld-h8300/relax-3.d | 4 +-
ld/testsuite/ld-h8300/relax-4.d | 4 +-
ld/testsuite/ld-h8300/relax-5.d | 4 +-
ld/testsuite/ld-h8300/relax-6.d | 4 +-
ld/testsuite/ld-h8300/relax-7.d | 4 +-
ld/testsuite/ld-h8300/relax.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-10-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-11-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-12-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-13-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-14a-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-14b-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-14c-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-14d-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-14e-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-14f-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-15-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-16-i386-now.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-16-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-17a-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-17b-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-18a-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-18b-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-19a-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-19b-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-2-i386-now.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-2-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-2-local-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-20-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-21-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-22-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-5a-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-5a-local-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-5b-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-5b-local-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-5r-local-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-6a-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-6b-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-7a-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-7b-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-8-i386.d | 2 +-
ld/testsuite/ld-ifunc/ifunc-9-i386.d | 2 +-
ld/testsuite/ld-ifunc/pr17154-i386-now.d | 2 +-
ld/testsuite/ld-ifunc/pr17154-i386.d | 2 +-
ld/testsuite/ld-plugin/lto.exp | 15 +-
ld/testsuite/ld-powerpc/non-contiguous-powerpc.d | 2 +-
ld/testsuite/ld-scripts/defined4.d | 4 +-
ld/testsuite/ld-shared/shared.exp | 10 +-
ld/testsuite/ld-srec/srec.exp | 8 +-
ld/testsuite/ld-undefined/entry-3.d | 1 +
ld/testsuite/ld-undefined/entry-4.d | 1 +
ld/testsuite/ld-x86-64/pr19609-6a.d | 11 +-
ld/testsuite/ld-x86-64/x86-64.exp | 10 +-
opcodes/ChangeLog | 120 +
opcodes/arc-dis.c | 11 +-
opcodes/disassemble.c | 10 +-
opcodes/disassemble.h | 6 +
opcodes/h8300-dis.c | 261 +-
opcodes/i386-dis.c | 15 +-
opcodes/i386-gen.c | 10 +
opcodes/i386-init.h | 374 +-
opcodes/i386-opc.h | 6 +
opcodes/i386-opc.tbl | 13 +
opcodes/i386-tbl.h | 7994 ++++++++++----------
opcodes/metag-dis.c | 10 +-
opcodes/nds32-dis.c | 24 +-
opcodes/ns32k-dis.c | 19 +-
opcodes/ppc-dis.c | 28 +-
opcodes/s12z-dis.c | 14 +-
opcodes/s12z-opc.c | 1030 ++-
opcodes/z80-dis.c | 28 +-
629 files changed, 27759 insertions(+), 13908 deletions(-)
create mode 100644 binutils/testsuite/binutils-all/dw4.s
create mode 100644 binutils/testsuite/binutils-all/pr25662.ld
create mode 100644 binutils/testsuite/binutils-all/pr25662.s
create mode 100644 gas/testsuite/gas/i386/serialize.d
create mode 100644 gas/testsuite/gas/i386/serialize.s
copy gas/testsuite/gas/i386/{ => solaris}/x86-64-branch-2.d (88%)
copy gas/testsuite/gas/i386/{ => solaris}/x86-64-branch-3.d (80%)
create mode 100644 gas/testsuite/gas/i386/tsxldtrk.d
create mode 100644 gas/testsuite/gas/i386/tsxldtrk.s
create mode 100644 gas/testsuite/gas/i386/x86-64-serialize.d
create mode 100644 gas/testsuite/gas/i386/x86-64-tsxldtrk.d
delete mode 100644 gas/testsuite/gas/riscv/alias-csr.d
delete mode 100644 gas/testsuite/gas/riscv/alias-csr.s
delete mode 100644 gas/testsuite/gas/riscv/bad-csr.d
delete mode 100644 gas/testsuite/gas/riscv/no-aliases-csr.d
create mode 100644 gas/testsuite/gas/riscv/priv-reg-fail-nonexistent.d
rename gas/testsuite/gas/riscv/{bad-csr.l => priv-reg-fail-nonexistent.l} (100%)
rename gas/testsuite/gas/riscv/{bad-csr.s => priv-reg-fail-nonexistent.s} (100%)
create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo-noalias.d
create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo.d
create mode 100644 gas/testsuite/gas/riscv/priv-reg-pseudo.s
delete mode 100644 gas/testsuite/gas/riscv/satp.d
delete mode 100644 gas/testsuite/gas/riscv/satp.s
create mode 100644 gas/testsuite/gas/z80/ez80_unsup_regs.d
create mode 100644 gas/testsuite/gas/z80/gbz80_unsup_regs.d
create mode 100644 gas/testsuite/gas/z80/r800_unsup_regs.d
create mode 100644 gas/testsuite/gas/z80/unsup_regs.s
create mode 100644 gas/testsuite/gas/z80/z180_unsup_regs.d
create mode 100644 gas/testsuite/gas/z80/z80_strict_unsup_regs.d
create mode 100644 gas/testsuite/gas/z80/z80_unsup_regs.d
create mode 100644 gas/testsuite/gas/z80/z80n_unsup_regs.d
create mode 100644 gdb/arch/arc.c
create mode 100644 gdb/arch/arc.h
create mode 100644 gdb/dwarf2/die.h
copy gdb/{vax-nbsd-tdep.c => dwarf2/dwz.c} (50%)
create mode 100644 gdb/dwarf2/dwz.h
create mode 100644 gdb/dwarf2/macro.c
copy gdb/{nbsd-nat.h => dwarf2/macro.h} (58%)
create mode 100644 gdb/dwarf2/stringify.c
create mode 100644 gdb/dwarf2/stringify.h
delete mode 100644 gdb/features/arc-arcompact.c
delete mode 100644 gdb/features/arc-arcompact.xml
delete mode 100644 gdb/features/arc-v2.c
delete mode 100644 gdb/features/arc-v2.xml
create mode 100644 gdb/features/arc/aux-arcompact.c
create mode 100644 gdb/features/arc/aux-arcompact.xml
create mode 100644 gdb/features/arc/aux-v2.c
create mode 100644 gdb/features/arc/aux-v2.xml
create mode 100644 gdb/features/arc/core-arcompact.c
create mode 100644 gdb/features/arc/core-arcompact.xml
create mode 100644 gdb/features/arc/core-v2.c
create mode 100644 gdb/features/arc/core-v2.xml
rename gdb/{i386-cygwin-tdep.c => i386-windows-tdep.c} (80%)
create mode 100644 gdb/nat/windows-nat.c
create mode 100644 gdb/nat/windows-nat.h
copy gdb/testsuite/gdb.ada/{call_pn.exp => sub_variant.exp} (52%)
create mode 100644 gdb/testsuite/gdb.ada/sub_variant/subv.adb
copy gdb/testsuite/{gdb.base/complex.exp => gdb.ada/variant-record.exp} (51%)
create mode 100644 gdb/testsuite/gdb.ada/variant-record/proc.adb
create mode 100644 gdb/testsuite/gdb.ada/variant-record/value.adb
create mode 100644 gdb/testsuite/gdb.ada/variant-record/value.ads
copy gdb/{nbsd-nat.h => testsuite/gdb.base/check-psymtab.c} (65%)
copy gdb/testsuite/gdb.base/{complex.exp => check-psymtab.exp} (53%)
copy gdb/testsuite/gdb.base/{complex.exp => main-psymtab.exp} (52%)
copy gdb/{nbsd-nat.h => testsuite/gdb.cp/typed-enum.cc} (65%)
copy gdb/testsuite/{gdb.base/complex.exp => gdb.cp/typed-enum.exp} (58%)
copy gdb/{nbsd-nat.h => testsuite/gdb.dwarf2/break-inline-psymtab-2.c} (65%)
copy gdb/{nbsd-nat.h => testsuite/gdb.dwarf2/break-inline-psymtab.c} (65%)
copy gdb/testsuite/{gdb.base/complex.exp => gdb.dwarf2/break-inline-psymtab.exp} (54%)
copy gdb/testsuite/{gdb.base/style.c => gdb.dwarf2/dw2-inline-small-func-lbls.c} (57%)
copy gdb/{nbsd-nat.h => testsuite/gdb.dwarf2/dw2-inline-small-func.c} (65%)
create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-small-func.exp
copy gdb/{nbsd-nat.h => testsuite/gdb.dwarf2/dw2-inline-small-func.h} (65%)
create mode 100644 gdb/testsuite/gdb.dwarf2/imported-unit-abstract-const-value.exp
copy gdb/testsuite/{gdb.base/style.c => gdb.fortran/mixed-lang-stack.c} (51%)
create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.cpp
create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.exp
create mode 100644 gdb/testsuite/gdb.fortran/mixed-lang-stack.f90
create mode 100644 gdb/testsuite/gdb.linespec/cp-completion-aliases.cc
create mode 100644 gdb/testsuite/gdb.linespec/cp-completion-aliases.exp
copy gdb/{nbsd-nat.h => testsuite/gdb.multi/stop-all-on-exit.c} (65%)
create mode 100644 gdb/testsuite/gdb.multi/stop-all-on-exit.exp
copy gdb/{nbsd-nat.h => testsuite/gdb.opt/inline-small-func.c} (65%)
create mode 100644 gdb/testsuite/gdb.opt/inline-small-func.exp
copy gdb/{nbsd-nat.h => testsuite/gdb.opt/inline-small-func.h} (65%)
copy gdb/testsuite/{gdb.base/complex.exp => gdb.rust/union.exp} (50%)
create mode 100644 gdb/testsuite/gdb.rust/union.rs
create mode 100644 gdb/testsuite/gdb.server/exit-multiple-threads.c
create mode 100644 gdb/testsuite/gdb.server/exit-multiple-threads.exp
delete mode 100644 include/coff/go32exe.h
create mode 100644 ld/testsuite/ld-arm/thumb-plt-got.d
create mode 100644 ld/testsuite/ld-arm/thumb-plt.d
create mode 100644 ld/testsuite/ld-arm/thumb-plt.s
create mode 100644 ld/testsuite/ld-elf/pr25708.d
create mode 100644 ld/testsuite/ld-elf/pr25749-1.c
create mode 100644 ld/testsuite/ld-elf/pr25749-1a.c
create mode 100644 ld/testsuite/ld-elf/pr25749-1b.c
create mode 100644 ld/testsuite/ld-elf/pr25749-1b.err
create mode 100644 ld/testsuite/ld-elf/pr25749-1c.c
create mode 100644 ld/testsuite/ld-elf/pr25749-1d.c
create mode 100644 ld/testsuite/ld-elf/pr25749-2.c
create mode 100644 ld/testsuite/ld-elf/pr25749-2a.s
create mode 100644 ld/testsuite/ld-elf/pr25749-2b.s
create mode 100644 ld/testsuite/ld-elf/pr25749.rd
create mode 100644 ld/testsuite/ld-elf/pr25754-1a.c
create mode 100644 ld/testsuite/ld-elf/pr25754-1b.s
create mode 100644 ld/testsuite/ld-elf/pr25754-2a.c
create mode 100644 ld/testsuite/ld-elf/pr25754-2b.s
create mode 100644 ld/testsuite/ld-elf/pr25754-3a.c
create mode 100644 ld/testsuite/ld-elf/pr25754-3b.s
create mode 100644 ld/testsuite/ld-elf/pr25754-4a.c
create mode 100644 ld/testsuite/ld-elf/pr25754-4b.s
create mode 100644 ld/testsuite/ld-elf/pr25754-4c.s
create mode 100644 ld/testsuite/ld-elf/pr25754-5a.c
create mode 100644 ld/testsuite/ld-elf/pr25754-5b.s
create mode 100644 ld/testsuite/ld-elf/pr25754-5c.s
create mode 100644 ld/testsuite/ld-elf/pr25754-6a.c
create mode 100644 ld/testsuite/ld-elf/pr25754-6b.s
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0
[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO updated (4e2d24116 -> bd92a9cac)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O2_LTO
in repository toolchain/ci/base-artifacts.
discards 4e2d24116 1: update: binutils-gcc-glibc-llvm: 1
new bd92a9cac 1: update: binutils-gcc-glibc: 1
This update added new revisions after undoing existing revisions.
That is to say, some revisions that were in the old version of the
branch are not in the new version. This situation occurs
when a user --force pushes a change and generates a repository
containing something like this:
* -- * -- B -- O -- O -- O (4e2d24116)
\
N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarc [...]
You should already have received notification emails for all of the O
revisions, and so the following emails describe only the N revisions
from the common base, B.
Any revisions marked "omits" are not gone; other references still
refer to them. Any revisions marked "discards" are gone forever.
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
01-reset_artifacts/console.log | 130 +-
02-prepare_abe/console.log | 436 +-
03-build_abe-binutils/console.log | 11713 +-
04-build_abe-stage1/console.log | 15722 +--
05-build_abe-linux/console.log | 300 +-
06-build_abe-glibc/console.log | 40178 +++---
07-build_abe-stage2/console.log | 37186 +++---
08-build_llvm-true/console.log | 12691 +-
10-benchmark--O2_LTO/benchmark-start.log | 2 +-
10-benchmark--O2_LTO/benchmark.log | 24 +-
10-benchmark--O2_LTO/console.log | 230 +-
11-check_regression/console.log | 408 +-
11-check_regression/extra-bisect-params | 1 +
.../results-0.csv | 0
11-check_regression/results-1.csv | 53 +
11-check_regression/results-brief.csv | 20 +
.../results-compare.csv | 6 +-
11-check_regression/results-full.csv | 53 +
11-check_regression/results.csv | 25 +
.../results.log | 2814 +-
12-update_baseline/console.log | 1782 +-
12-update_baseline/extra-bisect-params | 2 +-
12-update_baseline/results-1.csv | 102 +-
12-update_baseline/results-brief.csv | 36 +-
12-update_baseline/results-full.csv | 102 +-
12-update_baseline/results.csv | 46 +-
12-update_baseline/results.log | 2004 +-
12-update_baseline/results.regressions | 1 +
console.log | 120790 +++++++++---------
jenkins/manifest.sh | 23 +-
regressions.txt | 2 -
results | 1 -
results_id | 2 +-
33 files changed, 123580 insertions(+), 123305 deletions(-)
create mode 100644 11-check_regression/extra-bisect-params
copy 12-update_baseline/results-1.csv => 11-check_regression/results-0.csv (100%)
create mode 100644 11-check_regression/results-1.csv
create mode 100644 11-check_regression/results-brief.csv
copy {12-update_baseline => 11-check_regression}/results-compare.csv (79%)
create mode 100644 11-check_regression/results-full.csv
create mode 100644 11-check_regression/results.csv
copy {12-update_baseline => 11-check_regression}/results.log (52%)
create mode 100644 12-update_baseline/results.regressions
delete mode 100644 regressions.txt
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0
[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (7478addd84a -> f883c46b487)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig
in repository toolchain/ci/gcc.
from 7478addd84a libphobos: Use libdruntime as a convenience library for libphobos.
adds ff3f862b451 Handle 'omp declare target' attribute set for both OpenACC [...]
adds 6b816a5f0ed Add 'dg-do run' to 'libgomp.fortran/target-enter-data-1.f90'
adds be9862dd969 Test cases for mixed structured/dynamic data lifetimes with [...]
adds ecc66362ee5 Fix UNRESOLVED testcase gfortran.dg/asynchronous_5.f03.
adds e26bd694c79 Fix typo in gfortran.dg/asynchronous_5.f03 from last commit.
adds 62c25d7adb1 c++: make __is_constructible work with paren-init of aggrs [...]
adds 0666767eb4c coroutines: Revise await expansions [PR94528]
adds a02558a3953 Correct PR numbers in the last Changelog.
adds 47539a4acef Daily bump.
adds a615ea71bc8 cselib: Mark the cselib_record_sp_cfa_base_equiv VALUE as p [...]
adds bb87d5cc77d testsuite: Fix up pr94482.c testcase [PR94482]
adds f883c46b487 i386: Fix REDUC_SSE_SMINMAX_MODE mode conditions.
No new revisions were added by this update.
Summary of changes:
gcc/ChangeLog | 20 +
gcc/DATESTAMP | 2 +-
gcc/config/i386/sse.md | 4 +-
gcc/cp/ChangeLog | 22 +
gcc/cp/coroutines.cc | 456 +++++++++++----------
gcc/cp/method.c | 42 +-
gcc/cselib.c | 5 +-
gcc/omp-general.c | 13 +
gcc/testsuite/ChangeLog | 40 ++
gcc/testsuite/c-c++-common/goacc-gomp/pr93465-1.c | 56 +++
gcc/testsuite/g++.dg/coroutines/pr94528.C | 64 +++
gcc/testsuite/g++.dg/cpp2a/paren-init24.C | 26 ++
gcc/testsuite/g++.dg/cpp2a/paren-init25.C | 25 ++
gcc/testsuite/g++.dg/ext/is_constructible5.C | 16 +
gcc/testsuite/gcc.dg/torture/pr94482.c | 4 +-
gcc/testsuite/gcc.target/i386/pr94494.c | 23 ++
gcc/testsuite/gfortran.dg/asynchronous_5.f03 | 22 +-
libgomp/ChangeLog | 42 ++
.../libgomp.fortran/target-enter-data-1.f90 | 2 +
.../static-dynamic-lifetimes-1-lib.c | 3 +
.../static-dynamic-lifetimes-1.c | 160 ++++++++
.../static-dynamic-lifetimes-2-lib.c | 3 +
.../static-dynamic-lifetimes-2.c | 166 ++++++++
.../static-dynamic-lifetimes-3-lib.c | 3 +
.../static-dynamic-lifetimes-3.c | 183 +++++++++
.../static-dynamic-lifetimes-4-lib.c | 3 +
.../static-dynamic-lifetimes-4.c | 64 +++
.../static-dynamic-lifetimes-5-lib.c | 3 +
.../static-dynamic-lifetimes-5.c | 56 +++
.../static-dynamic-lifetimes-6-lib.c | 3 +
.../static-dynamic-lifetimes-6.c | 42 ++
.../static-dynamic-lifetimes-7-lib.c | 3 +
.../static-dynamic-lifetimes-7.c | 42 ++
.../static-dynamic-lifetimes-8-lib.c | 3 +
.../static-dynamic-lifetimes-8.c | 47 +++
35 files changed, 1439 insertions(+), 229 deletions(-)
create mode 100644 gcc/testsuite/c-c++-common/goacc-gomp/pr93465-1.c
create mode 100644 gcc/testsuite/g++.dg/coroutines/pr94528.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/paren-init24.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/paren-init25.C
create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible5.C
create mode 100644 gcc/testsuite/gcc.target/i386/pr94494.c
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
create mode 100644 libgomp/testsuite/libgomp.oacc-c-c++-common/static-dynamic-life [...]
--
To stop receiving notification emails like this one, please contact
the administrator of this repository.
5 years
- 1
- 0