Tcwg-commits May 2020

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13142 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allmodconfig updated (38607fa02 -> 56608245f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards 38607fa02 0: update: llvm-linux: boot new 56608245f 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (38607fa02) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12660 ++++++++-------- 03-build_linux/console.log | 17856 +++++++++++----------- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 12 +- 06-update_baseline/console.log | 12 +- console.log | 30764 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 30775 insertions(+), 30765 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (2d4e1e144c2 -> 573e5f05009)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/gcc. from 2d4e1e144c2 c++: ICE when shortening right shift [PR94955] adds 489fb00b14d Daily bump. adds 864fed4a491 c++: Explain fn template argument type/value mismatches [PR66439] adds 573e5f05009 c++: Enable spec_hasher table sanitization [PR87847] No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 10 ++++++++++ gcc/cp/pt.c | 7 +++---- gcc/testsuite/ChangeLog | 9 +++++++++ gcc/testsuite/g++.dg/cpp2a/concepts-ts4.C | 2 ++ gcc/testsuite/g++.dg/cpp2a/concepts-ts6.C | 4 +++- gcc/testsuite/g++.dg/template/error56.C | 2 ++ gcc/testsuite/g++.dg/template/error59.C | 11 +++++++++++ libstdc++-v3/ChangeLog | 7 +++++++ libstdc++-v3/testsuite/20_util/pair/astuple/get_neg.cc | 1 + .../testsuite/20_util/tuple/element_access/get_neg.cc | 1 + 11 files changed, 50 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/g++.dg/template/error59.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (3ecde59918 -> 607b483327)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from 3ecde59918 Automatic date update in version.in adds 39a1432c09 win32 typo fix adds 0e1d094e96 Clear all local_symbol.lsy_flags adds 765cf5f623 Use bfd_get_filename throughout bfd adds c177f3771c Use bfd_get_filename throughout binutils adds 69f57659c3 Use bfd_get_filename throughout gas adds 607b483327 Use bfd_get_filename throughout ld No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 46 ++++++++++++++++++++++++++++++++++++++++++++++ bfd/aix5ppc-core.c | 4 ++-- bfd/aout-target.h | 3 ++- bfd/aoutx.h | 7 ++++--- bfd/archive.c | 38 ++++++++++++++++++++------------------ bfd/bfd.c | 10 +++++----- bfd/bfdio.c | 2 +- bfd/cache.c | 15 +++++++++------ bfd/ecoff.c | 2 +- bfd/ecofflink.c | 2 +- bfd/elf32-bfin.c | 10 +++++----- bfd/elf32-frv.c | 10 +++++----- bfd/elf32-hppa.c | 2 +- bfd/elf32-nds32.c | 4 ++-- bfd/elf32-spu.c | 27 ++++++++++++++------------- bfd/elf64-hppa.c | 2 +- bfd/elf64-ia64-vms.c | 2 +- bfd/elfcore.h | 4 ++-- bfd/elflink.c | 11 ++++++----- bfd/linker.c | 2 +- bfd/mach-o.c | 12 ++++++------ bfd/opncls.c | 20 ++++++++++---------- bfd/pdp11.c | 7 ++++--- bfd/plugin.c | 2 +- bfd/rs6000-core.c | 4 ++-- bfd/som.c | 2 +- bfd/srec.c | 10 +++++----- bfd/vms-lib.c | 6 +++--- bfd/xcofflink.c | 5 +++-- binutils/ChangeLog | 9 +++++++++ binutils/ar.c | 17 +++++++++-------- binutils/arsup.c | 10 +++++----- binutils/binemul.c | 2 +- binutils/coffgrok.c | 4 ++-- gas/ChangeLog | 10 ++++++++++ gas/symbols.c | 4 ++-- gas/write.c | 16 ++++++++++------ ld/ChangeLog | 15 +++++++++++++++ ld/emultempl/beos.em | 7 ++++--- ld/emultempl/pe.em | 21 +++++++++++---------- ld/emultempl/pep.em | 20 +++++++++++--------- ld/emultempl/spuelf.em | 4 ++-- ld/ldlang.c | 10 +++++----- ld/ldmain.c | 4 ++-- ld/ldmisc.c | 10 ++++++---- ld/pe-dll.c | 38 +++++++++++++++++++++----------------- ld/plugin.c | 6 +++--- 47 files changed, 292 insertions(+), 186 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (619d89e89 -> a238a5462)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 619d89e89 0: update: binutils-gcc-linux: all new a238a5462 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (619d89e89) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 106 +- 02-prepare_abe/console.log | 420 +- 03-build_abe-binutils/console.log | 11583 +++++------ 04-build_abe-stage1/console.log | 20198 +++++++++--------- 05-build_linux/console.log | 786 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 18 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 18 +- 08-update_baseline/results.regressions | 2 +- console.log | 33131 +++++++++++++++--------------- jenkins/manifest.sh | 15 +- 12 files changed, 33153 insertions(+), 33128 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (23dc948d362 -> 6c848843664)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/llvm-project. from 23dc948d362 [MLIR] Use `MLIR_INCLUDE_TESTS` to conditionally compile tests. adds 623b2542446 [Local] Do not ignore zexts in salvageDebugInfo, PR45923 adds 2084330e41d [lldb/Reproducers] Add skipIfReproducer to more tests adds 691980ebb47 [llvm][NFC] Fixed non-compliant style in InlineAdvisor.h adds 31ecef76275 [SystemZ] Don't create PERMUTE nodes with an undef operand. adds bdd8c111fc0 [IR] Revert r2694 in BasicBlock::removePredecessor adds a7cc275e7e8 Add verifier check that musttail and preallocated are not u [...] adds b7924d6525b [dsymutil] Make sure the --help output and man page are consistent adds 3c4ef745557 Fixed a typo in the comment for allocateBuffer() adds 736db2f7103 [Loads] Require Align in isSafeToLoadUnconditionally() (NFC) adds 63081dc6f64 LoadStoreVectorizer: Match nested adds to prove vectorizati [...] adds bf527a1dc41 AMDGPU/GlobalISel: Fix f64 G_FDIV lowering adds 715b7d8aa5d [mlir][vulkan-runner] Add back accidentially removed header [...] adds ef649e8fd5d Revert "[CUDA][HIP] Workaround for resolving host device fu [...] adds b27a538dda4 AMDGPU: Fix illegally constant folding from V_MOV_B32_sdwa adds cd12e79e6dd [x86] Propagate memory operands during ISel DAG postprocessing adds 3f5f8f39734 [compiler-rt][CMake] Fix PowerPC runtime build adds 47a0e9f49b9 [Sanitizers] Use getParamByValType() (NFC) adds b783f70a425 [lldb/DataFormatter] Check for overflow when finding NSDate epoch adds c9f63297e24 Fix several places that were calling verifyFunction or veri [...] adds d19265b31e6 [clangd] Avoid wasteful data structures in RefSlab::Builder adds 3e315697ac7 DAG: Use correct pointer size for llvm.ptrmask adds 50f3bb13297 [AMDGPU] Fixed selection error for 64 bit extract_subvector adds 9d7838d7816 [x86] add tests for disguised horizontal ops; NFC adds b95a542d6b6 [x86] add tests for heroic horizontal ops; NFC adds 17842025ed3 [GlobalISel] Add support for using vector values in memset [...] adds 01f9d8ce5c0 [llvm][SVE] IR intrinscs for matrix multiplication instructions. adds e2cc12e4128 [SveEmitter] Builtins for SVE matrix multiply `mmla`. adds b572d9b1a73 [llvm][sve] Intrinsics for SVE sudot and usdot instructions. adds ae989391723 GlobalISel: Fold G_MUL x, 0, and G_*DIV 0, x adds 9d69072fb80 [analyzer][NFC] Introduce CXXDeallocatorCall, deploy it in [...] adds a81f8fb78dc [gn build] Port 9d69072fb80 adds 682e739638a [LV] Fix FoldTail under user VF and UF adds 82904401e32 Map -O to -O1 instead of -O2 adds fff3a8464d4 [lldb/test] Relax NSDate mock test for non-Apple platforms adds b593bfd4d8e [clang][SveEmitter] SVE builtins for `svusdot` and `svsudot` ACLE. adds 665da596854 [AArch64][GlobalISel] Add legalizer & selector support for [...] adds e3e15836af7 [clangd] Tidy up SelectionTree dumps with newlines adds e3aa4cd9dbc [lldb/test] Disable NSDate format check under _WIN32 adds 47cc6db928d Re-land [Debug][CodeView] Emit fully qualified names for globals adds ddff9799d2d [BPF] Prevent disassembly segfault for NOP insn adds 4a69eda6f31 [PowerPC][MachineCombiner] add testcase for reassociating F [...] adds ddcb3cf213e [TargetInstrInfo] add override function setSpecialOperandAt [...] adds 9971839942f fix build failure due to commit rGddcb3cf213e8 adds 82093e8fb7d [lldb/Driver] Fix handling on positional arguments adds 8e8f1bd75a9 [BPF] Return fail if disassembled insn registers out of range adds 27b4e6931d0 [NFC] Replace MaybeAlign with Align in TargetTransformInfo. adds e7e84ff24a5 Add cet.h for writing CET-enabled assembly code adds a204f22b424 [gn build] Port e7e84ff24a5 adds a6be4d17e34 [PowerPC-QPX] adjust operands order of qpx fma instructions. adds 6c848843664 [LoopSimplify] don't separate nested loops with convergent calls No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/Selection.cpp | 23 +- clang-tools-extra/clangd/index/Ref.cpp | 40 ++- clang-tools-extra/clangd/index/Ref.h | 39 ++- clang-tools-extra/clangd/index/SymbolLocation.cpp | 16 +- clang-tools-extra/clangd/index/SymbolLocation.h | 17 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 9 + clang/include/clang/Basic/TargetBuiltins.h | 1 + clang/include/clang/Basic/arm_sve.td | 26 ++ clang/include/clang/Driver/Options.td | 2 +- clang/include/clang/Sema/Sema.h | 2 - .../StaticAnalyzer/Core/PathSensitive/CallEvent.h | 58 +++- clang/lib/CodeGen/CGBuiltin.cpp | 3 + clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Headers/CMakeLists.txt | 1 + clang/lib/Headers/cet.h | 66 ++++ clang/lib/Sema/SemaCUDA.cpp | 14 - clang/lib/Sema/SemaOverload.cpp | 143 +++------ .../Checkers/DeleteWithNonVirtualDtorChecker.cpp | 2 + .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 46 +-- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 4 +- clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp | 15 +- .../Core/ExprEngineCallAndReturn.cpp | 7 +- .../Analysis/cxx-dynamic-memory-analysis-order.cpp | 10 +- .../aarch64-sve-intrinsics/acle_sve_matmul_fp32.c | 18 ++ .../aarch64-sve-intrinsics/acle_sve_matmul_fp64.c | 18 ++ .../CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c | 32 ++ .../aarch64-sve-intrinsics/acle_sve_sudot.c | 54 ++++ .../aarch64-sve-intrinsics/acle_sve_usdot.c | 54 ++++ clang/test/CodeGen/asm-cet.S | 26 ++ .../CodeGen/builtins-systemz-zvector-constrained.c | 4 +- clang/test/CodeGen/builtins-systemz-zvector.c | 4 +- .../builtins-systemz-zvector2-constrained.c | 4 +- clang/test/CodeGen/builtins-systemz-zvector2.c | 4 +- .../builtins-systemz-zvector3-constrained.c | 4 +- clang/test/CodeGen/builtins-systemz-zvector3.c | 4 +- clang/test/CodeGen/fma-builtins-constrained.c | 8 +- clang/test/Driver/O.c | 2 +- clang/test/Driver/clang_f_opts.c | 4 +- clang/test/Driver/lto.c | 2 +- clang/test/SemaCUDA/function-overload.cu | 146 +-------- clang/unittests/StaticAnalyzer/CMakeLists.txt | 1 + clang/unittests/StaticAnalyzer/CallEventTest.cpp | 89 +++++ clang/utils/TableGen/SveEmitter.cpp | 15 +- compiler-rt/cmake/base-config-ix.cmake | 3 +- lldb/docs/man/lldb.rst | 13 +- lldb/include/lldb/DataFormatters/Mock.h | 26 ++ lldb/source/Plugins/Language/ObjC/Cocoa.cpp | 69 ++-- .../step_over_breakpoint/TestStepOverBreakpoint.py | 1 + .../deleted-executable/TestDeletedExecutable.py | 1 + .../functionalities/load_unload/TestLoadUnload.py | 1 + .../postmortem/elf-core/TestLinuxCore.py | 12 + .../postmortem/netbsd-core/TestNetBSDCore.py | 6 + lldb/test/Shell/Driver/TestNoUseColor.test | 2 +- lldb/test/Shell/Driver/TestPositionalArgs.test | 30 ++ lldb/test/Shell/SymbolFile/PDB/variables.test | 4 +- lldb/tools/driver/Driver.cpp | 20 +- lldb/unittests/DataFormatter/CMakeLists.txt | 1 + lldb/unittests/DataFormatter/MockTests.cpp | 46 +++ llvm/docs/CommandGuide/dsymutil.rst | 34 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 6 +- llvm/include/llvm/Analysis/Loads.h | 4 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 30 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 16 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 3 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 2 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 22 ++ llvm/include/llvm/Target/GlobalISel/Combine.td | 19 +- llvm/lib/Analysis/Loads.cpp | 21 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 17 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 63 ++-- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h | 4 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 14 +- llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 17 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 8 +- llvm/lib/CodeGen/WinEHPrepare.cpp | 4 +- llvm/lib/IR/BasicBlock.cpp | 18 +- llvm/lib/IR/Verifier.cpp | 3 + .../Target/AArch64/AArch64InstructionSelector.cpp | 2 + llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 2 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 16 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 26 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 8 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 11 +- llvm/lib/Target/BPF/BPFInstrInfo.td | 2 +- .../Target/BPF/Disassembler/BPFDisassembler.cpp | 8 + llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 8 + llvm/lib/Target/PowerPC/PPCInstrInfo.h | 2 + llvm/lib/Target/PowerPC/PPCInstrQPX.td | 24 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 3 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 2 + llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 3 +- llvm/lib/Transforms/IPO/Inliner.cpp | 6 +- .../Instrumentation/AddressSanitizer.cpp | 2 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 11 +- llvm/lib/Transforms/Scalar/SROA.cpp | 8 +- .../Transforms/Scalar/TailRecursionElimination.cpp | 2 +- llvm/lib/Transforms/Utils/Local.cpp | 9 +- llvm/lib/Transforms/Utils/LoopSimplify.cpp | 21 ++ .../Transforms/Vectorize/LoadStoreVectorizer.cpp | 70 +++- .../Vectorize/LoopVectorizationPlanner.h | 2 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 35 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 4 +- llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll | 149 +++++++++ .../CodeGen/AArch64/GlobalISel/inline-memset.mir | 59 +++- .../CodeGen/AArch64/GlobalISel/legalize-freeze.mir | 70 ++++ .../GlobalISel/legalizer-info-validation.mir | 5 +- .../prelegalizercombiner-trivial-arith.mir | 126 ++++++++ .../CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll | 13 + .../CodeGen/AArch64/sve-intrinsics-matmul-fp64.ll | 14 + .../CodeGen/AArch64/sve-intrinsics-matmul-int8.ll | 119 +++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir | 340 ++++++-------------- .../AMDGPU/atomic_optimizations_local_pointer.ll | 22 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 4 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 30 ++ llvm/test/CodeGen/AMDGPU/extract-subvector.ll | 172 ++++++++-- llvm/test/CodeGen/AMDGPU/ptrmask.ll | 134 ++++++++ llvm/test/CodeGen/BPF/objdump_dis_all.ll | 26 ++ llvm/test/CodeGen/BPF/objdump_nop.ll | 19 ++ llvm/test/CodeGen/PowerPC/machine-combiner.ll | 110 +++++++ llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll | 16 +- llvm/test/CodeGen/SystemZ/vec-perm-14.ll | 27 ++ .../SystemZ/vector-constrained-fp-intrinsics.ll | 6 +- llvm/test/CodeGen/X86/haddsub-shuf.ll | 171 ++++++++++ llvm/test/CodeGen/X86/haddsub-undef.ll | 41 +++ .../X86/isel-postprocessing-test-fold-memop.ll | 14 + llvm/test/DebugInfo/COFF/global-constants.ll | 191 +++++------ llvm/test/DebugInfo/COFF/global_visibility.ll | 204 ++++++------ llvm/test/DebugInfo/COFF/globals.ll | 357 +++++++++++++++++---- llvm/test/DebugInfo/COFF/types-array-unsized.ll | 59 ++-- llvm/test/DebugInfo/COFF/udts-fixpoint.ll | 80 +++++ .../test/Transforms/InstCombine/cast-mul-select.ll | 6 +- .../X86/vectorize-i8-nested-add.ll | 165 ++++++++++ llvm/test/Transforms/LoopSimplify/convergent.ll | 25 ++ .../LoopVectorize/pr45679-fold-tail-by-masking.ll | 148 +++++++++ llvm/test/Verifier/preallocated-invalid.ll | 7 + llvm/test/tools/dsymutil/cmdline.test | 54 ++-- llvm/tools/dsymutil/Options.td | 3 +- llvm/tools/llvm-as-fuzzer/llvm-as-fuzzer.cpp | 3 +- llvm/tools/llvm-split/llvm-split.cpp | 6 +- llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 1 + .../clang/unittests/StaticAnalyzer/BUILD.gn | 1 + .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 2 +- mlir/tools/mlir-vulkan-runner/CMakeLists.txt | 5 + 145 files changed, 3637 insertions(+), 1238 deletions(-) create mode 100644 clang/lib/Headers/cet.h create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c create mode 100644 clang/test/CodeGen/asm-cet.S create mode 100644 clang/unittests/StaticAnalyzer/CallEventTest.cpp create mode 100644 lldb/include/lldb/DataFormatters/Mock.h create mode 100644 lldb/test/Shell/Driver/TestPositionalArgs.test create mode 100644 lldb/unittests/DataFormatter/MockTests.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp64.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-int8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/ptrmask.ll create mode 100644 llvm/test/CodeGen/BPF/objdump_dis_all.ll create mode 100644 llvm/test/CodeGen/BPF/objdump_nop.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-perm-14.ll create mode 100644 llvm/test/CodeGen/X86/isel-postprocessing-test-fold-memop.ll create mode 100644 llvm/test/DebugInfo/COFF/udts-fixpoint.ll create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-neste [...] create mode 100644 llvm/test/Transforms/LoopSimplify/convergent.ll create mode 100644 llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (536b64065 -> 255472499)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 536b64065 0: update: llvm-linux: 16 new 255472499 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (536b64065) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 12934 +++++++++++++-------------- 03-build_linux/console.log | 816 +- 05-check_regression/console.log | 12 +- 05-check_regression/results.regressions | 20 +- 06-update_baseline/console.log | 18 +- 06-update_baseline/results.regressions | 20 +- console.log | 13987 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 9 files changed, 14023 insertions(+), 13980 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (03092f2fa7b -> 6c848843664)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from 03092f2fa7b [mlir] Add BoolArrayAttr in Tablegen + Builder support adds 5b0502dff5b [pstl] A fix for move placement-new (and destroy) allocated [...] adds 22d40cc3a72 [Analyzer][StreamChecker] Changed representation of stream [...] adds 1907f28b47c [Analyzer][StreamChecker] Fixed compile error - NFC. adds 10e2e7de0c0 [WebAssembly] iterate stack in DebugFixup from the top. adds 364c595403c [SVE] Ignore scalable vectors in InterleavedLoadCombinePass adds 36cdc17f8cf [mlir][Vector] Make minor identity permutation map optional [...] adds 1870e787af9 [mlir][Vector] Add an optional "masked" boolean array attri [...] adds 681a161ff54 AMDGPU: Remove outdated comment adds 4c70074e543 AMDGPU/GlobalISel: Fix splitting wide VALU, non-vector loads adds d1866f89472 [MLIR] [Linalg] Add option to use the partial view after pr [...] adds a4cb9bec1ca [mlir] Support optional attributes in assembly formats adds 23dc948d362 [MLIR] Use `MLIR_INCLUDE_TESTS` to conditionally compile tests. adds 623b2542446 [Local] Do not ignore zexts in salvageDebugInfo, PR45923 adds 2084330e41d [lldb/Reproducers] Add skipIfReproducer to more tests adds 691980ebb47 [llvm][NFC] Fixed non-compliant style in InlineAdvisor.h adds 31ecef76275 [SystemZ] Don't create PERMUTE nodes with an undef operand. adds bdd8c111fc0 [IR] Revert r2694 in BasicBlock::removePredecessor adds a7cc275e7e8 Add verifier check that musttail and preallocated are not u [...] adds b7924d6525b [dsymutil] Make sure the --help output and man page are consistent adds 3c4ef745557 Fixed a typo in the comment for allocateBuffer() adds 736db2f7103 [Loads] Require Align in isSafeToLoadUnconditionally() (NFC) adds 63081dc6f64 LoadStoreVectorizer: Match nested adds to prove vectorizati [...] adds bf527a1dc41 AMDGPU/GlobalISel: Fix f64 G_FDIV lowering adds 715b7d8aa5d [mlir][vulkan-runner] Add back accidentially removed header [...] adds ef649e8fd5d Revert "[CUDA][HIP] Workaround for resolving host device fu [...] adds b27a538dda4 AMDGPU: Fix illegally constant folding from V_MOV_B32_sdwa adds cd12e79e6dd [x86] Propagate memory operands during ISel DAG postprocessing adds 3f5f8f39734 [compiler-rt][CMake] Fix PowerPC runtime build adds 47a0e9f49b9 [Sanitizers] Use getParamByValType() (NFC) adds b783f70a425 [lldb/DataFormatter] Check for overflow when finding NSDate epoch adds c9f63297e24 Fix several places that were calling verifyFunction or veri [...] adds d19265b31e6 [clangd] Avoid wasteful data structures in RefSlab::Builder adds 3e315697ac7 DAG: Use correct pointer size for llvm.ptrmask adds 50f3bb13297 [AMDGPU] Fixed selection error for 64 bit extract_subvector adds 9d7838d7816 [x86] add tests for disguised horizontal ops; NFC adds b95a542d6b6 [x86] add tests for heroic horizontal ops; NFC adds 17842025ed3 [GlobalISel] Add support for using vector values in memset [...] adds 01f9d8ce5c0 [llvm][SVE] IR intrinscs for matrix multiplication instructions. adds e2cc12e4128 [SveEmitter] Builtins for SVE matrix multiply `mmla`. adds b572d9b1a73 [llvm][sve] Intrinsics for SVE sudot and usdot instructions. adds ae989391723 GlobalISel: Fold G_MUL x, 0, and G_*DIV 0, x adds 9d69072fb80 [analyzer][NFC] Introduce CXXDeallocatorCall, deploy it in [...] adds a81f8fb78dc [gn build] Port 9d69072fb80 adds 682e739638a [LV] Fix FoldTail under user VF and UF adds 82904401e32 Map -O to -O1 instead of -O2 adds fff3a8464d4 [lldb/test] Relax NSDate mock test for non-Apple platforms adds b593bfd4d8e [clang][SveEmitter] SVE builtins for `svusdot` and `svsudot` ACLE. adds 665da596854 [AArch64][GlobalISel] Add legalizer & selector support for [...] adds e3e15836af7 [clangd] Tidy up SelectionTree dumps with newlines adds e3aa4cd9dbc [lldb/test] Disable NSDate format check under _WIN32 adds 47cc6db928d Re-land [Debug][CodeView] Emit fully qualified names for globals adds ddff9799d2d [BPF] Prevent disassembly segfault for NOP insn adds 4a69eda6f31 [PowerPC][MachineCombiner] add testcase for reassociating F [...] adds ddcb3cf213e [TargetInstrInfo] add override function setSpecialOperandAt [...] adds 9971839942f fix build failure due to commit rGddcb3cf213e8 adds 82093e8fb7d [lldb/Driver] Fix handling on positional arguments adds 8e8f1bd75a9 [BPF] Return fail if disassembled insn registers out of range adds 27b4e6931d0 [NFC] Replace MaybeAlign with Align in TargetTransformInfo. adds e7e84ff24a5 Add cet.h for writing CET-enabled assembly code adds a204f22b424 [gn build] Port e7e84ff24a5 adds a6be4d17e34 [PowerPC-QPX] adjust operands order of qpx fma instructions. new 6c848843664 [LoopSimplify] don't separate nested loops with convergent calls The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/Selection.cpp | 23 +- clang-tools-extra/clangd/index/Ref.cpp | 40 ++- clang-tools-extra/clangd/index/Ref.h | 39 ++- clang-tools-extra/clangd/index/SymbolLocation.cpp | 16 +- clang-tools-extra/clangd/index/SymbolLocation.h | 17 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 9 + clang/include/clang/Basic/TargetBuiltins.h | 1 + clang/include/clang/Basic/arm_sve.td | 26 ++ clang/include/clang/Driver/Options.td | 2 +- clang/include/clang/Sema/Sema.h | 2 - .../StaticAnalyzer/Core/PathSensitive/CallEvent.h | 58 +++- clang/lib/CodeGen/CGBuiltin.cpp | 3 + clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Headers/CMakeLists.txt | 1 + clang/lib/Headers/cet.h | 66 ++++ clang/lib/Sema/SemaCUDA.cpp | 14 - clang/lib/Sema/SemaOverload.cpp | 143 +++------ .../Checkers/DeleteWithNonVirtualDtorChecker.cpp | 2 + .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 46 +-- .../lib/StaticAnalyzer/Checkers/StreamChecker.cpp | 252 +++++++-------- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 4 +- clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp | 15 +- .../Core/ExprEngineCallAndReturn.cpp | 7 +- .../Analysis/cxx-dynamic-memory-analysis-order.cpp | 10 +- .../aarch64-sve-intrinsics/acle_sve_matmul_fp32.c | 18 ++ .../aarch64-sve-intrinsics/acle_sve_matmul_fp64.c | 18 ++ .../CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c | 32 ++ .../aarch64-sve-intrinsics/acle_sve_sudot.c | 54 ++++ .../aarch64-sve-intrinsics/acle_sve_usdot.c | 54 ++++ clang/test/CodeGen/asm-cet.S | 26 ++ .../CodeGen/builtins-systemz-zvector-constrained.c | 4 +- clang/test/CodeGen/builtins-systemz-zvector.c | 4 +- .../builtins-systemz-zvector2-constrained.c | 4 +- clang/test/CodeGen/builtins-systemz-zvector2.c | 4 +- .../builtins-systemz-zvector3-constrained.c | 4 +- clang/test/CodeGen/builtins-systemz-zvector3.c | 4 +- clang/test/CodeGen/fma-builtins-constrained.c | 8 +- clang/test/Driver/O.c | 2 +- clang/test/Driver/clang_f_opts.c | 4 +- clang/test/Driver/lto.c | 2 +- clang/test/SemaCUDA/function-overload.cu | 146 +-------- clang/unittests/StaticAnalyzer/CMakeLists.txt | 1 + clang/unittests/StaticAnalyzer/CallEventTest.cpp | 89 +++++ clang/utils/TableGen/SveEmitter.cpp | 15 +- compiler-rt/cmake/base-config-ix.cmake | 3 +- lldb/docs/man/lldb.rst | 13 +- lldb/include/lldb/DataFormatters/Mock.h | 26 ++ lldb/source/Plugins/Language/ObjC/Cocoa.cpp | 69 ++-- .../step_over_breakpoint/TestStepOverBreakpoint.py | 1 + .../deleted-executable/TestDeletedExecutable.py | 1 + .../functionalities/load_unload/TestLoadUnload.py | 1 + .../postmortem/elf-core/TestLinuxCore.py | 12 + .../postmortem/netbsd-core/TestNetBSDCore.py | 6 + lldb/test/Shell/Driver/TestNoUseColor.test | 2 +- lldb/test/Shell/Driver/TestPositionalArgs.test | 30 ++ lldb/test/Shell/SymbolFile/PDB/variables.test | 4 +- lldb/tools/driver/Driver.cpp | 20 +- lldb/unittests/DataFormatter/CMakeLists.txt | 1 + lldb/unittests/DataFormatter/MockTests.cpp | 46 +++ llvm/docs/CommandGuide/dsymutil.rst | 34 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 6 +- llvm/include/llvm/Analysis/Loads.h | 4 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 30 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 16 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 3 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 2 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 22 ++ llvm/include/llvm/Target/GlobalISel/Combine.td | 19 +- llvm/lib/Analysis/Loads.cpp | 21 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 17 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 63 ++-- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h | 4 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 14 +- llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp | 17 +- llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 17 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 8 +- llvm/lib/CodeGen/WinEHPrepare.cpp | 4 +- llvm/lib/IR/BasicBlock.cpp | 18 +- llvm/lib/IR/Verifier.cpp | 3 + .../Target/AArch64/AArch64InstructionSelector.cpp | 2 + llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 2 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 16 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 26 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 8 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 15 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 - llvm/lib/Target/AMDGPU/VOP1Instructions.td | 11 +- llvm/lib/Target/BPF/BPFInstrInfo.td | 2 +- .../Target/BPF/Disassembler/BPFDisassembler.cpp | 8 + llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 8 + llvm/lib/Target/PowerPC/PPCInstrInfo.h | 2 + llvm/lib/Target/PowerPC/PPCInstrQPX.td | 24 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 3 +- .../Target/WebAssembly/WebAssemblyDebugFixup.cpp | 5 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 2 + llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 3 +- llvm/lib/Transforms/IPO/Inliner.cpp | 6 +- .../Instrumentation/AddressSanitizer.cpp | 2 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 11 +- llvm/lib/Transforms/Scalar/SROA.cpp | 8 +- .../Transforms/Scalar/TailRecursionElimination.cpp | 2 +- llvm/lib/Transforms/Utils/Local.cpp | 9 +- llvm/lib/Transforms/Utils/LoopSimplify.cpp | 21 ++ .../Transforms/Vectorize/LoadStoreVectorizer.cpp | 70 +++- .../Vectorize/LoopVectorizationPlanner.h | 2 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 35 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 4 +- llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll | 149 +++++++++ .../CodeGen/AArch64/GlobalISel/inline-memset.mir | 59 +++- .../CodeGen/AArch64/GlobalISel/legalize-freeze.mir | 70 ++++ .../GlobalISel/legalizer-info-validation.mir | 5 +- .../prelegalizercombiner-trivial-arith.mir | 126 ++++++++ .../CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll | 13 + .../CodeGen/AArch64/sve-intrinsics-matmul-fp64.ll | 14 + .../CodeGen/AArch64/sve-intrinsics-matmul-int8.ll | 119 +++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir | 340 ++++++-------------- .../AMDGPU/GlobalISel/regbankselect-load.mir | 320 +++++++++++------- .../AMDGPU/atomic_optimizations_local_pointer.ll | 22 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 4 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 30 ++ llvm/test/CodeGen/AMDGPU/extract-subvector.ll | 172 ++++++++-- llvm/test/CodeGen/AMDGPU/ptrmask.ll | 134 ++++++++ llvm/test/CodeGen/BPF/objdump_dis_all.ll | 26 ++ llvm/test/CodeGen/BPF/objdump_nop.ll | 19 ++ llvm/test/CodeGen/PowerPC/machine-combiner.ll | 110 +++++++ llvm/test/CodeGen/PowerPC/qpx-qvfmadd.ll | 16 +- llvm/test/CodeGen/SystemZ/vec-perm-14.ll | 27 ++ .../SystemZ/vector-constrained-fp-intrinsics.ll | 6 +- llvm/test/CodeGen/X86/haddsub-shuf.ll | 171 ++++++++++ llvm/test/CodeGen/X86/haddsub-undef.ll | 41 +++ .../X86/isel-postprocessing-test-fold-memop.ll | 14 + llvm/test/DebugInfo/COFF/global-constants.ll | 191 +++++------ llvm/test/DebugInfo/COFF/global_visibility.ll | 204 ++++++------ llvm/test/DebugInfo/COFF/globals.ll | 357 +++++++++++++++++---- llvm/test/DebugInfo/COFF/types-array-unsized.ll | 59 ++-- llvm/test/DebugInfo/COFF/udts-fixpoint.ll | 80 +++++ .../test/Transforms/InstCombine/cast-mul-select.ll | 6 +- .../X86/vectorize-i8-nested-add.ll | 165 ++++++++++ llvm/test/Transforms/LoopSimplify/convergent.ll | 25 ++ .../LoopVectorize/pr45679-fold-tail-by-masking.ll | 148 +++++++++ llvm/test/Verifier/preallocated-invalid.ll | 7 + llvm/test/tools/dsymutil/cmdline.test | 54 ++-- llvm/tools/dsymutil/Options.td | 3 +- llvm/tools/llvm-as-fuzzer/llvm-as-fuzzer.cpp | 3 +- llvm/tools/llvm-split/llvm-split.cpp | 6 +- llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 1 + .../clang/unittests/StaticAnalyzer/BUILD.gn | 1 + mlir/CMakeLists.txt | 11 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 23 ++ mlir/include/mlir/Dialect/Vector/EDSC/Intrinsics.h | 3 + mlir/include/mlir/Dialect/Vector/VectorOps.h | 9 + mlir/include/mlir/Dialect/Vector/VectorOps.td | 141 +++++--- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 2 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 69 ++-- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 65 ++-- .../Dialect/Affine/Transforms/SuperVectorize.cpp | 8 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 30 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 169 ++++++++-- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 10 +- .../AffineToStandard/lower-affine-to-vector.mlir | 18 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 18 ++ .../Conversion/VectorToLoops/vector-to-loops.mlir | 35 +- .../Affine/SuperVectorize/vectorize_1d.mlir | 47 ++- .../Affine/SuperVectorize/vectorize_2d.mlir | 20 +- .../Affine/SuperVectorize/vectorize_3d.mlir | 2 +- mlir/test/Dialect/Linalg/promote.mlir | 15 +- mlir/test/Dialect/Vector/invalid.mlir | 69 +++- mlir/test/Dialect/Vector/ops.mlir | 8 +- mlir/test/Dialect/Vector/vector-transforms.mlir | 32 +- mlir/test/lib/Dialect/Test/TestOps.td | 8 +- mlir/test/lib/Transforms/TestLinalgTransforms.cpp | 16 +- mlir/test/mlir-tblgen/op-format.mlir | 7 + mlir/tools/mlir-opt/CMakeLists.txt | 18 +- mlir/tools/mlir-opt/mlir-opt.cpp | 4 + mlir/tools/mlir-tblgen/OpFormatGen.cpp | 10 +- mlir/tools/mlir-vulkan-runner/CMakeLists.txt | 5 + pstl/include/pstl/internal/algorithm_impl.h | 120 +++++-- pstl/include/pstl/internal/memory_impl.h | 67 +++- .../include/pstl/internal/parallel_backend_utils.h | 118 +++++++ .../algorithms/alg.merge/inplace_merge.pass.cpp | 7 + .../alg.modifying.operations/remove.pass.cpp | 7 + .../alg.modifying.operations/rotate.pass.cpp | 3 + .../alg.modifying.operations/unique.pass.cpp | 6 + .../alg.sorting/alg.set.operations/set.pass.cpp | 151 ++++++++- .../alg.sorting/partial_sort_copy.pass.cpp | 5 + pstl/test/support/utils.h | 76 +++++ 188 files changed, 5111 insertions(+), 1805 deletions(-) create mode 100644 clang/lib/Headers/cet.h create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c create mode 100644 clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c create mode 100644 clang/test/CodeGen/asm-cet.S create mode 100644 clang/unittests/StaticAnalyzer/CallEventTest.cpp create mode 100644 lldb/include/lldb/DataFormatters/Mock.h create mode 100644 lldb/test/Shell/Driver/TestPositionalArgs.test create mode 100644 lldb/unittests/DataFormatter/MockTests.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp64.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-int8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/ptrmask.ll create mode 100644 llvm/test/CodeGen/BPF/objdump_dis_all.ll create mode 100644 llvm/test/CodeGen/BPF/objdump_nop.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-perm-14.ll create mode 100644 llvm/test/CodeGen/X86/isel-postprocessing-test-fold-memop.ll create mode 100644 llvm/test/DebugInfo/COFF/udts-fixpoint.ll create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-neste [...] create mode 100644 llvm/test/Transforms/LoopSimplify/convergent.ll create mode 100644 llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (39eab8988 -> 7eaaf7b02)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 39eab8988 0: update: llvm-linux: all new 7eaaf7b02 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (39eab8988) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 12892 +++++++++++++++++------------------ 03-build_linux/console.log | 780 +-- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 12 +- 06-update_baseline/console.log | 10 +- console.log | 13862 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 13869 insertions(+), 13867 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig updated (eaae6dfc545 -> 4b2f37b2202)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig in repository toolchain/ci/llvm-project. from eaae6dfc545 [CodeGen] fix inline builtin-related breakage from D78162 adds aba4e3fa3bd [lldb] [PECOFF] Only use PECallFrameInfo on the one support [...] adds 964da818556 PR45350: Handle unsized array CXXConstructExprs in constant [...] adds bf1f5caf202 CET for Exception Handle adds 4a89d0de5e9 Enable IBT(Indirect Branch Tracking) in JIT with CET(Contro [...] adds bace7beb530 Backport 4878aa36d4a [ValueLattice] Add new state for undef [...] adds d9160ff3e92 [globalopt] Don't emit DWARF fragments for members of a str [...] new 4b2f37b2202 [clang] fix undefined behaviour in RawComment::getFormattedText() The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/lib/AST/ExprConstant.cpp | 23 +- clang/lib/AST/RawCommentList.cpp | 2 +- clang/test/SemaCXX/constant-expression-cxx2a.cpp | 20 ++ .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 3 + llvm/include/llvm/Analysis/ValueLattice.h | 162 +++++---- llvm/lib/Analysis/LazyValueInfo.cpp | 12 +- llvm/lib/Analysis/ValueLattice.cpp | 6 +- llvm/lib/Target/X86/X86IndirectBranchTracking.cpp | 34 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- llvm/lib/Target/X86/X86TargetMachine.h | 4 + llvm/lib/Transforms/IPO/GlobalOpt.cpp | 16 +- .../X86/indirect-branch-tracking-cm-lager.ll | 36 ++ .../CodeGen/X86/indirect-branch-tracking-eh.ll | 31 ++ .../Generic/global-sra-struct-zero-length.ll | 69 ++++ .../merge-range-and-undef.ll | 299 ++++++++++++++++ llvm/test/Transforms/JumpThreading/ne-undef.ll | 61 ++++ llvm/test/Transforms/SCCP/float-phis.ll | 26 ++ llvm/test/Transforms/SCCP/int-phis.ll | 61 ++++ llvm/test/Transforms/SCCP/range-and-ip.ll | 47 +++ llvm/test/Transforms/SCCP/range-and.ll | 395 +++++++++++++++++++++ llvm/unittests/Analysis/ValueLatticeTest.cpp | 17 + 21 files changed, 1241 insertions(+), 85 deletions(-) create mode 100644 llvm/test/CodeGen/X86/indirect-branch-tracking-cm-lager.ll create mode 100644 llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll create mode 100644 llvm/test/DebugInfo/Generic/global-sra-struct-zero-length.ll create mode 100644 llvm/test/Transforms/CorrelatedValuePropagation/merge-range-and [...] create mode 100644 llvm/test/Transforms/JumpThreading/ne-undef.ll create mode 100644 llvm/test/Transforms/SCCP/float-phis.ll create mode 100644 llvm/test/Transforms/SCCP/int-phis.ll create mode 100644 llvm/test/Transforms/SCCP/range-and-ip.ll create mode 100644 llvm/test/Transforms/SCCP/range-and.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig updated (92e266a2c -> ff3557280)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards 92e266a2c 0: update: llvm-linux: 18628 new ff3557280 0: update: llvm-linux: 18628 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (92e266a2c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 171 +- 02-build_llvm/console.log | 12550 ++++++++++++++-------------- 03-build_linux/console.log | 718 +- 05-check_regression/console.log | 12 +- 05-check_regression/results.regressions | 2 +- 06-update_baseline/console.log | 12 +- 06-update_baseline/results.regressions | 2 +- console.log | 13463 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 9 files changed, 13467 insertions(+), 13475 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits May 2020