Tcwg-commits May 2020

tcwg-commits@lists.linaro.org

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13142 discussions

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig updated (533f049e00 -> ba311c5b10)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig in repository toolchain/ci/binutils-gdb. from 533f049e00 [PATCH] bfd: Fix 64-bit relocation handling for a.out adds 1b59ca1cf1 [gdb/testsuite] Fix tcl error in jit-elf-helpers.exp adds c7c6634180 [gdb/testsuite] Fix incorrect string concat in jit-elf.exp adds 02ff80c296 gdb: make two objfile functions return bool adds 843f4d9357 gdb/testsuite: Disable path and duplicate checks when parall [...] adds 09f20ec886 Automatic date update in version.in adds 90d00bbd9c Sync config and libiberty with GCC adds ba311c5b10 Have the linker's help text include the default setting of t [...] No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- config/ChangeLog | 9 +++++++++ config/cet.m4 | 18 ++++++++++++------ gdb/ChangeLog | 7 +++++++ gdb/objfiles.c | 19 ++++++++++--------- gdb/objfiles.h | 9 ++++++--- gdb/testsuite/ChangeLog | 14 ++++++++++++++ gdb/testsuite/gdb.base/jit-elf.exp | 5 +++-- gdb/testsuite/lib/check-test-names.exp | 20 ++++++++++++++++++++ gdb/testsuite/lib/jit-elf-helpers.exp | 20 ++++++++++++-------- ld/ChangeLog | 6 ++++++ ld/lexsup.c | 19 ++++++++++++++++++- libiberty/ChangeLog | 5 +++++ libiberty/configure | 12 +++++++++--- 14 files changed, 132 insertions(+), 33 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig updated (29c53cf5 -> 01a1ee9a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 29c53cf5 0: update: binutils-gcc-linux: boot new 01a1ee9a 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (29c53cf5) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 120 +- 02-prepare_abe/console.log | 120 +- 03-build_abe-binutils/console.log | 11636 ++++++------- 04-build_abe-stage1/console.log | 15567 ++++++++--------- 05-build_linux/console.log | 552 +- 06-boot_linux/console.log | 4 +- 07-check_regression/console.log | 8 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 2 +- 08-update_baseline/results.regressions | 2 +- console.log | 28065 +++++++++++++++--------------- jenkins/manifest.sh | 16 +- 12 files changed, 28074 insertions(+), 28020 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-defconfig updated (24f74ecc -> f41f4884)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 24f74ecc 0: update: llvm-linux: boot new f41f4884 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (24f74ecc) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 154 +- 02-build_llvm/console.log | 12570 +++++++++++++++++----------------- 03-build_linux/console.log | 792 +-- 04-boot_linux/console.log | 480 +- 05-check_regression/console.log | 16 +- 06-update_baseline/console.log | 8 +- console.log | 14020 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 14023 insertions(+), 14025 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allnoconfig updated (370b9417 -> 2dfc730e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 370b9417 0: update: llvm-linux: all new 2dfc730e 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (370b9417) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12634 +++++++++++++++++------------------ 03-build_linux/console.log | 628 +- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 12 +- 06-update_baseline/console.log | 12 +- console.log | 13534 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13503 insertions(+), 13547 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allmodconfig updated (152036d1379f -> 24085f70a6e1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allmodconfig in repository toolchain/ci/linux. from 152036d1379f Merge tag 'nfsd-5.7-rc-2' of git://git.linux-nfs.org/proje [...] adds ac9155842829 gfs2: fix withdraw sequence deadlock adds a8b7528b69d4 gfs2: Fix error exit in do_xmote adds 53af80ce0eae gfs2: Fix BUG during unmount after file system withdraw adds d22f69a08dcb gfs2: Fix use-after-free in gfs2_logd after withdraw adds 566a2ab3c900 gfs2: Another gfs2_walk_metadata fix adds aa83da7f47b2 gfs2: More gfs2_find_jhead fixes adds 2297ab6144c2 gfs2: Fix problems regarding gfs2_qa_get and _put adds f9615fe3113f gfs2: Change BUG_ON to an assert_withdraw in gfs2_quota_change adds e6ce26e571a8 gfs2: remove check for quotas on in gfs2_quota_check adds 4ed0c30811cb gfs2: move privileged user check to gfs2_quota_lock_check adds c9cb9e381985 gfs2: don't call quota_unhold if quotas are not locked adds f4e2f5e1a527 gfs2: Grab glock reference sooner in gfs2_add_revoke adds b11e1a84f370 gfs2: If go_sync returns error, withdraw but skip invalidate adds b14c94908b1b Revert "gfs2: Don't demote a glock until its revokes are written" adds e719340f46bd Merge tag 'gfs2-v5.7-rc1.fixes' of git://git.kernel.org/pu [...] adds dc87f6dd058a gpio: pca953x: Fix pca953x_gpio_set_config adds 4e1541593017 gpiolib: improve the robustness of watch/unwatch ioctl() adds 6409d049ce28 gpiolib: don't call sleeping functions with a spinlock taken adds 8312d50b3f94 Merge tag 'gpio-fixes-for-v5.7-rc3' of git://git.kernel.or [...] adds 8650b6099da5 gpio: of: Build fails if CONFIG_OF_DYNAMIC enabled without [...] adds 0cf253eed5d2 gpio: tegra: mask GPIO IRQs during IRQ shutdown adds 8ec91c0fce15 Merge tag 'gpio-v5.7-2' of git://git.kernel.org/pub/scm/li [...] adds 9d82ccda2bc5 tools/bootconfig: Fix apply_xbc() to return zero on success adds 8b1fac2e73e8 tracing: Wait for preempt irq delay thread to execute adds 611d0a95d46b bootconfig: Fix to prevent warning message if no bootconfi [...] adds 24085f70a6e1 Merge tag 'trace-v5.7-rc4' of git://git.kernel.org/pub/scm [...] No new revisions were added by this update. Summary of changes: drivers/gpio/gpio-pca953x.c | 2 +- drivers/gpio/gpio-tegra.c | 1 + drivers/gpio/gpiolib.c | 34 +++++++++++++++++++++++++++++----- fs/gfs2/bmap.c | 16 +++++++++------- fs/gfs2/glock.c | 6 ++---- fs/gfs2/inode.c | 7 ++++--- fs/gfs2/log.c | 11 ++++++++--- fs/gfs2/lops.c | 19 ++++++++++++------- fs/gfs2/meta_io.c | 2 +- fs/gfs2/quota.c | 13 +++++-------- fs/gfs2/quota.h | 3 ++- fs/gfs2/super.c | 1 - fs/gfs2/util.c | 10 ++++++---- init/main.c | 10 ++++++---- kernel/trace/preemptirq_delay_test.c | 12 ++++++++++-- tools/bootconfig/main.c | 1 + 16 files changed, 97 insertions(+), 51 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allmodconfig updated (c85740ee -> 05be0dd5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards c85740ee 0: update: llvm-linux: all new 05be0dd5 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c85740ee) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-build_llvm/console.log | 12574 +++++++++++++++++------------------ 03-build_linux/console.log | 628 +- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 13374 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 13342 insertions(+), 13382 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig updated (ce195fb22b5 -> e16111ce2fc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig in repository toolchain/ci/llvm-project. from ce195fb22b5 [libcxx] Re-commit: shared_ptr changes from library fundame [...] adds aa99da5ace4 Avoid binding pointers to "auto&" (by dereferencing the poi [...] adds d9166ad2728 [lldb/Driver] Support terminal resizing adds 661b234cbcf [MLIR] Rename SideEffects.td -> SideEffectInterfaces.td adds 11c8c2a551c [analyzer] SATestBuild.py: Fix support for #NOPREFIX. adds 7a17f3ccd10 [MLIR] Fix dependencies for Analysis libraries adds 6c29073efb0 PR45589: Properly decompose overloaded `&&` and `||` operat [...] adds 32f5ee830b0 [Attributor] Fixup block addresses after rewriting function [...] adds 363393c4b35 [libc++abi] Adjust XFAIL on macOS for bug that was fixed in [...] adds 66055230bf6 [TargetLoweringObjectFileImpl] Produce .text.hot. instead o [...] adds aa1eb5152d9 [X86][ISelLowering] refactor Varargs handling in X86ISelLow [...] adds 59ba19c56e1 [VirtualFileSystem] Add unit test that showcases YAMLVFSWriter bug adds 58bc507b6fe [VirtualFileSystem] Add unit test that showcases another YA [...] adds 56926ae0faa [SampleFDO] Rename llvm-profdata flag -partial-profile to - [...] adds 293c6d38212 Fix buildbots after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f. adds 0138cc01250 PowerPC: Treat llvm.fma.f* intrinsic as using CTR with SPE adds 1c44430e738 Fix buildbots #2 after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f. adds 99d60a1d0b3 [GlobalISel] Assign the correct location when combining G_SEXT. adds 473bdaf2e81 [mlir] Move Conversion/StandardToStandard to Dialect/Standa [...] adds a9e85626514 [GIsel] Update a comment and make it more precise. adds f490ca76b0e [x86][CGP] enable target hook to sink funnel shift intrinsi [...] adds 759465ee34c [YAMLVFSWriter] Fix for delimiters adds 452e2fc409d Revert of Revert of [mlir][shape] Tidy up shape.shape_of adds ab22f71dd75 [lldb/Reproducers] Also record directories FileSystem::Collect. adds 71ed66d97fd [AMDGPU] Make v4i64/v4f64/v8i64/v8f64 legal adds 2c861e8a121 [libc++][test] Properly mark libc++-only XFAILs adds e17a47b2d35 [libc][Obvious] Fix deps of few threads targets. adds 759bae956ab [lld-macho] Ignore -platform_version and -syslibroot flags. adds cb22ab74035 Add nomerge function attribute to supress tail merge optimi [...] adds 63c0e72b2f8 [mlir] Revisit std.subview handling of static information. adds 0796b170fb3 Fix error in TestNumThreads.py when frame.GetFunctionName r [...] adds d3eb51f0626 [ValueTracking] Fix crash in isGuaranteedNotToBeUndefOrPois [...] adds 96282b1a0c4 test commit adds 8aa2266fd8d [libcxx] Constrain function assignment operator (2574). adds af48351cc8f [Attributor][FIX] Stabilize the state of AAReturnedValues e [...] adds 302c492cc5d [LLDB] Fix minidebuginfo-set-and-hit-breakpoint.test for ar [...] adds fb2c4d50f14 [mlir] [VectorOps] Implement vector.constant_mask lowering [...] adds 6805a77eb66 [LLDB] Mark some xfails for arm-linux adds 67087a7b765 [LLDB] Fix typo in xfail decorator assert.test adds 272bc25bc14 [LoopReroll] Fix rerolling loop with use outside the loop adds 7d4167430c4 [gcov] Fix simultaneous .gcda creation/lock adds 085234bedc3 [cmake] Update creation of object library dependencies for [...] adds 782a4dd1a47 [PowerPC] Use add instead of addReg in ppc-early-ret pass adds d2a95698501 [mlir][Linalg] Allow reshapes to collapse to a zero-rank tensor. adds 5440d0a12d7 [mlir][Linalg] Add folders and canonicalizers for linalg.re [...] adds e9753822b5a [PowerPC] Respect SDNodeFlags in lowering SELECT_CC adds 49e6c191004 [mlir][StandardToLLVM] Add SinOp to LLVM dialect and loweri [...] adds 6bbad7285c4 [CostModel] Modify BasicTTI getCastInstrCost adds 8ffe8891cd5 [PowerPC] Exploit VSX neg, abs and nabs for f32 adds ad60ff70eb5 [NFC] Code cleanup in TargetInfo.cpp adds eef95f2746c [BrachProbablityInfo] Set edge probabilities at once. NFC. adds e59744fd9b4 [DebugInfo] Fortran module DebugInfo support in LLVM adds 678bd84c4df [DebugInfo] Fixes windows bot failure due to a test failure adds 524457edbc3 [mips] Fix typo in FileCheck directives - replace \0xa0 cha [...] adds cac6a26f381 [TableGen] Fix register class handling in TableGen's DAG IS [...] adds 2866c6cad47 [NFC] [PowerPC] Narrow fast-math flags in tests adds e25a2601aaa [libc++] [LWG3321] Mark "year_month_day_last::day() specifi [...] adds 855f0ce79bf [analyzer] Fix crash for non-pointers annotated as nonnull adds f8972662bc3 [examples] Skip building the Bye pass plugin on windows adds 1febe289827 [libcxx testing] Remove ALLOW_RETRIES from wait_for futures test new e16111ce2fc [lldb] Also recognize DWARF UTF base types using their size The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/include/clang/Sema/Sema.h | 7 +- clang/lib/CodeGen/TargetInfo.cpp | 4 +- clang/lib/Sema/SemaConcept.cpp | 121 ++-- clang/lib/Sema/SemaExpr.cpp | 5 - .../Checkers/NonNullParamChecker.cpp | 8 +- clang/test/Analysis/UserNullabilityAnnotations.m | 13 + clang/test/SemaTemplate/constraints.cpp | 26 + clang/utils/analyzer/SATestBuild.py | 5 +- compiler-rt/lib/profile/GCDAProfiling.c | 23 +- .../profile/Posix/instrprof-gcov-parallel.test | 2 - flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- libc/src/threads/linux/CMakeLists.txt | 2 +- libc/test/src/threads/CMakeLists.txt | 4 - libcxx/include/chrono | 2 + libcxx/include/functional | 2 +- libcxx/test/std/strings/c.strings/cuchar.pass.cpp | 2 +- .../futures.shared_future/wait_for.pass.cpp | 158 +++-- .../func.search/func.search.bm/default.pass.cpp | 2 +- .../func.search/func.search.bm/hash.pass.cpp | 2 +- .../func.search/func.search.bm/hash.pred.pass.cpp | 2 +- .../func.search/func.search.bm/pred.pass.cpp | 2 +- .../func.search/func.search.bmh/default.pass.cpp | 2 +- .../func.search/func.search.bmh/hash.pass.cpp | 2 +- .../func.search/func.search.bmh/hash.pred.pass.cpp | 2 +- .../func.search/func.search.bmh/pred.pass.cpp | 2 +- .../func.wrap.func.con/F_assign.pass.cpp | 20 + libcxx/www/cxx1z_status.html | 2 +- libcxx/www/cxx2a_status.html | 2 +- .../test/thread_local_destruction_order.pass.cpp | 17 +- lld/MachO/Driver.cpp | 20 +- lld/MachO/Options.td | 2 + lld/test/MachO/platform-version.test | 16 + lld/test/MachO/silent-ignore.test | 3 +- lldb/include/lldb/Core/IOHandler.h | 4 + lldb/include/lldb/Host/Editline.h | 17 +- lldb/source/Core/Debugger.cpp | 3 + lldb/source/Core/IOHandler.cpp | 6 + lldb/source/Host/common/Editline.cpp | 51 +- lldb/source/Host/common/FileSystem.cpp | 8 +- .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp | 25 +- .../load_using_paths/TestLoadUsingPaths.py | 1 + .../thread/num_threads/TestNumThreads.py | 2 + .../API/iohandler/resize/TestIOHandlerResize.py | 36 ++ lldb/test/API/python_api/thread/TestThreadAPI.py | 1 + .../ELF/minidebuginfo-set-and-hit-breakpoint.test | 2 +- lldb/test/Shell/Recognizer/assert.test | 1 + .../DWARF/DW_TAG_basic_type_DW_ATE_UTF_nonC.ll | 82 +++ llvm/cmake/modules/AddLLVM.cmake | 3 +- llvm/docs/LangRef.rst | 8 + llvm/examples/Bye/CMakeLists.txt | 22 +- llvm/include/llvm/Analysis/BranchProbabilityInfo.h | 10 + .../llvm/Analysis/TargetTransformInfoImpl.h | 7 +- llvm/include/llvm/Bitcode/LLVMBitCodes.h | 1 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 15 +- .../GlobalISel/LegalizationArtifactCombiner.h | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 7 +- llvm/include/llvm/IR/Attributes.td | 3 + llvm/include/llvm/IR/DIBuilder.h | 9 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 72 ++- llvm/include/llvm/IR/InstrTypes.h | 3 + llvm/lib/Analysis/BranchProbabilityInfo.cpp | 99 ++-- llvm/lib/Analysis/ValueTracking.cpp | 7 +- llvm/lib/AsmParser/LLLexer.cpp | 1 + llvm/lib/AsmParser/LLParser.cpp | 18 +- llvm/lib/AsmParser/LLToken.h | 1 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 2 + llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 14 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 3 + llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 16 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 5 + llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 8 +- llvm/lib/IR/AsmWriter.cpp | 2 + llvm/lib/IR/Attributes.cpp | 2 + llvm/lib/IR/DIBuilder.cpp | 8 +- llvm/lib/IR/DebugInfoMetadata.cpp | 18 +- llvm/lib/IR/LLVMContextImpl.h | 19 +- llvm/lib/IR/Verifier.cpp | 1 + llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 26 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 39 ++ llvm/lib/Target/AMDGPU/SIInstructions.td | 21 + llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 20 +- llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp | 6 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 10 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 18 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 380 +++++++----- llvm/lib/Target/X86/X86ISelLowering.h | 5 + llvm/lib/Transforms/IPO/Attributor.cpp | 8 + llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 46 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopRerollPass.cpp | 6 + llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp | 4 +- llvm/lib/Transforms/Utils/CodeExtractor.cpp | 13 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 11 +- llvm/test/Analysis/CostModel/AArch64/cast.ll | 10 +- llvm/test/Analysis/CostModel/ARM/cast.ll | 58 +- .../CostModel/X86/masked-intrinsic-cost.ll | 2 +- llvm/test/Assembler/dimodule.ll | 4 +- llvm/test/Bitcode/DIModule-clang-module.ll | 22 + llvm/test/Bitcode/DIModule-clang-module.ll.bc | Bin 0 -> 1580 bytes llvm/test/Bitcode/DIModule-fortran-module.ll | 34 ++ llvm/test/Bitcode/DIModule-fortran-module.ll.bc | Bin 0 -> 1948 bytes llvm/test/CMakeLists.txt | 6 +- .../AArch64/GlobalISel/combine-ext-debugloc.mir | 2 +- .../AArch64/GlobalISel/combine-sext-debugloc.mir | 50 ++ llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 204 ++++--- llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll | 36 +- llvm/test/CodeGen/AMDGPU/idot2.ll | 110 ++-- llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll | 41 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 148 ++--- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll | 22 +- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 22 +- llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 22 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 76 ++- llvm/test/CodeGen/AMDGPU/saddo.ll | 354 +++++------ llvm/test/CodeGen/AMDGPU/select.f16.ll | 368 ++++++------ llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 32 +- llvm/test/CodeGen/AMDGPU/shift-i128.ll | 456 +++++++-------- llvm/test/CodeGen/AMDGPU/shift-i64-opts.ll | 10 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 98 ++-- llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll | 22 +- llvm/test/CodeGen/PowerPC/combine-fneg.ll | 4 +- llvm/test/CodeGen/PowerPC/early-ret-verify.mir | 4 +- llvm/test/CodeGen/PowerPC/early-ret.mir | 14 +- llvm/test/CodeGen/PowerPC/fdiv.ll | 2 +- llvm/test/CodeGen/PowerPC/float-logic-ops.ll | 6 +- llvm/test/CodeGen/PowerPC/fma-assoc.ll | 8 +- llvm/test/CodeGen/PowerPC/fma-combine.ll | 24 +- llvm/test/CodeGen/PowerPC/fma-mutate.ll | 2 +- llvm/test/CodeGen/PowerPC/fma-negate.ll | 40 +- llvm/test/CodeGen/PowerPC/fma-precision.ll | 68 +-- llvm/test/CodeGen/PowerPC/fma.ll | 6 + llvm/test/CodeGen/PowerPC/fmf-propagation.ll | 46 +- llvm/test/CodeGen/PowerPC/fsub-fneg.ll | 6 +- llvm/test/CodeGen/PowerPC/load-two-flts.ll | 24 +- llvm/test/CodeGen/PowerPC/pow.75.ll | 24 +- llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll | 20 +- llvm/test/CodeGen/PowerPC/qpx-recipest.ll | 28 +- llvm/test/CodeGen/PowerPC/recipest.ll | 46 +- llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll | 4 +- llvm/test/CodeGen/PowerPC/scalar-equal.ll | 42 +- llvm/test/CodeGen/PowerPC/scalar-min-max.ll | 32 +- llvm/test/CodeGen/PowerPC/scalar_cmp.ll | 244 +++----- llvm/test/CodeGen/PowerPC/spe.ll | 67 +++ llvm/test/CodeGen/PowerPC/vec-min-max.ll | 8 +- .../CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll | 6 +- llvm/test/CodeGen/PowerPC/vsx-recip-est.ll | 8 +- llvm/test/CodeGen/X86/vector-fshl-128.ll | 103 ++-- llvm/test/DebugInfo/X86/Fortran-DIModule.ll | 44 ++ llvm/test/Feature/load_extension.ll | 1 + llvm/test/MC/Mips/micromips-jump-pc-region.s | 2 +- llvm/test/MC/Mips/mips-jump-pc-region.s | 4 +- llvm/test/TableGen/dag-isel-regclass-emit-enum.td | 39 ++ llvm/test/Transforms/Attributor/misc_crash.ll | 33 ++ llvm/test/Transforms/Attributor/returned.ll | 47 +- llvm/test/Transforms/CodeGenPrepare/X86/section.ll | 6 + .../CodeGenPrepare/X86/x86-shuffle-sink.ll | 70 ++- .../test/Transforms/DivRemPairs/PowerPC/pr45885.ll | 24 + llvm/test/Transforms/LoopReroll/external_use.ll | 60 ++ .../Transforms/SLPVectorizer/X86/load-merge.ll | 14 +- llvm/test/Transforms/SimplifyCFG/nomerge.ll | 71 +++ llvm/test/tools/llvm-profdata/show-prof-info.test | 2 +- llvm/tools/llvm-profdata/llvm-profdata.cpp | 19 +- llvm/unittests/IR/MetadataTest.cpp | 35 +- llvm/unittests/Support/VirtualFileSystemTest.cpp | 64 ++ llvm/utils/TableGen/DAGISelMatcherGen.cpp | 16 +- .../standalone/include/Standalone/StandaloneOps.td | 2 +- mlir/examples/toy/Ch2/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch3/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch4/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch5/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch6/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch7/include/toy/Ops.td | 2 +- mlir/include/mlir/Dialect/AVX512/AVX512.td | 2 +- mlir/include/mlir/Dialect/Affine/IR/AffineOps.td | 2 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 3 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td | 2 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 27 +- mlir/include/mlir/Dialect/Quant/QuantOps.td | 2 +- mlir/include/mlir/Dialect/SCF/SCFOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVArithmeticOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVBitOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVCompositeOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVControlFlowOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVGLSLOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVLogicalOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVStructureOps.td | 2 +- mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 6 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 128 +++- .../StandardOps/Transforms/FuncConversions.h} | 10 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 2 +- mlir/include/mlir/Interfaces/CMakeLists.txt | 2 +- .../{SideEffects.td => SideEffectInterfaces.td} | 2 +- mlir/lib/Analysis/CMakeLists.txt | 6 + mlir/lib/Conversion/CMakeLists.txt | 1 - .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 96 ++- .../Conversion/StandardToStandard/CMakeLists.txt | 12 - mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 131 ++++- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 648 ++++++++++++--------- .../Dialect/StandardOps/Transforms/CMakeLists.txt | 3 +- .../StandardOps/Transforms/FuncConversions.cpp} | 4 +- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 52 +- .../StandardToLLVM/convert-to-llvmir.mlir | 105 ++-- mlir/test/Conversion/StandardToLLVM/invalid.mlir | 2 +- .../StandardToLLVM/standard-to-llvm.mlir | 10 + .../Conversion/StandardToSPIRV/legalization.mlir | 11 +- .../StandardToSPIRV/subview-to-spirv.mlir | 2 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 17 + mlir/test/Dialect/Affine/ops.mlir | 4 +- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 3 + mlir/test/Dialect/Linalg/canonicalize.mlir | 156 ++++- mlir/test/Dialect/Linalg/llvm.mlir | 145 +++-- mlir/test/Dialect/Linalg/promote.mlir | 18 +- mlir/test/Dialect/Linalg/roundtrip.mlir | 23 + mlir/test/Dialect/Shape/ops.mlir | 5 + .../Dialect/Vector/vector-contract-transforms.mlir | 46 ++ mlir/test/IR/core-ops.mlir | 60 +- mlir/test/IR/invalid-ops.mlir | 127 +--- mlir/test/Target/vector-to-llvm-ir.mlir | 23 + mlir/test/Transforms/canonicalize.mlir | 168 +++--- mlir/test/lib/Dialect/Test/CMakeLists.txt | 2 +- mlir/test/lib/Dialect/Test/TestOps.td | 4 +- mlir/test/lib/Dialect/Test/TestPatterns.cpp | 2 +- mlir/test/lib/Transforms/CMakeLists.txt | 2 +- mlir/test/mlir-tblgen/op-decl.td | 2 +- mlir/test/mlir-tblgen/op-side-effects.td | 2 +- mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp | 2 +- 232 files changed, 4759 insertions(+), 2760 deletions(-) create mode 100644 clang/test/SemaTemplate/constraints.cpp create mode 100644 lld/test/MachO/platform-version.test create mode 100644 lldb/test/API/iohandler/resize/TestIOHandlerResize.py create mode 100644 lldb/test/Shell/SymbolFile/DWARF/DW_TAG_basic_type_DW_ATE_UTF_nonC.ll create mode 100644 llvm/test/Bitcode/DIModule-clang-module.ll create mode 100644 llvm/test/Bitcode/DIModule-clang-module.ll.bc create mode 100644 llvm/test/Bitcode/DIModule-fortran-module.ll create mode 100644 llvm/test/Bitcode/DIModule-fortran-module.ll.bc create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/combine-sext-debugloc.mir create mode 100644 llvm/test/DebugInfo/X86/Fortran-DIModule.ll create mode 100644 llvm/test/TableGen/dag-isel-regclass-emit-enum.td create mode 100644 llvm/test/Transforms/DivRemPairs/PowerPC/pr45885.ll create mode 100644 llvm/test/Transforms/LoopReroll/external_use.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/nomerge.ll rename mlir/include/mlir/{Conversion/StandardToStandard/StandardToStandard.h => Di [...] rename mlir/include/mlir/Interfaces/{SideEffects.td => SideEffectInterfaces.td} (98%) delete mode 100644 mlir/lib/Conversion/StandardToStandard/CMakeLists.txt rename mlir/lib/{Conversion/StandardToStandard/StandardToStandard.cpp => Dialect/S [...] create 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5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig updated (1d54a4db -> 50a86e22)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 1d54a4db 0: update: llvm-linux: all new 50a86e22 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1d54a4db) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 216 +- 02-build_llvm/console.log | 12950 +++++++++++++++++------------------ 03-build_linux/console.log | 786 +-- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 12 +- 06-update_baseline/console.log | 12 +- console.log | 13978 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 13983 insertions(+), 13985 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (077d2d6802e -> 1febe289827)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project. from 077d2d6802e [CodeGen][SVE] Add patterns for whole vector predicate select adds 9e32bf550d1 [libcxx testing] Remove ALLOW_RETRIES from sleep_for.pass.cpp adds bf2183374a6 [Target][ARM] Replace re-uses of old VPR values with VPNOTs adds 24bf8063d67 [Target][ARM] Replace outdated getARMVPTBlockMask function adds e143253fa8b DebugCounter.h - remove unused includes. NFC. adds 24ac6a2d7dd FuzzerCLI.h - reduce StringRef.h include to forward declara [...] adds 45aa1b88534 [X86][AVX] Use X86ISD::VPERM2X128 for blend-with-zero if op [...] adds f1f8cffce49 [NFC][AArch64] More casts tests... adds e03394c6a6f [CUDA][HIP] Workaround for resolving host device function a [...] adds 0387df7f02f [X86] combineX86ShuffleChain - use narrowShuffleMaskElts sc [...] adds 7f2db993500 [PATCH] #pragma float_control should be permitted in namesp [...] adds 691e8269959 Revert "[mlir] Revisit std.subview handling of static infor [...] adds 5d7f5ca0e38 Add Linux SVE Ptrace macros. adds f242950fdf7 Fold single-use variables into assert adds 6da5672962c [LLD] Rename iDTable -> idTable, NFC adds 123bee602a2 AMDGPU: Search for new ROCm bitcode library structure adds 14e18457113 HIP: Merge builtin library handling adds 58f1417ebc1 [AMDGPU] Order pos exports before param exports adds 774acdfb8c4 [clangd] Add metrics for selection tree and recovery expressions. adds e9536795a35 Add comment for SelectionDAGBuilder::SL field. adds c8c39185f35 [lld-macho] Re-add dylink-lazy test adds 87b6fd3e02c [lld-macho] Add support for creating and reading reexported dylibs adds 5c707fd97c4 [docs] Corrected inaccuracies in Common Problems section. adds ffcaed32ef1 [Matrix] Check non-dependent elt type before creating DepSi [...] adds bd80a8bb876 [GlobalISel][IRTranslator] New helper function translateCopy. NFC. adds 989be65b11f [GlobalISel][IRTranslator] Fix <1 x Ty> handling in ConstantExprs adds 5c10c6e0128 [PassBuilder] Moved ProfileSummaryAnalysis in buildInlinerP [...] adds b56b1e67e38 [gcov] Default coverage version to '408*' and delete CC1 op [...] adds 25a95f49b07 [gcov][test] Fix clang test adds 3d49d1cfa76 [WebAssembly] Implement pseudo-min/max SIMD instructions adds 93bd696347a [VectorCombine] add test to check for iterative improvements; NFC adds 8c72b0271b8 [CodeGen] Use Align in MachineConstantPool. adds 9f0b736126c [AMDGPU] Add AGPRs to getRegClassForSizeOnBank adds fc373522b04 [arm] Add big-endian version of pcrel fixups for adr instructions adds 01636c1eeac [X86] Remove the v16i8->v16i16 path for MULHS with AVX2. adds e5f602d82ca [ValueTracking] Let propagatesPoison support binops/unaryop [...] adds 9202df35b2f [FileCollector][NFC] Add comments adds bad61548b20 [Reproducers] Serialize process arguments in ProcessInfo adds cd83333fc8f [PowerPC] Fold redundant load immediates of zero and delete [...] adds ce195fb22b5 [libcxx] Re-commit: shared_ptr changes from library fundame [...] adds aa99da5ace4 Avoid binding pointers to "auto&" (by dereferencing the poi [...] adds d9166ad2728 [lldb/Driver] Support terminal resizing adds 661b234cbcf [MLIR] Rename SideEffects.td -> SideEffectInterfaces.td adds 11c8c2a551c [analyzer] SATestBuild.py: Fix support for #NOPREFIX. adds 7a17f3ccd10 [MLIR] Fix dependencies for Analysis libraries adds 6c29073efb0 PR45589: Properly decompose overloaded `&&` and `||` operat [...] adds 32f5ee830b0 [Attributor] Fixup block addresses after rewriting function [...] adds 363393c4b35 [libc++abi] Adjust XFAIL on macOS for bug that was fixed in [...] adds 66055230bf6 [TargetLoweringObjectFileImpl] Produce .text.hot. instead o [...] adds aa1eb5152d9 [X86][ISelLowering] refactor Varargs handling in X86ISelLow [...] adds 59ba19c56e1 [VirtualFileSystem] Add unit test that showcases YAMLVFSWriter bug adds 58bc507b6fe [VirtualFileSystem] Add unit test that showcases another YA [...] adds 56926ae0faa [SampleFDO] Rename llvm-profdata flag -partial-profile to - [...] adds 293c6d38212 Fix buildbots after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f. adds 0138cc01250 PowerPC: Treat llvm.fma.f* intrinsic as using CTR with SPE adds 1c44430e738 Fix buildbots #2 after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f. adds 99d60a1d0b3 [GlobalISel] Assign the correct location when combining G_SEXT. adds 473bdaf2e81 [mlir] Move Conversion/StandardToStandard to Dialect/Standa [...] adds a9e85626514 [GIsel] Update a comment and make it more precise. adds f490ca76b0e [x86][CGP] enable target hook to sink funnel shift intrinsi [...] adds 759465ee34c [YAMLVFSWriter] Fix for delimiters adds 452e2fc409d Revert of Revert of [mlir][shape] Tidy up shape.shape_of adds ab22f71dd75 [lldb/Reproducers] Also record directories FileSystem::Collect. adds 71ed66d97fd [AMDGPU] Make v4i64/v4f64/v8i64/v8f64 legal adds 2c861e8a121 [libc++][test] Properly mark libc++-only XFAILs adds e17a47b2d35 [libc][Obvious] Fix deps of few threads targets. adds 759bae956ab [lld-macho] Ignore -platform_version and -syslibroot flags. adds cb22ab74035 Add nomerge function attribute to supress tail merge optimi [...] adds 63c0e72b2f8 [mlir] Revisit std.subview handling of static information. adds 0796b170fb3 Fix error in TestNumThreads.py when frame.GetFunctionName r [...] adds d3eb51f0626 [ValueTracking] Fix crash in isGuaranteedNotToBeUndefOrPois [...] adds 96282b1a0c4 test commit adds 8aa2266fd8d [libcxx] Constrain function assignment operator (2574). adds af48351cc8f [Attributor][FIX] Stabilize the state of AAReturnedValues e [...] adds 302c492cc5d [LLDB] Fix minidebuginfo-set-and-hit-breakpoint.test for ar [...] adds fb2c4d50f14 [mlir] [VectorOps] Implement vector.constant_mask lowering [...] adds 6805a77eb66 [LLDB] Mark some xfails for arm-linux adds 67087a7b765 [LLDB] Fix typo in xfail decorator assert.test adds 272bc25bc14 [LoopReroll] Fix rerolling loop with use outside the loop adds 7d4167430c4 [gcov] Fix simultaneous .gcda creation/lock adds 085234bedc3 [cmake] Update creation of object library dependencies for [...] adds 782a4dd1a47 [PowerPC] Use add instead of addReg in ppc-early-ret pass adds d2a95698501 [mlir][Linalg] Allow reshapes to collapse to a zero-rank tensor. adds 5440d0a12d7 [mlir][Linalg] Add folders and canonicalizers for linalg.re [...] adds e9753822b5a [PowerPC] Respect SDNodeFlags in lowering SELECT_CC adds 49e6c191004 [mlir][StandardToLLVM] Add SinOp to LLVM dialect and loweri [...] adds 6bbad7285c4 [CostModel] Modify BasicTTI getCastInstrCost adds 8ffe8891cd5 [PowerPC] Exploit VSX neg, abs and nabs for f32 adds ad60ff70eb5 [NFC] Code cleanup in TargetInfo.cpp adds eef95f2746c [BrachProbablityInfo] Set edge probabilities at once. NFC. adds e59744fd9b4 [DebugInfo] Fortran module DebugInfo support in LLVM adds 678bd84c4df [DebugInfo] Fixes windows bot failure due to a test failure adds 524457edbc3 [mips] Fix typo in FileCheck directives - replace \0xa0 cha [...] adds cac6a26f381 [TableGen] Fix register class handling in TableGen's DAG IS [...] adds 2866c6cad47 [NFC] [PowerPC] Narrow fast-math flags in tests adds e25a2601aaa [libc++] [LWG3321] Mark "year_month_day_last::day() specifi [...] new 855f0ce79bf [analyzer] Fix crash for non-pointers annotated as nonnull new f8972662bc3 [examples] Skip building the Bye pass plugin on windows new 1febe289827 [libcxx testing] Remove ALLOW_RETRIES from wait_for futures test The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/Selection.cpp | 17 + .../clangd/unittests/SelectionTests.cpp | 19 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 4 + clang/include/clang/Basic/CodeGenOptions.def | 1 - clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 +- clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Sema/Sema.h | 9 +- clang/lib/Basic/CodeGenOptions.cpp | 2 +- clang/lib/CodeGen/BackendUtil.cpp | 1 - clang/lib/CodeGen/CGBuiltin.cpp | 16 + clang/lib/CodeGen/TargetInfo.cpp | 4 +- clang/lib/Driver/ToolChains/AMDGPU.cpp | 183 +++++---- clang/lib/Driver/ToolChains/AMDGPU.h | 7 +- clang/lib/Driver/ToolChains/HIP.cpp | 72 ++-- clang/lib/Frontend/CompilerInvocation.cpp | 2 - clang/lib/Headers/wasm_simd128.h | 20 + clang/lib/Sema/SemaAttr.cpp | 4 +- clang/lib/Sema/SemaCUDA.cpp | 14 + clang/lib/Sema/SemaConcept.cpp | 121 +++--- clang/lib/Sema/SemaExpr.cpp | 5 - clang/lib/Sema/SemaOverload.cpp | 143 ++++--- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 1 + clang/lib/Sema/SemaType.cpp | 10 +- .../Checkers/NonNullParamChecker.cpp | 8 +- clang/test/Analysis/UserNullabilityAnnotations.m | 13 + clang/test/CodeGen/builtins-wasm.c | 28 ++ clang/test/CodeGen/code-coverage.c | 8 +- clang/test/CodeGen/fp-floatcontrol-pragma.cpp | 54 +++ .../Inputs/rocm-device-libs/amdgcn/bitcode/hip.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ockl.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_off.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_on.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_off.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_on.bc | 0 .../amdgcn/bitcode/oclc_finite_only_off.bc | 0 .../amdgcn/bitcode/oclc_finite_only_on.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1010.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1011.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1012.bc | 0 .../amdgcn/bitcode/oclc_isa_version_803.bc | 0 .../amdgcn/bitcode/oclc_isa_version_900.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_off.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_on.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_off.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_on.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ocml.bc | 0 .../rocm-device-libs/amdgcn/bitcode/opencl.bc | 0 .../Inputs/rocm-device-libs/lib/hip.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ockl.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_off.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_on.amdgcn.bc | 0 .../lib/oclc_daz_opt_off.amdgcn.bc | 0 .../rocm-device-libs/lib/oclc_daz_opt_on.amdgcn.bc | 0 .../lib/oclc_finite_only_off.amdgcn.bc | 0 .../lib/oclc_finite_only_on.amdgcn.bc | 0 .../lib/oclc_isa_version_1010.amdgcn.bc | 0 .../lib/oclc_isa_version_1011.amdgcn.bc | 0 .../lib/oclc_isa_version_1012.amdgcn.bc | 0 .../lib/oclc_isa_version_803.amdgcn.bc | 0 .../lib/oclc_isa_version_900.amdgcn.bc | 0 .../lib/oclc_unsafe_math_off.amdgcn.bc | 0 .../lib/oclc_unsafe_math_on.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_off.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_on.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ocml.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/opencl.amdgcn.bc | 0 clang/test/Driver/hip-device-libs.hip | 52 ++- clang/test/Driver/rocm-device-libs.cl | 68 +-- clang/test/Parser/fp-floatcontrol-syntax.cpp | 8 +- clang/test/SemaCUDA/function-overload.cu | 146 ++++++- clang/test/SemaCXX/matrix-type.cpp | 98 ----- clang/test/SemaTemplate/constraints.cpp | 26 ++ .../test/{SemaCXX => SemaTemplate}/matrix-type.cpp | 121 ++++-- clang/utils/analyzer/SATestBuild.py | 5 +- compiler-rt/lib/profile/GCDAProfiling.c | 23 +- .../profile/Posix/instrprof-gcov-parallel.test | 2 - flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- libc/src/threads/linux/CMakeLists.txt | 2 +- libc/test/src/threads/CMakeLists.txt | 4 - libcxx/include/chrono | 2 + libcxx/include/functional | 2 +- libcxx/include/memory | 128 ++++-- .../thread.thread.this/sleep_for.pass.cpp | 51 ++- libcxx/test/std/strings/c.strings/cuchar.pass.cpp | 2 +- .../futures.shared_future/wait_for.pass.cpp | 158 ++++--- .../func.search/func.search.bm/default.pass.cpp | 2 +- .../func.search/func.search.bm/hash.pass.cpp | 2 +- .../func.search/func.search.bm/hash.pred.pass.cpp | 2 +- .../func.search/func.search.bm/pred.pass.cpp | 2 +- .../func.search/func.search.bmh/default.pass.cpp | 2 +- .../func.search/func.search.bmh/hash.pass.cpp | 2 +- .../func.search/func.search.bmh/hash.pred.pass.cpp | 2 +- .../func.search/func.search.bmh/pred.pass.cpp | 2 +- .../func.wrap.func.con/F_assign.pass.cpp | 20 + .../util.smartptr.shared/types.pass.cpp | 36 +- .../const_pointer_cast.pass.cpp | 10 +- .../dynamic_pointer_cast.pass.cpp | 10 +- .../reinterpret_pointer_cast.pass.cpp | 52 +++ .../static_pointer_cast.pass.cpp | 16 +- .../util.smartptr.shared.const/default.pass.cpp | 20 +- .../util.smartptr.shared.const/pointer.pass.cpp | 18 +- .../shared_ptr_copy_move.fail.cpp | 50 +++ .../shared_ptr_pointer.pass.cpp | 38 +- .../util.smartptr.shared.const/unique_ptr.pass.cpp | 33 +- .../make_shared.protected.fail.cpp | 3 +- .../util.smartptr.shared.obs/op_arrow.fail.cpp | 36 ++ .../util.smartptr.shared.obs/op_bool.pass.cpp | 21 +- .../{op_bool.pass.cpp => op_bracket.fail.cpp} | 25 +- .../util.smartptr.shared.obs/op_bracket.pass.cpp | 51 +++ .../shared_ptr_Y.pass.cpp | 1 + libcxx/www/cxx1z_status.html | 4 +- libcxx/www/cxx2a_status.html | 2 +- .../test/thread_local_destruction_order.pass.cpp | 17 +- lld/COFF/PDB.cpp | 8 +- lld/COFF/TypeMerger.h | 6 +- lld/MachO/Config.h | 3 +- lld/MachO/Driver.cpp | 45 +- lld/MachO/InputFiles.cpp | 35 +- lld/MachO/InputFiles.h | 11 +- lld/MachO/Options.td | 5 + lld/MachO/SyntheticSections.cpp | 2 +- lld/MachO/Writer.cpp | 45 +- lld/test/MachO/dylink-lazy.s | 59 +++ lld/test/MachO/platform-version.test | 16 + lld/test/MachO/silent-ignore.test | 3 +- lld/test/MachO/sub-library.s | 74 ++++ lldb/include/lldb/Core/IOHandler.h | 4 + lldb/include/lldb/Host/Editline.h | 17 +- lldb/include/lldb/Utility/Args.h | 30 ++ lldb/source/Core/Debugger.cpp | 3 + lldb/source/Core/IOHandler.cpp | 6 + lldb/source/Host/common/Editline.cpp | 51 ++- lldb/source/Host/common/FileSystem.cpp | 8 +- .../Process/Linux/LinuxPTraceDefines_arm64sve.h | 253 ++++++++++++ lldb/source/Utility/Args.cpp | 17 + lldb/source/Utility/ProcessInfo.cpp | 1 + .../load_using_paths/TestLoadUsingPaths.py | 1 + .../thread/num_threads/TestNumThreads.py | 2 + .../API/iohandler/resize/TestIOHandlerResize.py | 36 ++ lldb/test/API/python_api/thread/TestThreadAPI.py | 1 + .../ELF/minidebuginfo-set-and-hit-breakpoint.test | 2 +- lldb/test/Shell/Recognizer/assert.test | 1 + lldb/test/Shell/Reproducer/TestProcessList.test | 21 + lldb/unittests/Utility/ArgsTest.cpp | 31 ++ llvm/cmake/modules/AddLLVM.cmake | 3 +- llvm/docs/GettingStarted.rst | 45 +- llvm/docs/LangRef.rst | 8 + llvm/examples/Bye/CMakeLists.txt | 22 +- llvm/include/llvm/Analysis/BranchProbabilityInfo.h | 10 + .../llvm/Analysis/TargetTransformInfoImpl.h | 7 +- llvm/include/llvm/Analysis/ValueTracking.h | 8 +- llvm/include/llvm/Bitcode/LLVMBitCodes.h | 1 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 15 +- .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 4 + .../GlobalISel/LegalizationArtifactCombiner.h | 2 +- llvm/include/llvm/CodeGen/MachineConstantPool.h | 40 +- llvm/include/llvm/CodeGen/TargetLowering.h | 7 +- llvm/include/llvm/FuzzMutate/FuzzerCLI.h | 3 +- llvm/include/llvm/IR/Attributes.td | 3 + llvm/include/llvm/IR/DIBuilder.h | 9 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 72 ++-- llvm/include/llvm/IR/InstrTypes.h | 3 + llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 11 + llvm/include/llvm/ProfileData/GCOV.h | 10 +- llvm/include/llvm/Support/DebugCounter.h | 5 +- llvm/include/llvm/Support/FileCollector.h | 33 +- llvm/include/llvm/Transforms/Instrumentation.h | 4 - llvm/lib/Analysis/BranchProbabilityInfo.cpp | 99 +++-- llvm/lib/Analysis/ValueTracking.cpp | 44 +- llvm/lib/AsmParser/LLLexer.cpp | 1 + llvm/lib/AsmParser/LLParser.cpp | 18 +- llvm/lib/AsmParser/LLToken.h | 1 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 2 + llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 14 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 3 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 7 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 16 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 5 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 65 ++- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 3 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFunction.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 4 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 + llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 8 +- llvm/lib/FuzzMutate/FuzzerCLI.cpp | 1 + llvm/lib/IR/AsmWriter.cpp | 2 + llvm/lib/IR/Attributes.cpp | 2 + llvm/lib/IR/DIBuilder.cpp | 8 +- llvm/lib/IR/DebugInfoMetadata.cpp | 18 +- llvm/lib/IR/LLVMContextImpl.h | 19 +- llvm/lib/IR/Verifier.cpp | 1 + llvm/lib/Passes/PassBuilder.cpp | 16 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Target/AArch64/AArch64FastISel.cpp | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 4 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 92 +++-- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 26 ++ llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 39 ++ llvm/lib/Target/AMDGPU/SIInstructions.td | 21 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 2 + llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 20 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 19 - llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 15 +- llvm/lib/Target/ARM/ARMConstantPoolValue.cpp | 8 +- llvm/lib/Target/ARM/ARMConstantPoolValue.h | 14 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 9 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 22 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 16 +- llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 12 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 18 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 20 +- llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 51 +-- llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp | 240 ++++++++++- llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 30 ++ llvm/lib/Target/ARM/Thumb2InstrInfo.h | 7 + llvm/lib/Target/ARM/ThumbRegisterInfo.cpp | 4 +- llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp | 31 ++ llvm/lib/Target/ARM/Utils/ARMBaseInfo.h | 6 + llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 15 +- llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp | 6 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 10 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 24 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 3 + llvm/lib/Target/PowerPC/PPCInstrVSX.td | 18 + llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 19 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 1 + .../Target/SystemZ/SystemZConstantPoolValue.cpp | 7 +- llvm/lib/Target/SystemZ/SystemZConstantPoolValue.h | 2 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 6 + llvm/lib/Target/X86/X86FastISel.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 432 ++++++++++--------- llvm/lib/Target/X86/X86ISelLowering.h | 5 + llvm/lib/Target/X86/X86InstrInfo.cpp | 2 +- llvm/lib/Target/X86/X86InstructionSelector.cpp | 3 +- llvm/lib/Target/XCore/XCoreInstrInfo.cpp | 2 +- llvm/lib/Transforms/IPO/Attributor.cpp | 8 + llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 46 ++- .../Transforms/Instrumentation/GCOVProfiling.cpp | 9 +- .../Transforms/Instrumentation/PoisonChecking.cpp | 25 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopRerollPass.cpp | 6 + llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp | 4 +- llvm/lib/Transforms/Utils/CodeExtractor.cpp | 13 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 11 +- llvm/test/Analysis/CostModel/AArch64/cast.ll | 166 +++++--- llvm/test/Analysis/CostModel/ARM/cast.ll | 58 +-- .../CostModel/X86/masked-intrinsic-cost.ll | 2 +- llvm/test/Analysis/ScalarEvolution/nsw.ll | 8 +- llvm/test/Assembler/dimodule.ll | 4 +- llvm/test/Bitcode/DIModule-clang-module.ll | 22 + llvm/test/Bitcode/DIModule-clang-module.ll.bc | Bin 0 -> 1580 bytes llvm/test/Bitcode/DIModule-fortran-module.ll | 34 ++ llvm/test/Bitcode/DIModule-fortran-module.ll.bc | Bin 0 -> 1948 bytes llvm/test/CMakeLists.txt | 6 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 10 +- .../AArch64/GlobalISel/combine-ext-debugloc.mir | 2 +- .../AArch64/GlobalISel/combine-sext-debugloc.mir | 50 +++ .../AMDGPU/GlobalISel/irtranslator-constantexpr.ll | 24 ++ llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 204 +++++---- llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll | 36 +- llvm/test/CodeGen/AMDGPU/idot2.ll | 110 ++--- llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll | 41 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 148 +++---- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll | 46 +++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll | 22 +- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 22 +- llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 22 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 76 ++-- llvm/test/CodeGen/AMDGPU/saddo.ll | 354 ++++++++-------- llvm/test/CodeGen/AMDGPU/select.f16.ll | 368 +++++++++-------- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 32 +- llvm/test/CodeGen/AMDGPU/shift-i128.ll | 456 ++++++++++----------- llvm/test/CodeGen/AMDGPU/shift-i64-opts.ll | 10 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 98 ++--- llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll | 22 +- llvm/test/CodeGen/AMDGPU/wait.ll | 4 +- llvm/test/CodeGen/PowerPC/combine-fneg.ll | 4 +- .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 4 +- llvm/test/CodeGen/PowerPC/early-ret-verify.mir | 4 +- llvm/test/CodeGen/PowerPC/early-ret.mir | 14 +- llvm/test/CodeGen/PowerPC/fdiv.ll | 2 +- llvm/test/CodeGen/PowerPC/float-logic-ops.ll | 6 +- llvm/test/CodeGen/PowerPC/fma-assoc.ll | 8 +- llvm/test/CodeGen/PowerPC/fma-combine.ll | 24 +- llvm/test/CodeGen/PowerPC/fma-mutate.ll | 2 +- llvm/test/CodeGen/PowerPC/fma-negate.ll | 40 +- llvm/test/CodeGen/PowerPC/fma-precision.ll | 68 +-- llvm/test/CodeGen/PowerPC/fma.ll | 6 + llvm/test/CodeGen/PowerPC/fmf-propagation.ll | 46 +-- llvm/test/CodeGen/PowerPC/fold-remove-li.ll | 40 ++ llvm/test/CodeGen/PowerPC/fsub-fneg.ll | 6 +- llvm/test/CodeGen/PowerPC/load-two-flts.ll | 24 +- llvm/test/CodeGen/PowerPC/pow.75.ll | 24 +- llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll | 20 +- llvm/test/CodeGen/PowerPC/qpx-recipest.ll | 28 +- llvm/test/CodeGen/PowerPC/recipest.ll | 46 +-- llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll | 4 +- llvm/test/CodeGen/PowerPC/save-crbp-ppc32svr4.ll | 3 +- llvm/test/CodeGen/PowerPC/scalar-equal.ll | 42 +- llvm/test/CodeGen/PowerPC/scalar-min-max.ll | 32 +- llvm/test/CodeGen/PowerPC/scalar_cmp.ll | 244 ++++------- llvm/test/CodeGen/PowerPC/spe.ll | 67 +++ llvm/test/CodeGen/PowerPC/vec-min-max.ll | 8 +- .../CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll | 6 +- llvm/test/CodeGen/PowerPC/vsx-recip-est.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-pred-not.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-vpt-blocks.ll | 82 +--- llvm/test/CodeGen/Thumb2/mve-vpt-optimisations.mir | 418 ++++++++++++++++++- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 40 ++ llvm/test/CodeGen/X86/avx-vperm2x128.ll | 10 +- llvm/test/CodeGen/X86/vec_smulo.ll | 147 +++---- llvm/test/CodeGen/X86/vector-fshl-128.ll | 103 ++--- llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll | 32 +- llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll | 108 +++-- llvm/test/DebugInfo/X86/Fortran-DIModule.ll | 44 ++ llvm/test/Feature/load_extension.ll | 1 + llvm/test/MC/ARM/pcrel-global.s | 2 + llvm/test/MC/Mips/micromips-jump-pc-region.s | 2 +- llvm/test/MC/Mips/mips-jump-pc-region.s | 4 +- llvm/test/MC/WebAssembly/simd-encodings.s | 12 + llvm/test/Other/new-pm-defaults.ll | 4 +- llvm/test/Other/new-pm-thinlto-defaults.ll | 4 +- .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 4 +- .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 4 +- .../Other/new-pm-thinlto-prelink-pgo-defaults.ll | 4 +- .../new-pm-thinlto-prelink-samplepgo-defaults.ll | 4 +- llvm/test/TableGen/dag-isel-regclass-emit-enum.td | 39 ++ llvm/test/Transforms/Attributor/misc_crash.ll | 33 ++ llvm/test/Transforms/Attributor/returned.ll | 47 ++- llvm/test/Transforms/CodeGenPrepare/X86/section.ll | 6 + .../CodeGenPrepare/X86/x86-shuffle-sink.ll | 70 +++- .../test/Transforms/DivRemPairs/PowerPC/pr45885.ll | 24 ++ .../{return-block.ll => exit-block.ll} | 36 +- llvm/test/Transforms/GCOVProfiling/version.ll | 4 +- llvm/test/Transforms/LoopReroll/external_use.ll | 60 +++ .../Transforms/SLPVectorizer/X86/load-merge.ll | 14 +- llvm/test/Transforms/SimplifyCFG/nomerge.ll | 71 ++++ .../Transforms/VectorCombine/X86/insert-binop.ll | 20 + llvm/test/tools/llvm-profdata/show-prof-info.test | 2 +- llvm/tools/llvm-profdata/llvm-profdata.cpp | 19 +- llvm/unittests/Analysis/ValueTrackingTest.cpp | 49 +++ llvm/unittests/IR/MetadataTest.cpp | 35 +- llvm/unittests/Support/VirtualFileSystemTest.cpp | 64 +++ llvm/utils/TableGen/DAGISelMatcherGen.cpp | 16 +- .../standalone/include/Standalone/StandaloneOps.td | 2 +- mlir/examples/toy/Ch2/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch3/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch4/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch5/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch6/include/toy/Ops.td | 2 +- mlir/examples/toy/Ch7/include/toy/Ops.td | 2 +- mlir/include/mlir/Dialect/AVX512/AVX512.td | 2 +- mlir/include/mlir/Dialect/Affine/IR/AffineOps.td | 2 +- mlir/include/mlir/Dialect/GPU/GPUOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 3 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td | 2 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 27 +- mlir/include/mlir/Dialect/Quant/QuantOps.td | 2 +- mlir/include/mlir/Dialect/SCF/SCFOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVArithmeticOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVBitOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVCompositeOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVControlFlowOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVGLSLOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVLogicalOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVStructureOps.td | 2 +- mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 6 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 55 ++- .../StandardOps/Transforms/FuncConversions.h} | 10 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 2 +- mlir/include/mlir/Interfaces/CMakeLists.txt | 2 +- .../{SideEffects.td => SideEffectInterfaces.td} | 2 +- mlir/lib/Analysis/CMakeLists.txt | 6 + mlir/lib/Conversion/CMakeLists.txt | 1 - .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 96 ++--- .../Conversion/StandardToStandard/CMakeLists.txt | 12 - mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 131 +++++- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 44 +- .../Dialect/StandardOps/Transforms/CMakeLists.txt | 3 +- .../StandardOps/Transforms/FuncConversions.cpp} | 4 +- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 52 ++- .../StandardToLLVM/convert-to-llvmir.mlir | 74 ++-- .../StandardToLLVM/standard-to-llvm.mlir | 10 + .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 17 + mlir/test/Dialect/LLVMIR/roundtrip.mlir | 3 + mlir/test/Dialect/Linalg/canonicalize.mlir | 156 ++++++- mlir/test/Dialect/Linalg/llvm.mlir | 145 ++++--- mlir/test/Dialect/Linalg/roundtrip.mlir | 23 ++ mlir/test/Dialect/Shape/ops.mlir | 5 + .../Dialect/Vector/vector-contract-transforms.mlir | 46 +++ mlir/test/Target/vector-to-llvm-ir.mlir | 23 ++ mlir/test/Transforms/canonicalize.mlir | 12 + mlir/test/lib/Dialect/Test/CMakeLists.txt | 2 +- mlir/test/lib/Dialect/Test/TestOps.td | 4 +- mlir/test/lib/Dialect/Test/TestPatterns.cpp | 2 +- mlir/test/lib/Transforms/CMakeLists.txt | 2 +- mlir/test/mlir-tblgen/op-decl.td | 2 +- mlir/test/mlir-tblgen/op-side-effects.td | 2 +- mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp | 2 +- 408 files changed, 7597 insertions(+), 3472 deletions(-) copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] copy 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5 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (cfc83305 -> 276a7e60)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards cfc83305 0: update: llvm-linux: boot new 276a7e60 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cfc83305) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 225 +- 02-build_llvm/console.log | 12944 +++++++++++++++++------------------ 03-build_linux/console.log | 854 +-- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 12 +- 06-update_baseline/console.log | 18 +- console.log | 14057 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 14052 insertions(+), 14070 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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