Tcwg-commits May 2020

tcwg-commits@lists.linaro.org

6 participants
13142 discussions

[gcc] branch master updated (0e6d007460f -> 9042fea9722)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 0e6d007460f Daily bump. new 9042fea9722 Refactor tree-vrp.c The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 22 ++++ gcc/tree-vrp.c | 309 ++++++++++++++++++++++++++++++++++++--------------------- 2 files changed, 220 insertions(+), 111 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (152036d1379f -> 24085f70a6e1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/linux. from 152036d1379f Merge tag 'nfsd-5.7-rc-2' of git://git.linux-nfs.org/proje [...] adds ac9155842829 gfs2: fix withdraw sequence deadlock adds a8b7528b69d4 gfs2: Fix error exit in do_xmote adds 53af80ce0eae gfs2: Fix BUG during unmount after file system withdraw adds d22f69a08dcb gfs2: Fix use-after-free in gfs2_logd after withdraw adds 566a2ab3c900 gfs2: Another gfs2_walk_metadata fix adds aa83da7f47b2 gfs2: More gfs2_find_jhead fixes adds 2297ab6144c2 gfs2: Fix problems regarding gfs2_qa_get and _put adds f9615fe3113f gfs2: Change BUG_ON to an assert_withdraw in gfs2_quota_change adds e6ce26e571a8 gfs2: remove check for quotas on in gfs2_quota_check adds 4ed0c30811cb gfs2: move privileged user check to gfs2_quota_lock_check adds c9cb9e381985 gfs2: don't call quota_unhold if quotas are not locked adds f4e2f5e1a527 gfs2: Grab glock reference sooner in gfs2_add_revoke adds b11e1a84f370 gfs2: If go_sync returns error, withdraw but skip invalidate adds b14c94908b1b Revert "gfs2: Don't demote a glock until its revokes are written" adds e719340f46bd Merge tag 'gfs2-v5.7-rc1.fixes' of git://git.kernel.org/pu [...] adds dc87f6dd058a gpio: pca953x: Fix pca953x_gpio_set_config adds 4e1541593017 gpiolib: improve the robustness of watch/unwatch ioctl() adds 6409d049ce28 gpiolib: don't call sleeping functions with a spinlock taken adds 8312d50b3f94 Merge tag 'gpio-fixes-for-v5.7-rc3' of git://git.kernel.or [...] adds 8650b6099da5 gpio: of: Build fails if CONFIG_OF_DYNAMIC enabled without [...] adds 0cf253eed5d2 gpio: tegra: mask GPIO IRQs during IRQ shutdown adds 8ec91c0fce15 Merge tag 'gpio-v5.7-2' of git://git.kernel.org/pub/scm/li [...] adds 9d82ccda2bc5 tools/bootconfig: Fix apply_xbc() to return zero on success adds 8b1fac2e73e8 tracing: Wait for preempt irq delay thread to execute adds 611d0a95d46b bootconfig: Fix to prevent warning message if no bootconfi [...] adds 24085f70a6e1 Merge tag 'trace-v5.7-rc4' of git://git.kernel.org/pub/scm [...] No new revisions were added by this update. Summary of changes: drivers/gpio/gpio-pca953x.c | 2 +- drivers/gpio/gpio-tegra.c | 1 + drivers/gpio/gpiolib.c | 34 +++++++++++++++++++++++++++++----- fs/gfs2/bmap.c | 16 +++++++++------- fs/gfs2/glock.c | 6 ++---- fs/gfs2/inode.c | 7 ++++--- fs/gfs2/log.c | 11 ++++++++--- fs/gfs2/lops.c | 19 ++++++++++++------- fs/gfs2/meta_io.c | 2 +- fs/gfs2/quota.c | 13 +++++-------- fs/gfs2/quota.h | 3 ++- fs/gfs2/super.c | 1 - fs/gfs2/util.c | 10 ++++++---- init/main.c | 10 ++++++---- kernel/trace/preemptirq_delay_test.c | 12 ++++++++++-- tools/bootconfig/main.c | 1 + 16 files changed, 97 insertions(+), 51 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (c9c930ae67c -> 0796b170fb3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/llvm-project. from c9c930ae67c [SelectionDAG] Don't promote the alignment of allocas beyon [...] adds 0205fabe5df [Inlining] Make shouldBeDeferred static (NFC) adds 91259bf9c68 [gn build] Use relative paths in generated lit.site.cfg.py [...] adds 1429e4c3992 [AMDGPU][GlobalISel] Revise handling of wide loads in RegBa [...] adds 2aa0217add1 [FileCheck] Make invalid prefix diagnostics more precise adds e8c13c182a5 [libcxx] shared_ptr changes from library fundamentals (P0414R2). adds eb81de2de40 Temporarily Revert "[lld-macho] Re-add dylink-lazy test" as [...] adds 59a299cbb30 Fix a release+noasserts werror for unused variable. adds 2b8b783b1ab Quote error string from qLaunchSuccess adds 40f56c8cf18 [mlir] [VectorOps] Replace zero-scalar + splat into direct [...] adds 2e9f1153c5d [x86/SLH][NFC] Add a test to produce a failed generation. adds 013f06703e1 [gcov] Emit GCOV_TAG_OBJECT_SUMMARY/GCOV_TAG_PROGRAM_SUMMAR [...] adds 93aee9ca869 [DWARF5]: Added support for dumping strx forms in llvm-dwarfdump adds 1f707cc9908 Partially revert "[CMake] Fix building with -DBUILD_SHARED_ [...] adds 4c684b91d56 Revert part of D49132 "[gcov] Fix gcov profiling on big-end [...] adds f98709a982b [gcov] Fix big-endian problems adds 5eb55483ebd Revert "[libcxx] shared_ptr changes from library fundamenta [...] adds e8d2ff22f09 [PowerPC] Add fma/fsqrt/fmax strict-fp intrinsics adds d775841d7d6 [RISCV] Make CanLowerReturn protected for downstream maintenance adds 84a9c725742 Temporarily Revert "[mlir][shape] Tidy up shape.shape_of" a [...] adds 5a7276b3548 [clangd] Have suppression comments take precedence over war [...] adds 054ed1fd0b8 [LLDB] Disable TestBasicEntryValues.py for arm adds 42c7a6d52ba [CodeGen] Fix incorrect uses of getVectorNumElements() adds 57feff93a82 [SystemZ] Improve foldMemoryOperandImpl: vec->FP conversions adds 41ca6058132 Revert "[NFC][DwarfDebug] Avoid default capturing when usin [...] adds 8b7b84e99d5 Revert "[NFC][DwarfDebug] Prefer explicit to auto type deduction" adds a42e53cccf8 Fix typos encountered while working on pass pipeline for O1. adds 494c7ecef92 [NFC][AArch64] Update tests adds 40ef4274600 get rid of the NDEBUG usage in RecoveryExpr, NFC. adds 6b9e43c67e0 [Openmp][VE] Libomptarget plugin for NEC SX-Aurora adds 1952c86d614 [AArch64][CostModel] getCastInstrCost adds b4a8091a116 [ARM][CostModel] Improve getCastInstrCost adds 9682d0d5dcc [ARM] Refactor lower to S[LR]I optimization adds d6936be2ef8 [SveEmitter] Add builtins for svdup and svindex adds e114bdf072d [NFC][AArch64] More cast cost tests adds 9d6064ec49e Revert "[RISCV] Make CanLowerReturn protected for downstrea [...] adds 077d2d6802e [CodeGen][SVE] Add patterns for whole vector predicate select adds 9e32bf550d1 [libcxx testing] Remove ALLOW_RETRIES from sleep_for.pass.cpp adds bf2183374a6 [Target][ARM] Replace re-uses of old VPR values with VPNOTs adds 24bf8063d67 [Target][ARM] Replace outdated getARMVPTBlockMask function adds e143253fa8b DebugCounter.h - remove unused includes. NFC. adds 24ac6a2d7dd FuzzerCLI.h - reduce StringRef.h include to forward declara [...] adds 45aa1b88534 [X86][AVX] Use X86ISD::VPERM2X128 for blend-with-zero if op [...] adds f1f8cffce49 [NFC][AArch64] More casts tests... adds e03394c6a6f [CUDA][HIP] Workaround for resolving host device function a [...] adds 0387df7f02f [X86] combineX86ShuffleChain - use narrowShuffleMaskElts sc [...] adds 7f2db993500 [PATCH] #pragma float_control should be permitted in namesp [...] adds 691e8269959 Revert "[mlir] Revisit std.subview handling of static infor [...] adds 5d7f5ca0e38 Add Linux SVE Ptrace macros. adds f242950fdf7 Fold single-use variables into assert adds 6da5672962c [LLD] Rename iDTable -> idTable, NFC adds 123bee602a2 AMDGPU: Search for new ROCm bitcode library structure adds 14e18457113 HIP: Merge builtin library handling adds 58f1417ebc1 [AMDGPU] Order pos exports before param exports adds 774acdfb8c4 [clangd] Add metrics for selection tree and recovery expressions. adds e9536795a35 Add comment for SelectionDAGBuilder::SL field. adds c8c39185f35 [lld-macho] Re-add dylink-lazy test adds 87b6fd3e02c [lld-macho] Add support for creating and reading reexported dylibs adds 5c707fd97c4 [docs] Corrected inaccuracies in Common Problems section. adds ffcaed32ef1 [Matrix] Check non-dependent elt type before creating DepSi [...] adds bd80a8bb876 [GlobalISel][IRTranslator] New helper function translateCopy. NFC. adds 989be65b11f [GlobalISel][IRTranslator] Fix <1 x Ty> handling in ConstantExprs adds 5c10c6e0128 [PassBuilder] Moved ProfileSummaryAnalysis in buildInlinerP [...] adds b56b1e67e38 [gcov] Default coverage version to '408*' and delete CC1 op [...] adds 25a95f49b07 [gcov][test] Fix clang test adds 3d49d1cfa76 [WebAssembly] Implement pseudo-min/max SIMD instructions adds 93bd696347a [VectorCombine] add test to check for iterative improvements; NFC adds 8c72b0271b8 [CodeGen] Use Align in MachineConstantPool. adds 9f0b736126c [AMDGPU] Add AGPRs to getRegClassForSizeOnBank adds fc373522b04 [arm] Add big-endian version of pcrel fixups for adr instructions adds 01636c1eeac [X86] Remove the v16i8->v16i16 path for MULHS with AVX2. adds e5f602d82ca [ValueTracking] Let propagatesPoison support binops/unaryop [...] adds 9202df35b2f [FileCollector][NFC] Add comments adds bad61548b20 [Reproducers] Serialize process arguments in ProcessInfo adds cd83333fc8f [PowerPC] Fold redundant load immediates of zero and delete [...] adds ce195fb22b5 [libcxx] Re-commit: shared_ptr changes from library fundame [...] adds aa99da5ace4 Avoid binding pointers to "auto&" (by dereferencing the poi [...] adds d9166ad2728 [lldb/Driver] Support terminal resizing adds 661b234cbcf [MLIR] Rename SideEffects.td -> SideEffectInterfaces.td adds 11c8c2a551c [analyzer] SATestBuild.py: Fix support for #NOPREFIX. adds 7a17f3ccd10 [MLIR] Fix dependencies for Analysis libraries adds 6c29073efb0 PR45589: Properly decompose overloaded `&&` and `||` operat [...] adds 32f5ee830b0 [Attributor] Fixup block addresses after rewriting function [...] adds 363393c4b35 [libc++abi] Adjust XFAIL on macOS for bug that was fixed in [...] adds 66055230bf6 [TargetLoweringObjectFileImpl] Produce .text.hot. instead o [...] adds aa1eb5152d9 [X86][ISelLowering] refactor Varargs handling in X86ISelLow [...] adds 59ba19c56e1 [VirtualFileSystem] Add unit test that showcases YAMLVFSWriter bug adds 58bc507b6fe [VirtualFileSystem] Add unit test that showcases another YA [...] adds 56926ae0faa [SampleFDO] Rename llvm-profdata flag -partial-profile to - [...] adds 293c6d38212 Fix buildbots after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f. adds 0138cc01250 PowerPC: Treat llvm.fma.f* intrinsic as using CTR with SPE adds 1c44430e738 Fix buildbots #2 after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f. new 99d60a1d0b3 [GlobalISel] Assign the correct location when combining G_SEXT. new 473bdaf2e81 [mlir] Move Conversion/StandardToStandard to Dialect/Standa [...] new a9e85626514 [GIsel] Update a comment and make it more precise. new f490ca76b0e [x86][CGP] enable target hook to sink funnel shift intrinsi [...] new 759465ee34c [YAMLVFSWriter] Fix for delimiters new 452e2fc409d Revert of Revert of [mlir][shape] Tidy up shape.shape_of new ab22f71dd75 [lldb/Reproducers] Also record directories FileSystem::Collect. new 71ed66d97fd [AMDGPU] Make v4i64/v4f64/v8i64/v8f64 legal new 2c861e8a121 [libc++][test] Properly mark libc++-only XFAILs new e17a47b2d35 [libc][Obvious] Fix deps of few threads targets. new 759bae956ab [lld-macho] Ignore -platform_version and -syslibroot flags. new cb22ab74035 Add nomerge function attribute to supress tail merge optimi [...] new 63c0e72b2f8 [mlir] Revisit std.subview handling of static information. new 0796b170fb3 Fix error in TestNumThreads.py when frame.GetFunctionName r [...] The 14 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/ParsedAST.cpp | 16 +- clang-tools-extra/clangd/Selection.cpp | 17 + .../clangd/unittests/DiagnosticsTests.cpp | 12 +- .../clangd/unittests/SelectionTests.cpp | 19 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 4 + clang/include/clang/Basic/CodeGenOptions.def | 1 - clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 +- clang/include/clang/Basic/arm_sve.td | 14 +- clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Sema/Sema.h | 9 +- clang/lib/AST/Expr.cpp | 5 +- clang/lib/Basic/CodeGenOptions.cpp | 2 +- clang/lib/CodeGen/BackendUtil.cpp | 1 - clang/lib/CodeGen/CGBuiltin.cpp | 36 +- clang/lib/CodeGen/CodeGenFunction.h | 1 + clang/lib/Driver/ToolChains/AMDGPU.cpp | 183 +++-- clang/lib/Driver/ToolChains/AMDGPU.h | 7 +- clang/lib/Driver/ToolChains/HIP.cpp | 72 +- clang/lib/Frontend/CompilerInvocation.cpp | 2 - clang/lib/Headers/wasm_simd128.h | 20 + clang/lib/Sema/SemaAttr.cpp | 4 +- clang/lib/Sema/SemaCUDA.cpp | 14 + clang/lib/Sema/SemaConcept.cpp | 121 +-- clang/lib/Sema/SemaExpr.cpp | 5 - clang/lib/Sema/SemaOverload.cpp | 143 ++-- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 1 + clang/lib/Sema/SemaType.cpp | 10 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c | 524 +++++++++++++ clang/test/CodeGen/builtins-wasm.c | 28 + clang/test/CodeGen/code-coverage.c | 8 +- clang/test/CodeGen/fp-floatcontrol-pragma.cpp | 54 ++ .../Inputs/rocm-device-libs/amdgcn/bitcode/hip.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ockl.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_off.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_on.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_off.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_on.bc | 0 .../amdgcn/bitcode/oclc_finite_only_off.bc | 0 .../amdgcn/bitcode/oclc_finite_only_on.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1010.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1011.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1012.bc | 0 .../amdgcn/bitcode/oclc_isa_version_803.bc | 0 .../amdgcn/bitcode/oclc_isa_version_900.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_off.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_on.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_off.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_on.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ocml.bc | 0 .../rocm-device-libs/amdgcn/bitcode/opencl.bc | 0 .../Inputs/rocm-device-libs/lib/hip.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ockl.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_off.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_on.amdgcn.bc | 0 .../lib/oclc_daz_opt_off.amdgcn.bc | 0 .../rocm-device-libs/lib/oclc_daz_opt_on.amdgcn.bc | 0 .../lib/oclc_finite_only_off.amdgcn.bc | 0 .../lib/oclc_finite_only_on.amdgcn.bc | 0 .../lib/oclc_isa_version_1010.amdgcn.bc | 0 .../lib/oclc_isa_version_1011.amdgcn.bc | 0 .../lib/oclc_isa_version_1012.amdgcn.bc | 0 .../lib/oclc_isa_version_803.amdgcn.bc | 0 .../lib/oclc_isa_version_900.amdgcn.bc | 0 .../lib/oclc_unsafe_math_off.amdgcn.bc | 0 .../lib/oclc_unsafe_math_on.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_off.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_on.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ocml.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/opencl.amdgcn.bc | 0 clang/test/Driver/hip-device-libs.hip | 52 +- clang/test/Driver/rocm-device-libs.cl | 68 +- clang/test/Parser/fp-floatcontrol-syntax.cpp | 8 +- clang/test/SemaCUDA/function-overload.cu | 146 +++- clang/test/SemaCXX/matrix-type.cpp | 98 --- clang/test/SemaTemplate/constraints.cpp | 26 + .../test/{SemaCXX => SemaTemplate}/matrix-type.cpp | 121 ++- clang/utils/analyzer/SATestBuild.py | 5 +- compiler-rt/lib/profile/GCDAProfiling.c | 83 +-- flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- libc/src/threads/linux/CMakeLists.txt | 2 +- libc/test/src/threads/CMakeLists.txt | 4 - libcxx/include/memory | 128 ++-- .../thread.thread.this/sleep_for.pass.cpp | 51 +- libcxx/test/std/strings/c.strings/cuchar.pass.cpp | 2 +- .../func.search/func.search.bm/default.pass.cpp | 2 +- .../func.search/func.search.bm/hash.pass.cpp | 2 +- .../func.search/func.search.bm/hash.pred.pass.cpp | 2 +- .../func.search/func.search.bm/pred.pass.cpp | 2 +- .../func.search/func.search.bmh/default.pass.cpp | 2 +- .../func.search/func.search.bmh/hash.pass.cpp | 2 +- .../func.search/func.search.bmh/hash.pred.pass.cpp | 2 +- .../func.search/func.search.bmh/pred.pass.cpp | 2 +- .../util.smartptr.shared/types.pass.cpp | 36 +- .../const_pointer_cast.pass.cpp | 10 +- .../dynamic_pointer_cast.pass.cpp | 10 +- .../reinterpret_pointer_cast.pass.cpp | 52 ++ .../static_pointer_cast.pass.cpp | 16 +- .../util.smartptr.shared.const/default.pass.cpp | 20 +- .../util.smartptr.shared.const/pointer.pass.cpp | 18 +- .../shared_ptr_copy_move.fail.cpp | 50 ++ .../shared_ptr_pointer.pass.cpp | 38 +- .../util.smartptr.shared.const/unique_ptr.pass.cpp | 33 +- .../make_shared.protected.fail.cpp | 3 +- .../util.smartptr.shared.obs/op_arrow.fail.cpp | 36 + .../util.smartptr.shared.obs/op_bool.pass.cpp | 21 +- .../{op_bool.pass.cpp => op_bracket.fail.cpp} | 25 +- .../util.smartptr.shared.obs/op_bracket.pass.cpp | 51 ++ .../shared_ptr_Y.pass.cpp | 1 + libcxx/www/cxx1z_status.html | 2 +- .../test/thread_local_destruction_order.pass.cpp | 17 +- lld/COFF/PDB.cpp | 8 +- lld/COFF/TypeMerger.h | 6 +- lld/MachO/Config.h | 3 +- lld/MachO/Driver.cpp | 45 +- lld/MachO/InputFiles.cpp | 35 +- lld/MachO/InputFiles.h | 11 +- lld/MachO/Options.td | 5 + lld/MachO/SyntheticSections.cpp | 2 +- lld/MachO/Writer.cpp | 45 +- lld/test/MachO/platform-version.test | 16 + lld/test/MachO/silent-ignore.test | 3 +- lld/test/MachO/sub-library.s | 74 ++ lldb/include/lldb/Core/IOHandler.h | 4 + lldb/include/lldb/Host/Editline.h | 17 +- lldb/include/lldb/Utility/Args.h | 30 + lldb/source/Core/Debugger.cpp | 3 + lldb/source/Core/IOHandler.cpp | 6 + lldb/source/Host/common/Editline.cpp | 51 +- lldb/source/Host/common/FileSystem.cpp | 8 +- .../Process/Linux/LinuxPTraceDefines_arm64sve.h | 253 +++++++ lldb/source/Utility/Args.cpp | 17 + lldb/source/Utility/ProcessInfo.cpp | 1 + .../basic_entry_values/TestBasicEntryValues.py | 2 +- .../thread/num_threads/TestNumThreads.py | 2 + .../API/iohandler/resize/TestIOHandlerResize.py | 36 + lldb/test/Shell/Reproducer/TestProcessList.test | 21 + lldb/tools/debugserver/source/RNBRemote.cpp | 7 +- lldb/unittests/Utility/ArgsTest.cpp | 31 + llvm/docs/GettingStarted.rst | 45 +- llvm/docs/LangRef.rst | 8 + llvm/examples/Bye/CMakeLists.txt | 22 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 8 - llvm/include/llvm/Analysis/ValueTracking.h | 8 +- llvm/include/llvm/Bitcode/LLVMBitCodes.h | 1 + .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 4 + .../GlobalISel/LegalizationArtifactCombiner.h | 2 +- llvm/include/llvm/CodeGen/MachineConstantPool.h | 40 +- llvm/include/llvm/CodeGen/TargetLowering.h | 7 +- .../include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h | 21 +- llvm/include/llvm/FuzzMutate/FuzzerCLI.h | 3 +- llvm/include/llvm/IR/Attributes.td | 3 + llvm/include/llvm/IR/InstrTypes.h | 3 + llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 11 + llvm/include/llvm/ProfileData/GCOV.h | 10 +- llvm/include/llvm/Support/DebugCounter.h | 5 +- llvm/include/llvm/Support/FileCollector.h | 33 +- llvm/include/llvm/Transforms/Instrumentation.h | 4 - llvm/lib/Analysis/InlineAdvisor.cpp | 6 +- llvm/lib/Analysis/ValueTracking.cpp | 37 +- llvm/lib/AsmParser/LLLexer.cpp | 1 + llvm/lib/AsmParser/LLParser.cpp | 3 + llvm/lib/AsmParser/LLToken.h | 1 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 2 + llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 2 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 7 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 37 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 65 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 3 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFunction.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 22 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 + llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 8 +- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 5 +- llvm/lib/DebugInfo/DWARF/DWARFDebugMacro.cpp | 55 +- llvm/lib/FuzzMutate/FuzzerCLI.cpp | 1 + llvm/lib/IR/Attributes.cpp | 2 + llvm/lib/IR/Verifier.cpp | 1 + llvm/lib/Passes/PassBuilder.cpp | 18 +- llvm/lib/ProfileData/GCOV.cpp | 4 +- llvm/lib/Support/FileCheck.cpp | 40 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Target/AArch64/AArch64FastISel.cpp | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 113 ++- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 10 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 6 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 92 ++- .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 71 -- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 26 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 55 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 39 + llvm/lib/Target/AMDGPU/SIInstructions.td | 21 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 2 + llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 20 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 19 - llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 15 +- llvm/lib/Target/ARM/ARMConstantPoolValue.cpp | 8 +- llvm/lib/Target/ARM/ARMConstantPoolValue.h | 14 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 9 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 22 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 16 +- llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 12 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 18 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 43 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 20 +- llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 51 +- llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp | 240 +++++- llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 30 + llvm/lib/Target/ARM/Thumb2InstrInfo.h | 7 + llvm/lib/Target/ARM/ThumbRegisterInfo.cpp | 4 +- llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp | 31 + llvm/lib/Target/ARM/Utils/ARMBaseInfo.h | 6 + llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 15 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 17 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 24 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 3 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 20 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 67 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 19 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 1 + .../Target/SystemZ/SystemZConstantPoolValue.cpp | 7 +- llvm/lib/Target/SystemZ/SystemZConstantPoolValue.h | 2 +- llvm/lib/Target/SystemZ/SystemZInstrFP.td | 24 +- llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 59 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp | 114 ++- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 53 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 6 + llvm/lib/Target/X86/X86FastISel.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 432 ++++++----- llvm/lib/Target/X86/X86ISelLowering.h | 5 + llvm/lib/Target/X86/X86InstrInfo.cpp | 2 +- llvm/lib/Target/X86/X86InstructionSelector.cpp | 3 +- llvm/lib/Target/XCore/XCoreInstrInfo.cpp | 2 +- llvm/lib/Transforms/IPO/Attributor.cpp | 8 + .../Transforms/Instrumentation/GCOVProfiling.cpp | 9 +- .../Transforms/Instrumentation/PoisonChecking.cpp | 25 +- .../Transforms/Scalar/LowerConstantIntrinsics.cpp | 2 +- llvm/lib/Transforms/Utils/CodeExtractor.cpp | 1 + llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 11 +- llvm/test/Analysis/CostModel/AArch64/cast.ll | 232 +++++- .../CostModel/ARM/add-cast-vect.ll} | 36 +- llvm/test/Analysis/CostModel/ARM/cast.ll | 68 +- .../CostModel}/ARM/mul-cast-vect.ll | 0 .../CostModel/ARM/shl-cast-vect.ll} | 36 +- .../CostModel/ARM/sub-cast-vect.ll} | 36 +- llvm/test/Analysis/ScalarEvolution/nsw.ll | 8 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 10 +- .../AArch64/GlobalISel/combine-ext-debugloc.mir | 2 +- .../AArch64/GlobalISel/combine-sext-debugloc.mir | 50 ++ llvm/test/CodeGen/AArch64/arm64-sli-sri-opt.ll | 439 ++++++++++- llvm/test/CodeGen/AArch64/select-sve.ll | 134 ++++ llvm/test/CodeGen/AArch64/sve-trunc.ll | 57 ++ .../AMDGPU/GlobalISel/irtranslator-constantexpr.ll | 24 + .../AMDGPU/GlobalISel/regbankselect-load.mir | 168 +---- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 204 ++--- llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll | 36 +- llvm/test/CodeGen/AMDGPU/idot2.ll | 110 +-- llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll | 41 +- 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4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (2ef6451b -> eb755143)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 2ef6451b 0: update: llvm-linux: all new eb755143 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (2ef6451b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 237 +- 02-build_llvm/console.log | 12948 +++++++++++++++++------------------ 03-build_linux/console.log | 642 +- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 13833 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 13848 insertions(+), 13830 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (6c1668fe923 -> 45a6686e76b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/gcc. from 6c1668fe923 Daily bump. adds e042b0490c8 rs6000: AIX long double builtins for 64 bit long double. adds 89714e45f0b rs6000: Link with libc128.a for long-double-128. adds 45a6686e76b libstdc++: Fix incorrect size calculation in PMR resource [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 18 ++++++++++++++++++ gcc/config/rs6000/aix61.h | 1 + gcc/config/rs6000/aix71.h | 1 + gcc/config/rs6000/aix72.h | 1 + gcc/config/rs6000/rs6000.c | 26 ++++++++++++++++++++++---- libstdc++-v3/ChangeLog | 10 ++++++++++ libstdc++-v3/src/c++17/memory_resource.cc | 4 ++-- 7 files changed, 55 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (42ed5df1 -> b22ed2c7)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 42ed5df1 0: update: binutils-gcc-linux: boot new b22ed2c7 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (42ed5df1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 225 +- 02-prepare_abe/console.log | 108 +- 03-build_abe-binutils/console.log | 11481 ++++++----- 04-build_abe-stage1/console.log | 18218 ++++++++--------- 05-build_linux/console.log | 794 +- 06-boot_linux/console.log | 482 +- 07-check_regression/console.log | 12 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 12 +- 08-update_baseline/results.regressions | 2 +- console.log | 31422 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 12 files changed, 31373 insertions(+), 31393 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig updated (08b8b724ee3 -> 363393c4b35)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project. from 08b8b724ee3 [X86] Add inline assembly load hardening mitigation for Loa [...] adds efd758ac5ae RISCVAttributeParser.h - remove unnecessary ScopedPrinter.h [...] adds 334a4159eca [mlir][Vector] NFC - Rename vector.strided_slice into vecto [...] adds 80d133b24f7 [mlir] Revisit std.subview handling of static information. adds 310d32cb80a [AMDGPU] Fix promote alloca which is already vector adds 8d7796cf942 Fix a few clang-tidy warnings about auto * and const auto. adds 44f7b402498 Add vendor macro to "lld" adds 756d6959d7a [mlir][StandardToSPIRV] Add support for lowering index_cast [...] adds 67b950be6d4 [hwasan] Fix allocator alignment. adds 020022e12e0 Fix auto -> auto * clang tidy. adds fab08bf4899 [YAMLTraits] Add trait for char adds 89d3031b3ce llvm-lit.in: Use a raw string for LLVM_SOURCE_DIR adds 11e1cf51fb7 [gn build] Make config_map computation in llvm-lit more tab [...] adds 288c9e81781 [GlobalISel] Remove debug locations when emitting G_FCONSTANT. adds 18324bb3d91 [gn build] Make paths in generated llvm-lit relative. adds d0e7fd6b624 Revert "[FileCheck] Support comment directives" adds e1ed4d9eb50 Revert "[FileCheck] Make invalid prefix diagnostics more precise" adds 09253b608a5 [AMDGPU] Allow spilling FP to memory adds 5633813bf37 [MLIR] Fix several misc issues in in Toy tutorial adds a8874c76e8a [AArch64][SVE] Add patterns for VSELECT of immediates. adds 117e5609e98 [AMDGPU] Reserving VGPR for future SGPR Spill adds c9c930ae67c [SelectionDAG] Don't promote the alignment of allocas beyon [...] adds 0205fabe5df [Inlining] Make shouldBeDeferred static (NFC) adds 91259bf9c68 [gn build] Use relative paths in generated lit.site.cfg.py [...] adds 1429e4c3992 [AMDGPU][GlobalISel] Revise handling of wide loads in RegBa [...] adds 2aa0217add1 [FileCheck] Make invalid prefix diagnostics more precise adds e8c13c182a5 [libcxx] shared_ptr changes from library fundamentals (P0414R2). adds eb81de2de40 Temporarily Revert "[lld-macho] Re-add dylink-lazy test" as [...] adds 59a299cbb30 Fix a release+noasserts werror for unused variable. adds 2b8b783b1ab Quote error string from qLaunchSuccess adds 40f56c8cf18 [mlir] [VectorOps] Replace zero-scalar + splat into direct [...] adds 2e9f1153c5d [x86/SLH][NFC] Add a test to produce a failed generation. adds 013f06703e1 [gcov] Emit GCOV_TAG_OBJECT_SUMMARY/GCOV_TAG_PROGRAM_SUMMAR [...] adds 93aee9ca869 [DWARF5]: Added support for dumping strx forms in llvm-dwarfdump adds 1f707cc9908 Partially revert "[CMake] Fix building with -DBUILD_SHARED_ [...] adds 4c684b91d56 Revert part of D49132 "[gcov] Fix gcov profiling on big-end [...] adds f98709a982b [gcov] Fix big-endian problems adds 5eb55483ebd Revert "[libcxx] shared_ptr changes from library fundamenta [...] adds e8d2ff22f09 [PowerPC] Add fma/fsqrt/fmax strict-fp intrinsics adds d775841d7d6 [RISCV] Make CanLowerReturn protected for downstream maintenance adds 84a9c725742 Temporarily Revert "[mlir][shape] Tidy up shape.shape_of" a [...] adds 5a7276b3548 [clangd] Have suppression comments take precedence over war [...] adds 054ed1fd0b8 [LLDB] Disable TestBasicEntryValues.py for arm adds 42c7a6d52ba [CodeGen] Fix incorrect uses of getVectorNumElements() adds 57feff93a82 [SystemZ] Improve foldMemoryOperandImpl: vec->FP conversions adds 41ca6058132 Revert "[NFC][DwarfDebug] Avoid default capturing when usin [...] adds 8b7b84e99d5 Revert "[NFC][DwarfDebug] Prefer explicit to auto type deduction" adds a42e53cccf8 Fix typos encountered while working on pass pipeline for O1. adds 494c7ecef92 [NFC][AArch64] Update tests adds 40ef4274600 get rid of the NDEBUG usage in RecoveryExpr, NFC. adds 6b9e43c67e0 [Openmp][VE] Libomptarget plugin for NEC SX-Aurora adds 1952c86d614 [AArch64][CostModel] getCastInstrCost adds b4a8091a116 [ARM][CostModel] Improve getCastInstrCost adds 9682d0d5dcc [ARM] Refactor lower to S[LR]I optimization adds d6936be2ef8 [SveEmitter] Add builtins for svdup and svindex adds e114bdf072d [NFC][AArch64] More cast cost tests adds 9d6064ec49e Revert "[RISCV] Make CanLowerReturn protected for downstrea [...] adds 077d2d6802e [CodeGen][SVE] Add patterns for whole vector predicate select adds 9e32bf550d1 [libcxx testing] Remove ALLOW_RETRIES from sleep_for.pass.cpp adds bf2183374a6 [Target][ARM] Replace re-uses of old VPR values with VPNOTs adds 24bf8063d67 [Target][ARM] Replace outdated getARMVPTBlockMask function adds e143253fa8b DebugCounter.h - remove unused includes. NFC. adds 24ac6a2d7dd FuzzerCLI.h - reduce StringRef.h include to forward declara [...] adds 45aa1b88534 [X86][AVX] Use X86ISD::VPERM2X128 for blend-with-zero if op [...] adds f1f8cffce49 [NFC][AArch64] More casts tests... adds e03394c6a6f [CUDA][HIP] Workaround for resolving host device function a [...] adds 0387df7f02f [X86] combineX86ShuffleChain - use narrowShuffleMaskElts sc [...] adds 7f2db993500 [PATCH] #pragma float_control should be permitted in namesp [...] adds 691e8269959 Revert "[mlir] Revisit std.subview handling of static infor [...] adds 5d7f5ca0e38 Add Linux SVE Ptrace macros. adds f242950fdf7 Fold single-use variables into assert adds 6da5672962c [LLD] Rename iDTable -> idTable, NFC adds 123bee602a2 AMDGPU: Search for new ROCm bitcode library structure adds 14e18457113 HIP: Merge builtin library handling adds 58f1417ebc1 [AMDGPU] Order pos exports before param exports adds 774acdfb8c4 [clangd] Add metrics for selection tree and recovery expressions. adds e9536795a35 Add comment for SelectionDAGBuilder::SL field. adds c8c39185f35 [lld-macho] Re-add dylink-lazy test adds 87b6fd3e02c [lld-macho] Add support for creating and reading reexported dylibs adds 5c707fd97c4 [docs] Corrected inaccuracies in Common Problems section. adds ffcaed32ef1 [Matrix] Check non-dependent elt type before creating DepSi [...] adds bd80a8bb876 [GlobalISel][IRTranslator] New helper function translateCopy. NFC. adds 989be65b11f [GlobalISel][IRTranslator] Fix <1 x Ty> handling in ConstantExprs adds 5c10c6e0128 [PassBuilder] Moved ProfileSummaryAnalysis in buildInlinerP [...] adds b56b1e67e38 [gcov] Default coverage version to '408*' and delete CC1 op [...] adds 25a95f49b07 [gcov][test] Fix clang test adds 3d49d1cfa76 [WebAssembly] Implement pseudo-min/max SIMD instructions adds 93bd696347a [VectorCombine] add test to check for iterative improvements; NFC adds 8c72b0271b8 [CodeGen] Use Align in MachineConstantPool. adds 9f0b736126c [AMDGPU] Add AGPRs to getRegClassForSizeOnBank adds fc373522b04 [arm] Add big-endian version of pcrel fixups for adr instructions adds 01636c1eeac [X86] Remove the v16i8->v16i16 path for MULHS with AVX2. adds e5f602d82ca [ValueTracking] Let propagatesPoison support binops/unaryop [...] adds 9202df35b2f [FileCollector][NFC] Add comments adds bad61548b20 [Reproducers] Serialize process arguments in ProcessInfo adds cd83333fc8f [PowerPC] Fold redundant load immediates of zero and delete [...] adds ce195fb22b5 [libcxx] Re-commit: shared_ptr changes from library fundame [...] adds aa99da5ace4 Avoid binding pointers to "auto&" (by dereferencing the poi [...] adds d9166ad2728 [lldb/Driver] Support terminal resizing adds 661b234cbcf [MLIR] Rename SideEffects.td -> SideEffectInterfaces.td adds 11c8c2a551c [analyzer] SATestBuild.py: Fix support for #NOPREFIX. adds 7a17f3ccd10 [MLIR] Fix dependencies for Analysis libraries adds 6c29073efb0 PR45589: Properly decompose overloaded `&&` and `||` operat [...] adds 32f5ee830b0 [Attributor] Fixup block addresses after rewriting function [...] adds 363393c4b35 [libc++abi] Adjust XFAIL on macOS for bug that was fixed in [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/ParsedAST.cpp | 16 +- clang-tools-extra/clangd/Selection.cpp | 17 + .../clangd/unittests/DiagnosticsTests.cpp | 12 +- .../clangd/unittests/SelectionTests.cpp | 19 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 4 + clang/include/clang/Basic/CodeGenOptions.def | 1 - clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 +- clang/include/clang/Basic/arm_sve.td | 14 +- clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Sema/Sema.h | 9 +- clang/lib/AST/Expr.cpp | 5 +- clang/lib/Basic/CodeGenOptions.cpp | 2 +- clang/lib/CodeGen/BackendUtil.cpp | 1 - clang/lib/CodeGen/CGBuiltin.cpp | 36 +- clang/lib/CodeGen/CodeGenFunction.h | 1 + clang/lib/Driver/ToolChains/AMDGPU.cpp | 183 +++-- clang/lib/Driver/ToolChains/AMDGPU.h | 7 +- clang/lib/Driver/ToolChains/HIP.cpp | 72 +- clang/lib/Frontend/CompilerInvocation.cpp | 2 - clang/lib/Headers/wasm_simd128.h | 20 + clang/lib/Sema/SemaAttr.cpp | 4 +- clang/lib/Sema/SemaCUDA.cpp | 14 + clang/lib/Sema/SemaConcept.cpp | 121 +-- clang/lib/Sema/SemaExpr.cpp | 5 - clang/lib/Sema/SemaOverload.cpp | 143 ++-- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 1 + clang/lib/Sema/SemaType.cpp | 10 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c | 524 +++++++++++++ clang/test/CodeGen/builtins-wasm.c | 28 + clang/test/CodeGen/code-coverage.c | 8 +- clang/test/CodeGen/default-address-space.c | 10 +- clang/test/CodeGen/fp-floatcontrol-pragma.cpp | 54 ++ clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 10 +- .../Inputs/rocm-device-libs/amdgcn/bitcode/hip.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ockl.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_off.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_on.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_off.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_on.bc | 0 .../amdgcn/bitcode/oclc_finite_only_off.bc | 0 .../amdgcn/bitcode/oclc_finite_only_on.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1010.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1011.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1012.bc | 0 .../amdgcn/bitcode/oclc_isa_version_803.bc | 0 .../amdgcn/bitcode/oclc_isa_version_900.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_off.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_on.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_off.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_on.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ocml.bc | 0 .../rocm-device-libs/amdgcn/bitcode/opencl.bc | 0 .../Inputs/rocm-device-libs/lib/hip.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ockl.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_off.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_on.amdgcn.bc | 0 .../lib/oclc_daz_opt_off.amdgcn.bc | 0 .../rocm-device-libs/lib/oclc_daz_opt_on.amdgcn.bc | 0 .../lib/oclc_finite_only_off.amdgcn.bc | 0 .../lib/oclc_finite_only_on.amdgcn.bc | 0 .../lib/oclc_isa_version_1010.amdgcn.bc | 0 .../lib/oclc_isa_version_1011.amdgcn.bc | 0 .../lib/oclc_isa_version_1012.amdgcn.bc | 0 .../lib/oclc_isa_version_803.amdgcn.bc | 0 .../lib/oclc_isa_version_900.amdgcn.bc | 0 .../lib/oclc_unsafe_math_off.amdgcn.bc | 0 .../lib/oclc_unsafe_math_on.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_off.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_on.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ocml.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/opencl.amdgcn.bc | 0 clang/test/Driver/hip-device-libs.hip | 78 +- clang/test/Driver/rocm-device-libs.cl | 68 +- clang/test/Parser/fp-floatcontrol-syntax.cpp | 8 +- clang/test/SemaCUDA/function-overload.cu | 146 +++- clang/test/SemaCXX/matrix-type.cpp | 98 --- clang/test/SemaTemplate/constraints.cpp | 26 + .../test/{SemaCXX => SemaTemplate}/matrix-type.cpp | 121 ++- clang/utils/analyzer/SATestBuild.py | 5 +- compiler-rt/lib/profile/GCDAProfiling.c | 83 +-- .../sanitizer_allocator_primary64.h | 10 +- .../lib/sanitizer_common/sanitizer_common.h | 1 + .../sanitizer_common/sanitizer_common_libcdep.cpp | 10 + .../tests/sanitizer_allocator_test.cpp | 2 +- compiler-rt/test/hwasan/TestCases/malloc-align.c | 37 + flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- libcxx/include/memory | 128 ++-- .../thread.thread.this/sleep_for.pass.cpp | 51 +- .../util.smartptr.shared/types.pass.cpp | 36 +- .../const_pointer_cast.pass.cpp | 10 +- .../dynamic_pointer_cast.pass.cpp | 10 +- .../reinterpret_pointer_cast.pass.cpp | 52 ++ .../static_pointer_cast.pass.cpp | 16 +- .../util.smartptr.shared.const/default.pass.cpp | 20 +- .../util.smartptr.shared.const/pointer.pass.cpp | 18 +- .../shared_ptr_copy_move.fail.cpp | 50 ++ .../shared_ptr_pointer.pass.cpp | 38 +- .../util.smartptr.shared.const/unique_ptr.pass.cpp | 33 +- .../make_shared.protected.fail.cpp | 3 +- .../util.smartptr.shared.obs/op_arrow.fail.cpp | 36 + .../util.smartptr.shared.obs/op_bool.pass.cpp | 21 +- .../{op_bool.pass.cpp => op_bracket.fail.cpp} | 25 +- .../util.smartptr.shared.obs/op_bracket.pass.cpp | 51 ++ .../shared_ptr_Y.pass.cpp | 1 + libcxx/www/cxx1z_status.html | 2 +- .../test/thread_local_destruction_order.pass.cpp | 17 +- lld/CMakeLists.txt | 7 + lld/COFF/PDB.cpp | 8 +- lld/COFF/TypeMerger.h | 6 +- lld/Common/Version.cpp | 11 +- lld/MachO/Config.h | 3 +- lld/MachO/Driver.cpp | 25 + lld/MachO/InputFiles.cpp | 35 +- lld/MachO/InputFiles.h | 11 +- lld/MachO/Options.td | 3 + lld/MachO/SyntheticSections.cpp | 4 +- lld/MachO/Writer.cpp | 45 +- lld/test/MachO/sub-library.s | 74 ++ lldb/include/lldb/Core/IOHandler.h | 4 + lldb/include/lldb/Host/Editline.h | 17 +- lldb/include/lldb/Utility/Args.h | 30 + lldb/source/Core/Debugger.cpp | 3 + lldb/source/Core/IOHandler.cpp | 6 + lldb/source/Host/common/Editline.cpp | 51 +- .../Process/Linux/LinuxPTraceDefines_arm64sve.h | 253 +++++++ .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp | 10 +- lldb/source/Utility/Args.cpp | 17 + lldb/source/Utility/ProcessInfo.cpp | 1 + .../basic_entry_values/TestBasicEntryValues.py | 2 +- .../API/iohandler/resize/TestIOHandlerResize.py | 36 + lldb/test/Shell/Reproducer/TestProcessList.test | 21 + lldb/tools/debugserver/source/RNBRemote.cpp | 7 +- lldb/unittests/Utility/ArgsTest.cpp | 31 + llvm/docs/CommandGuide/FileCheck.rst | 73 +- llvm/docs/GettingStarted.rst | 45 +- llvm/examples/Bye/CMakeLists.txt | 22 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 8 - llvm/include/llvm/Analysis/ValueTracking.h | 8 +- .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 4 + llvm/include/llvm/CodeGen/MachineConstantPool.h | 40 +- .../include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h | 21 +- llvm/include/llvm/FuzzMutate/FuzzerCLI.h | 3 +- llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 11 + llvm/include/llvm/ProfileData/GCOV.h | 10 +- llvm/include/llvm/Support/DebugCounter.h | 5 +- llvm/include/llvm/Support/FileCheck.h | 2 - llvm/include/llvm/Support/FileCollector.h | 33 +- llvm/include/llvm/Support/RISCVAttributeParser.h | 1 - llvm/include/llvm/Support/YAMLTraits.h | 6 + llvm/include/llvm/Transforms/Instrumentation.h | 4 - llvm/lib/Analysis/InlineAdvisor.cpp | 6 +- llvm/lib/Analysis/ValueTracking.cpp | 37 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 7 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 37 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 65 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 1 + llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 3 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFunction.cpp | 10 +- .../CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 14 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 22 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 + llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 5 +- llvm/lib/DebugInfo/DWARF/DWARFDebugMacro.cpp | 55 +- llvm/lib/FuzzMutate/FuzzerCLI.cpp | 1 + llvm/lib/Passes/PassBuilder.cpp | 18 +- llvm/lib/ProfileData/GCOV.cpp | 4 +- llvm/lib/Support/FileCheck.cpp | 89 +-- llvm/lib/Support/YAMLTraits.cpp | 11 + llvm/lib/Target/AArch64/AArch64FastISel.cpp | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 113 ++- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 10 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 6 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 2 - .../Target/AArch64/AArch64TargetTransformInfo.cpp | 4 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 62 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 92 ++- .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 71 -- llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 55 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 238 +++--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 11 + llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 51 ++ llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 37 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 12 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 32 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 3 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 19 - llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 15 +- llvm/lib/Target/ARM/ARMConstantPoolValue.cpp | 8 +- llvm/lib/Target/ARM/ARMConstantPoolValue.h | 14 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 9 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 22 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 16 +- llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 12 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 18 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 43 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 20 +- llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 51 +- llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp | 240 +++++- llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 30 + llvm/lib/Target/ARM/Thumb2InstrInfo.h | 7 + llvm/lib/Target/ARM/ThumbRegisterInfo.cpp | 4 +- llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp | 31 + llvm/lib/Target/ARM/Utils/ARMBaseInfo.h | 6 + llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 15 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 17 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 24 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 3 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 20 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 67 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 19 +- .../Target/SystemZ/SystemZConstantPoolValue.cpp | 7 +- llvm/lib/Target/SystemZ/SystemZConstantPoolValue.h | 2 +- llvm/lib/Target/SystemZ/SystemZInstrFP.td | 24 +- llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 59 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp | 114 ++- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 53 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 6 + llvm/lib/Target/X86/X86FastISel.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 52 +- llvm/lib/Target/X86/X86InstrInfo.cpp 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4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig updated (c3d0772c -> 93be4a36)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/base-artifacts. discards c3d0772c 0: reset: linux-c14cab2688d09b851349acbb83e5fce8e0d4ca42: all new 93be4a36 0: update: llvm-363393c4b35997c67e6b282bd2be9022a7bfed25: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c3d0772c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 65 +- 02-build_llvm/console.log | 12869 ++++++++++++++++++------------------ 03-build_linux/console.log | 625 +- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 4 +- 06-update_baseline/console.log | 16 +- console.log | 13581 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- reset-baseline | 0 9 files changed, 13605 insertions(+), 13567 deletions(-) delete mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[gcc] branch releases/gcc-8 updated (24c54df7f36 -> 18aabb0cb3f)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-8 in repository gcc. from 24c54df7f36 rs6000: AIX long double builtins for 64 bit long double. new 18aabb0cb3f Daily bump. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[gcc] branch releases/gcc-9 updated (45a6686e76b -> 6c0bd2f0230)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-9 in repository gcc. from 45a6686e76b libstdc++: Fix incorrect size calculation in PMR resource [...] new 6c0bd2f0230 Daily bump. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

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Tcwg-commits May 2020