Tcwg-commits October 2021

tcwg-commits@lists.linaro.org

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14787 discussions

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (1e5a28be0f -> 5513527b59)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/gdb. from 1e5a28be0f ubsan: _bfd_xcoff64_swap_aux_in left shift of negative value adds bd84a8e2e0 bfd_nonfatal_message, localise va_start adds 5513527b59 objdump doesn't accept -L option No new revisions were added by this update. Summary of changes: binutils/bucomm.c | 6 +++--- binutils/objdump.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (37935c01841 -> 77b84fb0a8e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/gcc. from 37935c01841 Daily bump. adds 7c20a9b738a Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combi [...] adds aa15952d646 tree-optimization/102920 - fix PHI VN with undefined args adds 1a07bc9cda7 Simplify (_Float16) sqrtf((float) a) to .SQRT(a) when a is [...] adds 149e217033f RISC-V: Minimal support of bitmanip extension adds 283b1707f23 RISC-V: Implement instruction patterns for ZBA extension. adds 04a9b554ba1 RISC-V: Cost model for zba extension. adds e596a283e54 RISC-V: Implement instruction patterns for ZBB extension. adds 3329d892eb6 RISC-V: Cost model for zbb extension. adds 26d2818bb73 RISC-V: Use li and rori to load constants. adds 4e1e0d79ecb RISC-V: Implement instruction patterns for ZBS extension. adds 77b84fb0a8e RISC-V: Cost model for ZBS extension. No new revisions were added by this update. Summary of changes: gcc/common/config/riscv/riscv-common.c | 10 + gcc/config/i386/sse.md | 52 ++++ gcc/config/riscv/bitmanip.md | 342 +++++++++++++++++++++ gcc/config/riscv/predicates.md | 22 ++ gcc/config/riscv/riscv-opts.h | 10 + gcc/config/riscv/riscv.c | 221 ++++++++++++- gcc/config/riscv/riscv.h | 8 + gcc/config/riscv/riscv.md | 33 +- gcc/config/riscv/riscv.opt | 3 + gcc/match.pd | 6 +- gcc/testsuite/gcc.dg/torture/pr102920.c | 25 ++ .../gcc.target/i386/avx512fp16-complex-fma.c | 18 ++ gcc/testsuite/gcc.target/i386/pr102464-sqrtph.c | 27 ++ gcc/testsuite/gcc.target/i386/pr102464-sqrtsh.c | 23 ++ gcc/testsuite/gcc.target/riscv/zba-adduw.c | 12 + gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c | 19 ++ gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c | 19 ++ gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c | 31 ++ gcc/testsuite/gcc.target/riscv/zba-slliuw.c | 11 + gcc/testsuite/gcc.target/riscv/zba-zextw.c | 10 + .../gcc.target/riscv/zbb-andn-orn-xnor-01.c | 21 ++ .../gcc.target/riscv/zbb-andn-orn-xnor-02.c | 21 ++ gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c | 35 +++ gcc/testsuite/gcc.target/riscv/zbb-min-max.c | 31 ++ gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c | 16 + gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c | 16 + gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c | 17 + gcc/testsuite/gcc.target/riscv/zbbw.c | 25 ++ gcc/testsuite/gcc.target/riscv/zbs-bclr.c | 20 ++ gcc/testsuite/gcc.target/riscv/zbs-bext.c | 20 ++ gcc/testsuite/gcc.target/riscv/zbs-binv.c | 20 ++ gcc/testsuite/gcc.target/riscv/zbs-bset.c | 41 +++ gcc/tree-ssa-sccvn.c | 21 +- gcc/tree-ssa-sccvn.h | 2 +- 34 files changed, 1188 insertions(+), 20 deletions(-) create mode 100644 gcc/config/riscv/bitmanip.md create mode 100644 gcc/testsuite/gcc.dg/torture/pr102920.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-complex-fma.c create mode 100644 gcc/testsuite/gcc.target/i386/pr102464-sqrtph.c create mode 100644 gcc/testsuite/gcc.target/i386/pr102464-sqrtsh.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-adduw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-slliuw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-zextw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-min-max.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbbw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bclr.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bext.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-binv.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bset.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (1e5a28be0f -> 5513527b59)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/binutils-gdb. from 1e5a28be0f ubsan: _bfd_xcoff64_swap_aux_in left shift of negative value adds bd84a8e2e0 bfd_nonfatal_message, localise va_start adds 5513527b59 objdump doesn't accept -L option No new revisions were added by this update. Summary of changes: binutils/bucomm.c | 6 +++--- binutils/objdump.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (447e7391 -> 59d79eb7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/base-artifacts. discards 447e7391 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 new 59d79eb7 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (447e7391) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_check_gcc/mast [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1548 -> 1552 bytes 02-prepare_abe/console.log.xz | Bin 2772 -> 2768 bytes 03-build_abe-binutils/console.log.xz | Bin 44980 -> 45176 bytes 04-build_abe-stage1/console.log.xz | Bin 71268 -> 71748 bytes 05-clean_sysroot/console.log.xz | Bin 328 -> 328 bytes 06-build_abe-linux/console.log.xz | Bin 8980 -> 9020 bytes 07-build_abe-glibc/console.log.xz | Bin 235336 -> 237268 bytes 08-build_abe-stage2/console.log.xz | Bin 200272 -> 203368 bytes 09-build_abe-gdb/console.log.xz | Bin 44776 -> 45600 bytes 10-build_abe-qemu/console.log.xz | Bin 30016 -> 30284 bytes 11-build_abe-dejagnu/console.log.xz | Bin 3880 -> 3932 bytes 12-build_abe-check_gcc/console.log.xz | Bin 2476 -> 2556 bytes 13-check_regression/console.log.xz | Bin 2588 -> 11316 bytes 13-check_regression/extra-bisect-params | 1 + 13-check_regression/fails.sum | 23 + 13-check_regression/results.compare | 52 +- 13-check_regression/results.compare2 | 2185 ++++++++++++++- 13-check_regression/results.regressions | 43 + 14-update_baseline/console.log | 2414 ++++++++++++++++- 14-update_baseline/extra-bisect-params | 1 + 14-update_baseline/fails.sum | 23 + 14-update_baseline/results.compare | 52 +- 14-update_baseline/results.compare2 | 2185 ++++++++++++++- 14-update_baseline/results.regressions | 43 + jenkins/manifest.sh | 18 +- sumfiles/g++.log.xz | Bin 3251148 -> 3247608 bytes sumfiles/g++.sum | 2376 +++++++++------- sumfiles/gcc.log.xz | Bin 2831636 -> 2836428 bytes sumfiles/gcc.sum | 4514 ++++++++++++++++--------------- sumfiles/gfortran.log.xz | Bin 871268 -> 872900 bytes sumfiles/gfortran.sum | 42 +- sumfiles/libatomic.log.xz | Bin 2272 -> 2272 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 166064 -> 165904 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2636 -> 2636 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 395704 -> 408120 bytes sumfiles/libstdc++.sum | 22 +- 39 files changed, 10515 insertions(+), 3505 deletions(-) create mode 100644 13-check_regression/extra-bisect-params create mode 100644 13-check_regression/fails.sum create mode 100644 13-check_regression/results.regressions create mode 100644 14-update_baseline/extra-bisect-params create mode 100644 14-update_baseline/fails.sum create mode 100644 14-update_baseline/results.regressions -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (b3c7a371 -> 1e9b9db5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards b3c7a371 0: update: binutils-llvm-qemu: boot new 1e9b9db5 0: update: linux-dddcb86bb323d424a131c703076634183b5b433f: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b3c7a371) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1556 -> 1692 bytes 02-prepare_abe/console.log.xz | Bin 2768 -> 2784 bytes 03-build_abe-binutils/console.log.xz | Bin 45536 -> 44264 bytes 04-build_llvm/console.log.xz | Bin 58628 -> 59580 bytes 05-build_abe-qemu/console.log.xz | Bin 30284 -> 31436 bytes 06-build_linux/console.log.xz | Bin 5648 -> 3912 bytes 07-boot_linux/console.log.xz | Bin 508 -> 508 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 12 ++++++------ jenkins/manifest.sh | 10 ++++------ 10 files changed, 10 insertions(+), 12 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[gcc] branch master updated (77b84fb0a8e -> 0b028fb4989)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 77b84fb0a8e RISC-V: Cost model for ZBS extension. new 0b028fb4989 tree-optimization/102905 - restore re-align load for alignm [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/tree-vect-data-refs.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (afc9fcde55 -> c5b2f55981)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/qemu. from afc9fcde55 Merge remote-tracking branch 'remotes/mst/tags/for_upstream' [...] adds 621f70d210 spapr/xive: Add source status helpers adds 6f4912a416 target/ppc: Use tcg_constant_i32() in gen_setb() adds 491b3cca36 target/ppc: Use tcg_constant_i64() in gen_brh() adds a8dcb8da8a target/ppc: Fix the test raising the decrementer exception adds 3c706d0252 hw/ppc/spapr_softmmu: Reduce include list adds 644c68696e spapr/xive: Use xive_esb_rw() to trigger interrupts adds 5ae3d2e8ba hw/ppc: Fix iothread locking in the 405 code adds 252fcf36bb tests/acceptance: Add tests for the ppc405 boards adds 66c6b40aba linux-user/ppc: Fix XER access in save/restore_user_regs adds 7974dc5900 target/ppc: Fix XER access in gdbstub adds 10de052188 linux-user: Fix XER access in ppc version of elf_core_copy_regs adds 3938cacdb2 target/ppc: Fix XER access in monitor adds 239fec2497 ppc/pegasos2: Restrict memory to 2 gigabytes adds 99173b679a ppc/pegasos2: Warn when using VOF but no kernel is specified adds 94cd1ffbe1 ppc/pegasos2: Implement get-time-of-day RTAS function with VOF adds bd20cde50b ppc/pegasos2: Access MV64361 registers via their memory region adds d200ea14b7 ppc/pegasos2: Add constants for PCI config addresses adds 284c0486e7 ppc/pegasos2: Implement power-off RTAS function with VOF adds 5ff1dfdf66 tests/acceptance: Add a test for the bamboo ppc board adds 6fa5726be6 target/ppc: Filter mtmsr[d] input before setting MSR adds f7460df271 target/ppc: add MMCR0 PMCC bits to hflags adds 565cb10967 target/ppc: add user read/write functions for MMCR0 adds 7b3ecf16c8 target/ppc: add user read/write functions for MMCR2 adds cedf706956 target/ppc: adding user read/write functions for PMCs adds 6f9e8515c1 hw/ppc/ppc4xx_pci: Fix ppc4xx_pci_map_irq() for recent Linux [...] adds e016b58f6e Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-6 [...] adds 5384adef5d tests/acpi: Get prepared for IORT E.b revision upgrade adds 1c2cb7e0b3 hw/arm/virt-acpi-build: IORT upgrade up to revision E.b adds 47432863ff tests/acpi: Generate reference blob for IORT rev E.b adds 99abb72520 hw/arm/virt: Don't create device-tree node for empty NUMA node adds b152229697 roms/edk2: Only init brotli submodule to build BaseTools adds bd0da3a3d4 roms/edk2: Only initialize required submodules adds b84722cf44 hw/arm/sbsa-ref: Fixed cpu type error message typo. adds 8975eb891f hw/elf_ops.h: switch to ssize_t for elf loader return type adds 3cc322f437 tests/acpi: Add void table for virt/DBG2 bios-tables-test adds f0dc9a5d8d hw/arm/virt_acpi_build: Generate DBG2 table adds 98f5c60fbd bios-tables-test: Generate reference table for virt/DBG2 adds 31511b6fe0 hw/arm/virt: Only describe cpu topology since virt-6.2 adds b863f0b758 device_tree: Add qemu_fdt_add_path adds 72b0527ff6 hw/arm/virt: Add cpu-map to device tree adds 9de36ef872 hw/acpi/aml-build: Add Processor hierarchy node structure adds 099f2df2e6 hw/acpi/aml-build: Add PPTT table adds 4ebd52b92a tests/data/acpi/virt: Add an empty expected file for PPTT adds 70d23ed534 hw/arm/virt-acpi-build: Generate PPTT table adds f801789ff0 tests/data/acpi/virt: Update the empty expected file for PPTT adds 4c127fdbe8 Merge remote-tracking branch 'remotes/rth/tags/pull-arm-2021 [...] adds e976459b3b mac_via: update comment for VIA1B_vMystery bit adds 39950b16ec q800: move VIA1 IRQ from level 1 to level 6 adds 91ff5e4dcd q800: use GLUE IRQ numbers instead of IRQ level for GLUE IRQs adds 291bc1809a mac_via: add GPIO for A/UX mode adds a85d18aabd q800: wire up auxmode GPIO to GLUE adds f7c6e12e24 q800: route SONIC on-board Ethernet IRQ via nubus IRQ 9 in c [...] adds c7710c1ebf q800: wire up remaining IRQs in classic mode adds 3ea74abe2d q800: add NMI handler adds a56c12fb76 q800: drop 8-bit graphic_depth check for Apple 21 inch display adds 1dafe7656a Merge remote-tracking branch 'remotes/vivier-m68k/tags/q800- [...] adds 82b6a3f64d aspeed: Add support for the fp5280g2-bmc board adds fc6642544e aspeed/smc: Use a container for the flash mmio address space adds b12fa6118f speed/sdhci: Add trace events adds eb8f1d57bd Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-2 [...] adds b4b9a0e32f update seabios to master branch snapshot adds 9fb3fcfce5 update seabios binaries adds 2c64ff92ec Merge remote-tracking branch 'remotes/kraxel/tags/seabios-20 [...] adds c672f19f32 target/riscv: Pass the same value to oprsz and maxsz for vmv.v.v adds e573a7f325 target/riscv: line up all of the registers in the info regis [...] adds 54c1760937 target/riscv: Fix orc.b implementation adds 03fd0c5fe9 hw/riscv: virt: Use machine->ram as the system memory adds 61d5649488 target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh adds 31dbcff713 target/riscv: Remove some unused macros adds 9d3d60b704 target/riscv: Organise the CPU properties adds 53677acf25 target/riscv: Move cpu_get_tb_cpu_state out of line adds 99bc874fb3 target/riscv: Create RISCVMXL enumeration adds e91a7227cb target/riscv: Split misa.mxl and misa.ext adds db23e5d981 target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl adds 92371bd903 target/riscv: Add MXL/SXL/UXL to TB_FLAGS adds fbb48032e4 target/riscv: Use REQUIRE_64BIT in amo_check64 adds 4e97d459a0 target/riscv: Properly check SEW in amo_op adds 905b9fcde1 target/riscv: Replace is_32bit with get_xl/get_xlen adds 7667cafd5a target/riscv: Replace DisasContext.w with DisasContext.ol adds 80347ae9f2 target/riscv: Use gen_arith_per_ol for RVM adds 673be37163 target/riscv: Adjust trans_rev8_32 for riscv64 adds fdab665f6e target/riscv: Use gen_unary_per_ol for RVB adds a0245d91dd target/riscv: Use gen_shift*_per_ol for RVB, RVI adds 665b90d8a4 target/riscv: Use riscv_csrrw_debug for cpu_dump adds b550f89457 target/riscv: Compute mstatus.sd on demand adds ef63100648 hw/riscv: opentitan: Update to the latest build adds 434e7e0217 hw/intc: Remove the Ibex PLIC adds d8c6590f18 hw/intc: sifive_plic: Move the properties adds d680ff664e hw/intc: sifive_plic: Cleanup the realize function adds 8d3dae162e hw/intc: sifive_plic: Cleanup the irq_request function adds d4c624f482 hw/riscv: microchip_pfsoc: Use MachineState::ram and Machine [...] adds 91b1fbdc0c hw/riscv: opentitan: Use MachineState::ram and MachineClass: [...] adds 56917307f4 hw/riscv: shakti_c: Use MachineState::ram and MachineClass:: [...] adds e2b3ef7544 hw/riscv: sifive_e: Use MachineState::ram and MachineClass:: [...] adds c188a9c4f7 hw/riscv: sifive_u: Use MachineState::ram and MachineClass:: [...] adds 11ec06f9ea hw/riscv: spike: Use MachineState::ram and MachineClass::def [...] adds 660efed8b3 Merge remote-tracking branch 'remotes/alistair23/tags/pull-r [...] adds 764ecf77d0 po: update turkish translation adds ed899ac77d disas/nios2: Fix style in print_insn_nios2() adds dcc99bd833 disas/nios2: Simplify endianess conversion adds 3bc1bb8042 MAINTAINERS: Add myself as reviewer of 'Machine core' API adds f18d403f15 softmmu/physmem.c: Fix typo in comment adds c4e4d0d92b hw/nvram: Fix Memory Leak in Xilinx eFuse QOM adds 512a63b2b0 hw/nvram: Fix Memory Leak in Xilinx Versal eFuse device adds e3f368e0b2 hw/nvram: Fix Memory Leak in Xilinx ZynqMP eFuse device adds 1c3515ad59 README: Fix some documentation URLs adds f98d372aef analyze-migration.py: fix a long standing typo adds 2c92be50bc analyze-migration.py: fix extract contents ('-x') errors adds c5b2f55981 Merge remote-tracking branch 'remotes/vivier/tags/trivial-br [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/edk2.yml | 6 +- MAINTAINERS | 2 + README.rst | 14 +- disas/nios2.c | 73 +++---- hw/acpi/aml-build.c | 89 ++++++++ hw/arm/aspeed.c | 74 +++++++ hw/arm/boot.c | 13 ++ hw/arm/sbsa-ref.c | 2 +- hw/arm/virt-acpi-build.c | 117 +++++++++-- hw/arm/virt.c | 71 ++++++- hw/core/loader.c | 60 +++--- hw/intc/ibex_plic.c | 307 ---------------------------- hw/intc/meson.build | 1 - hw/intc/sifive_plic.c | 85 ++++---- hw/intc/spapr_xive.c | 2 +- hw/intc/spapr_xive_kvm.c | 14 +- hw/intc/xive.c | 8 +- hw/m68k/q800.c | 169 ++++++++++++++- hw/misc/mac_via.c | 23 +++ hw/misc/trace-events | 1 + hw/nvram/xlnx-efuse.c | 9 +- hw/nvram/xlnx-versal-efuse-ctrl.c | 20 +- hw/nvram/xlnx-zynqmp-efuse.c | 18 +- hw/pci-host/mv64361.c | 1 + hw/ppc/pegasos2.c | 162 +++++++++------ hw/ppc/ppc.c | 6 +- hw/ppc/ppc4xx_pci.c | 8 +- hw/ppc/spapr_softmmu.c | 15 -- hw/riscv/boot.c | 2 +- hw/riscv/microchip_pfsoc.c | 36 ++-- hw/riscv/opentitan.c | 38 +++- hw/riscv/shakti_c.c | 6 +- hw/riscv/sifive_e.c | 16 +- hw/riscv/sifive_u.c | 6 +- hw/riscv/spike.c | 6 +- hw/riscv/virt.c | 6 +- hw/sd/aspeed_sdhci.c | 5 + hw/sd/trace-events | 4 + hw/ssi/aspeed_smc.c | 11 +- include/disas/dis-asm.h | 3 +- include/hw/acpi/aml-build.h | 3 + include/hw/arm/virt.h | 4 +- include/hw/elf_ops.h | 27 +-- include/hw/loader.h | 58 +++--- include/hw/misc/mac_via.h | 1 + include/hw/ppc/xive.h | 24 +++ include/hw/riscv/opentitan.h | 6 +- include/hw/ssi/aspeed_smc.h | 2 +- include/sysemu/device_tree.h | 1 + linux-user/elfload.c | 4 +- linux-user/ppc/signal.c | 9 +- linux-user/riscv/cpu_loop.c | 2 +- pc-bios/bios-256k.bin | Bin 262144 -> 262144 bytes pc-bios/bios-microvm.bin | Bin 131072 -> 131072 bytes pc-bios/bios.bin | Bin 131072 -> 131072 bytes pc-bios/vgabios-ati.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-bochs-display.bin | Bin 28672 -> 28672 bytes pc-bios/vgabios-cirrus.bin | Bin 38912 -> 39424 bytes pc-bios/vgabios-qxl.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-ramfb.bin | Bin 28672 -> 28672 bytes pc-bios/vgabios-stdvga.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-virtio.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-vmware.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios.bin | Bin 38912 -> 38912 bytes po/tr.po | 25 ++- roms/Makefile | 3 +- roms/Makefile.edk2 | 7 +- roms/seabios | 2 +- scripts/analyze-migration.py | 6 +- scripts/make-release | 7 +- semihosting/arm-compat-semi.c | 2 +- softmmu/device_tree.c | 44 +++- softmmu/physmem.c | 2 +- target/nios2/cpu.c | 6 +- target/ppc/cpu.c | 2 +- target/ppc/cpu.h | 25 ++- target/ppc/cpu_init.c | 16 +- target/ppc/gdbstub.c | 8 +- target/ppc/helper_regs.c | 6 + target/ppc/monitor.c | 9 +- target/ppc/power8-pmu-regs.c.inc | 262 ++++++++++++++++++++++++ target/ppc/spr_tcg.h | 8 + target/ppc/translate.c | 95 +++++---- target/riscv/cpu.c | 216 ++++++++++--------- target/riscv/cpu.h | 87 +++----- target/riscv/cpu_bits.h | 16 +- target/riscv/cpu_helper.c | 92 ++++++++- target/riscv/csr.c | 104 ++++++---- target/riscv/gdbstub.c | 10 +- target/riscv/insn_trans/trans_rvb.c.inc | 153 ++++++++------ target/riscv/insn_trans/trans_rvi.c.inc | 44 ++-- target/riscv/insn_trans/trans_rvm.c.inc | 36 +++- target/riscv/insn_trans/trans_rvv.c.inc | 32 +-- target/riscv/machine.c | 10 +- target/riscv/monitor.c | 4 +- target/riscv/translate.c | 174 ++++++++++++---- tests/acceptance/ppc_405.py | 42 ++++ tests/acceptance/ppc_bamboo.py | 39 ++++ tests/data/acpi/virt/DBG2 | Bin 0 -> 87 bytes tests/data/acpi/virt/IORT | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.memhp | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.numamem | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.pxb | Bin 124 -> 128 bytes tests/data/acpi/virt/PPTT | Bin 0 -> 76 bytes tests/tcg/ppc64/Makefile.target | 2 + tests/tcg/ppc64le/Makefile.target | 2 + tests/tcg/ppc64le/signal_save_restore_xer.c | 42 ++++ 107 files changed, 2142 insertions(+), 1148 deletions(-) delete mode 100644 hw/intc/ibex_plic.c create mode 100644 target/ppc/power8-pmu-regs.c.inc create mode 100644 tests/acceptance/ppc_405.py create mode 100644 tests/acceptance/ppc_bamboo.py create mode 100644 tests/data/acpi/virt/DBG2 create mode 100644 tests/data/acpi/virt/PPTT create mode 100644 tests/tcg/ppc64le/signal_save_restore_xer.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (d531e5cf5841 -> a6096b7f9ed3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project. from d531e5cf5841 [LLDB] [NFC] Typo fix in usage text for "type filter" command adds 76db6d80805a [NFC][LoopIdiom] Add more test case to runtime-determined [...] adds e4ce92245c96 [fir] Add Character helper adds 46fb5d5ddffd [lldb][NFC] clang-format CPlusPlusLanguage.cpp adds 9c55e718f537 [mlir][linalg][bufferize] Bufferize using PostOrder traversal adds 65ef43e288ad [mlir][linalg][bufferize][NFC] Check return value of getRe [...] adds b37e5187f22f [MLIR][OpenMP] Add support for ordered construct adds 92fb574c9f20 [lldb] [Host] Add setters for common teletype properties t [...] adds 9448cdc90007 [SVE][Analysis] Tune the cost model according to the tune- [...] adds 36ec848dc718 [mlir][linalg][bufferize][NFC] Change findValueInReverseUs [...] adds 1a8ec24efbae [NARY-REASSOCIATE][NFC] Simplify min/max handling adds 4a7b4beac759 [lldb] Add serial:// protocol for connecting to serial port adds 4745e4178397 [lldb] [unittest] Disable SetParity() tests on Linux entirely adds cbe789844703 [lldb] [Host/Terminal] Add missing #ifdef for baudRateToConst() adds b8c3683d46f9 [lldb] [Host/SerialPort] Add std::moves for better compatibility adds 9635b2951da1 [docs] Fix broken link rendering in the LLVM Coding Standards. adds b471e25a5924 [clang] Support __float128 on DragonFlyBSD. adds 7bbd7e9c1d1d Revert "[fir] Add Character helper" adds 49be23a1eb57 [libcxx] Support allocators with explicit c-tors in vector<bool> adds 05a2d1766864 [libcxx] Throw correct exception from std::vector::reserve adds 9ba5bb43099d [NFC][LoopIdiom] Make for loops more readable adds 5a3556aa5563 [lldb] Add omitted abstract formal parameters in DWARF sym [...] adds 376c1389f6f3 [mlir] Use empty() calls where possible. adds 898e80964c95 [mlir] Fix a crash when creating a 1d zero element LLVM constant adds 2ace1e5753a4 [lldb] Remove ConstString from GetPluginNameStatic of some [...] adds 39724158d387 [lldb] Silence -Wpessimizing-move warning adds aad244dfc566 Revert "AddGlobalAnnotations for function with or without [...] adds 954d77b98dd6 [clang][deps] Ensure reported context hash is strict adds 24616664afd4 [clang][deps] NFC: Remove redundant CompilerInstance reference adds 207e9fdea704 [clang][deps] NFC: Rename scanning CompilerInstance adds c62220f9623d [clang][deps] NFC: Rename building CompilerInvocation adds 9bfe7af15976 [ARM] Add new abs test. NFC adds 302a165e18fd [MIPS] Fix switching between 32/64-bit variants of r6 targ [...] adds 0d153df69e8f [SVE] Fix selection failure when splitting extended masked loads adds 6c88086ba804 [lldb] Fix a thinko in 2ace1e57 adds b8b14b682c33 [clang][deps] Make resource directory deduction configurable adds 7ff4f48adb26 Relax assert in ExprConstant to a return None. adds c5501a7a5c58 [mlir][linalg][bufferize] Eliminate InitTensorOps of Inser [...] adds 7a7e93f1225c [mlir][linalg][bufferize] Avoid creating copies that are n [...] adds 94213bc7decb [mlir][linalg][bufferize] Fix bug in getInplaceableOpResult adds 5f8228d31062 [mlir][linalg][bufferize] Fix bufferizesToMemoryWrite for [...] adds 3ea7877c8b62 [SLP]Unify vectorization of PHI and store nodes with impro [...] adds fa111d30855e [SystemZ][z/OS] Additional test coverage for validating di [...] adds d2198771e9cc [DAGCombiner] fold bit-hack form of usubsat adds aa3519f178fc [SystemZ][z/OS] Initial implementation for lowerCall on z/OS adds 72117f2ffeb6 [runtimes] Properly handle the sysroot/triple/gcc-toolchain adds 88303693ce97 Do not downcast uint64_t to unsigned in UniqueID hash computation adds 6b560a8e235b [InstCombine] add tests for DeMorgan with reassociation; NFC adds 3888de9507c7 [InstCombine] generalize reassociated Demorgan folds adds a602c2b51dcc [libomptarget][DeviceRTL] Generalise and simplify cmakelists adds 203accf0bdde [mlir][Linalg] Improve conv vectorization for the stride==1 case. adds 5c72323141e4 [ORC-RT] Remove stray printf debugging output. adds 77fdc0e56bf9 [lld-macho] Simplify lc-linker-option.ll and re-enable it [...] adds 56df1d80e291 [libc++] Use addressof in vector. adds b396010240cd [Clang] Support typedef with btf_decl_tag attributes adds f6811cec8421 [DebugInfo] Support typedef with btf_decl_tag attributes adds dccfaddc6bcc [clang] Use StringRef::contains (NFC) adds b8da59475076 Reapply [ORC-RT] Configure the ORC runtime for more archit [...] adds 2dcad7754a20 [clang] Don't clear AST if we have consumers running after [...] adds cfca2ae1f5ba Update the C++ and C status pages now that Clang 13 has be [...] adds acfe7d895d2f Update the title and encoding for the C++ status page adds baea663a6e9b [IPT] Restructure cache to allow lazy update following inv [...] adds 92673fad66f4 [RISCV] Add a test showing incorrect VSETVLI insertion adds 19b07ec00062 Reland [clang] Pass -clear-ast-before-backend in Clang::Co [...] adds 66d22b4da4af [VectorCombine] fold shuffle-of-binops with common operand adds 13c31539f7da [fir] Add Character helper adds 92a6dd6e50c8 [test][ORC-RT] Disable x86_64 tests when target arch does [...] adds 21f9e4a1ed91 Avoid infinity arithmetics when computing exp approximations adds b7144ab76517 [NFC] Clean up a few methods within GreedyPatternRewriter adds 5652ecc3739d [mlir:GreedyPatternRewriter] Add debug logging for pattern [...] adds a4b8979a81af [SLP] Add additional tests which caused crashes with versioning. adds ba4920e98e2f Revert "[CMake] Cache the compiler-rt library search results" adds 408075ec6a95 Add the papers that were applied to the latest C2x working draft adds 3781a46c3c70 Revert "[IPT] Restructure cache to allow lazy update follo [...] adds d55be79d7548 [RISCV] Expand scalable vector CTTZ/CTLZ/CTPOP. adds ab3d5d053367 Revert "[compiler-rt/profile] Hide __llvm_profile_raw_version" adds f7587a9d38f4 Follow-up on https://github.com/llvm/llvm-project/commit/8 [...] adds 184852584231 [CodeMetrics] Don't require speculatability for ephemeral values adds 626f0449f345 [Triple] Don't repeat the function name in comments. NFC adds aee49255074f Recommit: Compress formatting of array type names (int [4] [...] adds d723ad5bcf71 Enable libc++ in the build for libcxx initializerlist pret [...] adds fdb66eda77a0 [test] Make sure plugin actually runs in clear-ast-before- [...] adds 8262f45c73ae [InstCombine] Add additional store forwarding test (NFC) adds 52f4922ebb7b [OpenMP][NFC] skip atomic tests for non-x86 arch adds d9eca3320a4d [modules] Fix tracking ObjCInterfaceType decl when there a [...] adds 0472e83ffcc6 BPF: emit BTF_KIND_DECL_TAG for typedef types adds d7b338537cf3 Modify "statistics dump" to dump JSON. adds 439fc09fed32 [gn build] Port d7b338537cf3 adds 969b72fb662b Add test to check we can instcombine after reassociate. NFC. adds 64f002c6d36d Follow-up fixes for aee49255074fd4ef38d97e6e70cbfbf2f9fd0fa7 adds 3087a8488948 [libcxx] [test] Add an XFAIL for the timespec test for Min [...] adds 6836629f8891 [libcxx] [test] Add a specific XFAIL for a MinGW env failu [...] adds 2ba572a82a35 [fir] Remove createConcatenate test temporarily adds 5dc339d9825f [AArch64][GlobalISel] Fold 64-bit cmps with 64-bit adds adds 1d8cc45b0e4e [mlir][vector] Add patterns to convert multidimreduce to v [...] adds 93d0ade17c2d [mlir][linalg] Remove special case for contraction vectorization adds 910838f07da7 Fix buildbots after https://reviews.llvm.org/D111686 adds 5c0369eceb2c Fix escaping in RewriterGen.cpp. adds 458ed5fcc362 [TargetLowering][RISCV] Prevent scalarization of fixed vec [...] adds db0486c46fe1 Remove unused parallel-libs project adds 95935e8285ad Make genAttributeVerifier escape the summary. adds 516884f58b46 [MLIR] Fix FloorDivSIOpConverter that was failing for inde [...] adds 8c1368052420 PR18733: Remove -Wweak-template-vtables adds f5ee1acc62d5 [libcxx] [test] Convert an XFAIL: LIBCXX-WINDOWS-FIXME int [...] adds 048d2c76efcd [modules] Update visibility for merged ObjCInterfaceDecl d [...] adds c0d6e1b9e0b1 [InstCombine] Precommit new and-xor-or.ll tests. NFC. adds ff37b1105d6e [LegalizeVectorOps][X86] Don't defer BITREVERSE expansion [...] adds 0bf230d42206 [fir] Remove unused function in CharacterTest adds 996123e5e8d9 [TargetLowering] Simplify the interface for expandCTPOP/ex [...] adds c16655f138b1 [docs] Remove Makefile.sphinx files adds 6c6abb1ded8d [RISCV] Remove Zvamo C intrinsics and builtins. adds 05c21f54a454 compiler-rt: Fix arch detection for ppc64le adds 09b95b9dc9af [lldb] Always set the minimum OS version in the Darwin builder adds d7733f84228b [DebugInfo] Expand ability to load 2-byte addresses in dwa [...] adds 08f4b56fb979 [lldb] Include unistd.h for sleep in profile_vrs_detach adds 2e97236aacbb [Demangle] Rename OutputStream to OutputString adds 4976be1e955d [gn build] Make 'compiler-rt' depend on include dir adds 3bbc869e2ef2 [mlir][linalg][bufferize] Support scf::IfOp adds ca0c92d6a1cc [AMDGPU] Allow to use a whole register file on gfx90a for VGPRs adds b7ea298dfd83 [msan] Don't use TLS slots of noundef args adds 34c97d5ae354 [libcxxabi] Fix build after D111947 adds a48bfc2c09ac [gn build] Port 2e97236aacbb adds ddbf1961941b [Coroutines] Ignore partial lifetime markers refer of an alloca adds 85bf221f204e Fix for OutputStream->OutputBuffer rename adds 13755436bb3d [PowerPC] return early if there is no preparing candidate [...] adds 86a5c3261643 [PowerPC] iterate on the SmallSet directly; NFC adds 3b93dc6880f7 Add basic aarch64-none-elf bare metal driver. adds 4ff103c02400 [clang][ASTImporter] Fix for importing functions with EST_ [...] adds a2e7af75166d [fir] Add utility function to FIRBuilder and MutableBox adds 71cfce832054 [lldb] Fix TestCompressedVectors after array type name change adds b5e9f83ea48e [lldb] Remove ConstString from ABI, Architecture and Disas [...] adds 01b4ddbfbbad [Analyzer][NFC] Move RangeConstraintManager's def before C [...] adds e2a2c8328f57 [Analyzer][NFC] Add RangedConstraintManager to ConstraintAssignor adds 5f8dca023504 [Analyzer] Extend ConstraintAssignor to handle remainder op adds e5b87fb7222c Fix baremetal.cpp test to handle windows paths. adds 74c6895b39e3 [RISCV] Fix missing cross-block VSETVLI insertion adds cac8808f154c [analyzer][solver] Introduce reasoning for not equal to operator adds eda2ebd78073 [mlir][Vector] NFC - Extract rewrites related to insert/ex [...] adds d46531567919 [LLVM-C]Add LLVMAddMetadataToInst, deprecated LLVMSetInstD [...] adds 66e06cc8cba3 [llvm] [ADT] Update llvm::Split() per Pavel Labath's suggestions adds 99a64cc9da29 AMDGPULibCalls::parseFunctionName - use reference instead [...] adds 49e1753c5ef9 Mark baremetal.cpp test as unsupported on Windows. adds 8b8070e23442 Host::GetOSBuildString adds 8ae83a1bafdf [NFC][LV] Autogenerate check lines in a test for ease of f [...] adds 2eaef530232e [TTI] `BasicTTIImplBase::getInterleavedMemoryOpCost()`: fi [...] adds a750332d7701 AMDGPULibCalls - constify some FuncInfo& arguments. NFCI. adds 6f6842d782a1 Revert "[NFC][LV] Autogenerate check lines in a test for e [...] adds e1db72703f65 [NFC] Re-harden test/Transforms/LoopVectorize/X86/pr48340.ll adds 43f8845dd371 [lldb] Fix build errors from 8b8070e23 adds ff569ed03092 [lldb] [Utility/UriParser] Replace port==-1 with llvm::None adds 286e98b97ebe [DSE] Add test cases with more complex redundant stores. adds 3f00e10bddd7 [mlir][OpenMP]Support for modifiers in workshare loops adds 74cd4dee20e8 [AMDGPU] Preserve deadness of vcc when shrinking instructions adds d8e50c9dba7a [CodeGen] Add PR50197 AArch64/ARM/X86 test coverage adds f37463b2eef6 [lldb] Another build fix for 8b8070e23 adds fd5e3f36f218 Replace references to Makefile.sphinx adds 8fac9e95ade9 [X86] `X86TTIImpl::getInterleavedMemoryOpCost()`: scale in [...] adds 0bd6a9f2d1ea [clang/llvm] Inclusive language: replace segregate with separate adds cfe22cd4ef9d [AArch64][SVE] Add new ld<n> intrinsics that return a stru [...] adds 3085e678519e [Flang][docs] Remove an out-dated section on the new driver adds c87a4a46b217 [libc++][test][NFC] Add tests for std::vector comparisons adds 7457fe3dd44a [InstCombine][NFC] Precommit new tests adds 09dc8ab74c94 [libc++][doc] Fixes FeatureTestMacroTable.html. adds 7593f68a0551 [libc++][nfc] Remove double spaces. adds 12b44bf5ee3e [SystemZ] Give the EXRL_Pseudo a size value of 6 bytes. adds 6fe949c4edf1 [Target, Transforms] Use StringRef::contains (NFC) adds ba02586fbe18 [OpenMP][OMPT][GOMP] task frame support in KMP_API_NAME_GO [...] adds ce7b8343beb6 [RISCV] Merge vector tests for rv32 and rv64 into a single [...] adds 28ef8052d228 [AIX] Enable rtl for plugins test adds 0766aef3f32d [LegalizeTypes][RISCV][PowerPC] Expand CTLZ/CTTZ/CTPOP ins [...] adds 5bb7562962de [Attributor] Generalize GEP construction adds 3a10fe2d893f [Loads] Use more powerful constant folding API adds 7ea5409e42c8 [libc++] Fix tests after aee49255074f adds 950f22a5e13c [llvm]Inclusive language: replace master with main adds 0f12cf7ebaaf [lldb] Pass the target triple when determining the DWARF version adds 04c184bba7d7 [TargetLowering] Simplify the interface of expandABS. NFC adds d9eebe3cd783 [DebugInfo][InstrRef] Add unit tests for transfer-function [...] adds 412eb07edd4e [indvars] Use fact loop must exit to canonicalize to unsig [...] adds a5f56342b017 [DAG] narrowExtractedVectorLoad - EXTRACT_SUBVECTOR indice [...] adds d4da71282f6e [InstCombine] Various tests for truncating saturates and r [...] adds d5074c716664 [flang] Fix bogus folding error for ISHFT(x, negative) adds 93139a3c3266 [LegalizeTypes] Only expand CTLZ/CTTZ/CTPOP during type pr [...] adds b03628d986d4 [flang] Emit unformatted headers & footers even with RECL= adds e7084ceab312 [DebugInfo][Instr] Track subregisters across stack spills/ [...] adds f2360e1156d0 [flang] Enforce rest of semantic constraint C919 adds e6f39c8b4891 [libunwind] Fix path to libunwind for per-target-runtime-d [...] adds 6cf69179170e [Dexter] Add DexFinishTest command to conditionally early- [...] adds 4d692daa3a6a [ConstantFolding] Drop misleading comment (NFC) adds 27181cad0d4e Support: Add Expected<T>::moveInto() to avoid extra names adds 55f7cc1a9a2a [InstCombine] Precommit new and-xor-or.ll tests. NFC. adds 2915889d74b1 [ScheduleDAGInstrs] Call adjustSchedDependency in more cases adds 3f34f75a68c3 [AMDGPU] Fix latency for implicit vcc_lo operands on GFX10 wave32 adds 42e4959253e0 [lldb/Formatters] Remove space from vector type string sum [...] adds 58e7ec471c3e [AMDGPU] Run SIShrinkInstructions before post-RA scheduling adds 489fec277788 [mlir][Linalg] NFC - Drop Optional in favor of FailureOr adds ae698f89b8a4 AMDGPU: Fix hardcoded registers in tests adds 7d962f9ca365 AMDGPU: Regenerate MIR test checks adds c4ba1108dd60 [flang] Extension to distinguish specific procedures adds 2410fb4616b2 Support: Use Expected<T>::moveInto() in a few places adds a41837d1dad3 [libc++][NFC] Remove duplicate Python imports adds cd824f9e39c8 [X86] Fix bad formatting. NFC adds 8d4b74ac3f1f AMDGPU: Don't consider whether amdgpu-flat-work-group-size [...] adds ec57b3755111 AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size adds e4235bdf26a2 Fix locals naming in DNBArchMachARM64::GetGPRState for 32- [...] adds 89d55d3c86f0 [mlir][Linalg] Retire CodegenStrategy::transform adds 236197e2d026 [lld-macho] Implement -oso_prefix adds b8452dba28e7 [flang] Support NAMELIST input of short arrays adds 14b90d1fe0d7 [flang] Fix generic resolution case adds a5a493e19205 [flang] Speed common runtime cases of DOT_PRODUCT & MATMUL adds 61cfdf636dc7 [BasicAA] Model implicit trunc of GEP indices adds bf6f955f393f [libomptarget] Run GPU offloading tests on both new and ol [...] adds ce71f8e01742 [flang] Fix crash on empty formatted external READs adds fbb020fb48be [flang] Extension: allow tabs in output format strings adds f6aac0dd4d13 [flang] Fix DOT_PRODUCT for logical adds 89a927c67812 [flang] Fix NAMELIST input bug with multiple subscript triplets adds b83242e20e09 [flang] Support legacy usage of 'A' edit descriptors for i [...] adds e18ea6f2946a Support: Skip buffering buffer_unique_ostream's owned stream adds ec2a25296fec [gn build] Port e18ea6f2946a adds 4e3eebc6bd32 [tools, utils] Use StringRef::contains (NFC) adds fc3f92a8f457 [flang] Fix buildbot (new warnings on old code) adds b432583d28ee [NFC][X86] Add MC tests for all untested VIA PadLock instructions adds 2d8c18fbbdd1 [X86] Don't add implicit REP prefix to VIA PadLock xstore adds 7088da480c33 [NFC] Correct arc draft option adds 5de69e16ea9a [clang-tidy] Tidy up spelling, grammar, and inconsistencie [...] adds ff56d80eaa5e [lldb] [Host/FreeBSD] Remove unused variable (NFC) adds ea9e9d61b521 [lldb] [Host/SerialPort] Fix build with GCC 7 adds c5348355ee66 [www] Fix Ninja build instructions on Windows adds 35553d452b32 [mlir] Add polynomial approximation for vectorized math::Rsqrt adds 4703a07e6cc1 [mlir][Linalg] NFC - Reorganize options nesting. adds 4f5e9a2bb28e [SCEV] Remove computeLoadConstantCompareExitLimit() (NFCI) adds e03b4431132e Revert "[mlir][Linalg] NFC - Reorganize options nesting." adds c5b5b7f621ee [ConstantFolding] Remove ConstantFoldLoadThroughGEPIndices [...] adds 878060aaf965 [Orc][examples] Re-enable test for LLJITWithRemoteDebugging adds d14d7068b6b4 [llvm] Use StringRef::contains (NFC) adds d8e4170b0a14 Ensure newlines at the end of files (NFC) adds 710596a1e151 [ConstantFolding] Accept offset in ConstantFoldLoadFromCon [...] adds f9db6a44eb37 Revert "[analyzer][solver] Introduce reasoning for not equ [...] adds 0c7f85d7864b [InstSimplify] Simplify fetching of index size (NFC) adds b09f2ee57c47 [X86] findEltLoadSrc - fix shift amount variable name. NFCI. adds a709787cd988 Add support of the next Ubuntu (Ubuntu 22.04 - Jammy Jellyfish) adds 4ba9d9c84f4c Use StringRef::contains (NFC) adds b33c211804d1 [TableGen] Use llvm::erase_value (NFC) adds d34cad31963f [AMDGPU] add tests for alternate form of usubsat; NFC adds 35c767a685ee [x86] add tests for variants of usubsat; NFC adds 2ae67c9684ec [BasicAA] Add range test with multiple indices (NFC) adds f5f592683f82 [MLIR] FlatAffineValueConstraints: Fix bug in mergeSymbolIds adds 7cc8fa2dd2d8 Use llvm::is_contained (NFC) adds 1c35973c772b [llvm] Call *(Set|Map)::erase directly (NFC) adds 54405a49d868 [ARC] Fix -Wunused-variable. NFC adds e5859afa9f4f [sanitizer] Remove use_count from StackDepotNode adds 850217686e21 [sanitizer] Remove tag from StackDepotNode adds 3c06ecaa1e8d [instcombine] Fix oss-fuzz 39934 (mul matcher can match no [...] adds a461fa64bb37 Treat branch on poison as immediate UB (under an off by de [...] adds 683994c863b8 X86InstrInfo: Refactor and cleanup optimizeCompareInstr adds 4b75d674f899 X86InstrInfo: Look across basic blocks in optimizeCompareInstr adds 19d3bc1e67b0 pre-comitting tests for D110865 adds 4bd46501c394 Use llvm::any_of and llvm::none_of (NFC) adds 980073136711 [Target, Transforms] Use predecessors instead of pred_begi [...] adds 42e9af9e8f48 [mlir] Rename to avoid overlap in accessor prefixing adds 815a1207bfe1 [ELF] Remove ignored options that likely nobody uses adds cfb72fd3a070 [mlir] Switch arith, llvm, std & shape dialects to accesso [...] adds 5bf24f0581ee [NFC][sanitizer] constexpr a few functions adds 384ec7dc8c36 [NFC][sanitizer] DCHECKs in hot code adds 8cd51a69e5b4 [NFC][sanitizer] Use power of two in TwoLevelMap adds a7d34c80ed1d [RISCV] Rename vmulh-sdnode-rv32.ll and add rv64 command l [...] adds fb1c515d3b12 Revert "[NFC][sanitizer] constexpr a few functions" adds 7ea1fbe86d92 [AIX] Add i128 arg split tests adds ac14b8396e61 [mlir] Give GenericAtomicRMW region a name adds 80e6aff6bbad [PowerPC] common chains to reuse offsets to reduce registe [...] adds a8c1d9d63e12 Add a clear() method on the PassManager (NFC) adds fea4a48c0baa [SCEV][NFC] API for tracking of SCEV users adds 1c18ebb2cc7c [NFC][SCEV] Do not track users of SCEVConstants adds 1b702eea94ae [mlir][Linalg] NFC - Reorganize options nesting. adds a27ae8aa20f4 [NFC] Update test/CodeGen/RISCV/select-constant-xor.ll to [...] adds a6096b7f9ed3 [SCEV][NFC] Introduce API for mass forgetMemoizedResults query No new revisions were added by this update. Summary of changes: README.md | 3 +- clang-tools-extra/clangd/HeuristicResolver.cpp | 2 +- .../clangd/unittests/ClangdLSPServerTests.cpp | 2 +- .../clangd/unittests/DiagnosticsTests.cpp | 2 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 2 +- clang-tools-extra/docs/clang-tidy/Contributing.rst | 10 +- .../checks/abseil-duration-conversion-cast.rst | 2 +- .../checks/abseil-no-internal-dependencies.rst | 2 +- .../checks/abseil-string-find-str-contains.rst | 2 +- .../clang-tidy/checks/android-cloexec-open.rst | 2 +- .../clang-tidy/checks/android-cloexec-pipe2.rst | 2 +- .../docs/clang-tidy/checks/boost-use-to-string.rst | 2 +- .../clang-tidy/checks/bugprone-branch-clone.rst | 2 +- .../bugprone-easily-swappable-parameters.rst | 8 +- ...-implicit-widening-of-multiplication-result.rst | 4 +- .../checks/bugprone-macro-parentheses.rst | 4 +- ...prone-misplaced-operator-in-strlen-in-alloc.rst | 2 +- .../checks/bugprone-not-null-terminated-result.rst | 4 +- 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clang/lib/ARCMigrate/ObjCMT.cpp | 5 +- clang/lib/ARCMigrate/TransUnbridgedCasts.cpp | 7 +- clang/lib/ARCMigrate/Transforms.cpp | 6 +- clang/lib/AST/ASTImporter.cpp | 18 +- clang/lib/AST/DeclObjC.cpp | 4 - clang/lib/AST/Expr.cpp | 2 +- clang/lib/AST/ExprConstant.cpp | 6 +- clang/lib/AST/Type.cpp | 7 + clang/lib/AST/TypePrinter.cpp | 4 - clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 4 +- clang/lib/Analysis/CFG.cpp | 2 +- clang/lib/Analysis/ObjCNoReturn.cpp | 9 +- clang/lib/Analysis/RetainSummaryManager.cpp | 3 +- clang/lib/Analysis/ThreadSafety.cpp | 8 +- clang/lib/Basic/Targets/AVR.cpp | 6 +- clang/lib/Basic/Targets/OSTargets.h | 3 + clang/lib/CodeGen/BackendUtil.cpp | 13 +- clang/lib/CodeGen/CGDebugInfo.cpp | 4 +- clang/lib/CodeGen/CGGPUBuiltin.cpp | 2 +- clang/lib/CodeGen/CodeGenFunction.cpp | 3 +- clang/lib/CodeGen/CodeGenModule.cpp | 5 +- clang/lib/CodeGen/CoverageMappingGen.cpp | 12 +- clang/lib/CodeGen/TargetInfo.cpp | 2 +- clang/lib/Driver/Distro.cpp | 1 + clang/lib/Driver/ToolChains/AMDGPU.cpp | 2 +- clang/lib/Driver/ToolChains/BareMetal.cpp | 17 +- clang/lib/Driver/ToolChains/Clang.cpp | 8 +- clang/lib/Driver/ToolChains/Cuda.cpp | 12 +- clang/lib/Format/UnwrappedLineParser.cpp | 7 +- clang/lib/Frontend/FrontendAction.cpp | 9 +- clang/lib/Interpreter/Interpreter.cpp | 4 + clang/lib/Lex/HeaderSearch.cpp | 2 +- clang/lib/Lex/LiteralSupport.cpp | 2 +- clang/lib/Lex/ModuleMap.cpp | 5 +- clang/lib/Parse/ParseExprCXX.cpp | 4 +- clang/lib/Rewrite/Rewriter.cpp | 2 +- clang/lib/Sema/AnalysisBasedWarnings.cpp | 2 +- clang/lib/Sema/SemaAttr.cpp | 2 +- clang/lib/Sema/SemaChecking.cpp | 7 +- clang/lib/Sema/SemaDeclAttr.cpp | 10 +- clang/lib/Sema/SemaDeclCXX.cpp | 15 +- clang/lib/Sema/SemaExprCXX.cpp | 59 +- clang/lib/Sema/SemaLookup.cpp | 5 +- clang/lib/Sema/SemaOpenMP.cpp | 9 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 9 +- clang/lib/Sema/SemaTemplateVariadic.cpp | 7 +- clang/lib/Sema/SemaType.cpp | 2 +- clang/lib/Serialization/ASTReaderDecl.cpp | 1 + .../lib/StaticAnalyzer/Checkers/StreamChecker.cpp | 2 +- .../StaticAnalyzer/Core/RangeConstraintManager.cpp | 258 +- .../DependencyScanningWorker.cpp | 55 +- .../DependencyScanning/ModuleDepCollector.cpp | 58 +- clang/test/ARCMT/cxx-checking.mm | 2 +- clang/test/AST/ast-dump-APValue-arithmetic.cpp | 4 +- clang/test/AST/ast-dump-APValue-array.cpp | 8 +- clang/test/AST/ast-dump-array.cpp | 6 +- clang/test/AST/ast-dump-color.cpp | 2 +- clang/test/AST/ast-dump-expr-json.c | 14 +- clang/test/AST/ast-dump-expr-json.cpp | 2 +- clang/test/AST/ast-dump-expr-json.m | 16 +- clang/test/AST/ast-dump-expr.c | 14 +- clang/test/AST/ast-dump-expr.cpp | 2 +- clang/test/AST/ast-dump-file-line-json.c | 4 +- .../AST/ast-dump-openmp-begin-declare-variant_9.c | 20 +- clang/test/AST/ast-dump-records-json.cpp | 4 +- clang/test/AST/ast-dump-records.c | 4 +- clang/test/AST/ast-dump-records.cpp | 4 +- clang/test/AST/ast-dump-stmt-json.cpp | 22 +- clang/test/AST/ast-dump-stmt.cpp | 16 +- clang/test/AST/ast-dump-template-decls-json.cpp | 4 +- clang/test/AST/ast-dump-templates.cpp | 4 +- clang/test/AST/ast-dump-types-errors-json.cpp | 4 +- clang/test/AST/atomic-expr.cpp | 12 +- clang/test/AST/float16.cpp | 16 +- clang/test/AST/pr47636.cpp | 18 +- clang/test/AST/sourceranges.cpp | 2 +- clang/test/ASTMerge/var/test.c | 4 +- clang/test/Analysis/auto-obj-dtors-cfg-output.cpp | 12 +- clang/test/Analysis/cfg.cpp | 16 +- clang/test/Analysis/constraint-assignor.c | 69 + clang/test/Analysis/explain-svals.cpp | 2 +- clang/test/Analysis/lifetime-cfg-output.cpp | 4 +- clang/test/Analysis/malloc-sizeof.c | 2 +- clang/test/Analysis/more-dtors-cfg-output.cpp | 8 +- clang/test/Analysis/scopes-cfg-output.cpp | 10 +- clang/test/CXX/basic/basic.types/p10.cpp | 6 +- clang/test/CXX/dcl.dcl/dcl.attr/dcl.align/p7.cpp | 2 +- .../CXX/dcl.dcl/dcl.spec/dcl.typedef/p2-0x.cpp | 2 +- clang/test/CXX/dcl.decl/dcl.decomp/p2.cpp | 4 +- .../CXX/dcl.decl/dcl.init/dcl.init.list/p3.cpp | 4 +- .../test/CXX/dcl.decl/dcl.meaning/dcl.array/p3.cpp | 24 +- .../test/CXX/dcl.decl/dcl.meaning/dcl.fct/p13.cpp | 8 +- clang/test/CXX/drs/dr177x.cpp | 8 +- .../expr.prim/expr.prim.id/mixed-constraints.cpp | 10 +- clang/test/CXX/expr/expr.prim/expr.prim.id/p4.cpp | 4 +- .../CXX/expr/expr.prim/expr.prim.lambda/p4.cpp | 2 +- clang/test/CXX/special/class.copy/p23-cxx11.cpp | 2 +- clang/test/CXX/special/class.ctor/p5-0x.cpp | 2 +- .../CXX/stmt.stmt/stmt.iter/stmt.ranged/p1.cpp | 4 +- .../test/CXX/temp/temp.arg/temp.arg.nontype/p1.cpp | 2 +- .../temp.constr.constr/non-function-templates.cpp | 20 +- .../test/CXX/temp/temp.decls/temp.variadic/p2.cpp | 6 +- clang/test/CXX/temp/temp.explicit/p8.cpp | 6 +- clang/test/CXX/temp/temp.param/p10-2a.cpp | 30 +- .../Inputs/modules-context-hash/a/dep.h | 0 .../Inputs/modules-context-hash/b/dep.h | 0 .../Inputs/modules-context-hash/cdb.json.template | 12 + .../Inputs/modules-context-hash/mod.h | 1 + .../module.modulemap | 0 .../{diagnostics => modules-context-hash}/tu.c | 0 .../Inputs/resource_directory/cdb.json.template | 7 + .../Inputs/resource_directory/compiler | 3 + .../{diagnostics => resource_directory}/mod.h | 0 .../module.modulemap | 0 .../{diagnostics => resource_directory}/tu.c | 0 clang/test/ClangScanDeps/modules-context-hash.c | 89 + clang/test/ClangScanDeps/resource_directory.c | 25 + .../RISCV/rvv-intrinsics-overloaded/vamoadd.c | 1406 --------- .../RISCV/rvv-intrinsics-overloaded/vamoand.c | 1406 --------- .../RISCV/rvv-intrinsics-overloaded/vamomax.c | 1406 --------- .../RISCV/rvv-intrinsics-overloaded/vamomin.c | 1406 --------- .../RISCV/rvv-intrinsics-overloaded/vamoor.c | 1406 --------- .../RISCV/rvv-intrinsics-overloaded/vamoswap.c | 2421 ---------------- .../RISCV/rvv-intrinsics-overloaded/vamoxor.c | 1406 --------- clang/test/CodeGen/RISCV/rvv-intrinsics/vamoadd.c | 1406 --------- clang/test/CodeGen/RISCV/rvv-intrinsics/vamoand.c | 1406 --------- clang/test/CodeGen/RISCV/rvv-intrinsics/vamomax.c | 1406 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+- .../Host/ConnectionFileDescriptorTest.cpp | 4 +- lldb/unittests/Host/SocketTest.cpp | 6 +- lldb/unittests/Host/posix/TerminalTest.cpp | 139 + lldb/unittests/Utility/UriParserTest.cpp | 23 +- llvm/CMakeLists.txt | 2 +- llvm/docs/AMDGPUUsage.rst | 9 +- llvm/docs/CMake.rst | 2 +- llvm/docs/CodingStandards.rst | 4 +- llvm/docs/Makefile.sphinx | 155 - llvm/docs/Phabricator.rst | 7 +- llvm/docs/ProgrammersManual.rst | 40 + llvm/docs/README.txt | 9 +- llvm/docs/ReleaseNotes.rst | 3 +- llvm/docs/TableGen/BackGuide.rst | 2 +- llvm/include/llvm-c/Core.h | 10 + llvm/include/llvm/ADT/StringExtras.h | 57 +- llvm/include/llvm/ADT/Triple.h | 135 +- llvm/include/llvm/Analysis/ConstantFolding.h | 30 +- llvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h | 9 +- llvm/include/llvm/Analysis/ScalarEvolution.h | 39 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 5 +- .../llvm/CodeGen/GlobalISel/GenericMachineInstrs.h | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 22 +- llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 17 + .../llvm/DebugInfo/DWARF/DWARFDebugRangeList.h | 7 +- llvm/include/llvm/Demangle/ItaniumDemangle.h | 1039 ++++--- .../include/llvm/Demangle/MicrosoftDemangleNodes.h | 92 +- llvm/include/llvm/Demangle/Utility.h | 30 +- llvm/include/llvm/IR/DIBuilder.h | 4 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 23 + llvm/include/llvm/Support/Error.h | 10 + llvm/include/llvm/Support/FileSystem/UniqueID.h | 9 +- llvm/include/llvm/Support/raw_ostream.h | 6 +- llvm/lib/Analysis/AssumptionCache.cpp | 4 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 56 +- llvm/lib/Analysis/CodeMetrics.cpp | 5 +- llvm/lib/Analysis/ConstantFolding.cpp | 33 +- llvm/lib/Analysis/InstructionSimplify.cpp | 5 +- llvm/lib/Analysis/Loads.cpp | 7 +- llvm/lib/Analysis/LoopCacheAnalysis.cpp | 7 +- llvm/lib/Analysis/OverflowInstAnalysis.cpp | 2 +- llvm/lib/Analysis/ScalarEvolution.cpp | 121 +- llvm/lib/Analysis/TargetLibraryInfo.cpp | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 26 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 18 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 2 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 2 + llvm/lib/CodeGen/CodeGenCommonISel.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 +- .../CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp | 368 ++- .../CodeGen/LiveDebugValues/InstrRefBasedImpl.h | 208 +- .../CodeGen/LiveDebugValues/VarLocBasedImpl.cpp | 6 +- llvm/lib/CodeGen/RDFLiveness.cpp | 2 +- llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 46 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 8 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 48 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 43 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 86 +- llvm/lib/DebugInfo/DWARF/DWARFDebugAddr.cpp | 28 +- llvm/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp | 11 +- llvm/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp | 33 +- llvm/lib/DebugInfo/DWARF/DWARFListTable.cpp | 10 +- llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp | 13 +- llvm/lib/DebugInfo/Symbolize/Symbolize.cpp | 5 +- llvm/lib/Demangle/ItaniumDemangle.cpp | 70 +- llvm/lib/Demangle/MicrosoftDemangle.cpp | 98 +- llvm/lib/Demangle/MicrosoftDemangleNodes.cpp | 404 +-- llvm/lib/Demangle/RustDemangle.cpp | 10 +- llvm/lib/FileCheck/FileCheck.cpp | 4 +- llvm/lib/IR/Attributes.cpp | 4 +- llvm/lib/IR/AutoUpgrade.cpp | 2 +- llvm/lib/IR/Constants.cpp | 2 +- llvm/lib/IR/Core.cpp | 4 + llvm/lib/IR/DIBuilder.cpp | 6 +- llvm/lib/IR/DataLayout.cpp | 20 +- llvm/lib/InterfaceStub/IFSHandler.cpp | 2 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 2 +- llvm/lib/Object/ObjectFile.cpp | 15 +- llvm/lib/ProfileData/InstrProfWriter.cpp | 3 +- llvm/lib/ProfileData/SampleProfWriter.cpp | 2 +- llvm/lib/Support/ARMTargetParser.cpp | 4 +- llvm/lib/Support/DebugOptions.h | 2 +- llvm/lib/Support/TimeProfiler.cpp | 5 +- llvm/lib/Support/Triple.cpp | 60 +- llvm/lib/Support/Unix/Program.inc | 3 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 74 +- llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 10 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 3 + .../Target/AArch64/AArch64TargetTransformInfo.cpp | 2 +- .../Target/AArch64/AArch64TargetTransformInfo.h | 13 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 2 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 133 +- llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 129 +- .../Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 29 +- .../Target/AMDGPU/AMDGPUPropagateAttributes.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 5 +- llvm/lib/Target/AMDGPU/MCA/CMakeLists.txt | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 2 + llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 32 + llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 5 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 34 +- llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 4 + llvm/lib/Target/ARC/ARCInstrInfo.cpp | 3 +- llvm/lib/Target/ARC/ARCInstrInfo.h | 1 - llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 10 +- llvm/lib/Target/BPF/BTFDebug.cpp | 2 + llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp | 2 +- llvm/lib/Target/CSKY/CSKYInstrFormats.td | 2 +- llvm/lib/Target/CSKY/CSKYInstrInfo.td | 2 +- llvm/lib/Target/CSKY/CSKYSubtarget.cpp | 2 +- llvm/lib/Target/CSKY/CSKYSubtarget.h | 2 +- llvm/lib/Target/CSKY/MCTargetDesc/CSKYFixupKinds.h | 2 +- .../lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h | 2 +- .../Target/CSKY/MCTargetDesc/CSKYMCCodeEmitter.cpp | 2 +- .../Target/CSKY/MCTargetDesc/CSKYMCCodeEmitter.h | 2 +- llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCExpr.cpp | 2 +- llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCExpr.h | 2 +- .../Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.h | 2 +- llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp | 2 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 3 +- .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 9 +- llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp | 464 ++- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 + llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 13 +- llvm/lib/Target/SystemZ/SystemZCallingConv.cpp | 4 + llvm/lib/Target/SystemZ/SystemZCallingConv.h | 71 +- llvm/lib/Target/SystemZ/SystemZCallingConv.td | 33 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 69 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.td | 2 +- llvm/lib/Target/SystemZ/SystemZRegisterInfo.h | 14 + llvm/lib/Target/TargetMachine.cpp | 3 + .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 10 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 12 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 173 +- llvm/lib/Target/X86/X86InstrSystem.td | 2 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 16 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 6 +- llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 45 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 9 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 37 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 4 +- .../Instrumentation/AddressSanitizer.cpp | 3 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 77 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 45 +- llvm/lib/Transforms/Scalar/LICM.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 46 +- llvm/lib/Transforms/Scalar/NaryReassociate.cpp | 117 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 8 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 8 +- llvm/lib/Transforms/Utils/VNCoercion.cpp | 27 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 357 ++- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 56 + llvm/lib/XRay/InstrumentationMap.cpp | 6 +- llvm/projects/CMakeLists.txt | 2 - .../BasicAA/gep-implicit-trunc-32-bit-pointers.ll | 17 +- llvm/test/Analysis/BasicAA/range.ll | 19 + llvm/test/Analysis/CostModel/AArch64/sve-gather.ll | 111 +- .../Analysis/CostModel/AArch64/sve-intrinsics.ll | 4 +- .../test/Analysis/CostModel/AArch64/sve-scatter.ll | 111 +- .../interleaved-load-i32-stride-2-indices-0u.ll | 18 +- .../interleaved-load-i32-stride-3-indices-01u.ll | 10 +- .../interleaved-load-i32-stride-3-indices-0uu.ll | 10 +- .../interleaved-load-i32-stride-4-indices-012u.ll | 10 +- .../interleaved-load-i32-stride-4-indices-01uu.ll | 10 +- .../interleaved-load-i32-stride-4-indices-0uuu.ll | 10 +- llvm/test/Bitcode/attr-btf_tag-typedef.ll | 54 + .../test/CodeGen/AArch64/GlobalISel/select-cmp.mir | 291 +- llvm/test/CodeGen/AArch64/icmp-shift-opt.ll | 142 + .../sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll | 568 ++++ .../sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll | 284 ++ llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll | 20 + llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll | 20 + .../AMDGPU/GlobalISel/insertelement-stack-lower.ll | 90 +- .../AMDGPU/GlobalISel/insertelement.large.ll | 2 +- .../AMDGPU/GlobalISel/irtranslator-atomicrmw.ll | 70 +- .../GlobalISel/irtranslator-constrained-fp.ll | 274 +- .../AMDGPU/GlobalISel/irtranslator-inline-asm.ll | 315 +- .../AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll | 14 +- .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 650 ++--- .../attr-amdgpu-flat-work-group-size-vgpr-limit.ll | 5 + .../CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll | 4 +- ...-flat-work-group-size-overrides-waves-per-eu.ll | 63 + llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll | 4 +- llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll | 102 +- llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 8 +- llvm/test/CodeGen/AMDGPU/memcpy-scoped-aa.ll | 14 +- llvm/test/CodeGen/AMDGPU/occupancy-levels.ll | 2 +- .../propagate-attributes-flat-work-group-size.ll | 49 - .../AMDGPU/propagate-flat-work-group-size.ll | 214 ++ llvm/test/CodeGen/AMDGPU/schedule-ilp.ll | 2 +- .../CodeGen/AMDGPU/schedule-regpressure-limit3.ll | 2 +- llvm/test/CodeGen/AMDGPU/shrink-carry.mir | 8 +- llvm/test/CodeGen/AMDGPU/target-cpu.ll | 4 +- llvm/test/CodeGen/AMDGPU/usubsat.ll | 88 +- ...ize-vgpr-limit.ll => vgpr-agpr-limit-gfx90a.ll} | 185 +- llvm/test/CodeGen/ARM/icmp-shift-opt.ll | 151 + llvm/test/CodeGen/BPF/BTF/tag-typedef.ll | 87 + llvm/test/CodeGen/PowerPC/common-chain.ll | 569 ++-- llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 134 +- llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll | 75 + llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 427 +-- llvm/test/CodeGen/RISCV/rv64zbb.ll | 455 +-- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 3017 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 1142 ++++++++ llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 2555 +++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 2601 ++++------------- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll | 837 ------ .../rvv/{vadd-sdnode-rv64.ll => vadd-sdnode.ll} | 95 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll | 1329 --------- .../rvv/{vand-sdnode-rv64.ll => vand-sdnode.ll} | 95 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll | 894 ------ .../rvv/{vdiv-sdnode-rv32.ll => vdiv-sdnode.ll} | 721 +++-- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv64.ll | 925 ------ .../rvv/{vdivu-sdnode-rv32.ll => vdivu-sdnode.ll} | 580 ++-- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll | 619 ---- .../rvv/{vexts-sdnode-rv64.ll => vexts-sdnode.ll} | 1 + llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv32.ll | 867 ------ .../rvv/{vmax-sdnode-rv64.ll => vmax-sdnode.ll} | 95 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll | 867 ------ .../rvv/{vmaxu-sdnode-rv64.ll => vmaxu-sdnode.ll} | 95 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv32.ll | 867 ------ .../rvv/{vmin-sdnode-rv64.ll => vmin-sdnode.ll} | 95 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv32.ll | 867 ------ .../rvv/{vminu-sdnode-rv64.ll => vminu-sdnode.ll} | 95 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv32.ll | 896 ------ .../rvv/{vmul-sdnode-rv64.ll => vmul-sdnode.ll} | 95 +- .../rvv/{vmulh-sdnode-rv32.ll => vmulh-sdnode.ll} | 3 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 1120 -------- .../rvv/{vor-sdnode-rv64.ll => vor-sdnode.ll} | 95 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll | 978 ------- .../rvv/{vrem-sdnode-rv64.ll => vrem-sdnode.ll} | 761 +++-- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv32.ll | 1037 ------- .../rvv/{vremu-sdnode-rv64.ll => vremu-sdnode.ll} | 608 ++-- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll | 559 ---- .../rvv/{vrsub-sdnode-rv64.ll => vrsub-sdnode.ll} | 95 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir | 90 + llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll | 630 ---- .../rvv/{vshl-sdnode-rv64.ll => vshl-sdnode.ll} | 1 + llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll | 803 ------ .../rvv/{vsra-sdnode-rv64.ll => vsra-sdnode.ll} | 1 + llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll | 583 ---- .../rvv/{vsrl-sdnode-rv64.ll => vsrl-sdnode.ll} | 1 + llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv32.ll | 816 ------ .../rvv/{vsub-sdnode-rv64.ll => vsub-sdnode.ll} | 95 +- llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll | 315 -- .../{vtruncs-sdnode-rv32.ll => vtruncs-sdnode.ll} | 1 + llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv32.ll | 1329 --------- .../rvv/{vxor-sdnode-rv64.ll => vxor-sdnode.ll} | 95 +- llvm/test/CodeGen/RISCV/select-constant-xor.ll | 310 +- llvm/test/CodeGen/SystemZ/call-zos-01.ll | 191 ++ llvm/test/CodeGen/SystemZ/call-zos-vararg.ll | 195 ++ llvm/test/CodeGen/SystemZ/call-zos-vec.ll | 66 + llvm/test/CodeGen/Thumb2/abs.ll | 207 ++ llvm/test/CodeGen/X86/bitreverse.ll | 9 +- llvm/test/CodeGen/X86/combine-bitreverse.ll | 9 +- llvm/test/CodeGen/X86/icmp-shift-opt.ll | 334 +++ llvm/test/CodeGen/X86/jump_sign.ll | 15 +- llvm/test/CodeGen/X86/optimize-compare.mir | 389 +++ llvm/test/CodeGen/X86/psubus.ll | 164 +- llvm/test/CodeGen/X86/vector-bitreverse.ll | 704 +++-- .../InstrRef/livedebugvalues_stackslot_subregs.mir | 56 + .../livedebugvalues_subreg_substitutions.mir | 11 +- llvm/test/DebugInfo/MSP430/cu-ranges.ll | 72 + llvm/test/DebugInfo/MSP430/dwarf-basics-v5.ll | 154 + llvm/test/DebugInfo/MSP430/ranges_always.ll | 241 ++ llvm/test/DebugInfo/X86/attr-btf_tag-typedef.ll | 69 + .../OrcV2Examples/lljit-with-remote-debugging.test | 12 + .../Instrumentation/MemorySanitizer/msan_eager.ll | 6 +- llvm/test/MC/SystemZ/insn-bad-zos-z13.s | 60 + llvm/test/MC/SystemZ/insn-bad-zos-z14.s | 23 + llvm/test/MC/SystemZ/insn-bad-zos-z15.s | 41 + llvm/test/MC/SystemZ/insn-bad-zos-z196.s | 59 + llvm/test/MC/SystemZ/insn-bad-zos.s | 158 + llvm/test/MC/SystemZ/insn-good-zos-pcrel.s | 102 + llvm/test/MC/X86/padlock.s | 29 +- .../Attributor/ArgumentPromotion/array.ll | 52 +- .../Attributor/ArgumentPromotion/attrs.ll | 6 +- .../Attributor/ArgumentPromotion/byval-2.ll | 6 +- .../Attributor/ArgumentPromotion/byval.ll | 12 +- .../Attributor/ArgumentPromotion/fp80.ll | 6 +- .../Attributor/ArgumentPromotion/tail.ll | 8 +- .../IPConstantProp/2009-09-24-byval-ptr.ll | 34 +- llvm/test/Transforms/Coroutines/coro-alloca-09.ll | 57 + .../DeadStoreElimination/memset-unknown-sizes.ll | 42 +- .../DeadStoreElimination/multiblock-throwing.ll | 37 +- .../stores-of-existing-values.ll | 194 +- .../IndVarSimplify/finite-exit-comparisons.ll | 8 +- llvm/test/Transforms/Inline/ephemeral.ll | 6 +- llvm/test/Transforms/InstCombine/and-xor-or.ll | 456 ++- llvm/test/Transforms/InstCombine/icmp-mul.ll | 8 + .../Transforms/InstCombine/icmp-topbitssame.ll | 239 ++ .../InstCombine/insert-extract-shuffle.ll | 56 + .../Transforms/InstCombine/load-store-forward.ll | 29 +- .../Transforms/InstCombine/truncating-saturate.ll | 30 + llvm/test/Transforms/InstCombine/xor-ashr.ll | 140 + .../Transforms/LoopIdiom/memset-runtime-32bit.ll | 372 +++ .../Transforms/LoopIdiom/memset-runtime-64bit.ll | 360 +++ llvm/test/Transforms/LoopIdiom/memset-runtime.ll | 110 - .../LoopVectorize/AArch64/interleaved_cost.ll | 2 +- .../LoopVectorize/AArch64/sve-strict-fadd-cost.ll | 12 +- llvm/test/Transforms/LoopVectorize/X86/pr48340.ll | 4 +- .../PhaseOrdering/reassociate-instcombine.ll | 38 + .../AArch64/memory-runtime-checks-in-loops.ll | 93 + .../SLPVectorizer/AArch64/memory-runtime-checks.ll | 1 + .../Transforms/SLPVectorizer/AArch64/tsc-s352.ll | 2 +- .../SLPVectorizer/X86/memory-runtime-checks.ll | 155 + .../test/Transforms/SLPVectorizer/X86/tiny-tree.ll | 13 +- .../test/Transforms/SimplifyCFG/unprofitable-pr.ll | 31 +- llvm/test/Transforms/VectorCombine/X86/shuffle.ll | 54 +- .../X86/debug_addr_invalid_addr_size.s | 2 +- .../llvm-dwarfdump/X86/debug_rnglists_invalid.s | 4 +- llvm/tools/llvm-c-test/echo.cpp | 2 +- llvm/tools/llvm-cov/CoverageFilters.cpp | 2 +- llvm/tools/llvm-exegesis/lib/SnippetFile.h | 2 +- llvm/tools/llvm-profdata/llvm-profdata.cpp | 7 +- llvm/tools/llvm-profgen/PerfReader.cpp | 6 +- llvm/tools/llvm-profgen/ProfileGenerator.cpp | 3 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OutputBufferTest.cpp} (52%) create mode 100644 llvm/unittests/Support/buffer_ostream_test.cpp create mode 100644 mlir/include/mlir/Dialect/Vector/VectorRewritePatterns.h create mode 100644 mlir/lib/Dialect/Vector/VectorInsertExtractStridedSliceRewriteP [...] create mode 100644 mlir/test/Dialect/Vector/vector-reduce-to-contract.mlir create mode 100644 mlir/test/mlir-cpu-runner/X86Vector/lit.local.cfg create mode 100644 mlir/test/mlir-cpu-runner/X86Vector/math_polynomial_approx_avx2.mlir create mode 100644 openmp/runtime/test/ompt/worksharing/taskinfo/sections_serialized.c delete mode 100644 parallel-libs/.clang-format delete mode 100644 parallel-libs/.clang-tidy delete mode 100644 parallel-libs/CMakeLists.txt delete mode 100644 parallel-libs/README.rst delete mode 100644 parallel-libs/acxxel/.clang-format delete mode 100644 parallel-libs/acxxel/.clang-tidy delete mode 100644 parallel-libs/acxxel/CMakeLists.txt delete mode 100644 parallel-libs/acxxel/Doxyfile.in delete mode 100644 parallel-libs/acxxel/LICENSE.TXT delete mode 100644 parallel-libs/acxxel/acxxel.cpp delete mode 100644 parallel-libs/acxxel/acxxel.h delete mode 100644 parallel-libs/acxxel/cuda_acxxel.cpp delete mode 100644 parallel-libs/acxxel/customdoxygen.css delete mode 100644 parallel-libs/acxxel/examples/CMakeLists.txt delete mode 100644 parallel-libs/acxxel/examples/opencl_example.cpp delete mode 100644 parallel-libs/acxxel/examples/simple_example.cu delete mode 100644 parallel-libs/acxxel/opencl_acxxel.cpp delete mode 100644 parallel-libs/acxxel/span.h delete mode 100644 parallel-libs/acxxel/status.h delete mode 100644 parallel-libs/acxxel/tests/CMakeLists.txt delete mode 100644 parallel-libs/acxxel/tests/acxxel_test.cpp delete mode 100644 parallel-libs/acxxel/tests/multi_device_test.cpp delete mode 100644 parallel-libs/acxxel/tests/opencl_test.cpp delete mode 100644 parallel-libs/acxxel/tests/span_test.cpp delete mode 100644 parallel-libs/acxxel/tests/status_test.cpp -- To stop receiving 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3 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (f4efb229b7 -> 5513527b59)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/binutils-gdb. from f4efb229b7 Automatic date update in version.in adds 84714f86b3 Avoid -Waddress warnings in readelf adds ced10cb78d -Waddress warning in ldelf.c adds 4d1795ac4d Fix latent Ada bug when accessing field offsets adds e3e4224e79 Fix test step-and-next-inline.cc adds cdeebaab92 [gdb/tui] Fix breakpoint display functionality adds 21a27fb021 Fixes for gdb.mi/mi-break.exp adds f81ce492b2 Refactor code slightly in nat/aarch64-linux-hw-point.c (aarc [...] adds add3db9182 Fix ARMv8.4 for hw watchpoint and breakpoint adds d2f325df0b gdbserver: make thread_info non-POD adds c360a4732b gdbserver: initialize the members of lwp_info in-class adds 183be22290 gdb, gdbserver: make target_waitstatus safe adds 46276d3ca2 Automatic date update in version.in adds 66cc044255 gdb: fix remote-sim.c build adds 9abcdc10b2 RISC-V: Don't separate pcgp relaxation to another relax pass. adds c628f812eb RISC-V: Added ld testcase for pcgp relaxation. adds 431be556b0 gdb: make disassembler fprintf callback a static member function adds 8b87fbe6bb gdb/python: new gdb.architecture_names function adds 625f7b1cdc gdb/python: move gdb.Membuf support into a new file adds d5684c961f [gdb/testsuite] Fix FAILs in gdb.mi/mi-breakpoint-changed.exp adds 5d71c60df5 [gdb/testsuite] Fix gdb.threads/linux-dp.exp adds 63b868ddf8 Remove unused variables from gdbserver's Makefile adds aab00c2dff Fix 'uninstall' target adds c8480b58e1 x86: Add -muse-unaligned-vector-move to assembler adds eaf4a97352 Automatic date update in version.in adds e515d93264 Automatic date update in version.in adds e214f8db56 LoongArch bfd support adds 6cc76c40a9 LoongArch opcodes support adds e9a0721f82 LoongArch binutils support adds 4462d7c440 LoongArch gas support adds 560b3fe208 LoongArch ld support adds 3f9661f12a asan: aout: heap buffer overflow adds e028124942 asan: arm-darwin: buffer overflow adds 1ed0032b40 asan: c4x, c54x coff_canonicalize_reloc buffer overflow adds 30459fe4ef Automatic date update in version.in adds b920bc3722 asan: evax_bfd_print_image buffer overflow adds 1e5a28be0f ubsan: _bfd_xcoff64_swap_aux_in left shift of negative value adds bd84a8e2e0 bfd_nonfatal_message, localise va_start adds 5513527b59 objdump doesn't accept -L option No new revisions were added by this update. Summary of changes: bfd/Makefile.am | 17 +- bfd/Makefile.in | 21 +- bfd/aoutx.h | 5 +- bfd/archures.c | 5 + bfd/bfd-in.h | 4 +- bfd/bfd-in2.h | 52 +- bfd/coff-tic54x.c | 2 +- bfd/coff64-rs6000.c | 7 +- bfd/coffcode.h | 22 +- bfd/coffgen.c | 2 +- bfd/coffswap.h | 27 + bfd/config.bfd | 15 + bfd/configure | 2 + bfd/configure.ac | 2 + bfd/cpu-loongarch.c | 61 + bfd/elf-bfd.h | 9 + bfd/elf.c | 109 + bfd/elfnn-loongarch.c | 3265 ++++++++++++++++++++ bfd/elfnn-riscv.c | 354 +-- bfd/elfxx-loongarch.c | 661 ++++ bfd/elfxx-loongarch.h | 31 + bfd/elfxx-riscv.h | 5 - bfd/libbfd.h | 43 + bfd/mach-o-arm.c | 39 +- bfd/pdp11.c | 5 +- bfd/po/BLD-POTFILES.in | 2 + bfd/po/SRC-POTFILES.in | 3 + bfd/reloc.c | 89 + bfd/targets.c | 8 + bfd/version.h | 2 +- bfd/vms-alpha.c | 93 +- binutils/NEWS | 2 + binutils/bucomm.c | 6 +- binutils/objdump.c | 2 +- binutils/readelf.c | 233 +- binutils/testsuite/binutils-all/objdump.exp | 1 + gas/Makefile.am | 17 +- gas/Makefile.in | 28 +- gas/NEWS | 5 + gas/config/loongarch-lex-wrapper.c | 20 + gas/config/loongarch-lex.h | 34 + gas/config/loongarch-lex.l | 61 + gas/config/loongarch-parse.y | 441 +++ gas/config/tc-i386.c | 39 + gas/config/tc-loongarch.c | 1382 +++++++++ gas/config/tc-loongarch.h | 91 + gas/configure | 17 + gas/configure.ac | 13 + gas/configure.tgt | 6 +- gas/doc/as.texi | 31 + gas/doc/c-i386.texi | 6 + gas/doc/c-loongarch.texi | 39 + gas/po/POTFILES.in | 1 + gas/testsuite/gas/all/gas.exp | 5 +- gas/testsuite/gas/elf/elf.exp | 1 + gas/testsuite/gas/i386/i386.exp | 2 + gas/testsuite/gas/i386/unaligned-vector-move.d | 22 + gas/testsuite/gas/i386/unaligned-vector-move.s | 15 + .../gas/i386/x86-64-unaligned-vector-move.d | 23 + gas/testsuite/gas/loongarch/4opt_op.d | 70 + gas/testsuite/gas/loongarch/4opt_op.s | 61 + gas/testsuite/gas/loongarch/fix_op.d | 134 + gas/testsuite/gas/loongarch/fix_op.s | 125 + gas/testsuite/gas/loongarch/float_op.d | 85 + gas/testsuite/gas/loongarch/float_op.s | 76 + gas/testsuite/gas/loongarch/imm_op.d | 48 + gas/testsuite/gas/loongarch/imm_op.s | 39 + gas/testsuite/gas/loongarch/jmp_op.d | 68 + gas/testsuite/gas/loongarch/jmp_op.s | 22 + gas/testsuite/gas/loongarch/load_store_op.d | 178 ++ gas/testsuite/gas/loongarch/load_store_op.s | 169 + gas/testsuite/gas/loongarch/loongarch.exp | 23 + gas/testsuite/gas/loongarch/macro_op.d | 733 +++++ gas/testsuite/gas/loongarch/macro_op.s | 29 + gas/testsuite/gas/loongarch/nop.d | 10 + .../gas/{riscv/t_insns.s => loongarch/nop.s} | 0 gas/testsuite/gas/loongarch/privilege_op.d | 44 + gas/testsuite/gas/loongarch/privilege_op.s | 35 + gas/testsuite/gas/loongarch/syscall.d | 11 + gas/testsuite/gas/loongarch/syscall.s | 2 + gas/testsuite/lib/gas-defs.exp | 4 + gdb/Makefile.in | 13 +- gdb/NEWS | 4 + gdb/ada-lang.c | 31 +- gdb/aix-thread.c | 4 +- gdb/break-catch-sig.c | 6 +- gdb/break-catch-syscall.c | 14 +- gdb/breakpoint.c | 22 +- gdb/bsd-uthread.c | 4 +- gdb/darwin-nat.c | 58 +- gdb/disasm.c | 31 +- gdb/disasm.h | 3 + gdb/doc/python.texi | 9 + gdb/fbsd-nat.c | 33 +- gdb/gdbthread.h | 2 +- gdb/gnu-nat.c | 38 +- gdb/go32-nat.c | 16 +- gdb/inf-child.c | 15 +- gdb/inf-ptrace.c | 3 +- gdb/infcmd.c | 3 +- gdb/infrun.c | 189 +- gdb/infrun.h | 2 +- gdb/linux-nat.c | 69 +- gdb/linux-nat.h | 6 +- gdb/linux-thread-db.c | 2 +- gdb/nat/aarch64-linux-hw-point.c | 26 +- gdb/nat/aarch64-linux-hw-point.h | 1 + gdb/nat/fork-inferior.c | 19 +- gdb/nat/windows-nat.c | 52 +- gdb/netbsd-nat.c | 26 +- gdb/nto-procfs.c | 37 +- gdb/obsd-nat.c | 9 +- gdb/procfs.c | 9 +- gdb/python/py-arch.c | 23 + gdb/python/py-inferior.c | 182 +- gdb/python/py-membuf.c | 226 ++ gdb/python/python-internal.h | 6 + gdb/python/python.c | 5 + gdb/ravenscar-thread.c | 4 +- gdb/record-btrace.c | 26 +- gdb/record-full.c | 36 +- gdb/remote-sim.c | 9 +- gdb/remote.c | 142 +- gdb/rs6000-nat.c | 7 +- gdb/sol-thread.c | 2 +- gdb/target.c | 3 +- gdb/target/waitstatus.c | 20 +- gdb/target/waitstatus.h | 236 +- gdb/testsuite/gdb.ada/same_component_name.exp | 84 +- gdb/testsuite/gdb.ada/same_component_name/foo.adb | 3 + gdb/testsuite/gdb.cp/step-and-next-inline.cc | 2 +- gdb/testsuite/gdb.cp/step-and-next-inline.exp | 4 +- gdb/testsuite/gdb.mi/mi-break.exp | 8 +- gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp | 4 +- gdb/testsuite/gdb.python/py-arch.exp | 51 + gdb/testsuite/gdb.threads/linux-dp.exp | 2 +- gdb/testsuite/gdb.tui/break.exp | 37 + gdb/thread.c | 4 +- gdb/tui/tui-winsource.c | 3 +- gdb/windows-nat.c | 30 +- gdbserver/Makefile.in | 32 +- gdbserver/gdbthread.h | 19 +- gdbserver/inferiors.cc | 11 +- gdbserver/linux-low.cc | 138 +- gdbserver/linux-low.h | 49 +- gdbserver/netbsd-low.cc | 50 +- gdbserver/remote-utils.cc | 44 +- gdbserver/server.cc | 90 +- gdbserver/target.cc | 14 +- gdbserver/win32-low.cc | 40 +- include/dis-asm.h | 1 + include/elf/common.h | 12 +- include/elf/loongarch.h | 119 + include/opcode/loongarch.h | 239 ++ ld/Makefile.am | 4 + ld/Makefile.in | 5 + ld/NEWS | 2 + ld/configure.tgt | 4 + ld/emulparams/elf32loongarch-defs.sh | 36 + ld/emulparams/elf32loongarch.sh | 11 + ld/emulparams/elf64loongarch-defs.sh | 39 + ld/emulparams/elf64loongarch.sh | 11 + ld/emultempl/{riscvelf.em => loongarchelf.em} | 50 +- ld/emultempl/riscvelf.em | 8 +- ld/ldelf.c | 1 - ld/po/BLD-POTFILES.in | 2 + ld/testsuite/ld-loongarch-elf/disas-jirl.d | 14 + ld/testsuite/ld-loongarch-elf/disas-jirl.s | 5 + ld/testsuite/ld-loongarch-elf/jmp_op.d | 68 + ld/testsuite/ld-loongarch-elf/jmp_op.s | 22 + ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp | 34 + ld/testsuite/ld-loongarch-elf/macro_op.d | 732 +++++ ld/testsuite/ld-loongarch-elf/macro_op.s | 29 + ld/testsuite/ld-loongarch-elf/syscall-0.s | 9 + ld/testsuite/ld-loongarch-elf/syscall-1.s | 20 + ld/testsuite/ld-loongarch-elf/syscall.d | 5 + ld/testsuite/ld-riscv-elf/align-small-region.d | 12 + ld/testsuite/ld-riscv-elf/align-small-region.ld | 12 + ld/testsuite/ld-riscv-elf/align-small-region.s | 7 + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 5 +- .../ld-riscv-elf/{pcgp-relax.d => pcgp-relax-01.d} | 2 +- .../ld-riscv-elf/{pcgp-relax.s => pcgp-relax-01.s} | 0 ld/testsuite/ld-riscv-elf/pcgp-relax-02.d | 15 + ld/testsuite/ld-riscv-elf/pcgp-relax-02.s | 18 + ld/testsuite/ld-riscv-elf/restart-relax.d | 14 - ld/testsuite/ld-riscv-elf/restart-relax.s | 17 - ld/testsuite/ld-srec/srec.exp | 6 + ld/testsuite/ld-unique/pr21529.d | 2 +- opcodes/Makefile.am | 3 + opcodes/Makefile.in | 6 + opcodes/configure | 1 + opcodes/configure.ac | 1 + opcodes/disassemble.c | 9 + opcodes/disassemble.h | 1 + opcodes/loongarch-coder.c | 473 +++ opcodes/loongarch-dis.c | 342 ++ opcodes/loongarch-opc.c | 798 +++++ opcodes/po/POTFILES.in | 3 + 198 files changed, 13631 insertions(+), 1471 deletions(-) create mode 100644 bfd/cpu-loongarch.c create mode 100644 bfd/elfnn-loongarch.c create mode 100644 bfd/elfxx-loongarch.c create mode 100644 bfd/elfxx-loongarch.h create mode 100644 gas/config/loongarch-lex-wrapper.c create mode 100644 gas/config/loongarch-lex.h create mode 100644 gas/config/loongarch-lex.l create mode 100644 gas/config/loongarch-parse.y create mode 100644 gas/config/tc-loongarch.c create mode 100644 gas/config/tc-loongarch.h create mode 100644 gas/doc/c-loongarch.texi create mode 100644 gas/testsuite/gas/i386/unaligned-vector-move.d create mode 100644 gas/testsuite/gas/i386/unaligned-vector-move.s create mode 100644 gas/testsuite/gas/i386/x86-64-unaligned-vector-move.d create mode 100644 gas/testsuite/gas/loongarch/4opt_op.d create mode 100644 gas/testsuite/gas/loongarch/4opt_op.s create mode 100644 gas/testsuite/gas/loongarch/fix_op.d create mode 100644 gas/testsuite/gas/loongarch/fix_op.s create mode 100644 gas/testsuite/gas/loongarch/float_op.d create mode 100644 gas/testsuite/gas/loongarch/float_op.s create mode 100644 gas/testsuite/gas/loongarch/imm_op.d create mode 100644 gas/testsuite/gas/loongarch/imm_op.s create mode 100644 gas/testsuite/gas/loongarch/jmp_op.d create mode 100644 gas/testsuite/gas/loongarch/jmp_op.s create mode 100644 gas/testsuite/gas/loongarch/load_store_op.d create mode 100644 gas/testsuite/gas/loongarch/load_store_op.s create mode 100644 gas/testsuite/gas/loongarch/loongarch.exp create mode 100644 gas/testsuite/gas/loongarch/macro_op.d create mode 100644 gas/testsuite/gas/loongarch/macro_op.s create mode 100644 gas/testsuite/gas/loongarch/nop.d copy gas/testsuite/gas/{riscv/t_insns.s => loongarch/nop.s} (100%) create mode 100644 gas/testsuite/gas/loongarch/privilege_op.d create mode 100644 gas/testsuite/gas/loongarch/privilege_op.s create mode 100644 gas/testsuite/gas/loongarch/syscall.d create mode 100644 gas/testsuite/gas/loongarch/syscall.s create mode 100644 gdb/python/py-membuf.c create mode 100644 gdb/testsuite/gdb.tui/break.exp create mode 100644 include/elf/loongarch.h create mode 100644 include/opcode/loongarch.h create mode 100644 ld/emulparams/elf32loongarch-defs.sh create mode 100644 ld/emulparams/elf32loongarch.sh create mode 100644 ld/emulparams/elf64loongarch-defs.sh create mode 100644 ld/emulparams/elf64loongarch.sh copy ld/emultempl/{riscvelf.em => loongarchelf.em} (52%) create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.d create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.s create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.d create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.s create mode 100644 ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.d create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.s create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-0.s create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-1.s create mode 100644 ld/testsuite/ld-loongarch-elf/syscall.d create mode 100644 ld/testsuite/ld-riscv-elf/align-small-region.d create mode 100644 ld/testsuite/ld-riscv-elf/align-small-region.ld create mode 100644 ld/testsuite/ld-riscv-elf/align-small-region.s rename ld/testsuite/ld-riscv-elf/{pcgp-relax.d => pcgp-relax-01.d} (94%) rename ld/testsuite/ld-riscv-elf/{pcgp-relax.s => pcgp-relax-01.s} (100%) create mode 100644 ld/testsuite/ld-riscv-elf/pcgp-relax-02.d create mode 100644 ld/testsuite/ld-riscv-elf/pcgp-relax-02.s delete mode 100644 ld/testsuite/ld-riscv-elf/restart-relax.d delete mode 100644 ld/testsuite/ld-riscv-elf/restart-relax.s create mode 100644 opcodes/loongarch-coder.c create mode 100644 opcodes/loongarch-dis.c create mode 100644 opcodes/loongarch-opc.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (720796c2 -> b3c7a371)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 720796c2 0: update: binutils-llvm-linux-qemu: boot new b3c7a371 0: update: binutils-llvm-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (720796c2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1596 -> 1556 bytes 02-prepare_abe/console.log.xz | Bin 2756 -> 2768 bytes 03-build_abe-binutils/console.log.xz | Bin 45008 -> 45536 bytes 04-build_llvm/console.log.xz | Bin 60272 -> 58628 bytes 05-build_abe-qemu/console.log.xz | Bin 30244 -> 30284 bytes 06-build_linux/console.log.xz | Bin 3936 -> 5648 bytes 07-boot_linux/console.log.xz | Bin 508 -> 508 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 6 +++--- jenkins/manifest.sh | 21 ++++++++++----------- 10 files changed, 13 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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2021

2020

2019

2018

2017

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2015

Tcwg-commits October 2021