[gcc] branch releases/gcc-11 updated (e20ec3be901 -> 4b304e3d639)
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from e20ec3be901 Don't use 'G' constraint in integer move patterns
new 4b304e3d639 Revise -mdisable-fpregs option and add new -msoft-mult option
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Summary of changes:
gcc/config/pa/pa-d.c | 2 +-
gcc/config/pa/pa.c | 10 +++++-----
gcc/config/pa/pa.h | 1 -
gcc/config/pa/pa.md | 22 +++++++++++-----------
gcc/config/pa/pa.opt | 8 ++++++--
5 files changed, 23 insertions(+), 20 deletions(-)
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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (dfe1ac896af -> c448579312b)
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from dfe1ac896af doc: Remove details around Itanium on GNU/Linux and Windows
adds 9d1727a30e4 [Committed] Correct testcase gcc.target/bfin/20090914-3.c
new c448579312b Don't use 'G' constraint in integer move patterns
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Summary of changes:
gcc/config/pa/pa.md | 32 +++++++++++++++---------------
gcc/testsuite/gcc.target/bfin/20090914-3.c | 3 ++-
2 files changed, 18 insertions(+), 17 deletions(-)
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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (e515d93264 -> 1ed0032b40)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm
in repository toolchain/ci/binutils-gdb.
from e515d93264 Automatic date update in version.in
adds e214f8db56 LoongArch bfd support
adds 6cc76c40a9 LoongArch opcodes support
adds e9a0721f82 LoongArch binutils support
adds 4462d7c440 LoongArch gas support
adds 560b3fe208 LoongArch ld support
adds 3f9661f12a asan: aout: heap buffer overflow
adds e028124942 asan: arm-darwin: buffer overflow
adds 1ed0032b40 asan: c4x, c54x coff_canonicalize_reloc buffer overflow
No new revisions were added by this update.
Summary of changes:
bfd/Makefile.am | 17 +-
bfd/Makefile.in | 21 +-
bfd/aoutx.h | 5 +-
bfd/archures.c | 5 +
bfd/bfd-in.h | 4 +-
bfd/bfd-in2.h | 52 +-
bfd/coff-tic54x.c | 2 +-
bfd/coffcode.h | 22 +-
bfd/coffgen.c | 2 +-
bfd/coffswap.h | 27 +
bfd/config.bfd | 15 +
bfd/configure | 2 +
bfd/configure.ac | 2 +
bfd/cpu-loongarch.c | 61 +
bfd/elf-bfd.h | 9 +
bfd/elf.c | 109 +
bfd/elfnn-loongarch.c | 3265 ++++++++++++++++++++
bfd/elfxx-loongarch.c | 661 ++++
bfd/elfxx-loongarch.h | 31 +
bfd/libbfd.h | 43 +
bfd/mach-o-arm.c | 39 +-
bfd/pdp11.c | 5 +-
bfd/po/BLD-POTFILES.in | 2 +
bfd/po/SRC-POTFILES.in | 3 +
bfd/reloc.c | 89 +
bfd/targets.c | 8 +
binutils/NEWS | 2 +
binutils/readelf.c | 24 +
binutils/testsuite/binutils-all/objdump.exp | 1 +
gas/Makefile.am | 17 +-
gas/Makefile.in | 28 +-
gas/NEWS | 2 +
gas/config/loongarch-lex-wrapper.c | 20 +
gas/config/loongarch-lex.h | 34 +
gas/config/loongarch-lex.l | 61 +
gas/config/loongarch-parse.y | 441 +++
gas/config/tc-loongarch.c | 1382 +++++++++
gas/config/tc-loongarch.h | 91 +
gas/configure | 17 +
gas/configure.ac | 13 +
gas/configure.tgt | 6 +-
gas/doc/as.texi | 31 +
gas/doc/c-loongarch.texi | 39 +
gas/po/POTFILES.in | 1 +
gas/testsuite/gas/all/gas.exp | 5 +-
gas/testsuite/gas/elf/elf.exp | 1 +
gas/testsuite/gas/loongarch/4opt_op.d | 70 +
gas/testsuite/gas/loongarch/4opt_op.s | 61 +
gas/testsuite/gas/loongarch/fix_op.d | 134 +
gas/testsuite/gas/loongarch/fix_op.s | 125 +
gas/testsuite/gas/loongarch/float_op.d | 85 +
gas/testsuite/gas/loongarch/float_op.s | 76 +
gas/testsuite/gas/loongarch/imm_op.d | 48 +
gas/testsuite/gas/loongarch/imm_op.s | 39 +
gas/testsuite/gas/loongarch/jmp_op.d | 68 +
gas/testsuite/gas/loongarch/jmp_op.s | 22 +
gas/testsuite/gas/loongarch/load_store_op.d | 178 ++
gas/testsuite/gas/loongarch/load_store_op.s | 169 +
gas/testsuite/gas/loongarch/loongarch.exp | 23 +
gas/testsuite/gas/loongarch/macro_op.d | 733 +++++
gas/testsuite/gas/loongarch/macro_op.s | 29 +
gas/testsuite/gas/loongarch/nop.d | 10 +
.../gas/{riscv/t_insns.s => loongarch/nop.s} | 0
gas/testsuite/gas/loongarch/privilege_op.d | 44 +
gas/testsuite/gas/loongarch/privilege_op.s | 35 +
gas/testsuite/gas/loongarch/syscall.d | 11 +
gas/testsuite/gas/loongarch/syscall.s | 2 +
gas/testsuite/lib/gas-defs.exp | 4 +
include/dis-asm.h | 1 +
include/elf/common.h | 12 +-
include/elf/loongarch.h | 119 +
include/opcode/loongarch.h | 239 ++
ld/Makefile.am | 4 +
ld/Makefile.in | 5 +
ld/NEWS | 2 +
ld/configure.tgt | 4 +
ld/emulparams/elf32loongarch-defs.sh | 36 +
ld/emulparams/elf32loongarch.sh | 11 +
ld/emulparams/elf64loongarch-defs.sh | 39 +
ld/emulparams/elf64loongarch.sh | 11 +
ld/emultempl/loongarchelf.em | 87 +
ld/po/BLD-POTFILES.in | 2 +
ld/testsuite/ld-loongarch-elf/disas-jirl.d | 14 +
ld/testsuite/ld-loongarch-elf/disas-jirl.s | 5 +
ld/testsuite/ld-loongarch-elf/jmp_op.d | 68 +
ld/testsuite/ld-loongarch-elf/jmp_op.s | 22 +
ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp | 34 +
ld/testsuite/ld-loongarch-elf/macro_op.d | 732 +++++
ld/testsuite/ld-loongarch-elf/macro_op.s | 29 +
ld/testsuite/ld-loongarch-elf/syscall-0.s | 9 +
ld/testsuite/ld-loongarch-elf/syscall-1.s | 20 +
ld/testsuite/ld-loongarch-elf/syscall.d | 5 +
ld/testsuite/ld-srec/srec.exp | 6 +
ld/testsuite/ld-unique/pr21529.d | 2 +-
opcodes/Makefile.am | 3 +
opcodes/Makefile.in | 6 +
opcodes/configure | 1 +
opcodes/configure.ac | 1 +
opcodes/disassemble.c | 9 +
opcodes/disassemble.h | 1 +
opcodes/loongarch-coder.c | 473 +++
opcodes/loongarch-dis.c | 342 ++
opcodes/loongarch-opc.c | 798 +++++
opcodes/po/POTFILES.in | 3 +
104 files changed, 11788 insertions(+), 50 deletions(-)
create mode 100644 bfd/cpu-loongarch.c
create mode 100644 bfd/elfnn-loongarch.c
create mode 100644 bfd/elfxx-loongarch.c
create mode 100644 bfd/elfxx-loongarch.h
create mode 100644 gas/config/loongarch-lex-wrapper.c
create mode 100644 gas/config/loongarch-lex.h
create mode 100644 gas/config/loongarch-lex.l
create mode 100644 gas/config/loongarch-parse.y
create mode 100644 gas/config/tc-loongarch.c
create mode 100644 gas/config/tc-loongarch.h
create mode 100644 gas/doc/c-loongarch.texi
create mode 100644 gas/testsuite/gas/loongarch/4opt_op.d
create mode 100644 gas/testsuite/gas/loongarch/4opt_op.s
create mode 100644 gas/testsuite/gas/loongarch/fix_op.d
create mode 100644 gas/testsuite/gas/loongarch/fix_op.s
create mode 100644 gas/testsuite/gas/loongarch/float_op.d
create mode 100644 gas/testsuite/gas/loongarch/float_op.s
create mode 100644 gas/testsuite/gas/loongarch/imm_op.d
create mode 100644 gas/testsuite/gas/loongarch/imm_op.s
create mode 100644 gas/testsuite/gas/loongarch/jmp_op.d
create mode 100644 gas/testsuite/gas/loongarch/jmp_op.s
create mode 100644 gas/testsuite/gas/loongarch/load_store_op.d
create mode 100644 gas/testsuite/gas/loongarch/load_store_op.s
create mode 100644 gas/testsuite/gas/loongarch/loongarch.exp
create mode 100644 gas/testsuite/gas/loongarch/macro_op.d
create mode 100644 gas/testsuite/gas/loongarch/macro_op.s
create mode 100644 gas/testsuite/gas/loongarch/nop.d
copy gas/testsuite/gas/{riscv/t_insns.s => loongarch/nop.s} (100%)
create mode 100644 gas/testsuite/gas/loongarch/privilege_op.d
create mode 100644 gas/testsuite/gas/loongarch/privilege_op.s
create mode 100644 gas/testsuite/gas/loongarch/syscall.d
create mode 100644 gas/testsuite/gas/loongarch/syscall.s
create mode 100644 include/elf/loongarch.h
create mode 100644 include/opcode/loongarch.h
create mode 100644 ld/emulparams/elf32loongarch-defs.sh
create mode 100644 ld/emulparams/elf32loongarch.sh
create mode 100644 ld/emulparams/elf64loongarch-defs.sh
create mode 100644 ld/emulparams/elf64loongarch.sh
create mode 100644 ld/emultempl/loongarchelf.em
create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.d
create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.s
create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.d
create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.s
create mode 100644 ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp
create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.d
create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-0.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-1.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall.d
create mode 100644 opcodes/loongarch-coder.c
create mode 100644 opcodes/loongarch-dis.c
create mode 100644 opcodes/loongarch-opc.c
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (9d69e412 -> 7e8ff097)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm
in repository toolchain/ci/base-artifacts.
discards 9d69e412 0: update: binutils-gcc: 1
new 7e8ff097 0: update: binutils-gcc: 1
This update added new revisions after undoing existing revisions.
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branch are not in the new version. This situation occurs
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* -- * -- B -- O -- O -- O (9d69e412)
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N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check/master-arm (7e8ff097)
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1516 -> 1520 bytes
02-prepare_abe/console.log.xz | Bin 2744 -> 2752 bytes
03-build_abe-binutils/console.log.xz | Bin 65400 -> 64608 bytes
04-build_abe-gcc/console.log.xz | Bin 231952 -> 229840 bytes
05-build_abe-dejagnu/console.log.xz | Bin 3852 -> 3848 bytes
06-build_abe-check_gcc/console.log.xz | Bin 2492 -> 2392 bytes
07-check_regression/console.log.xz | Bin 2380 -> 2356 bytes
07-check_regression/results.compare | 16 +-
07-check_regression/results.compare2 | 6 +-
08-update_baseline/console.log | 258 +--
08-update_baseline/results.compare | 16 +-
08-update_baseline/results.compare2 | 6 +-
jenkins/manifest.sh | 12 +-
sumfiles/g++.log.xz | Bin 2683788 -> 2660840 bytes
sumfiles/g++.sum | 114 +-
sumfiles/gcc.log.xz | Bin 2219524 -> 2261668 bytes
sumfiles/gcc.sum | 3586 ++++++++++++++++-----------------
sumfiles/gfortran.log.xz | Bin 877860 -> 879176 bytes
sumfiles/gfortran.sum | 40 +-
sumfiles/libatomic.log.xz | Bin 2140 -> 2160 bytes
sumfiles/libatomic.sum | 4 +-
sumfiles/libgomp.log.xz | Bin 169420 -> 169116 bytes
sumfiles/libgomp.sum | 16 +-
sumfiles/libitm.log.xz | Bin 2528 -> 2528 bytes
sumfiles/libitm.sum | 6 +-
sumfiles/libstdc++.log.xz | Bin 450672 -> 453800 bytes
sumfiles/libstdc++.sum | 10 +-
27 files changed, 2045 insertions(+), 2045 deletions(-)
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[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig updated (50352cce13 -> c5b2f55981)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig
in repository toolchain/ci/qemu.
from 50352cce13 Merge remote-tracking branch 'remotes/juanquintela/tags/migr [...]
adds 685db13a38 tests: acpi: dump table with failed checksum
adds e741aff0f4 tests: qtest: add qtest_has_accel() to check if tested binar [...]
adds c306cdb0cc tests: acpi: whitelist expected tables for acpi/q35/xapic testcase
adds 80a2f3387c tests: acpi: q35: test for x2APIC entries in SRAT
adds b59a898458 tests: acpi: update expected tables blobs
adds f6826ac4ae tests: acpi: whitelist new expected table tests/data/acpi/q3 [...]
adds 0ff92b6d99 tests: acpi: add testcase for intel_iommu (DMAR table)
adds 44d3bdd8a6 tests: acpi: add expected blob for DMAR table
adds c5a7baad29 tests: acpi: whitelist expected blobs for new acpi/q35/ivrs [...]
adds a4c730cbb2 tests: acpi: add testcase for amd-iommu (IVRS table)
adds ef422a1422 tests: acpi: update expected blobs
adds 709611cb23 tests: acpi: arm/virt: drop redundant test_acpi_one() in tes [...]
adds 07e6ed2c79 tests: arm-cpu-features: use qtest_has_kvm() API
adds b72c76033d tests: migration-test: use qtest_has_accel() API
adds 220ffd949b tests: bios-tables-test: use qtest_has_accel() API to regist [...]
adds c64038c93e vdpa: Skip protected ram IOMMU mappings
adds 032e4d686e vdpa: Add vhost_vdpa_section_end
adds 013108b6e5 vdpa: Check for iova range at mappings changes
adds 819bbda81f virtio-iommu: Remove the non transitional name
adds 19d20e910a virtio-iommu: Drop base_name and change generic_name
adds 6889eb2d43 libvhost-user: fix VHOST_USER_REM_MEM_REG skipping mmap_addr
adds 821d28b88f vhost-user-rng: Add vhost-user-rng implementation
adds c7160fff7d vhost-user-rng-pci: Add vhost-user-rng-pci implementation
adds c47d4fa0c8 docs: Add documentation for vhost based RNG implementation
adds a1ed9ef1de vhost-user: fix duplicated notifier MR init
adds 7fe7791e3f failover: fix a regression introduced by JSON'ification of -device
adds 515efffc2f vhost-user-blk-test: pass vhost-user socket fds to QSD
adds bcfc906be4 qdev/qbus: remove failover specific code
adds 71352aa95b rebuild-expected-aml.sh: allow partial target list
adds 81d7228647 bios-tables-test: don't disassemble empty files
adds 7327813d17 vhost-vdpa: open device fd in net_init_vhost_vdpa()
adds 4d191cfdc7 vhost-vdpa: classify one time request
adds 353244d8b9 vhost-vdpa: prepare for the multiqueue support
adds 654790b65b vhost-vdpa: let net_vhost_vdpa_init() returns NetClientState *
adds 2f849dbdb2 net: introduce control client
adds 05ba3f63d1 vhost-net: control virtqueue support
adds 441537f1ce virtio-net: use "queue_pairs" instead of "queues" when possible
adds 049eb15b5f vhost: record the last virtqueue index for the virtio device
adds 22288fe5a3 virtio-net: vhost control virtqueue support
adds 402378407d vhost-vdpa: multiqueue support
adds 0e464f7d99 pci: fix PCI resource reserve capability on BE
adds 6dcb1cc951 tests/acpi/bios-tables-test: add and allow changes to a new [...]
adds 04dd78b9e8 tests/acpi/pcihp: add unit tests for hotplug on multifunctio [...]
adds a8339e07f9 tests/acpi/bios-tables-test: update DSDT blob for multifunct [...]
adds afc9fcde55 Merge remote-tracking branch 'remotes/mst/tags/for_upstream' [...]
adds 621f70d210 spapr/xive: Add source status helpers
adds 6f4912a416 target/ppc: Use tcg_constant_i32() in gen_setb()
adds 491b3cca36 target/ppc: Use tcg_constant_i64() in gen_brh()
adds a8dcb8da8a target/ppc: Fix the test raising the decrementer exception
adds 3c706d0252 hw/ppc/spapr_softmmu: Reduce include list
adds 644c68696e spapr/xive: Use xive_esb_rw() to trigger interrupts
adds 5ae3d2e8ba hw/ppc: Fix iothread locking in the 405 code
adds 252fcf36bb tests/acceptance: Add tests for the ppc405 boards
adds 66c6b40aba linux-user/ppc: Fix XER access in save/restore_user_regs
adds 7974dc5900 target/ppc: Fix XER access in gdbstub
adds 10de052188 linux-user: Fix XER access in ppc version of elf_core_copy_regs
adds 3938cacdb2 target/ppc: Fix XER access in monitor
adds 239fec2497 ppc/pegasos2: Restrict memory to 2 gigabytes
adds 99173b679a ppc/pegasos2: Warn when using VOF but no kernel is specified
adds 94cd1ffbe1 ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
adds bd20cde50b ppc/pegasos2: Access MV64361 registers via their memory region
adds d200ea14b7 ppc/pegasos2: Add constants for PCI config addresses
adds 284c0486e7 ppc/pegasos2: Implement power-off RTAS function with VOF
adds 5ff1dfdf66 tests/acceptance: Add a test for the bamboo ppc board
adds 6fa5726be6 target/ppc: Filter mtmsr[d] input before setting MSR
adds f7460df271 target/ppc: add MMCR0 PMCC bits to hflags
adds 565cb10967 target/ppc: add user read/write functions for MMCR0
adds 7b3ecf16c8 target/ppc: add user read/write functions for MMCR2
adds cedf706956 target/ppc: adding user read/write functions for PMCs
adds 6f9e8515c1 hw/ppc/ppc4xx_pci: Fix ppc4xx_pci_map_irq() for recent Linux [...]
adds e016b58f6e Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-6 [...]
adds 5384adef5d tests/acpi: Get prepared for IORT E.b revision upgrade
adds 1c2cb7e0b3 hw/arm/virt-acpi-build: IORT upgrade up to revision E.b
adds 47432863ff tests/acpi: Generate reference blob for IORT rev E.b
adds 99abb72520 hw/arm/virt: Don't create device-tree node for empty NUMA node
adds b152229697 roms/edk2: Only init brotli submodule to build BaseTools
adds bd0da3a3d4 roms/edk2: Only initialize required submodules
adds b84722cf44 hw/arm/sbsa-ref: Fixed cpu type error message typo.
adds 8975eb891f hw/elf_ops.h: switch to ssize_t for elf loader return type
adds 3cc322f437 tests/acpi: Add void table for virt/DBG2 bios-tables-test
adds f0dc9a5d8d hw/arm/virt_acpi_build: Generate DBG2 table
adds 98f5c60fbd bios-tables-test: Generate reference table for virt/DBG2
adds 31511b6fe0 hw/arm/virt: Only describe cpu topology since virt-6.2
adds b863f0b758 device_tree: Add qemu_fdt_add_path
adds 72b0527ff6 hw/arm/virt: Add cpu-map to device tree
adds 9de36ef872 hw/acpi/aml-build: Add Processor hierarchy node structure
adds 099f2df2e6 hw/acpi/aml-build: Add PPTT table
adds 4ebd52b92a tests/data/acpi/virt: Add an empty expected file for PPTT
adds 70d23ed534 hw/arm/virt-acpi-build: Generate PPTT table
adds f801789ff0 tests/data/acpi/virt: Update the empty expected file for PPTT
adds 4c127fdbe8 Merge remote-tracking branch 'remotes/rth/tags/pull-arm-2021 [...]
adds e976459b3b mac_via: update comment for VIA1B_vMystery bit
adds 39950b16ec q800: move VIA1 IRQ from level 1 to level 6
adds 91ff5e4dcd q800: use GLUE IRQ numbers instead of IRQ level for GLUE IRQs
adds 291bc1809a mac_via: add GPIO for A/UX mode
adds a85d18aabd q800: wire up auxmode GPIO to GLUE
adds f7c6e12e24 q800: route SONIC on-board Ethernet IRQ via nubus IRQ 9 in c [...]
adds c7710c1ebf q800: wire up remaining IRQs in classic mode
adds 3ea74abe2d q800: add NMI handler
adds a56c12fb76 q800: drop 8-bit graphic_depth check for Apple 21 inch display
adds 1dafe7656a Merge remote-tracking branch 'remotes/vivier-m68k/tags/q800- [...]
adds 82b6a3f64d aspeed: Add support for the fp5280g2-bmc board
adds fc6642544e aspeed/smc: Use a container for the flash mmio address space
adds b12fa6118f speed/sdhci: Add trace events
adds eb8f1d57bd Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-2 [...]
adds b4b9a0e32f update seabios to master branch snapshot
adds 9fb3fcfce5 update seabios binaries
adds 2c64ff92ec Merge remote-tracking branch 'remotes/kraxel/tags/seabios-20 [...]
adds c672f19f32 target/riscv: Pass the same value to oprsz and maxsz for vmv.v.v
adds e573a7f325 target/riscv: line up all of the registers in the info regis [...]
adds 54c1760937 target/riscv: Fix orc.b implementation
adds 03fd0c5fe9 hw/riscv: virt: Use machine->ram as the system memory
adds 61d5649488 target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh
adds 31dbcff713 target/riscv: Remove some unused macros
adds 9d3d60b704 target/riscv: Organise the CPU properties
adds 53677acf25 target/riscv: Move cpu_get_tb_cpu_state out of line
adds 99bc874fb3 target/riscv: Create RISCVMXL enumeration
adds e91a7227cb target/riscv: Split misa.mxl and misa.ext
adds db23e5d981 target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl
adds 92371bd903 target/riscv: Add MXL/SXL/UXL to TB_FLAGS
adds fbb48032e4 target/riscv: Use REQUIRE_64BIT in amo_check64
adds 4e97d459a0 target/riscv: Properly check SEW in amo_op
adds 905b9fcde1 target/riscv: Replace is_32bit with get_xl/get_xlen
adds 7667cafd5a target/riscv: Replace DisasContext.w with DisasContext.ol
adds 80347ae9f2 target/riscv: Use gen_arith_per_ol for RVM
adds 673be37163 target/riscv: Adjust trans_rev8_32 for riscv64
adds fdab665f6e target/riscv: Use gen_unary_per_ol for RVB
adds a0245d91dd target/riscv: Use gen_shift*_per_ol for RVB, RVI
adds 665b90d8a4 target/riscv: Use riscv_csrrw_debug for cpu_dump
adds b550f89457 target/riscv: Compute mstatus.sd on demand
adds ef63100648 hw/riscv: opentitan: Update to the latest build
adds 434e7e0217 hw/intc: Remove the Ibex PLIC
adds d8c6590f18 hw/intc: sifive_plic: Move the properties
adds d680ff664e hw/intc: sifive_plic: Cleanup the realize function
adds 8d3dae162e hw/intc: sifive_plic: Cleanup the irq_request function
adds d4c624f482 hw/riscv: microchip_pfsoc: Use MachineState::ram and Machine [...]
adds 91b1fbdc0c hw/riscv: opentitan: Use MachineState::ram and MachineClass: [...]
adds 56917307f4 hw/riscv: shakti_c: Use MachineState::ram and MachineClass:: [...]
adds e2b3ef7544 hw/riscv: sifive_e: Use MachineState::ram and MachineClass:: [...]
adds c188a9c4f7 hw/riscv: sifive_u: Use MachineState::ram and MachineClass:: [...]
adds 11ec06f9ea hw/riscv: spike: Use MachineState::ram and MachineClass::def [...]
adds 660efed8b3 Merge remote-tracking branch 'remotes/alistair23/tags/pull-r [...]
adds 764ecf77d0 po: update turkish translation
adds ed899ac77d disas/nios2: Fix style in print_insn_nios2()
adds dcc99bd833 disas/nios2: Simplify endianess conversion
adds 3bc1bb8042 MAINTAINERS: Add myself as reviewer of 'Machine core' API
adds f18d403f15 softmmu/physmem.c: Fix typo in comment
adds c4e4d0d92b hw/nvram: Fix Memory Leak in Xilinx eFuse QOM
adds 512a63b2b0 hw/nvram: Fix Memory Leak in Xilinx Versal eFuse device
adds e3f368e0b2 hw/nvram: Fix Memory Leak in Xilinx ZynqMP eFuse device
adds 1c3515ad59 README: Fix some documentation URLs
adds f98d372aef analyze-migration.py: fix a long standing typo
adds 2c92be50bc analyze-migration.py: fix extract contents ('-x') errors
adds c5b2f55981 Merge remote-tracking branch 'remotes/vivier/tags/trivial-br [...]
No new revisions were added by this update.
Summary of changes:
.gitlab-ci.d/edk2.yml | 6 +-
MAINTAINERS | 2 +
README.rst | 14 +-
disas/nios2.c | 73 +++---
docs/system/device-emulation.rst | 1 +
docs/system/devices/vhost-user-rng.rst | 39 +++
hw/acpi/aml-build.c | 89 +++++++
hw/arm/aspeed.c | 74 ++++++
hw/arm/boot.c | 13 +
hw/arm/sbsa-ref.c | 2 +-
hw/arm/virt-acpi-build.c | 117 +++++++--
hw/arm/virt.c | 71 +++++-
hw/core/loader.c | 60 ++---
hw/intc/ibex_plic.c | 307 ------------------------
hw/intc/meson.build | 1 -
hw/intc/sifive_plic.c | 85 +++----
hw/intc/spapr_xive.c | 2 +-
hw/intc/spapr_xive_kvm.c | 14 +-
hw/intc/xive.c | 8 +-
hw/m68k/q800.c | 169 ++++++++++++-
hw/misc/mac_via.c | 23 ++
hw/misc/trace-events | 1 +
hw/net/vhost_net-stub.c | 4 +-
hw/net/vhost_net.c | 55 +++--
hw/net/virtio-net.c | 201 +++++++++-------
hw/nvram/xlnx-efuse.c | 9 +-
hw/nvram/xlnx-versal-efuse-ctrl.c | 20 +-
hw/nvram/xlnx-zynqmp-efuse.c | 18 +-
hw/pci-host/mv64361.c | 1 +
hw/pci/pci_bridge.c | 10 +-
hw/ppc/pegasos2.c | 162 ++++++++-----
hw/ppc/ppc.c | 6 +-
hw/ppc/ppc4xx_pci.c | 8 +-
hw/ppc/spapr_softmmu.c | 15 --
hw/riscv/boot.c | 2 +-
hw/riscv/microchip_pfsoc.c | 36 +--
hw/riscv/opentitan.c | 38 ++-
hw/riscv/shakti_c.c | 6 +-
hw/riscv/sifive_e.c | 16 +-
hw/riscv/sifive_u.c | 6 +-
hw/riscv/spike.c | 6 +-
hw/riscv/virt.c | 6 +-
hw/sd/aspeed_sdhci.c | 5 +
hw/sd/trace-events | 4 +
hw/ssi/aspeed_smc.c | 11 +-
hw/virtio/Kconfig | 5 +
hw/virtio/meson.build | 2 +
hw/virtio/trace-events | 1 +
hw/virtio/vhost-user-rng-pci.c | 79 ++++++
hw/virtio/vhost-user-rng.c | 289 ++++++++++++++++++++++
hw/virtio/vhost-user.c | 5 +-
hw/virtio/vhost-vdpa.c | 140 ++++++++---
hw/virtio/virtio-iommu-pci.c | 4 +-
include/disas/dis-asm.h | 3 +-
include/hw/acpi/aml-build.h | 3 +
include/hw/arm/virt.h | 4 +-
include/hw/elf_ops.h | 27 ++-
include/hw/loader.h | 58 ++---
include/hw/misc/mac_via.h | 1 +
include/hw/ppc/xive.h | 24 ++
include/hw/riscv/opentitan.h | 6 +-
include/hw/ssi/aspeed_smc.h | 2 +-
include/hw/virtio/vhost-user-rng.h | 33 +++
include/hw/virtio/vhost-vdpa.h | 3 +
include/hw/virtio/vhost.h | 2 +
include/hw/virtio/virtio-iommu.h | 2 +-
include/hw/virtio/virtio-net.h | 5 +-
include/net/net.h | 5 +
include/net/vhost_net.h | 6 +-
include/sysemu/device_tree.h | 1 +
linux-user/elfload.c | 4 +-
linux-user/ppc/signal.c | 9 +-
linux-user/riscv/cpu_loop.c | 2 +-
meson.build | 6 +
net/net.c | 24 +-
net/vhost-vdpa.c | 127 ++++++++--
pc-bios/bios-256k.bin | Bin 262144 -> 262144 bytes
pc-bios/bios-microvm.bin | Bin 131072 -> 131072 bytes
pc-bios/bios.bin | Bin 131072 -> 131072 bytes
pc-bios/vgabios-ati.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios-bochs-display.bin | Bin 28672 -> 28672 bytes
pc-bios/vgabios-cirrus.bin | Bin 38912 -> 39424 bytes
pc-bios/vgabios-qxl.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios-ramfb.bin | Bin 28672 -> 28672 bytes
pc-bios/vgabios-stdvga.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios-virtio.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios-vmware.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios.bin | Bin 38912 -> 38912 bytes
po/tr.po | 25 +-
roms/Makefile | 3 +-
roms/Makefile.edk2 | 7 +-
roms/seabios | 2 +-
scripts/analyze-migration.py | 6 +-
scripts/make-release | 7 +-
semihosting/arm-compat-semi.c | 2 +-
softmmu/device_tree.c | 44 +++-
softmmu/physmem.c | 2 +-
softmmu/qdev-monitor.c | 18 +-
subprojects/libvhost-user/libvhost-user.c | 1 +
target/nios2/cpu.c | 6 +-
target/ppc/cpu.c | 2 +-
target/ppc/cpu.h | 25 +-
target/ppc/cpu_init.c | 16 +-
target/ppc/gdbstub.c | 8 +-
target/ppc/helper_regs.c | 6 +
target/ppc/monitor.c | 9 +-
target/ppc/power8-pmu-regs.c.inc | 262 ++++++++++++++++++++
target/ppc/spr_tcg.h | 8 +
target/ppc/translate.c | 95 ++++----
target/riscv/cpu.c | 216 +++++++++--------
target/riscv/cpu.h | 87 +++----
target/riscv/cpu_bits.h | 16 +-
target/riscv/cpu_helper.c | 92 ++++++-
target/riscv/csr.c | 104 +++++---
target/riscv/gdbstub.c | 10 +-
target/riscv/insn_trans/trans_rvb.c.inc | 153 ++++++------
target/riscv/insn_trans/trans_rvi.c.inc | 44 ++--
target/riscv/insn_trans/trans_rvm.c.inc | 36 ++-
target/riscv/insn_trans/trans_rvv.c.inc | 32 +--
target/riscv/machine.c | 10 +-
target/riscv/monitor.c | 4 +-
target/riscv/translate.c | 174 ++++++++++----
tests/acceptance/ppc_405.py | 42 ++++
tests/acceptance/ppc_bamboo.py | 39 +++
tests/data/acpi/q35/APIC.xapic | Bin 0 -> 2686 bytes
tests/data/acpi/q35/DMAR.dmar | Bin 0 -> 120 bytes
tests/data/acpi/q35/{DSDT => DSDT.ivrs} | Bin 8289 -> 8306 bytes
tests/data/acpi/q35/{DSDT => DSDT.multi-bridge} | Bin 8289 -> 8583 bytes
tests/data/acpi/q35/DSDT.xapic | Bin 0 -> 35652 bytes
tests/data/acpi/q35/FACP.xapic | Bin 0 -> 244 bytes
tests/data/acpi/q35/IVRS.ivrs | Bin 0 -> 104 bytes
tests/data/acpi/q35/SRAT.xapic | Bin 0 -> 5080 bytes
tests/data/acpi/rebuild-expected-aml.sh | 22 +-
tests/data/acpi/virt/DBG2 | Bin 0 -> 87 bytes
tests/data/acpi/virt/IORT | Bin 124 -> 128 bytes
tests/data/acpi/virt/IORT.memhp | Bin 124 -> 128 bytes
tests/data/acpi/virt/IORT.numamem | Bin 124 -> 128 bytes
tests/data/acpi/virt/IORT.pxb | Bin 124 -> 128 bytes
tests/data/acpi/virt/PPTT | Bin 0 -> 76 bytes
tests/qtest/acpi-utils.c | 14 ++
tests/qtest/arm-cpu-features.c | 29 +--
tests/qtest/bios-tables-test.c | 122 ++++++++--
tests/qtest/libqos/libqtest.h | 8 +
tests/qtest/libqtest.c | 27 +++
tests/qtest/migration-test.c | 15 +-
tests/qtest/vhost-user-blk-test.c | 4 +-
tests/tcg/ppc64/Makefile.target | 2 +
tests/tcg/ppc64le/Makefile.target | 2 +
tests/tcg/ppc64le/signal_save_restore_xer.c | 42 ++++
149 files changed, 3217 insertions(+), 1381 deletions(-)
create mode 100644 docs/system/devices/vhost-user-rng.rst
delete mode 100644 hw/intc/ibex_plic.c
create mode 100644 hw/virtio/vhost-user-rng-pci.c
create mode 100644 hw/virtio/vhost-user-rng.c
create mode 100644 include/hw/virtio/vhost-user-rng.h
create mode 100644 target/ppc/power8-pmu-regs.c.inc
create mode 100644 tests/acceptance/ppc_405.py
create mode 100644 tests/acceptance/ppc_bamboo.py
create mode 100644 tests/data/acpi/q35/APIC.xapic
create mode 100644 tests/data/acpi/q35/DMAR.dmar
copy tests/data/acpi/q35/{DSDT => DSDT.ivrs} (97%)
copy tests/data/acpi/q35/{DSDT => DSDT.multi-bridge} (94%)
create mode 100644 tests/data/acpi/q35/DSDT.xapic
create mode 100644 tests/data/acpi/q35/FACP.xapic
create mode 100644 tests/data/acpi/q35/IVRS.ivrs
create mode 100644 tests/data/acpi/q35/SRAT.xapic
create mode 100644 tests/data/acpi/virt/DBG2
create mode 100644 tests/data/acpi/virt/PPTT
create mode 100644 tests/tcg/ppc64le/signal_save_restore_xer.c
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3 years, 8 months
- 1
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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig updated (8a93745a7121 -> 73daeb3d507f)
by git＠git.linaro.org
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig
in repository toolchain/ci/llvm-project.
from 8a93745a7121 Remove "In Progress" text from release notes
adds 1a40203f8e94 workflows: Update lldb workaround to latest version of Mac OS X
adds 0a5ae011cd23 [HIP] Fix test rcom-detect.hip
adds a797306b7721 [clang-format] [PR51640] - New AfterEnum brace wrapping ch [...]
adds 30c05f43b662 [runtimes] Properly handle the sysroot/triple/gcc-toolchain
adds 2ac023cd540a [clang] Omit most AttributedStatements from the CFG
adds 914355ee793c [CMake] Re-enable use --gc-sections on OpenBSD
adds 47f53eec6485 [Mips] Add glue between CopyFromReg, CopyToReg and RDHWR n [...]
adds 3ee9a2b63cfd [Support][mips] Remove unnecessary includes from Memory.inc
adds 73daeb3d507f [CUDA] Make sure <string.h> is included with original __TH [...]
No new revisions were added by this update.
Summary of changes:
.github/workflows/lldb-tests.yml | 2 +-
clang/lib/Analysis/CFG.cpp | 32 ++-
clang/lib/Format/TokenAnnotator.cpp | 42 +++-
clang/lib/Format/UnwrappedLineParser.cpp | 5 +-
clang/lib/Headers/__clang_cuda_runtime_wrapper.h | 6 +-
clang/test/Driver/rocm-detect.hip | 3 +-
clang/test/SemaCXX/switch-implicit-fallthrough.cpp | 4 +
clang/test/SemaCXX/unreachable-code.cpp | 22 +++
clang/unittests/Format/FormatTest.cpp | 11 +-
clang/unittests/Format/FormatTestCSharp.cpp | 214 +++++++++++++++++++++
libcxx/CMakeLists.txt | 19 +-
libcxxabi/CMakeLists.txt | 21 +-
libunwind/CMakeLists.txt | 17 +-
llvm/cmake/modules/AddLLVM.cmake | 2 +-
llvm/lib/Support/Unix/Memory.inc | 8 -
llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 7 +-
llvm/test/CodeGen/Mips/tls-static.ll | 4 +-
17 files changed, 359 insertions(+), 60 deletions(-)
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3 years, 8 months
- 1
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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig updated (acd295e43e -> 471a3e5663)
by git＠git.linaro.org
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig
in repository toolchain/ci/binutils-gdb.
from acd295e43e Automatic date update in version.in
adds ccf0c86c87 Automatic date update in version.in
adds 6f552ca803 [GOLD] PowerPC64: Don't pretend to support multi-toc
adds 644ed18669 [GOLD] Two GOT sections for PowerPC64
adds 34bebf56c8 [GOLD] Re: PowerPC64: Don't pretend to support multi-toc
adds 6bb799d222 Re: PR27625, powerpc64 gold __tls_get_addr calls
adds 0effb90eb7 PR28417, std::string no longer allows accepting nullptr_t
adds 3b7669ac54 Automatic date update in version.in
adds 582c08278c Automatic date update in version.in
adds 471a3e5663 Automatic date update in version.in
No new revisions were added by this update.
Summary of changes:
bfd/version.h | 2 +-
gold/incremental.cc | 2 +-
gold/options.h | 2 +-
gold/output.cc | 7 +-
gold/output.h | 3 +-
gold/powerpc.cc | 691 ++++++++++++++++++++++++----------------------------
gold/s390.cc | 7 +-
gold/target.h | 15 +-
8 files changed, 338 insertions(+), 391 deletions(-)
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3 years, 8 months
- 1
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig updated (3113e2f6 -> a8548eb8)
by git＠git.linaro.org
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig
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discards 3113e2f6 0: update: binutils-llvm-linux-qemu: all
new a8548eb8 0: update: binutils-llvm-linux-qemu: all
This update added new revisions after undoing existing revisions.
That is to say, some revisions that were in the old version of the
branch are not in the new version. This situation occurs
when a user --force pushes a change and generates a repository
containing something like this:
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N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...]
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1564 -> 1552 bytes
02-prepare_abe/console.log.xz | Bin 2788 -> 2768 bytes
03-build_abe-binutils/console.log.xz | Bin 42076 -> 41548 bytes
04-build_llvm/console.log.xz | Bin 57892 -> 58232 bytes
05-build_abe-qemu/console.log.xz | Bin 30312 -> 29476 bytes
06-build_linux/console.log.xz | Bin 3696 -> 3480 bytes
07-boot_linux/console.log.xz | Bin 496 -> 496 bytes
08-check_regression/console.log.xz | Bin 412 -> 412 bytes
09-update_baseline/console.log | 10 +++++-----
jenkins/manifest.sh | 18 +++++++++---------
10 files changed, 14 insertions(+), 14 deletions(-)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_gnu_tx1/gnu-release-aarch64-spec2k6-O3_LTO updated (5491f340 -> e2065c7c)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_gnu_tx1/gnu-release-aarch64-spec2k6-O3_LTO
in repository toolchain/ci/base-artifacts.
discards 5491f340 17: update: binutils-gcc-linux-glibc: 1
discards 28f4c160 16: reset: gcc-30c41abc41b1b415ebb42444ced6087c79b70f3a: 1
new e2065c7c 16: reset: : 1
This update added new revisions after undoing existing revisions.
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1624 -> 1624 bytes
02-prepare_abe/console.log.xz | Bin 2784 -> 2764 bytes
03-build_abe-binutils/console.log.xz | Bin 42624 -> 42324 bytes
04-build_abe-stage1/console.log.xz | Bin 67968 -> 69220 bytes
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07-build_abe-glibc/console.log.xz | Bin 230984 -> 229040 bytes
08-build_abe-stage2/console.log.xz | Bin 173460 -> 173116 bytes
.../benchmark-build.log | 93 +-
{10-benchmark => 09-benchmark}/benchmark.log | 92 +-
09-benchmark/console.log.xz | Bin 0 -> 3152 bytes
09-true/console.log.xz | Bin 76 -> 0 bytes
10-benchmark/benchmark-start.log | 1 -
10-benchmark/console.log.xz | Bin 3100 -> 0 bytes
10-check_regression/console.log.xz | Bin 0 -> 3624 bytes
.../extra-bisect-params | 0
.../jira-body.txt | 0
.../mail-body.txt | 0
.../results-0.csv | 0
10-check_regression/results-1.csv | 89 +
.../results-brief.csv | 58 +-
.../results-compare.csv | 20 +-
10-check_regression/results-full.csv | 89 +
10-check_regression/results.csv | 37 +
.../results.log | 4386 ++++++++++----------
11-check_regression/console.log.xz | Bin 3552 -> 0 bytes
11-check_regression/results-0.csv | 90 -
11-check_regression/results-full.csv | 89 -
11-check_regression/results.csv | 37 -
11-update_baseline/console.log | 3288 +++++++++++++++
11-update_baseline/exe.regressions | 3 +
.../extra-bisect-params | 2 +-
11-update_baseline/jira-body.txt | 6 +
.../mail-body.txt | 6 +-
11-update_baseline/mail-subject.txt | 1 +
.../results-0.csv | 0
11-update_baseline/results-1.csv | 89 +
.../results-brief.csv | 58 +-
.../results-compare.csv | 4 +-
11-update_baseline/results-full.csv | 89 +
11-update_baseline/results.csv | 37 +
.../results.log | 2922 +++++++------
11-update_baseline/results.regressions | 7 +
.../top-artifacts/save-temps/400.perlbench.tar.xz | Bin 0 -> 6909460 bytes
.../top-artifacts/save-temps/401.bzip2.tar.xz | Bin 0 -> 417480 bytes
.../top-artifacts/save-temps/403.gcc.tar.xz | Bin 19493492 -> 19491472 bytes
.../top-artifacts/save-temps/410.bwaves.tar.xz | Bin 0 -> 78560 bytes
.../top-artifacts/save-temps/416.gamess.tar.xz | Bin 28710652 -> 28708960 bytes
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.../top-artifacts/save-temps/445.gobmk.tar.xz | Bin 8530640 -> 8513604 bytes
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create mode 100644 reset-baseline
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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap_O3 updated (b8754a8ff8b -> 73833f5d0e0)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap_O3
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from b8754a8ff8b Daily bump.
adds e74336df42f x86: Document -fcf-protection requires i686 or newer
adds cce92cd8d11 Daily bump.
adds 97262ad1c2c Daily bump.
adds 73833f5d0e0 Daily bump.
No new revisions were added by this update.
Summary of changes:
gcc/ChangeLog | 9 +++++++++
gcc/DATESTAMP | 2 +-
gcc/doc/invoke.texi | 3 ++-
3 files changed, 12 insertions(+), 2 deletions(-)
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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap_O3 updated (0effb90eb7 -> 471a3e5663)
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from 0effb90eb7 PR28417, std::string no longer allows accepting nullptr_t
adds 3b7669ac54 Automatic date update in version.in
adds 582c08278c Automatic date update in version.in
adds 471a3e5663 Automatic date update in version.in
No new revisions were added by this update.
Summary of changes:
bfd/version.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap_O3 updated (8164495b -> 378981ac)
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discards 8164495b 0: update: binutils-gcc: 2
new 378981ac 0: update: binutils-gcc: 2
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01-reset_artifacts/console.log.xz | Bin 1536 -> 1536 bytes
02-prepare_abe/console.log.xz | Bin 2748 -> 2756 bytes
04-build_abe-binutils/console.log.xz | Bin 61564 -> 61240 bytes
05-build_abe-bootstrap_O3/console.log.xz | Bin 446976 -> 450560 bytes
06-check_regression/console.log.xz | Bin 416 -> 420 bytes
07-update_baseline/console.log | 16 ++++++++--------
jenkins/manifest.sh | 14 +++++++-------
7 files changed, 15 insertions(+), 15 deletions(-)
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[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-release-arm-spec2k6-O3_LTO updated (cb44a620ef -> 024a7640ab)
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from cb44a620ef S390: Add PCI_MIO and SIE HWCAPs
adds 79528414dc elf: Replace nsid with args.nsid [BZ #27609]
adds 76843f3b3e y2038: Use a common definition for stat for sparc32
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adds 024a7640ab elf: Avoid deadlock between pthread_create and ctors [BZ #28357]
No new revisions were added by this update.
Summary of changes:
NEWS | 1 +
elf/dl-close.c | 6 ++
elf/dl-open.c | 37 ++++++-
elf/dl-support.c | 7 ++
elf/dl-tls.c | 16 +--
elf/rtld.c | 1 +
posix/fork.c | 3 +
sysdeps/generic/ldsodefs.h | 9 +-
sysdeps/pthread/Makefile | 10 +-
sysdeps/pthread/tst-create1.c | 119 +++++++++++++++++++++
.../pthread/tst-create1mod.c | 30 +++---
sysdeps/unix/sysv/linux/bits/timex.h | 2 +-
sysdeps/unix/sysv/linux/sparc/bits/struct_stat.h | 54 ++++++----
13 files changed, 243 insertions(+), 52 deletions(-)
create mode 100644 sysdeps/pthread/tst-create1.c
copy elf/tst-dlopen-nodelete-reloc-mod8.c => sysdeps/pthread/tst-create1mod.c (63%)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-release-arm-spec2k6-O3_LTO updated (5a148d84 -> 815eb7b2)
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discards 5a148d84 3: update: gcc-97262ad1c2cf078e806c812e4c250472c8a93df7: 1
new 815eb7b2 3: update: glibc-024a7640ab9ecea80e527f4e4d7f7a1868e952c5: 1
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Summary of changes:
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02-prepare_abe/console.log.xz | Bin 2780 -> 2780 bytes
03-build_abe-binutils/console.log.xz | Bin 41216 -> 41476 bytes
04-build_abe-stage1/console.log.xz | Bin 86032 -> 87072 bytes
06-build_abe-linux/console.log.xz | Bin 9716 -> 9720 bytes
07-build_abe-glibc/console.log.xz | Bin 225196 -> 227048 bytes
08-build_abe-stage2/console.log.xz | Bin 206032 -> 208288 bytes
09-build_llvm-true/console.log.xz | Bin 57220 -> 56708 bytes
10-benchmark/benchmark-build.log | 64 +-
10-benchmark/benchmark.log | 62 +-
10-benchmark/console.log.xz | Bin 3244 -> 3252 bytes
11-check_regression/console.log.xz | Bin 2896 -> 2896 bytes
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12-update_baseline/extra-bisect-params | 2 +-
12-update_baseline/jira-body.txt | 2 +-
12-update_baseline/mail-body.txt | 2 +-
12-update_baseline/mail-subject.txt | 2 +-
12-update_baseline/results-0.csv | 115 +-
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12-update_baseline/results-compare.csv | 26 +-
12-update_baseline/results-full.csv | 126 +-
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12-update_baseline/results.log | 3096 +++++++++---------
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.../top-artifacts/save-temps/403.gcc.tar.xz | Bin 1200392 -> 1197268 bytes
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.../top-artifacts/save-temps/444.namd.tar.xz | Bin 44028 -> 43964 bytes
.../top-artifacts/save-temps/445.gobmk.tar.xz | Bin 615748 -> 611584 bytes
.../top-artifacts/save-temps/447.dealII.tar.xz | Bin 865228 -> 861380 bytes
.../top-artifacts/save-temps/450.soplex.tar.xz | Bin 196048 -> 195528 bytes
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.../top-artifacts/save-temps/456.hmmer.tar.xz | Bin 120944 -> 120928 bytes
.../top-artifacts/save-temps/458.sjeng.tar.xz | Bin 50604 -> 50480 bytes
.../top-artifacts/save-temps/462.libquantum.tar.xz | Bin 23648 -> 23584 bytes
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jenkins/manifest.sh | 8 +-
results_id | 2 +-
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save-temps/403.gcc.tar.xz | Bin 1200392 -> 1197268 bytes
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save-temps/445.gobmk.tar.xz | Bin 615748 -> 611584 bytes
save-temps/447.dealII.tar.xz | Bin 865228 -> 861380 bytes
save-temps/450.soplex.tar.xz | Bin 196048 -> 195528 bytes
save-temps/453.povray.tar.xz | Bin 448868 -> 439904 bytes
save-temps/456.hmmer.tar.xz | Bin 120944 -> 120928 bytes
save-temps/458.sjeng.tar.xz | Bin 50604 -> 50480 bytes
save-temps/462.libquantum.tar.xz | Bin 23648 -> 23584 bytes
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save-temps/470.lbm.tar.xz | Bin 15920 -> 15860 bytes
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save-temps/473.astar.tar.xz | Bin 40928 -> 40940 bytes
save-temps/482.sphinx3.tar.xz | Bin 92884 -> 92820 bytes
save-temps/483.xalancbmk.tar.xz | Bin 3212112 -> 3170400 bytes
73 files changed, 5587 insertions(+), 4818 deletions(-)
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3 years, 8 months
- 1
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[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (e515d93264 -> 1ed0032b40)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64
in repository toolchain/ci/gdb.
from e515d93264 Automatic date update in version.in
adds e214f8db56 LoongArch bfd support
adds 6cc76c40a9 LoongArch opcodes support
adds e9a0721f82 LoongArch binutils support
adds 4462d7c440 LoongArch gas support
adds 560b3fe208 LoongArch ld support
adds 3f9661f12a asan: aout: heap buffer overflow
adds e028124942 asan: arm-darwin: buffer overflow
adds 1ed0032b40 asan: c4x, c54x coff_canonicalize_reloc buffer overflow
No new revisions were added by this update.
Summary of changes:
bfd/Makefile.am | 17 +-
bfd/Makefile.in | 21 +-
bfd/aoutx.h | 5 +-
bfd/archures.c | 5 +
bfd/bfd-in.h | 4 +-
bfd/bfd-in2.h | 52 +-
bfd/coff-tic54x.c | 2 +-
bfd/coffcode.h | 22 +-
bfd/coffgen.c | 2 +-
bfd/coffswap.h | 27 +
bfd/config.bfd | 15 +
bfd/configure | 2 +
bfd/configure.ac | 2 +
bfd/cpu-loongarch.c | 61 +
bfd/elf-bfd.h | 9 +
bfd/elf.c | 109 +
bfd/elfnn-loongarch.c | 3265 ++++++++++++++++++++
bfd/elfxx-loongarch.c | 661 ++++
bfd/elfxx-loongarch.h | 31 +
bfd/libbfd.h | 43 +
bfd/mach-o-arm.c | 39 +-
bfd/pdp11.c | 5 +-
bfd/po/BLD-POTFILES.in | 2 +
bfd/po/SRC-POTFILES.in | 3 +
bfd/reloc.c | 89 +
bfd/targets.c | 8 +
binutils/NEWS | 2 +
binutils/readelf.c | 24 +
binutils/testsuite/binutils-all/objdump.exp | 1 +
gas/Makefile.am | 17 +-
gas/Makefile.in | 28 +-
gas/NEWS | 2 +
gas/config/loongarch-lex-wrapper.c | 20 +
gas/config/loongarch-lex.h | 34 +
gas/config/loongarch-lex.l | 61 +
gas/config/loongarch-parse.y | 441 +++
gas/config/tc-loongarch.c | 1382 +++++++++
gas/config/tc-loongarch.h | 91 +
gas/configure | 17 +
gas/configure.ac | 13 +
gas/configure.tgt | 6 +-
gas/doc/as.texi | 31 +
gas/doc/c-loongarch.texi | 39 +
gas/po/POTFILES.in | 1 +
gas/testsuite/gas/all/gas.exp | 5 +-
gas/testsuite/gas/elf/elf.exp | 1 +
gas/testsuite/gas/loongarch/4opt_op.d | 70 +
gas/testsuite/gas/loongarch/4opt_op.s | 61 +
gas/testsuite/gas/loongarch/fix_op.d | 134 +
gas/testsuite/gas/loongarch/fix_op.s | 125 +
gas/testsuite/gas/loongarch/float_op.d | 85 +
gas/testsuite/gas/loongarch/float_op.s | 76 +
gas/testsuite/gas/loongarch/imm_op.d | 48 +
gas/testsuite/gas/loongarch/imm_op.s | 39 +
gas/testsuite/gas/loongarch/jmp_op.d | 68 +
gas/testsuite/gas/loongarch/jmp_op.s | 22 +
gas/testsuite/gas/loongarch/load_store_op.d | 178 ++
gas/testsuite/gas/loongarch/load_store_op.s | 169 +
gas/testsuite/gas/loongarch/loongarch.exp | 23 +
gas/testsuite/gas/loongarch/macro_op.d | 733 +++++
gas/testsuite/gas/loongarch/macro_op.s | 29 +
gas/testsuite/gas/loongarch/nop.d | 10 +
.../gas/{riscv/t_insns.s => loongarch/nop.s} | 0
gas/testsuite/gas/loongarch/privilege_op.d | 44 +
gas/testsuite/gas/loongarch/privilege_op.s | 35 +
gas/testsuite/gas/loongarch/syscall.d | 11 +
gas/testsuite/gas/loongarch/syscall.s | 2 +
gas/testsuite/lib/gas-defs.exp | 4 +
include/dis-asm.h | 1 +
include/elf/common.h | 12 +-
include/elf/loongarch.h | 119 +
include/opcode/loongarch.h | 239 ++
ld/Makefile.am | 4 +
ld/Makefile.in | 5 +
ld/NEWS | 2 +
ld/configure.tgt | 4 +
ld/emulparams/elf32loongarch-defs.sh | 36 +
ld/emulparams/elf32loongarch.sh | 11 +
ld/emulparams/elf64loongarch-defs.sh | 39 +
ld/emulparams/elf64loongarch.sh | 11 +
ld/emultempl/loongarchelf.em | 87 +
ld/po/BLD-POTFILES.in | 2 +
ld/testsuite/ld-loongarch-elf/disas-jirl.d | 14 +
ld/testsuite/ld-loongarch-elf/disas-jirl.s | 5 +
ld/testsuite/ld-loongarch-elf/jmp_op.d | 68 +
ld/testsuite/ld-loongarch-elf/jmp_op.s | 22 +
ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp | 34 +
ld/testsuite/ld-loongarch-elf/macro_op.d | 732 +++++
ld/testsuite/ld-loongarch-elf/macro_op.s | 29 +
ld/testsuite/ld-loongarch-elf/syscall-0.s | 9 +
ld/testsuite/ld-loongarch-elf/syscall-1.s | 20 +
ld/testsuite/ld-loongarch-elf/syscall.d | 5 +
ld/testsuite/ld-srec/srec.exp | 6 +
ld/testsuite/ld-unique/pr21529.d | 2 +-
opcodes/Makefile.am | 3 +
opcodes/Makefile.in | 6 +
opcodes/configure | 1 +
opcodes/configure.ac | 1 +
opcodes/disassemble.c | 9 +
opcodes/disassemble.h | 1 +
opcodes/loongarch-coder.c | 473 +++
opcodes/loongarch-dis.c | 342 ++
opcodes/loongarch-opc.c | 798 +++++
opcodes/po/POTFILES.in | 3 +
104 files changed, 11788 insertions(+), 50 deletions(-)
create mode 100644 bfd/cpu-loongarch.c
create mode 100644 bfd/elfnn-loongarch.c
create mode 100644 bfd/elfxx-loongarch.c
create mode 100644 bfd/elfxx-loongarch.h
create mode 100644 gas/config/loongarch-lex-wrapper.c
create mode 100644 gas/config/loongarch-lex.h
create mode 100644 gas/config/loongarch-lex.l
create mode 100644 gas/config/loongarch-parse.y
create mode 100644 gas/config/tc-loongarch.c
create mode 100644 gas/config/tc-loongarch.h
create mode 100644 gas/doc/c-loongarch.texi
create mode 100644 gas/testsuite/gas/loongarch/4opt_op.d
create mode 100644 gas/testsuite/gas/loongarch/4opt_op.s
create mode 100644 gas/testsuite/gas/loongarch/fix_op.d
create mode 100644 gas/testsuite/gas/loongarch/fix_op.s
create mode 100644 gas/testsuite/gas/loongarch/float_op.d
create mode 100644 gas/testsuite/gas/loongarch/float_op.s
create mode 100644 gas/testsuite/gas/loongarch/imm_op.d
create mode 100644 gas/testsuite/gas/loongarch/imm_op.s
create mode 100644 gas/testsuite/gas/loongarch/jmp_op.d
create mode 100644 gas/testsuite/gas/loongarch/jmp_op.s
create mode 100644 gas/testsuite/gas/loongarch/load_store_op.d
create mode 100644 gas/testsuite/gas/loongarch/load_store_op.s
create mode 100644 gas/testsuite/gas/loongarch/loongarch.exp
create mode 100644 gas/testsuite/gas/loongarch/macro_op.d
create mode 100644 gas/testsuite/gas/loongarch/macro_op.s
create mode 100644 gas/testsuite/gas/loongarch/nop.d
copy gas/testsuite/gas/{riscv/t_insns.s => loongarch/nop.s} (100%)
create mode 100644 gas/testsuite/gas/loongarch/privilege_op.d
create mode 100644 gas/testsuite/gas/loongarch/privilege_op.s
create mode 100644 gas/testsuite/gas/loongarch/syscall.d
create mode 100644 gas/testsuite/gas/loongarch/syscall.s
create mode 100644 include/elf/loongarch.h
create mode 100644 include/opcode/loongarch.h
create mode 100644 ld/emulparams/elf32loongarch-defs.sh
create mode 100644 ld/emulparams/elf32loongarch.sh
create mode 100644 ld/emulparams/elf64loongarch-defs.sh
create mode 100644 ld/emulparams/elf64loongarch.sh
create mode 100644 ld/emultempl/loongarchelf.em
create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.d
create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.s
create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.d
create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.s
create mode 100644 ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp
create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.d
create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-0.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-1.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall.d
create mode 100644 opcodes/loongarch-coder.c
create mode 100644 opcodes/loongarch-dis.c
create mode 100644 opcodes/loongarch-opc.c
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3 years, 8 months
- 1
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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (a350f56f063 -> 9d1727a30e4)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64
in repository toolchain/ci/gcc.
from a350f56f063 Daily bump.
adds dfe1ac896af doc: Remove details around Itanium on GNU/Linux and Windows
adds 9d1727a30e4 [Committed] Correct testcase gcc.target/bfin/20090914-3.c
No new revisions were added by this update.
Summary of changes:
gcc/doc/install.texi | 11 -----------
gcc/testsuite/gcc.target/bfin/20090914-3.c | 3 ++-
2 files changed, 2 insertions(+), 12 deletions(-)
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3 years, 8 months
- 1
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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (e515d93264 -> 1ed0032b40)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64
in repository toolchain/ci/binutils-gdb.
from e515d93264 Automatic date update in version.in
adds e214f8db56 LoongArch bfd support
adds 6cc76c40a9 LoongArch opcodes support
adds e9a0721f82 LoongArch binutils support
adds 4462d7c440 LoongArch gas support
adds 560b3fe208 LoongArch ld support
adds 3f9661f12a asan: aout: heap buffer overflow
adds e028124942 asan: arm-darwin: buffer overflow
adds 1ed0032b40 asan: c4x, c54x coff_canonicalize_reloc buffer overflow
No new revisions were added by this update.
Summary of changes:
bfd/Makefile.am | 17 +-
bfd/Makefile.in | 21 +-
bfd/aoutx.h | 5 +-
bfd/archures.c | 5 +
bfd/bfd-in.h | 4 +-
bfd/bfd-in2.h | 52 +-
bfd/coff-tic54x.c | 2 +-
bfd/coffcode.h | 22 +-
bfd/coffgen.c | 2 +-
bfd/coffswap.h | 27 +
bfd/config.bfd | 15 +
bfd/configure | 2 +
bfd/configure.ac | 2 +
bfd/cpu-loongarch.c | 61 +
bfd/elf-bfd.h | 9 +
bfd/elf.c | 109 +
bfd/elfnn-loongarch.c | 3265 ++++++++++++++++++++
bfd/elfxx-loongarch.c | 661 ++++
bfd/elfxx-loongarch.h | 31 +
bfd/libbfd.h | 43 +
bfd/mach-o-arm.c | 39 +-
bfd/pdp11.c | 5 +-
bfd/po/BLD-POTFILES.in | 2 +
bfd/po/SRC-POTFILES.in | 3 +
bfd/reloc.c | 89 +
bfd/targets.c | 8 +
binutils/NEWS | 2 +
binutils/readelf.c | 24 +
binutils/testsuite/binutils-all/objdump.exp | 1 +
gas/Makefile.am | 17 +-
gas/Makefile.in | 28 +-
gas/NEWS | 2 +
gas/config/loongarch-lex-wrapper.c | 20 +
gas/config/loongarch-lex.h | 34 +
gas/config/loongarch-lex.l | 61 +
gas/config/loongarch-parse.y | 441 +++
gas/config/tc-loongarch.c | 1382 +++++++++
gas/config/tc-loongarch.h | 91 +
gas/configure | 17 +
gas/configure.ac | 13 +
gas/configure.tgt | 6 +-
gas/doc/as.texi | 31 +
gas/doc/c-loongarch.texi | 39 +
gas/po/POTFILES.in | 1 +
gas/testsuite/gas/all/gas.exp | 5 +-
gas/testsuite/gas/elf/elf.exp | 1 +
gas/testsuite/gas/loongarch/4opt_op.d | 70 +
gas/testsuite/gas/loongarch/4opt_op.s | 61 +
gas/testsuite/gas/loongarch/fix_op.d | 134 +
gas/testsuite/gas/loongarch/fix_op.s | 125 +
gas/testsuite/gas/loongarch/float_op.d | 85 +
gas/testsuite/gas/loongarch/float_op.s | 76 +
gas/testsuite/gas/loongarch/imm_op.d | 48 +
gas/testsuite/gas/loongarch/imm_op.s | 39 +
gas/testsuite/gas/loongarch/jmp_op.d | 68 +
gas/testsuite/gas/loongarch/jmp_op.s | 22 +
gas/testsuite/gas/loongarch/load_store_op.d | 178 ++
gas/testsuite/gas/loongarch/load_store_op.s | 169 +
gas/testsuite/gas/loongarch/loongarch.exp | 23 +
gas/testsuite/gas/loongarch/macro_op.d | 733 +++++
gas/testsuite/gas/loongarch/macro_op.s | 29 +
gas/testsuite/gas/loongarch/nop.d | 10 +
.../gas/{riscv/t_insns.s => loongarch/nop.s} | 0
gas/testsuite/gas/loongarch/privilege_op.d | 44 +
gas/testsuite/gas/loongarch/privilege_op.s | 35 +
gas/testsuite/gas/loongarch/syscall.d | 11 +
gas/testsuite/gas/loongarch/syscall.s | 2 +
gas/testsuite/lib/gas-defs.exp | 4 +
include/dis-asm.h | 1 +
include/elf/common.h | 12 +-
include/elf/loongarch.h | 119 +
include/opcode/loongarch.h | 239 ++
ld/Makefile.am | 4 +
ld/Makefile.in | 5 +
ld/NEWS | 2 +
ld/configure.tgt | 4 +
ld/emulparams/elf32loongarch-defs.sh | 36 +
ld/emulparams/elf32loongarch.sh | 11 +
ld/emulparams/elf64loongarch-defs.sh | 39 +
ld/emulparams/elf64loongarch.sh | 11 +
ld/emultempl/loongarchelf.em | 87 +
ld/po/BLD-POTFILES.in | 2 +
ld/testsuite/ld-loongarch-elf/disas-jirl.d | 14 +
ld/testsuite/ld-loongarch-elf/disas-jirl.s | 5 +
ld/testsuite/ld-loongarch-elf/jmp_op.d | 68 +
ld/testsuite/ld-loongarch-elf/jmp_op.s | 22 +
ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp | 34 +
ld/testsuite/ld-loongarch-elf/macro_op.d | 732 +++++
ld/testsuite/ld-loongarch-elf/macro_op.s | 29 +
ld/testsuite/ld-loongarch-elf/syscall-0.s | 9 +
ld/testsuite/ld-loongarch-elf/syscall-1.s | 20 +
ld/testsuite/ld-loongarch-elf/syscall.d | 5 +
ld/testsuite/ld-srec/srec.exp | 6 +
ld/testsuite/ld-unique/pr21529.d | 2 +-
opcodes/Makefile.am | 3 +
opcodes/Makefile.in | 6 +
opcodes/configure | 1 +
opcodes/configure.ac | 1 +
opcodes/disassemble.c | 9 +
opcodes/disassemble.h | 1 +
opcodes/loongarch-coder.c | 473 +++
opcodes/loongarch-dis.c | 342 ++
opcodes/loongarch-opc.c | 798 +++++
opcodes/po/POTFILES.in | 3 +
104 files changed, 11788 insertions(+), 50 deletions(-)
create mode 100644 bfd/cpu-loongarch.c
create mode 100644 bfd/elfnn-loongarch.c
create mode 100644 bfd/elfxx-loongarch.c
create mode 100644 bfd/elfxx-loongarch.h
create mode 100644 gas/config/loongarch-lex-wrapper.c
create mode 100644 gas/config/loongarch-lex.h
create mode 100644 gas/config/loongarch-lex.l
create mode 100644 gas/config/loongarch-parse.y
create mode 100644 gas/config/tc-loongarch.c
create mode 100644 gas/config/tc-loongarch.h
create mode 100644 gas/doc/c-loongarch.texi
create mode 100644 gas/testsuite/gas/loongarch/4opt_op.d
create mode 100644 gas/testsuite/gas/loongarch/4opt_op.s
create mode 100644 gas/testsuite/gas/loongarch/fix_op.d
create mode 100644 gas/testsuite/gas/loongarch/fix_op.s
create mode 100644 gas/testsuite/gas/loongarch/float_op.d
create mode 100644 gas/testsuite/gas/loongarch/float_op.s
create mode 100644 gas/testsuite/gas/loongarch/imm_op.d
create mode 100644 gas/testsuite/gas/loongarch/imm_op.s
create mode 100644 gas/testsuite/gas/loongarch/jmp_op.d
create mode 100644 gas/testsuite/gas/loongarch/jmp_op.s
create mode 100644 gas/testsuite/gas/loongarch/load_store_op.d
create mode 100644 gas/testsuite/gas/loongarch/load_store_op.s
create mode 100644 gas/testsuite/gas/loongarch/loongarch.exp
create mode 100644 gas/testsuite/gas/loongarch/macro_op.d
create mode 100644 gas/testsuite/gas/loongarch/macro_op.s
create mode 100644 gas/testsuite/gas/loongarch/nop.d
copy gas/testsuite/gas/{riscv/t_insns.s => loongarch/nop.s} (100%)
create mode 100644 gas/testsuite/gas/loongarch/privilege_op.d
create mode 100644 gas/testsuite/gas/loongarch/privilege_op.s
create mode 100644 gas/testsuite/gas/loongarch/syscall.d
create mode 100644 gas/testsuite/gas/loongarch/syscall.s
create mode 100644 include/elf/loongarch.h
create mode 100644 include/opcode/loongarch.h
create mode 100644 ld/emulparams/elf32loongarch-defs.sh
create mode 100644 ld/emulparams/elf32loongarch.sh
create mode 100644 ld/emulparams/elf64loongarch-defs.sh
create mode 100644 ld/emulparams/elf64loongarch.sh
create mode 100644 ld/emultempl/loongarchelf.em
create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.d
create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.s
create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.d
create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.s
create mode 100644 ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp
create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.d
create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-0.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-1.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall.d
create mode 100644 opcodes/loongarch-coder.c
create mode 100644 opcodes/loongarch-dis.c
create mode 100644 opcodes/loongarch-opc.c
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3 years, 8 months
- 1
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (43f86df2 -> 3c46868e)
by git＠git.linaro.org
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64
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discards 43f86df2 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1
new 3c46868e 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1
This update added new revisions after undoing existing revisions.
That is to say, some revisions that were in the old version of the
branch are not in the new version. This situation occurs
when a user --force pushes a change and generates a repository
containing something like this:
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repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1552 -> 1576 bytes
02-prepare_abe/console.log.xz | Bin 2780 -> 2764 bytes
03-build_abe-binutils/console.log.xz | Bin 45432 -> 45632 bytes
04-build_abe-stage1/console.log.xz | Bin 71728 -> 71968 bytes
05-clean_sysroot/console.log.xz | Bin 328 -> 328 bytes
06-build_abe-linux/console.log.xz | Bin 8864 -> 9048 bytes
07-build_abe-glibc/console.log.xz | Bin 236448 -> 236392 bytes
08-build_abe-stage2/console.log.xz | Bin 201748 -> 201212 bytes
09-build_abe-gdb/console.log.xz | Bin 45800 -> 44940 bytes
10-build_abe-qemu/console.log.xz | Bin 30348 -> 30176 bytes
11-build_abe-dejagnu/console.log.xz | Bin 3892 -> 3880 bytes
12-build_abe-check_gcc/console.log.xz | Bin 2472 -> 2796 bytes
13-check_regression/console.log.xz | Bin 2516 -> 2860 bytes
13-check_regression/extra-bisect-params | 1 +
13-check_regression/fails.sum | 6 +
13-check_regression/results.compare | 33 +-
13-check_regression/results.compare2 | 21 +-
13-check_regression/results.regressions | 26 +
14-update_baseline/console.log | 183 +-
14-update_baseline/extra-bisect-params | 1 +
14-update_baseline/fails.sum | 6 +
14-update_baseline/results.compare | 33 +-
14-update_baseline/results.compare2 | 21 +-
14-update_baseline/results.regressions | 26 +
jenkins/manifest.sh | 18 +-
sumfiles/g++.log.xz | Bin 3278712 -> 3260492 bytes
sumfiles/g++.sum | 193 +-
sumfiles/gcc.log.xz | Bin 2815576 -> 2831712 bytes
sumfiles/gcc.sum | 4058 ++++++++++++++++---------------
sumfiles/gfortran.log.xz | Bin 863332 -> 867448 bytes
sumfiles/gfortran.sum | 40 +-
sumfiles/libatomic.log.xz | Bin 2272 -> 2272 bytes
sumfiles/libatomic.sum | 4 +-
sumfiles/libgomp.log.xz | Bin 166112 -> 166012 bytes
sumfiles/libgomp.sum | 16 +-
sumfiles/libitm.log.xz | Bin 2640 -> 2640 bytes
sumfiles/libitm.sum | 6 +-
sumfiles/libstdc++.log.xz | Bin 406912 -> 406496 bytes
sumfiles/libstdc++.sum | 18 +-
39 files changed, 2417 insertions(+), 2293 deletions(-)
create mode 100644 13-check_regression/extra-bisect-params
create mode 100644 13-check_regression/fails.sum
create mode 100644 13-check_regression/results.regressions
create mode 100644 14-update_baseline/extra-bisect-params
create mode 100644 14-update_baseline/fails.sum
create mode 100644 14-update_baseline/results.regressions
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3 years, 8 months
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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan updated (d891ab1bc87 -> 9d1727a30e4)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan
in repository toolchain/ci/gcc.
from d891ab1bc87 Move bind-c-intent-out-2.f90 to gfortran.dg/ubsan
adds e3725624ec0 cleanup compute_points_to_sets
adds 710d9ad5a25 config/i386: Commentary typo fix
adds a350f56f063 Daily bump.
adds dfe1ac896af doc: Remove details around Itanium on GNU/Linux and Windows
adds 9d1727a30e4 [Committed] Correct testcase gcc.target/bfin/20090914-3.c
No new revisions were added by this update.
Summary of changes:
gcc/ChangeLog | 15 +++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/config/i386/x86-tune-sched-bd.c | 2 +-
gcc/doc/install.texi | 11 -----------
gcc/testsuite/ChangeLog | 17 +++++++++++++++++
gcc/testsuite/gcc.target/bfin/20090914-3.c | 3 ++-
gcc/tree-ssa-structalias.c | 12 ++++++++----
7 files changed, 44 insertions(+), 18 deletions(-)
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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan updated (eaf4a97352 -> 1ed0032b40)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan
in repository toolchain/ci/binutils-gdb.
from eaf4a97352 Automatic date update in version.in
adds e515d93264 Automatic date update in version.in
adds e214f8db56 LoongArch bfd support
adds 6cc76c40a9 LoongArch opcodes support
adds e9a0721f82 LoongArch binutils support
adds 4462d7c440 LoongArch gas support
adds 560b3fe208 LoongArch ld support
adds 3f9661f12a asan: aout: heap buffer overflow
adds e028124942 asan: arm-darwin: buffer overflow
adds 1ed0032b40 asan: c4x, c54x coff_canonicalize_reloc buffer overflow
No new revisions were added by this update.
Summary of changes:
bfd/Makefile.am | 17 +-
bfd/Makefile.in | 21 +-
bfd/aoutx.h | 5 +-
bfd/archures.c | 5 +
bfd/bfd-in.h | 4 +-
bfd/bfd-in2.h | 52 +-
bfd/coff-tic54x.c | 2 +-
bfd/coffcode.h | 22 +-
bfd/coffgen.c | 2 +-
bfd/coffswap.h | 27 +
bfd/config.bfd | 15 +
bfd/configure | 2 +
bfd/configure.ac | 2 +
bfd/cpu-loongarch.c | 61 +
bfd/elf-bfd.h | 9 +
bfd/elf.c | 109 +
bfd/elfnn-loongarch.c | 3265 ++++++++++++++++++++
bfd/elfxx-loongarch.c | 661 ++++
bfd/elfxx-loongarch.h | 31 +
bfd/libbfd.h | 43 +
bfd/mach-o-arm.c | 39 +-
bfd/pdp11.c | 5 +-
bfd/po/BLD-POTFILES.in | 2 +
bfd/po/SRC-POTFILES.in | 3 +
bfd/reloc.c | 89 +
bfd/targets.c | 8 +
bfd/version.h | 2 +-
binutils/NEWS | 2 +
binutils/readelf.c | 24 +
binutils/testsuite/binutils-all/objdump.exp | 1 +
gas/Makefile.am | 17 +-
gas/Makefile.in | 28 +-
gas/NEWS | 2 +
gas/config/loongarch-lex-wrapper.c | 20 +
gas/config/loongarch-lex.h | 34 +
gas/config/loongarch-lex.l | 61 +
gas/config/loongarch-parse.y | 441 +++
gas/config/tc-loongarch.c | 1382 +++++++++
gas/config/tc-loongarch.h | 91 +
gas/configure | 17 +
gas/configure.ac | 13 +
gas/configure.tgt | 6 +-
gas/doc/as.texi | 31 +
gas/doc/c-loongarch.texi | 39 +
gas/po/POTFILES.in | 1 +
gas/testsuite/gas/all/gas.exp | 5 +-
gas/testsuite/gas/elf/elf.exp | 1 +
gas/testsuite/gas/loongarch/4opt_op.d | 70 +
gas/testsuite/gas/loongarch/4opt_op.s | 61 +
gas/testsuite/gas/loongarch/fix_op.d | 134 +
gas/testsuite/gas/loongarch/fix_op.s | 125 +
gas/testsuite/gas/loongarch/float_op.d | 85 +
gas/testsuite/gas/loongarch/float_op.s | 76 +
gas/testsuite/gas/loongarch/imm_op.d | 48 +
gas/testsuite/gas/loongarch/imm_op.s | 39 +
gas/testsuite/gas/loongarch/jmp_op.d | 68 +
gas/testsuite/gas/loongarch/jmp_op.s | 22 +
gas/testsuite/gas/loongarch/load_store_op.d | 178 ++
gas/testsuite/gas/loongarch/load_store_op.s | 169 +
gas/testsuite/gas/loongarch/loongarch.exp | 23 +
gas/testsuite/gas/loongarch/macro_op.d | 733 +++++
gas/testsuite/gas/loongarch/macro_op.s | 29 +
gas/testsuite/gas/loongarch/nop.d | 10 +
.../gas/{riscv/t_insns.s => loongarch/nop.s} | 0
gas/testsuite/gas/loongarch/privilege_op.d | 44 +
gas/testsuite/gas/loongarch/privilege_op.s | 35 +
gas/testsuite/gas/loongarch/syscall.d | 11 +
gas/testsuite/gas/loongarch/syscall.s | 2 +
gas/testsuite/lib/gas-defs.exp | 4 +
include/dis-asm.h | 1 +
include/elf/common.h | 12 +-
include/elf/loongarch.h | 119 +
include/opcode/loongarch.h | 239 ++
ld/Makefile.am | 4 +
ld/Makefile.in | 5 +
ld/NEWS | 2 +
ld/configure.tgt | 4 +
ld/emulparams/elf32loongarch-defs.sh | 36 +
ld/emulparams/elf32loongarch.sh | 11 +
ld/emulparams/elf64loongarch-defs.sh | 39 +
ld/emulparams/elf64loongarch.sh | 11 +
ld/emultempl/loongarchelf.em | 87 +
ld/po/BLD-POTFILES.in | 2 +
ld/testsuite/ld-loongarch-elf/disas-jirl.d | 14 +
ld/testsuite/ld-loongarch-elf/disas-jirl.s | 5 +
ld/testsuite/ld-loongarch-elf/jmp_op.d | 68 +
ld/testsuite/ld-loongarch-elf/jmp_op.s | 22 +
ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp | 34 +
ld/testsuite/ld-loongarch-elf/macro_op.d | 732 +++++
ld/testsuite/ld-loongarch-elf/macro_op.s | 29 +
ld/testsuite/ld-loongarch-elf/syscall-0.s | 9 +
ld/testsuite/ld-loongarch-elf/syscall-1.s | 20 +
ld/testsuite/ld-loongarch-elf/syscall.d | 5 +
ld/testsuite/ld-srec/srec.exp | 6 +
ld/testsuite/ld-unique/pr21529.d | 2 +-
opcodes/Makefile.am | 3 +
opcodes/Makefile.in | 6 +
opcodes/configure | 1 +
opcodes/configure.ac | 1 +
opcodes/disassemble.c | 9 +
opcodes/disassemble.h | 1 +
opcodes/loongarch-coder.c | 473 +++
opcodes/loongarch-dis.c | 342 ++
opcodes/loongarch-opc.c | 798 +++++
opcodes/po/POTFILES.in | 3 +
105 files changed, 11789 insertions(+), 51 deletions(-)
create mode 100644 bfd/cpu-loongarch.c
create mode 100644 bfd/elfnn-loongarch.c
create mode 100644 bfd/elfxx-loongarch.c
create mode 100644 bfd/elfxx-loongarch.h
create mode 100644 gas/config/loongarch-lex-wrapper.c
create mode 100644 gas/config/loongarch-lex.h
create mode 100644 gas/config/loongarch-lex.l
create mode 100644 gas/config/loongarch-parse.y
create mode 100644 gas/config/tc-loongarch.c
create mode 100644 gas/config/tc-loongarch.h
create mode 100644 gas/doc/c-loongarch.texi
create mode 100644 gas/testsuite/gas/loongarch/4opt_op.d
create mode 100644 gas/testsuite/gas/loongarch/4opt_op.s
create mode 100644 gas/testsuite/gas/loongarch/fix_op.d
create mode 100644 gas/testsuite/gas/loongarch/fix_op.s
create mode 100644 gas/testsuite/gas/loongarch/float_op.d
create mode 100644 gas/testsuite/gas/loongarch/float_op.s
create mode 100644 gas/testsuite/gas/loongarch/imm_op.d
create mode 100644 gas/testsuite/gas/loongarch/imm_op.s
create mode 100644 gas/testsuite/gas/loongarch/jmp_op.d
create mode 100644 gas/testsuite/gas/loongarch/jmp_op.s
create mode 100644 gas/testsuite/gas/loongarch/load_store_op.d
create mode 100644 gas/testsuite/gas/loongarch/load_store_op.s
create mode 100644 gas/testsuite/gas/loongarch/loongarch.exp
create mode 100644 gas/testsuite/gas/loongarch/macro_op.d
create mode 100644 gas/testsuite/gas/loongarch/macro_op.s
create mode 100644 gas/testsuite/gas/loongarch/nop.d
copy gas/testsuite/gas/{riscv/t_insns.s => loongarch/nop.s} (100%)
create mode 100644 gas/testsuite/gas/loongarch/privilege_op.d
create mode 100644 gas/testsuite/gas/loongarch/privilege_op.s
create mode 100644 gas/testsuite/gas/loongarch/syscall.d
create mode 100644 gas/testsuite/gas/loongarch/syscall.s
create mode 100644 include/elf/loongarch.h
create mode 100644 include/opcode/loongarch.h
create mode 100644 ld/emulparams/elf32loongarch-defs.sh
create mode 100644 ld/emulparams/elf32loongarch.sh
create mode 100644 ld/emulparams/elf64loongarch-defs.sh
create mode 100644 ld/emulparams/elf64loongarch.sh
create mode 100644 ld/emultempl/loongarchelf.em
create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.d
create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.s
create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.d
create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.s
create mode 100644 ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp
create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.d
create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-0.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-1.s
create mode 100644 ld/testsuite/ld-loongarch-elf/syscall.d
create mode 100644 opcodes/loongarch-coder.c
create mode 100644 opcodes/loongarch-dis.c
create mode 100644 opcodes/loongarch-opc.c
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan updated (ba32c32f -> 70477fc6)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan
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discards ba32c32f 0: update: binutils-gcc: 2
new 70477fc6 0: update: binutils-gcc: 2
This update added new revisions after undoing existing revisions.
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branch are not in the new version. This situation occurs
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1536 -> 1544 bytes
02-prepare_abe/console.log.xz | Bin 2748 -> 2748 bytes
04-build_abe-binutils/console.log.xz | Bin 64232 -> 66736 bytes
05-build_abe-bootstrap_ubsan/console.log.xz | Bin 547204 -> 549356 bytes
06-check_regression/console.log.xz | Bin 416 -> 420 bytes
07-update_baseline/console.log | 42 ++++++++++++++--------------
jenkins/manifest.sh | 14 +++++-----
7 files changed, 28 insertions(+), 28 deletions(-)
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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz_LTO updated (12cbc8cbf071 -> b33c211804d1)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz_LTO
in repository toolchain/ci/llvm-project.
from 12cbc8cbf071 [analyzer] Fix property access kind detection inside parentheses.
adds 9e9b0f462146 [PowerPC] Support ppc-asm-full-reg-names for AIX
adds 90ae538cab4b [SCEV] Prove implication of predicates to their sign-flipp [...]
adds 81e9c90686f7 [llvm] Use llvm::is_contained (NFC)
adds 4fe5ab4b00b2 [RISCV] Optimize immediate materialisation with SH*ADD
adds 7c704c0f53bd [NFC] fix a typo
adds 35d710148b98 Use Module's FileSpec for limiting binaries to set dyld br [...]
adds 844706701ea3 [MLIR] Add `KeywordOrString` handling to AsmParser
adds 2ccdc7315e8b [RISCV] Add invalid match case for uimm2, uimm3 and uimm7
adds 2232a68b2df2 Fix another test not using the standard separator for sani [...]
adds b092dc0bb9e4 [AArch64ISelLowering] Avoid duplane in some cases when sve [...]
adds a92cf5a5a0cd [clang-format] [PR42014,PR52021] don't let clang-format as [...]
adds 191a395343b9 [git-clang-format] Add --diffstat parameter
adds bc9b106a5750 [lldb] Fix an include in HostTest.cpp
adds 8c3adce81dc3 [JSON] Handle uint64_t type
adds 082fa5681904 [ARM] Fix MOVCC peephole to not use an incorrect register class
adds 25cbf7216201 [libc++] Use apple-install-libcxx.sh in the Apple/system CI job
adds a4f42a33be37 [AArch64] Improve fptosi.sat lowering
adds c450e47a8c2d [llvm-dwarfdump] Fix unsigned overflow when calculating stats
adds fa1a68285e40 [AArch64] Improve fptosi.sat vector lowering
adds e23351cdc9bc [Test][InstCombine] Precommit tests for PR52078
adds 7b07c0135140 [InstCombine] Support arbitrary const shift amount for `ls [...]
adds 0d1705a9d623 [lldb] [DynamicRegisterInfo] Support value_regs with offset
adds 2712d1814860 [lldb] [ABI/X86] Add pseudo-registers if missing
adds 3dbcea8b957a Reland [clang] Check unsupported types in expressions
adds 6a89fefd13cd Adds //mlir:GPUTransforms dependency to //llvm:MC as the f [...]
adds f70f9620d9ab [lldb] [ABI/AArch64] Do not add subregs if some of them ar [...]
adds e7418906f505 [lldb] [test] Simplify X86 TestGDBServerTargetXML logic to [...]
adds 6069a6a50494 [pstl] Initial implementation of OpenMP backend, on behalf [...]
adds 0379263f23a6 [AMDGPU] Fix width check for signed mul24 generation.
adds 97809c828f8e [AArch64]Enabling Cortex-A510 Support
adds 6678db00e678 [X86] Enable promotion of i16 popcnt (PR52056)
adds 4a9bcb605b32 [libc] Memory function benchmarks: rename MemcmpConfigurat [...]
adds f2ea85255075 Fix a crash on an invalid templated UDL declaration
adds 1583c41d07a4 [lldb] [test] Add TestGDBServerTargetXML tests for x86 dup [...]
adds 5bf32a0e4841 [Polly] Remove checkIslAstExprInt and use RAII instead of [...]
adds de3038400b16 [AMDGPU] Avoid redundant calls to numBits in AMDGPUCodeGen [...]
adds ecef0359538c [Driver][NetBSD] Use Triple reference instead of ToolChain [...]
adds 096ace55804d [AArch64] Fix failing test target-invalid-cpu-note.c
adds 03a8e70a192f [lldb] Add test for struct merging in scratch ASTContext
adds 8cd9c351a1af [VectorCombine] add tests for shuffle of binops; NFC
adds a64e6ecfe13f [llvm-readelf] Make -W an alias of --wide
adds cef9978027cf [libc++][doc] Use issue labels.
adds 26b675d65eb2 [OpenMP][Tools][NFC] Make an Archer test more robust
adds a59c1a2138a5 [libc++] LWG3266: delete the to_chars(bool) overload.
adds 60802715d1d0 [mlir][vector] NFC - Refactor and extract a helper Structu [...]
adds c294715e2e0c [ARM] Don't use TARGET_HEADER_BUILTIN in arm_mve_builtins. [...]
adds 395e1fe30574 [clang] Capture Framework when HeaderSearch is resolved vi [...]
adds 24703cb6a4e9 [IR] Fix a few incorrect paths in file header comments. NFC
adds 42eea2b69bb9 [AIX] Enable int128 in 64 bit mode
adds b24788abd8df [mlir][sparse] implement sparse tensor init operation
adds f5ed223b0fd0 [DebugInfo] Limit the size of DIExpressions that we will s [...]
adds aa80034ab986 [DebugInfo] retainedTypes should not have subprograms
adds 1312aff768b0 [SLP]Add a test for shrink shuffle after reorder, NFC.
adds ff4c98c05559 [lldb] Harden TestCompletion against new settings in 'targ [...]
adds 59b94c4a60d4 NFC: Remove wayward MIR tests from lib/Target
adds 6a154e606e57 [clang] Use llvm::is_contained (NFC)
adds ccbfcfda1e21 [SystemZ] Handle huge immediates in SystemZInstrInfo::load [...]
adds 47eb99aa44ab [clang] Pass -clear-ast-before-backend in Clang::ConstructJob()
adds e0f3a3b228ce [ubsan] Remove REQUIRED from some TestCases
adds bacddf47a838 [amdgpu] Fix a crash case when preserving MDT in SILowerCo [...]
adds 4e572db0c2ec [lld/mac] Mark private externs with GOT relocs as LOCAL in [...]
adds 03375a3fb33b [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate u [...]
adds cfd155c41bf2 [SelectionDAG] Fix typo in option help
adds 659a08399a78 [WebAssembly] Add import info to `dylink` section of share [...]
adds 69708477be25 [compiler-rt/profile] Hide __llvm_profile_raw_version
adds 4a1d63d7d09f [VectorCombine] Add option to only run scalarization transforms.
adds d0e7bdc20849 [modules] Make a module map referenced by a system map a s [...]
adds 82e858d1bf4b [ConstantRange] Better diagnostic for correctness test fai [...]
adds 0c52c271a538 [BasicAA] Rename ExtendedValue to CastedValue (NFC)
adds 3b48e1170dc6 [HIP] Relax conditions for address space cast in builtin args
adds 727e642e970d [InstCombine] generalize fold for mask-with-signbit-splat
adds 53fc5100e07a Revert "[HIP] Relax conditions for address space cast in b [...]
adds 9eb8040a28b9 [ConstantRange] Support checking optimality for subset of [...]
adds cd538a6b1462 [AMDGPU] Precommit fused-bitlogic.ll test. NFC.
adds a49f5386ce6b [InstCombine] generalize fold for mask-with-signbit-splat, part 2
adds 2a2432e95f23 [NFC] Make Assume2KnowledgeMap's typedef more precise
adds f92db6d3fff1 [HIP] Relax conditions for address space cast in builtin args
adds 587493b441ea [ConstantRange] Compute precise shl range for single elements
adds 4594f8116543 Fix Xcode project for debugserver
adds 1830ec94ac02 Revert "[HIP] [AlwaysInliner] Disable AlwaysInliner to eli [...]
adds 489561d46381 [clang] fix typo correction not looking for candidates in [...]
adds f8ee74fc1304 [ELF] Require two-dash form for --pack-dyn-relocs
adds efc6fe963c11 [MLIR][TOSA] Drop "OnTensors" suffix
adds e9b1c974be27 [mlir][sparse] run less combinations of SpMM in test (to r [...]
adds 965ec6dbe7e0 [mlir] Add folder for shape.add
adds da07942834fe [WebAssembly] Add prototype relaxed laneselect instructions
adds f6cd43c0987a [X86] Add more tests for D111858. NFC
adds da2e1f622db4 [Polly][docs] Fix Sphinx warning.
adds 80dba72a669b [Clang/Test]: Rename enable_noundef_analysis to disable-no [...]
adds 8ca4b3ef19fe [Clang/Test]: Rename enable_noundef_analysis to disable-no [...]
adds 705387c5074b Resolve lit failures in clang after 8ca4b3e's land
adds 9aa6c72b92b6 Fix lit test failures in clang-ppc* and clang-x64-windows-msvc
adds 52d6c5df85fa [MLIR] Generalize Affine dependence analysis using Affine [...]
adds 37ca7a795b27 Fix missing failures in clang-ppc64be* and retry fixing cl [...]
adds 64591f217d98 [TableGen] Replace static_cast with llvm's cast. NFC
adds e7bb8dd92983 [mlir][linalg][bufferize] Relax rules for extract_slice/in [...]
adds f0711106dc6c [clang-tidy] Fix false positive in cppcoreguidelines-virtu [...]
adds 9bf6bef9951a [AArch64] Optimize add/sub with immediate
adds d137f1288e2c [X86][LV] X86 does *not* prefer vectorized addressing
adds 76ca0d67ab07 [ConstantFolding] ConstantFoldScalarCall1 - early-out if g [...]
adds c18cf10a0495 [ConstantFolding] Use getValueAPF const ref value where po [...]
adds c28824179530 [ConstantFolding] ConstantFoldScalarCall2 - early-out if g [...]
adds a1b43d2bc946 [LazyValueInfo] getPredicateAt - remove unnecessary null p [...]
adds d464a9d476a2 [Analysis] Replace assert(isa)/dyn_cast with cast. NFC.
adds 4d7c7d87e46e [docs] Mention DragonFlyBSD as a supported platform for LLVM.
adds 41a6fc8438f3 [Demangle] Extract nonMicrosoftDemangle from llvm::demangle
adds a3813438ae1c [llvm-cxxfilt] Use nonMicrosoftDemangle for demangling NFC
adds 48ce523a26b7 [Symbolize] Demangle Rust symbols
adds 60b96aa65e59 [lldb] Split ParseSingleMember into Obj-C property and nor [...]
adds d5f5121ea65a [LV][X86] Add PR47437 test case
adds 6c96ceabaf84 [Support] Add more Windows error codes to mapWindowsError
adds 939a80867004 Use llvm::is_contained (NFC)
adds bfe5b1b3122c [NFC][X86][Codegen] Add missing interleaving tests after D111546
adds 6ec644e2157d [TTI][X86] Add SSE2 sub-128bit vXi16/32 and v2i64 stride 2 [...]
adds 3956a1f8b6d2 [libc++][doc] Adds more issue status labels.
adds 85b87179f482 [TTI][X86] Add v8i16 -> 2 x v4i16 stride 2 interleaved load costs
adds 2c941fa2f9b9 [OpenMP][deviceRTLs] Fix wrong return value of `__kmpc_is_ [...]
adds 492a4a428f77 [APInt] Fix 1-bit edge case in smul_ov()
adds 49562d3dfed0 Revert "[clang] Pass -clear-ast-before-backend in Clang::C [...]
adds d0d991cd23ef Improve fatal error message when an Attribute or Type wasn [...]
adds ecbee4804d44 [Builders.h] Silence a warning by adding a cast.
adds beb7862db520 [X86] Add DAG combine for negation of CMOV absolute value [...]
adds c0b1b52a28be [NFC][sanitizer] Rename stack depot tests
adds 746dd6a70093 [NFC][sanitizer] Add StackDepotTestOnlyUnmap
adds 8e1d532707fd [Object] Simplify RELR decoding
adds d0dbc991c098 Revert "[AArch64] Optimize add/sub with immediate"
adds 40b9c39db159 [MLIR][LLVM] Add memset intrinsic
adds 6176fda3f992 Fix a few warnings (signed/unsigned comparison in gtest, a [...]
adds 10726992fad7 Use llvm::erase_value (NFC)
adds ff13189c5d0d [RISCV] Unify the arch string parsing logic to to RISCVISAInfo.
adds 8efa6512e066 [RISCV][NFC] Fix build error
adds 1d7aadb4c48a [gn build] Port ff13189c5d0d
adds 27969c4e00bb tsan: refactor trace tests
adds 2e0fb007d63c [llvm][AArch64][SVE] Fold literals into math instructions
adds 2edb89c74684 Lex arguments for __has_cpp_attribute and friends as expan [...]
adds 052b77e49f50 [InstCombine] Add some extra tests for truncated saturates. NFC
adds c8be7743acc7 Bump the value of __STDC_VERSION__ in -std=c2x mode
adds dd8c8d4b7cee This patch supports the following checks for THREADPRIVATE [...]
adds 887acf6842cb [X86][Costmodel] Load/store i16 Stride=6 VF=32 interleaving costs
adds 4b76a74b4283 [X86][Costmodel] Load/store i32 Stride=3 VF=32 interleaving costs
adds 3a6a9f74d3a5 [X86][Costmodel] Load/store i32 Stride=4 VF=32 interleaving costs
adds 3274ce3a287d [X86][Costmodel] Load/store i64 Stride=2 VF=32 interleaving costs
adds 91373bf12ec6 [X86][Costmodel] Load/store i64 Stride=4 VF=16 interleaving costs
adds 274b2439f839 [ConstantRange] Add fast signed multiply
adds 498c7236bc76 [X86][SLM] +1uop for PSHUFBrm xmm
adds 680afaaa5d92 [X86][SLM] Fix uops for PCLMULQDQ
adds 5ed5df480257 [X86][SLM] Fix uops for PCMPISTR/PCMPISTR instructions
adds 0bb32b1b2121 [X86][SLM] Fix BitTest+Set uops + port usage
adds dbf5dc893069 [CostModel][X86] Add div/rem by negative power-of-2 constants
adds f17f694a0fcf [fir] Add IfBuilder and utility functions
adds dc3382dc2c12 [CostModel][X86] Add mul by positive/negative power-of-2 c [...]
adds d245f2e8597b [clang] Use llvm::erase_if (NFC)
adds c900b0a6d5f7 [lldb] Skip target variable test on AS
adds fa16329ae072 [NFC] [LoopPeel] Change the way DT is updated for loop exits
adds 8b7cc93e9dc7 [JITLink] Add comments, rename types for visitExistingEdge [...]
adds 67c64d83378e [PowerPC] Implement scheduling model for Power10
adds f383c5331106 [MachineSink] Compile time improvement for large testcases [...]
adds 3f0b178de21e [AArch64] Fixed a bug on AArch64MIPeepholeOpt
adds 6e63f96e11ee [Parse] Improve diagnostic and recovery when there is an e [...]
adds de4d2f80b75e Fix cyclic header dependency between Support<->Option due [...]
adds a3939e159fc9 [lldb] Return StringRef from PluginInterface::GetPluginName
adds 605efd5dd5bf Fix bazel build.
adds 7cdb1df8c704 [AMDGPU] Divergence driven selection for fused bitlogic
adds e9ff7d250e47 [AArch64][GISel] Add 8/16 bit uaddo lowering tests.
adds 239b4d62b6c0 [lldb] [Utility] Remove Status::WasInterrupted() along wit [...]
adds 942536ac084c [X86] Prefer VEX encoding in X86 assembler.
adds 3d850d03ae4d [SelectionDAG] Fix illegal widening of scalable-vector loads
adds 96351680833e [AIX][cmake] Set atomics related macros when build with xlclang
adds d86992100452 [AMDGPU] Add patterns for i8/i16 local atomic load/store
adds 36deb9a670d0 Add new MachineFunction property FailsVerification
adds 012248b0bc8e Remove the verifyAfter mechanism that was replaced by D111397
adds ea970661dc74 Fix signed/unsigned comparison after b5426ced71280
adds a129932b0d45 [AMDGPU] Add link to bug
adds a2d805c020a1 [clang][modules] Delay creating `IdentifierInfo` for names [...]
adds d914aa4ead2a [lldb] Fix SymbolFilePDBTests for a3939e1
adds ee691fbc3de3 [lldb][NFC] clang format change
adds c773f6501dba [NFC] Remove Block-ABI-Apple.txt
adds baad10c09e44 Revert "[NFC] [LoopPeel] Change the way DT is updated for [...]
adds d8bc7e40ce1c [lldb] [lldb-server] Refactor ConnectToRemote()
adds c4ede6d60892 [DebugInfo][InstrRef] Avoid a crash during DBG_PHI maintenence
adds d55db4b033f0 [AMDGPU] Remove unused VirtRegMap analysis. NFC.
adds c4603a8a4384 [InstCombine][DebugInfo] Remove superflous assertion, add test
adds c0782ba898ff [AArch64][SVE][CodeGen] Add tests for RSHRN{T,B} instructions
adds b9ca73e1a8fd [DebugInfo] Correctly handle arrays with 0-width elements [...]
adds 3b3509b3cba2 [Sema] haveSameParameterTypes - replace repeated isNull() [...]
adds 5918688248fa [OpenMP][Tests][NFC] Flagging OMPT tests as XFAIL for Inte [...]
adds c93fb143b98e [OpenMP][Tests][NFC] Work around ICC bug Older intel compi [...]
adds 59a994e8daee [OpenMP][OMPT] thread_num determination for programs with [...]
adds b37efed957ed [lldb] Fix PDB/compilands.test for a3939e1
adds c850d5c5c8a1 [X86][Costmodel] Add SSE2 sub-128bit vXi8/16 stride 2 inte [...]
adds f04133815360 [X86][Costmodel] Add SSE2 sub-128bit vXi32/f32 stride 2 in [...]
adds cbf778a592fa Remove also Block-ABI-Apple.txt from the Makefile
adds 5644d152578f [analyzer][NFC] Add unittests for CallDescription and spli [...]
adds 3ec7b91141da [analyzer][NFC] Refactor CallEvent::isCalled()
adds 72d04d7b2b53 [analyzer] Allow matching non-CallExprs using CallDescriptions
adds 2a3cc4d46184 [Analysis] add utility function for unary shuffle mask creation
adds 1ef6bd9b1bff [lldb] Delete TestStandardUnwind
adds f5056c8c16bb [AArch64] Improve shuffle vector by using wider types
adds ac4e01ea0eb0 [SVE][CodeGen] Fix predicate for add/sub + element count patterns
adds ee7ca88a3ec5 [InstCombine][DebugInfo] Remove superflous assertion, add [...]
adds 366fb539485a [lldb] Fix missing dependency on libc++ from LLDB test sui [...]
adds d5429a13da2b [mlir][python] Add 'loc' property to ops
adds ac1c0dd3175a [ADT] Add some basic APInt::isPowerOf2() unit test coverage
adds f5755c0849a5 [Mips] Add glue between CopyFromReg, CopyToReg and RDHWR n [...]
adds 616a3cc01ef2 [libc++] Add the std::views::reverse range adaptor
adds f193bcc701de Revert D105169 due to the two-stage failure in ASAN
adds b0c4aaff24fb Allow only valid vector.shape_cast transitive folding
adds 251b1e7c25b5 [libomptarget] Pass OMP_TARGET_OFFLOAD env variable throug [...]
adds 1156bd4fc3a7 [LV] Record memory widening decisions (NFCI)
adds a77cd55dea05 [mlir] Add support for specifying printing flags when addi [...]
adds 7e5dbcdd59a2 [libc++][NFC] Fix typo in test
adds 20211b32612b [mlir] Fix tsan failure in PassCrashRecovery
adds f2c144fc1866 [LLD][TEST] Add testing for negative addends for R_X86_64_ [...]
adds ab41a1c50558 [clang] Disable -clear-ast-before-backend with -print-stats
adds d78136121eb1 [mlir] Add AnyAttrOf tablegen attribute constraint
adds 6d6ad76a6037 [mlir][NFC] Provide accessor for TableGen record for constraints
adds 8612b47a8e64 [NFC] ProfileSummary: const a bunch of members and fields.
adds 31d3c0b33310 [ADT] Fix Wshift-overflow gcc warning in isPowerOf2 unit test
adds 4a5ff56b1492 [mlir][docs] Fix name of get arith->LLVM patterns in docs
adds 1fb24fe85a19 Reland [clang] Pass -clear-ast-before-backend in Clang::Co [...]
adds 62627c721732 [Sanitizers] Replaced getMaxPointerSizeInBits with getPoin [...]
adds 8568ca789ec1 Use llvm::erase_if (NFC)
adds 63f8099e233c [OpenMP] libomp: add check of task function pointer for NULL.
adds 009f3a89d833 BPF: remove intrindics @llvm.stacksave() and @llvm.stackrestore()
adds 239bdf461cae [gn build] Port 009f3a89d833
adds 84d9bc51a33b [RISCV] Rewrite forwardCopyWillClobberTuple to not assume [...]
adds 62bf850910e6 [mlir] Flipping Test dialect to prefixed form _Both
adds e844f05397b7 [LoopUtils] Simplify addRuntimeCheck to return a single value.
adds 51788a5aff87 [JITLink][NFC] Fix Wdangling-else warning in LinkGraphTests
adds d24e721debb0 [AIX] Disable tests failing due to lack of 64-bit XCOFF ob [...]
adds 2e4e2004afc5 Fix a comment in SemaSYCL to make sure I can commit
adds e9e4fc0fd3e0 BPF: fix a bug in IRPeephole pass
adds 74c4d44d47b2 [LV] Update test that was missed in e844f05397b72.
adds 1300677f976e [AArch64][GlobalISel] combine and + [la]sr => ubfx
adds f4a8526cc49f [NFC][BPF] fix comments and rename functions related to BT [...]
adds 2ea5e7ba570a [mlir] SPIR-V: add sin, cos, log, sqrt OCL ops
adds 79175f336c1f [runtimes] Use the new "runtimes" build by default and dep [...]
adds bf32bb7e056c [mlir] Update approximation range for Tanh operation
adds 9a2e9c5db692 Add tests for the other variants of BreakpointCreateBySour [...]
adds d0d9be337e17 [libc++][NFC] Reorganize release notes
adds 5b949a649aff Fix crash when diagnosing a CTAD failure in an array new e [...]
adds be10b1f1cc5f [libcxx] Make allocator<T>:allocate throw bad_array_new_length
adds 1ff367dbb02d Fix Linux error in TestBreakInLoadedDylib.py.
adds 44b22f6f40f1 [MLIR] Expose optional attribute parsing functions
adds 92b8cc52bbc8 [Support][ThinLTO] Move ThinLTO caching to LLVM Support library
adds 25107cc8b1f7 [gn build] Port 92b8cc52bbc8
adds 8e46e34d2435 Revert "[Support][ThinLTO] Move ThinLTO caching to LLVM Su [...]
adds ff6fe9a2f161 [gn build] Port 8e46e34d2435
adds 54d868991ab7 [ExpandMemCmp] Update CFG before DTU
adds 62293e7d33ff Revert "[lldb] [lldb-server] Refactor ConnectToRemote()"
adds a229a4aa6418 [lldb] [lldb-server] Refactor ConnectToRemote()
adds 313c657fcea3 [InlineAdvisor] Add -inline-replay-scope=<Function|Module> [...]
adds b9cfa016daae [SLP]Fix emission of the shrink shuffles.
adds b8ce97372d85 [NewPM] Add PipelineTuningOption to eagerly invalidate analyses
adds 04dc68710ad2 [DebugInfo][ARM] Fix incorrect debug information for RWPI [...]
adds 431a5d841195 [x86] Implement a tagged-globals backend feature.
adds 1053e0b27ce1 [RISCV] Use a lambda to avoid having the Support library d [...]
adds 2f80b73e0cf0 [flang] Fold BTEST
adds cdf9df65f48c [X86] Regenerate testb-je-fusion.ll with common NOFUSION/F [...]
adds 9d1db3d4a197 [mlir][sparse] generalize sparse_tensor.convert on static/ [...]
adds ecd25edfc5d9 [InlineCost] Add empty line between call sites when printi [...]
adds 7cf1fef45f13 Suppress some bitwise-or-of-bool warnings with explicit int cast
adds a83384498bee [X86] combineMulToPMADDWD - replace ASHR(X,16) -> LSHR(X,16)
adds 2786dc1096a5 [InlineAdvisor][NFC] Fix tests added in D110658 on
adds 20d397f85333 workflows: Migrate repo-lockdown to GitHub Actions
adds 3be1f4b8fd53 repo-lockdown: Add pr comment and fix typo
adds 0eed292fbae2 [CMake] Cache the compiler-rt library search results
adds bd0cae6d1650 [mlir][sparse] Renaming variables for consistency/clarity
adds 41f814589f20 [InlineAdvisor][NFC] Fix tests added in D110658 V2
adds c5011aed9c29 Add a "command container" hierarchy to allow users to add [...]
adds b477b9277497 [RISCV] Fix typo in comment. NFC
adds 0567f0333176 [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate u [...]
adds 684b6265b31c [RISCV][TableGen] Remove HasMaskedOffOperand as a member o [...]
adds 87c016078ad7 [libc] add atof, strtof and strtod
adds 4ada6c2aafff [mlir][tosa] Adds a canonicalization to the transpose op i [...]
adds cb5a10199b32 [test] Remove tests pinned to the legacy PM
adds 15fefcb9eb3a [opt] Directly translate -O# to -passes='default<O#>'
adds f24532ae91d5 Follow-on to fix a test from c5011aed9c297d6ddd8ee4f77453b [...]
adds 252386ac81f9 [mlir] Add enclosingOpOk parameter to properlyDominates
adds fd26ca4e7515 [mlir][scf] Add insideMutuallyExclusiveBranches helper
adds bc03a9c066bf Simplify the TableManager class and move it into a public header.
adds 21bb463e9639 [mlir] fix bugs with NamedAttrList
adds facff468b6c4 [RISCV] Reorder the vector register allocation order.
adds e678c5117710 [Support][ThinLTO] Move ThinLTO caching to LLVM Support library
adds c531d3805d2b [JITLink] Use DEBUG_WITH_TYPE, rather than defining DEBUG_TYPE.
adds a94bc9d81bfc Fix small typo in Block ABI docs
adds 34173330bb3f [RISCV] Split RISCV vector builtins into their own file an [...]
adds 39a1fcb9cf59 [RISCV] Remove the HasSideEffects property from riscv_vector.td
adds cc3115cd1d35 [JITLink][x86-64] Lift GOT, PLT table managers into x86_64 [...]
adds b68bf98c0ace [llvm-readobj] Delete redundant 'static' from namespace sc [...]
adds 8189c4eee749 [tools] Delete redundant 'static' from namespace scope 'st [...]
adds 957a5e987444 [lldb] Fix nullptr dereference in AppleObjCRuntimeV2
adds 7272982e1dfe [libomptarget] Refactor DeviceRTL prior to AMDGPU bringup
adds dcc91dd2a798 first draft of a written policy around git repos
adds 408e6de8c09f [Driver][Gnu] Support -shared -static: pass -shared to ld [...]
adds cf65271e462f [llvm-shlib] Fix windows build failed while llvm non-stand [...]
adds 5352ea4a721e [lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*
adds 9da51402f477 [DebugInfo][InstrRef] Fix Wdangling-else warning in InstrR [...]
adds cf033bb2d39c [DebugInfo][NFC] Zero-initialize a class field
adds e41ebbecf97a [mlir][RFC] Refactor layout representation in MemRefType
adds cfaa5c344d5b [lldb] Filter duplicates in Target::GetScratchTypeSystems
adds 134e1817f62c [lldb] change name demangling to be consistent between win [...]
adds 9a57d1e52680 [lldb] Allow dumping the state of all scratch TypeSystems
adds 8bac18be0e45 [lldb] Reduce code duplication around inferior building
adds 849b17949f18 [DebugInfo][InstrRef] Avoid un-necessary densemap copies a [...]
adds ee11612ee10e Revert "[lldb] [ABI/X86] Support combining xmm* and ymm*h [...]
adds 7dfb1395549c [lldb] Adjust udt-layout.test after MS mangling change
adds 8fbac4e88ac3 [clangd] Add code completion of param name on /* inside fu [...]
adds 39f2b059633e [lldb] [Host] Make Terminal methods return llvm::Error
adds c6d7f248bda3 [lldb] [ABI/X86] Refactor ABIX86::AugmentRegisterInfo()
adds d576f4501439 [MLIR][OpenMP] Added parseClauses
adds 45503fc04449 [fir] Add FIRBuilder utility functions
adds 7a801138f8bd [runtimes] Make sure LLVM_LIT_ARGS is set before including [...]
adds f97f946839d1 Canonicalize max/min operations on integers.
adds 1c2c67b46b55 [lldb] [Process/Utility] Fix value_regs/invalidate_regs for ARM
adds e1e2635327d7 [HWASan] Use tagged-globals feature on x86.
adds 7df912c65d19 Revert "[lldb] [Process/Utility] Fix value_regs/invalidate [...]
adds 71e39e3f1867 [ADT] Add APInt::isNegatedPowerOf2() helper
adds 5cd28f71b1d9 [lldb] [Process/Utility] clang-format RegisterInfos_arm.h
adds 28e0c3421653 [lldb] [Process/Utility] Define sN regs on ARM via helper macro
adds ca889733a227 [libc++][docs] Mark LWG3420 complete
adds 607fb1bb8c91 [AArch64] Always add -tune-cpu argument to -cc1 driver
adds 5eaf5b916146 [PowerPC] Restrict various P10 options to P10 only.
adds 10e08784ca27 [MLIR][OpenMP][NFC] Moved Synchronization Hint related functions
adds 23db763b7dad Fix documentation errors introduced by 607fb1bb8c91a2f284d [...]
adds 5ea35791e664 [AArch64] Split out processor/tuning features
adds 3af474c0a15a Changes to print-changed classes in preparation for DotCfg [...]
adds b492b0be95d9 [lldb] [Process/Utility] Define dN regs on ARM via helper macro
adds cf68e1b2fb4f [Driver, Frontend] Use StringRef::contains (NFC)
adds 6fd55bba61bb [libunwind] Add a from-scratch config for running libunwind tests
adds b1ce4549307d [OpenMP] Remove macro guards for device debugging
adds bf6b0d16747f [clang-tidy] Support globbing in NOLINT* expressions
adds 7812cb72a321 Use reference type in for loop
adds ac0561ebb734 [Verifier] Add context for assume operand bundles verifier errors
adds 1529738b6619 [debugserver] Fix BUILDING_FOR_ARM64_OSX
adds a66798cd67fe Remove unneeded variable num_found.
adds b84da5ba6e31 [libc++] [test] Add tests for converting array types in sh [...]
adds 081bad1d4d4e [x86] add tests for psubus; NFC
adds c1ca9e3077cb [AMDGPU] add test for usubsat; NFC
adds e2f16be5991a Fix clang-tidy warnings in MLIR Python bindings (NFC)
adds a039746e1c0b [runtimes] Trigger CI on changes to libunwind
adds 494dad6b72d4 [libc++][NFC] Mark LWG3573 as complete
adds 622c40722e14 [libc++] Make __weekday_from_days private in weekday
adds 9403514e7649 [LoopPredication] Calculate profitability without BPI
adds dc8a5f9419f5 [RISCV] Use llvm::stable_sort instead of std::stable_sort. NFC
adds fca0218875f5 [indvars] Canonicalize exit conditions to unsigned using r [...]
adds 0836a1059dcf Extend transform introduced in D111896 to multiple exits
adds 08619006a0c0 [SCEV] Avoid compile time explosion in ScalarEvolution::is [...]
adds 57553ce43281 Revert "Reland [clang] Pass -clear-ast-before-backend in C [...]
adds 9c44a0996c8c [SCEV] Fix formatting error introduced by D112080
adds 8ac5a6641fa4 [lldb] improve the help strings for gdb-remote and kdp-remote
adds 6fe902daf931 [cuda] Add address space predicate funuctions.
adds 5e004b03f72a [lldb/test] Update test/API/functionalities/load_lazy to macOS 12
adds 91e19f66e51a [driver] Explicitly specify `-fbuild-session-timestamp` in [...]
adds c983aeddcf5a [fir] Add character utility functions in FIRBuilder
adds e2faf721b2b9 [x86] add tests for psubus; NFC
adds 17386cb4dc89 [clang][Driver] Make multiarch output file basenames reproducible
adds 92a0389b0425 [x86] add special-case lowering for usubsat for pre-SSE4
adds 922bf57fc8fe [Driver][Gnu] Delete unneeded -Bstatic dispatch for arm/thumb
adds 9660563950aa [llvm-reduce] Add reduction passes to reduce operands to u [...]
adds 1813fde9cc0b [WebAssembly] Emit clangast in custom section aligned by 4 bytes
adds 9c62bb55f473 Implementation of `ReshapeNoopOptimization` canonicalizer.
adds a897590f11b6 Add MLIR_INSTALL_AGGREGATE_OBJECTS and default it to ON.
adds b6b7fe60a444 [NVPTX] Add a late SROA pass which allows optimizing away [...]
adds cd40b5a71290 BPF: set .BTF and .BTF.ext section alignment to 4
adds 320f65ee65f4 [LLDB][NFC] Remove parameter names from forward declaratio [...]
adds 2542bfa43a97 [WebAssembly] Add prototype relaxed swizzle instructions
adds ea9826ff7719 [ORC-RT] Avoid switching out-of-band error value into __or [...]
adds 21369d4b9d92 [ORC-RT] Use function pointer type (rather than reference) [...]
adds b574c52db533 [ORC-RT] Add MethodWrapperHandler utility for WrapperFunction.
adds 9378ca52ca6e [NFC] Fix typos
adds 063c2f89aa7f [clang] Add option to disable -clear-ast-before-backend
adds e8c245dcd3b9 [llvm-profgen] Skip duplication factor outside of body sam [...]
adds 269f563a2bcd [NARY-REASSOCIATE] Fix infinite recursion optimizing min\max
adds de10a02fc067 [CSKY] Complete to add basic integer instruction set
adds 660c511e5b79 [Flang][flang-omp-report] Switch from std::string to Strin [...]
adds e9fe8ef4b0aa [flang] flang-omp-report replace std::map with llvm::DenseMap
adds 5e969125c609 [clang-format] git-clang-format throws an assertion when r [...]
adds 57e00810edd7 [clang-format] [PR52015] clang-format should put __attribu [...]
adds 6d0c7bc17de8 [WebAssembly] Implementation of table.get/set for reftypes [...]
adds 862e8d7e5520 [AArch64] Improve div and rem costmodel tests. NFC
adds ec428f7b7806 [SPARC] Recognize the prefetch instruction
adds f903c8505515 [AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions.
adds ffbff6c511ba [lldb/DWARF] Ignore debug info pointing to the low addresses
adds f45d7407168d [docs] Fix hyperlink
adds 551d118805c8 [lldb/test] Remove quote/unquote steps from the make invocations
adds 956df6fa620a [lldb] Improve assert message in TestCPPAccelerator
adds 9fc523d11408 [X86] Remove X86ProcFamilyEnum::IntelSLM
adds 6561c074c072 [lldb] [Process/Utility] Define qN regs on ARM via helper macro
adds ab2ca8496d54 consteval if does not form a discarded statement
adds 5b395bd63363 [CostModel][X86] Add costs for multiply-by-pow2 constants
adds a3c05982ac05 [SLP][X86] Improve SLP tests for division/multiplication b [...]
adds 5a8ad80b6fa5 [libunwind] Use the from-scratch testing configuration by default
adds be6c8dc765c3 [SelectionDAG] Fix getVectorSubVecPointer for scalable sub [...]
adds 192331b890e2 [lldb] [Process/Linux] Support arbitrarily-sized FPR write [...]
adds 99277a81f807 [lldb] [Process/Utility] Fix value_regs/invalidate_regs for ARM
adds f290efc32622 [lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*
adds a413663d8fea [NewPM][test] Avoid using -enable-new-pm=1 since -passes i [...]
adds 57bd67abfcb8 [NewPM][test] Use -passes syntax in SpeculativeExecution l [...]
adds 15f1fb5a302d [NewPM][test] Use -passes syntax in BoundsChecking lit tests
adds 5e4dbd7a2fb0 [NewPM][test] Use -passes syntax in VectorCombine lit tests
adds e9320b1a95a6 [NewPM][test] Only use -passes syntax in Scalarizer lit tests
adds cbe3b6b21f6d [libc++] Move LIBCXX-DEBUG-FIXME to params.py
adds 9e7b7303f1d3 [libFuzzer] Update InputInfo.TimeOfUnit when replacing it [...]
adds 6bb7d2474fe4 [mlir][Linalg] Add a first vectorization pattern for conv1 [...]
adds 89950ade216b [DebugInfo][InstrRef] Track a single variable at a time
adds 6a9942339099 [mlir] Expand prefixing to OpFormatGen
adds 3efd2a0bec02 [x86] make helper for useVPTERNLOG; NFC
adds c959da9ef344 [clangd] Only publish preamble after rebuilds
adds 60e19f6752b7 [clangd] Fix use-after-free in HeaderIncluderCache
adds fe1f0de00335 [RISCV][WebAssembly][TargetLowering] Allow expandCTLZ/expa [...]
adds 0abb5d293cf7 [Sema, StaticAnalyzer] Use StringRef::contains (NFC)
adds a3ca7dd0ab99 [NewPM][test] Use -passes syntax in Mem2Reg lit tests
adds 3d152bc49ddc [NewPM][test] Strickly use -passes in some more lit tests
adds aab0f2264aeb [lld-macho] Fix dangling string reference when adding frameworks
adds 16be17ad4b13 [analyzer][NFC] Refactor llvm::isa<> usages in the StaticAnalyzer
adds a29dfc089d18 [RISCV] Use clang_builtin_alias for all RISCV vector intrinsics.
adds eabf11f9ea8d [CodeGenPrepare] Avoid a scalable-vector crash in ctlz/cttz
adds fe66433fe119 [clang] Add plugin ActionType to run command line plugin b [...]
adds c4c7e06bd700 [MLIR][OpenMP] Shifted hint from CriticalOp to CriticalDeclareOp
adds ea9a0556b451 [InstCombine] add tests for casted insertelement; NFC
adds 99d1ce4a621a [OpenMP] Add GOMP allocator functions
adds e1fb13401e1b [WebAssembly] Add prototype relaxed float min max instructions
adds 6b6564fcf9f5 Fix unused variable warning.
adds 310736e098f8 [mlir] fix region property generation in python bindings
adds 7562f3df8906 InvalidPtrChecker - don't dereference a dyn_cast<> - use c [...]
adds 08ed216000b6 [IR] Refactor GlobalIFunc to inherit from GlobalObject, Re [...]
adds 2caf7571e102 [Clang][AST] Resolve FIXME: Remove ObjCObjectPointer from [...]
adds 00500d5bad22 [NFC] De-template LazyCallGraph::visitReferences() and mov [...]
adds 6b82adbb4980 Raise compile error when using unimplemented functions
adds 503d061dc7a8 Precommit InstCombine/and-xor-or.ll test. NFC.
adds fb8829768d77 [clang] Disallow mixing SEH and Objective-C exceptions
adds 5692ed0cce8c [ORC-RT] Configure the ORC runtime for more architectures [...]
adds 80ab06c599a0 [InstCombine] fold fake vector insert to bit-logic
adds 1412719066a6 [lld/mac] Remove else-after-return in ICF code
adds 5d57578a4e48 [MC] Recursively calculate symbol offset
adds 618583565687 [AMDGPU] Allow rematerialization of SOP with virtual registers
adds c80d8a8ceabb [AMDGPU] MachineLICM cannot hoist VALU
adds 207998c242c8 [lldb] Remove variable "any" which is set but not used
adds b046eb19b8a4 [AArch64][GlobalISel] combine (and (or x, c1), c2) => (and [...]
adds a3dd4e777095 Drop transfer_read inner most unit dimensions
adds 4e21caece0dd Update ext-int test to have x86 linux/windows before ABI Impl
adds 02d7089c2390 [fir] Add Character helper
adds 35037ae1971a Make dr177x.cpp test work with Windows-32 bit platfroms wi [...]
adds bd5494d127a3 [mlir][sparse] make index type explicit in public API of s [...]
adds 8977bd58067d [IndVars] Invalidate SCEV when IR is changed in rewriteLoo [...]
adds 3c59cdee5caa Precommit updated InstCombine/and-xor-or.ll test. NFC.
adds 8dc44d8dd872 Remove include of 'type_info' from ext-int test.
adds b92412fb286b [InstCombine] Fold `(a & ~b) & ~c` to `a & ~(b | c)`
adds 048688fd80fa [libc++] Fix incorrect main() signatures in the tests
adds 40163f1df8c6 [x86] add special-case lowering for usubsat for AVX512
adds 676d091c630c Revert "[fir] Add Character helper"
adds 8e4ae603d6ec [Tests] Add tests for non-speculatable ephemeral values
adds ff5050a3a4f2 [libc++abi] Guard include of <unistd.h> behind __has_include
adds 070a2ddcb665 [libunwind] Revert "Use the from-scratch testing configura [...]
adds 3cea2505fd8d [runtimes] Rename CI job from "Runtimes build" to "Bootstr [...]
adds f3671de5500f Revert "[ORC-RT] Configure the ORC runtime for more archit [...]
adds cb9a0dc293cf [ARM] Fix inline assembly referencing floating point regis [...]
adds 6ea7437ca5a4 [SelectionDAG] Bail out of mergeTruncStores when not optimizing
adds 9ef55ddc3fe2 [lld-macho] Temporarily disable lc-linker-option.ll on Windows
adds 4e1a6c07052b [msan] Add stat-family interceptors on Linux
adds b75f3dd88e25 [ARM] Use correct name of floating point ceil intrinsic in test.
adds 34188f237f25 [Driver][OpenBSD] Some improvements to the external assemb [...]
adds dc2be87ecf10 [MLIR][OpenMP] Add support for ordered construct
adds c5931267db26 [modules] While merging ObjCInterfaceDecl definitions, mer [...]
adds edff0070a126 [Codegen] Set ARITH_FENCE as meta-instruction
adds 6b715e9c4d9c [lld-macho][nfc] Added some notes on deliberate difference [...]
adds 6742c8a2d83a [NFC][msan] Break the loop when done
adds 60a8db6dc5a4 [NFC][msan] Rerun update_test_checks.py for a test
adds 66b650f3da70 [NFC][msan] Add NormalArgAfterNoUndef testcase
adds 1302fdc233f4 [ELF] Avoid adding an orphan section to a less suitable segment
adds cb11ddb96c47 Revert "[MLIR][OpenMP] Add support for ordered construct"
adds 1123e03a9d94 [opt-viewer] Use safe yaml load_all
adds d531e5cf5841 [LLDB] [NFC] Typo fix in usage text for "type filter" command
adds 76db6d80805a [NFC][LoopIdiom] Add more test case to runtime-determined [...]
adds e4ce92245c96 [fir] Add Character helper
adds 46fb5d5ddffd [lldb][NFC] clang-format CPlusPlusLanguage.cpp
adds 9c55e718f537 [mlir][linalg][bufferize] Bufferize using PostOrder traversal
adds 65ef43e288ad [mlir][linalg][bufferize][NFC] Check return value of getRe [...]
adds b37e5187f22f [MLIR][OpenMP] Add support for ordered construct
adds 92fb574c9f20 [lldb] [Host] Add setters for common teletype properties t [...]
adds 9448cdc90007 [SVE][Analysis] Tune the cost model according to the tune- [...]
adds 36ec848dc718 [mlir][linalg][bufferize][NFC] Change findValueInReverseUs [...]
adds 1a8ec24efbae [NARY-REASSOCIATE][NFC] Simplify min/max handling
adds 4a7b4beac759 [lldb] Add serial:// protocol for connecting to serial port
adds 4745e4178397 [lldb] [unittest] Disable SetParity() tests on Linux entirely
adds cbe789844703 [lldb] [Host/Terminal] Add missing #ifdef for baudRateToConst()
adds b8c3683d46f9 [lldb] [Host/SerialPort] Add std::moves for better compatibility
adds 9635b2951da1 [docs] Fix broken link rendering in the LLVM Coding Standards.
adds b471e25a5924 [clang] Support __float128 on DragonFlyBSD.
adds 7bbd7e9c1d1d Revert "[fir] Add Character helper"
adds 49be23a1eb57 [libcxx] Support allocators with explicit c-tors in vector<bool>
adds 05a2d1766864 [libcxx] Throw correct exception from std::vector::reserve
adds 9ba5bb43099d [NFC][LoopIdiom] Make for loops more readable
adds 5a3556aa5563 [lldb] Add omitted abstract formal parameters in DWARF sym [...]
adds 376c1389f6f3 [mlir] Use empty() calls where possible.
adds 898e80964c95 [mlir] Fix a crash when creating a 1d zero element LLVM constant
adds 2ace1e5753a4 [lldb] Remove ConstString from GetPluginNameStatic of some [...]
adds 39724158d387 [lldb] Silence -Wpessimizing-move warning
adds aad244dfc566 Revert "AddGlobalAnnotations for function with or without [...]
adds 954d77b98dd6 [clang][deps] Ensure reported context hash is strict
adds 24616664afd4 [clang][deps] NFC: Remove redundant CompilerInstance reference
adds 207e9fdea704 [clang][deps] NFC: Rename scanning CompilerInstance
adds c62220f9623d [clang][deps] NFC: Rename building CompilerInvocation
adds 9bfe7af15976 [ARM] Add new abs test. NFC
adds 302a165e18fd [MIPS] Fix switching between 32/64-bit variants of r6 targ [...]
adds 0d153df69e8f [SVE] Fix selection failure when splitting extended masked loads
adds 6c88086ba804 [lldb] Fix a thinko in 2ace1e57
adds b8b14b682c33 [clang][deps] Make resource directory deduction configurable
adds 7ff4f48adb26 Relax assert in ExprConstant to a return None.
adds c5501a7a5c58 [mlir][linalg][bufferize] Eliminate InitTensorOps of Inser [...]
adds 7a7e93f1225c [mlir][linalg][bufferize] Avoid creating copies that are n [...]
adds 94213bc7decb [mlir][linalg][bufferize] Fix bug in getInplaceableOpResult
adds 5f8228d31062 [mlir][linalg][bufferize] Fix bufferizesToMemoryWrite for [...]
adds 3ea7877c8b62 [SLP]Unify vectorization of PHI and store nodes with impro [...]
adds fa111d30855e [SystemZ][z/OS] Additional test coverage for validating di [...]
adds d2198771e9cc [DAGCombiner] fold bit-hack form of usubsat
adds aa3519f178fc [SystemZ][z/OS] Initial implementation for lowerCall on z/OS
adds 72117f2ffeb6 [runtimes] Properly handle the sysroot/triple/gcc-toolchain
adds 88303693ce97 Do not downcast uint64_t to unsigned in UniqueID hash computation
adds 6b560a8e235b [InstCombine] add tests for DeMorgan with reassociation; NFC
adds 3888de9507c7 [InstCombine] generalize reassociated Demorgan folds
adds a602c2b51dcc [libomptarget][DeviceRTL] Generalise and simplify cmakelists
adds 203accf0bdde [mlir][Linalg] Improve conv vectorization for the stride==1 case.
adds 5c72323141e4 [ORC-RT] Remove stray printf debugging output.
adds 77fdc0e56bf9 [lld-macho] Simplify lc-linker-option.ll and re-enable it [...]
adds 56df1d80e291 [libc++] Use addressof in vector.
adds b396010240cd [Clang] Support typedef with btf_decl_tag attributes
adds f6811cec8421 [DebugInfo] Support typedef with btf_decl_tag attributes
adds dccfaddc6bcc [clang] Use StringRef::contains (NFC)
adds b8da59475076 Reapply [ORC-RT] Configure the ORC runtime for more archit [...]
adds 2dcad7754a20 [clang] Don't clear AST if we have consumers running after [...]
adds cfca2ae1f5ba Update the C++ and C status pages now that Clang 13 has be [...]
adds acfe7d895d2f Update the title and encoding for the C++ status page
adds baea663a6e9b [IPT] Restructure cache to allow lazy update following inv [...]
adds 92673fad66f4 [RISCV] Add a test showing incorrect VSETVLI insertion
adds 19b07ec00062 Reland [clang] Pass -clear-ast-before-backend in Clang::Co [...]
adds 66d22b4da4af [VectorCombine] fold shuffle-of-binops with common operand
adds 13c31539f7da [fir] Add Character helper
adds 92a6dd6e50c8 [test][ORC-RT] Disable x86_64 tests when target arch does [...]
adds 21f9e4a1ed91 Avoid infinity arithmetics when computing exp approximations
adds b7144ab76517 [NFC] Clean up a few methods within GreedyPatternRewriter
adds 5652ecc3739d [mlir:GreedyPatternRewriter] Add debug logging for pattern [...]
adds a4b8979a81af [SLP] Add additional tests which caused crashes with versioning.
adds ba4920e98e2f Revert "[CMake] Cache the compiler-rt library search results"
adds 408075ec6a95 Add the papers that were applied to the latest C2x working draft
adds 3781a46c3c70 Revert "[IPT] Restructure cache to allow lazy update follo [...]
adds d55be79d7548 [RISCV] Expand scalable vector CTTZ/CTLZ/CTPOP.
adds ab3d5d053367 Revert "[compiler-rt/profile] Hide __llvm_profile_raw_version"
adds f7587a9d38f4 Follow-up on https://github.com/llvm/llvm-project/commit/8 [...]
adds 184852584231 [CodeMetrics] Don't require speculatability for ephemeral values
adds 626f0449f345 [Triple] Don't repeat the function name in comments. NFC
adds aee49255074f Recommit: Compress formatting of array type names (int [4] [...]
adds d723ad5bcf71 Enable libc++ in the build for libcxx initializerlist pret [...]
adds fdb66eda77a0 [test] Make sure plugin actually runs in clear-ast-before- [...]
adds 8262f45c73ae [InstCombine] Add additional store forwarding test (NFC)
adds 52f4922ebb7b [OpenMP][NFC] skip atomic tests for non-x86 arch
adds d9eca3320a4d [modules] Fix tracking ObjCInterfaceType decl when there a [...]
adds 0472e83ffcc6 BPF: emit BTF_KIND_DECL_TAG for typedef types
adds d7b338537cf3 Modify "statistics dump" to dump JSON.
adds 439fc09fed32 [gn build] Port d7b338537cf3
adds 969b72fb662b Add test to check we can instcombine after reassociate. NFC.
adds 64f002c6d36d Follow-up fixes for aee49255074fd4ef38d97e6e70cbfbf2f9fd0fa7
adds 3087a8488948 [libcxx] [test] Add an XFAIL for the timespec test for Min [...]
adds 6836629f8891 [libcxx] [test] Add a specific XFAIL for a MinGW env failu [...]
adds 2ba572a82a35 [fir] Remove createConcatenate test temporarily
adds 5dc339d9825f [AArch64][GlobalISel] Fold 64-bit cmps with 64-bit adds
adds 1d8cc45b0e4e [mlir][vector] Add patterns to convert multidimreduce to v [...]
adds 93d0ade17c2d [mlir][linalg] Remove special case for contraction vectorization
adds 910838f07da7 Fix buildbots after https://reviews.llvm.org/D111686
adds 5c0369eceb2c Fix escaping in RewriterGen.cpp.
adds 458ed5fcc362 [TargetLowering][RISCV] Prevent scalarization of fixed vec [...]
adds db0486c46fe1 Remove unused parallel-libs project
adds 95935e8285ad Make genAttributeVerifier escape the summary.
adds 516884f58b46 [MLIR] Fix FloorDivSIOpConverter that was failing for inde [...]
adds 8c1368052420 PR18733: Remove -Wweak-template-vtables
adds f5ee1acc62d5 [libcxx] [test] Convert an XFAIL: LIBCXX-WINDOWS-FIXME int [...]
adds 048d2c76efcd [modules] Update visibility for merged ObjCInterfaceDecl d [...]
adds c0d6e1b9e0b1 [InstCombine] Precommit new and-xor-or.ll tests. NFC.
adds ff37b1105d6e [LegalizeVectorOps][X86] Don't defer BITREVERSE expansion [...]
adds 0bf230d42206 [fir] Remove unused function in CharacterTest
adds 996123e5e8d9 [TargetLowering] Simplify the interface for expandCTPOP/ex [...]
adds c16655f138b1 [docs] Remove Makefile.sphinx files
adds 6c6abb1ded8d [RISCV] Remove Zvamo C intrinsics and builtins.
adds 05c21f54a454 compiler-rt: Fix arch detection for ppc64le
adds 09b95b9dc9af [lldb] Always set the minimum OS version in the Darwin builder
adds d7733f84228b [DebugInfo] Expand ability to load 2-byte addresses in dwa [...]
adds 08f4b56fb979 [lldb] Include unistd.h for sleep in profile_vrs_detach
adds 2e97236aacbb [Demangle] Rename OutputStream to OutputString
adds 4976be1e955d [gn build] Make 'compiler-rt' depend on include dir
adds 3bbc869e2ef2 [mlir][linalg][bufferize] Support scf::IfOp
adds ca0c92d6a1cc [AMDGPU] Allow to use a whole register file on gfx90a for VGPRs
adds b7ea298dfd83 [msan] Don't use TLS slots of noundef args
adds 34c97d5ae354 [libcxxabi] Fix build after D111947
adds a48bfc2c09ac [gn build] Port 2e97236aacbb
adds ddbf1961941b [Coroutines] Ignore partial lifetime markers refer of an alloca
adds 85bf221f204e Fix for OutputStream->OutputBuffer rename
adds 13755436bb3d [PowerPC] return early if there is no preparing candidate [...]
adds 86a5c3261643 [PowerPC] iterate on the SmallSet directly; NFC
adds 3b93dc6880f7 Add basic aarch64-none-elf bare metal driver.
adds 4ff103c02400 [clang][ASTImporter] Fix for importing functions with EST_ [...]
adds a2e7af75166d [fir] Add utility function to FIRBuilder and MutableBox
adds 71cfce832054 [lldb] Fix TestCompressedVectors after array type name change
adds b5e9f83ea48e [lldb] Remove ConstString from ABI, Architecture and Disas [...]
adds 01b4ddbfbbad [Analyzer][NFC] Move RangeConstraintManager's def before C [...]
adds e2a2c8328f57 [Analyzer][NFC] Add RangedConstraintManager to ConstraintAssignor
adds 5f8dca023504 [Analyzer] Extend ConstraintAssignor to handle remainder op
adds e5b87fb7222c Fix baremetal.cpp test to handle windows paths.
adds 74c6895b39e3 [RISCV] Fix missing cross-block VSETVLI insertion
adds cac8808f154c [analyzer][solver] Introduce reasoning for not equal to operator
adds eda2ebd78073 [mlir][Vector] NFC - Extract rewrites related to insert/ex [...]
adds d46531567919 [LLVM-C]Add LLVMAddMetadataToInst, deprecated LLVMSetInstD [...]
adds 66e06cc8cba3 [llvm] [ADT] Update llvm::Split() per Pavel Labath's suggestions
adds 99a64cc9da29 AMDGPULibCalls::parseFunctionName - use reference instead [...]
adds 49e1753c5ef9 Mark baremetal.cpp test as unsupported on Windows.
adds 8b8070e23442 Host::GetOSBuildString
adds 8ae83a1bafdf [NFC][LV] Autogenerate check lines in a test for ease of f [...]
adds 2eaef530232e [TTI] `BasicTTIImplBase::getInterleavedMemoryOpCost()`: fi [...]
adds a750332d7701 AMDGPULibCalls - constify some FuncInfo& arguments. NFCI.
adds 6f6842d782a1 Revert "[NFC][LV] Autogenerate check lines in a test for e [...]
adds e1db72703f65 [NFC] Re-harden test/Transforms/LoopVectorize/X86/pr48340.ll
adds 43f8845dd371 [lldb] Fix build errors from 8b8070e23
adds ff569ed03092 [lldb] [Utility/UriParser] Replace port==-1 with llvm::None
adds 286e98b97ebe [DSE] Add test cases with more complex redundant stores.
adds 3f00e10bddd7 [mlir][OpenMP]Support for modifiers in workshare loops
adds 74cd4dee20e8 [AMDGPU] Preserve deadness of vcc when shrinking instructions
adds d8e50c9dba7a [CodeGen] Add PR50197 AArch64/ARM/X86 test coverage
adds f37463b2eef6 [lldb] Another build fix for 8b8070e23
adds fd5e3f36f218 Replace references to Makefile.sphinx
adds 8fac9e95ade9 [X86] `X86TTIImpl::getInterleavedMemoryOpCost()`: scale in [...]
adds 0bd6a9f2d1ea [clang/llvm] Inclusive language: replace segregate with separate
adds cfe22cd4ef9d [AArch64][SVE] Add new ld<n> intrinsics that return a stru [...]
adds 3085e678519e [Flang][docs] Remove an out-dated section on the new driver
adds c87a4a46b217 [libc++][test][NFC] Add tests for std::vector comparisons
adds 7457fe3dd44a [InstCombine][NFC] Precommit new tests
adds 09dc8ab74c94 [libc++][doc] Fixes FeatureTestMacroTable.html.
adds 7593f68a0551 [libc++][nfc] Remove double spaces.
adds 12b44bf5ee3e [SystemZ] Give the EXRL_Pseudo a size value of 6 bytes.
adds 6fe949c4edf1 [Target, Transforms] Use StringRef::contains (NFC)
adds ba02586fbe18 [OpenMP][OMPT][GOMP] task frame support in KMP_API_NAME_GO [...]
adds ce7b8343beb6 [RISCV] Merge vector tests for rv32 and rv64 into a single [...]
adds 28ef8052d228 [AIX] Enable rtl for plugins test
adds 0766aef3f32d [LegalizeTypes][RISCV][PowerPC] Expand CTLZ/CTTZ/CTPOP ins [...]
adds 5bb7562962de [Attributor] Generalize GEP construction
adds 3a10fe2d893f [Loads] Use more powerful constant folding API
adds 7ea5409e42c8 [libc++] Fix tests after aee49255074f
adds 950f22a5e13c [llvm]Inclusive language: replace master with main
adds 0f12cf7ebaaf [lldb] Pass the target triple when determining the DWARF version
adds 04c184bba7d7 [TargetLowering] Simplify the interface of expandABS. NFC
adds d9eebe3cd783 [DebugInfo][InstrRef] Add unit tests for transfer-function [...]
adds 412eb07edd4e [indvars] Use fact loop must exit to canonicalize to unsig [...]
adds a5f56342b017 [DAG] narrowExtractedVectorLoad - EXTRACT_SUBVECTOR indice [...]
adds d4da71282f6e [InstCombine] Various tests for truncating saturates and r [...]
adds d5074c716664 [flang] Fix bogus folding error for ISHFT(x, negative)
adds 93139a3c3266 [LegalizeTypes] Only expand CTLZ/CTTZ/CTPOP during type pr [...]
adds b03628d986d4 [flang] Emit unformatted headers & footers even with RECL=
adds e7084ceab312 [DebugInfo][Instr] Track subregisters across stack spills/ [...]
adds f2360e1156d0 [flang] Enforce rest of semantic constraint C919
adds e6f39c8b4891 [libunwind] Fix path to libunwind for per-target-runtime-d [...]
adds 6cf69179170e [Dexter] Add DexFinishTest command to conditionally early- [...]
adds 4d692daa3a6a [ConstantFolding] Drop misleading comment (NFC)
adds 27181cad0d4e Support: Add Expected<T>::moveInto() to avoid extra names
adds 55f7cc1a9a2a [InstCombine] Precommit new and-xor-or.ll tests. NFC.
adds 2915889d74b1 [ScheduleDAGInstrs] Call adjustSchedDependency in more cases
adds 3f34f75a68c3 [AMDGPU] Fix latency for implicit vcc_lo operands on GFX10 wave32
adds 42e4959253e0 [lldb/Formatters] Remove space from vector type string sum [...]
adds 58e7ec471c3e [AMDGPU] Run SIShrinkInstructions before post-RA scheduling
adds 489fec277788 [mlir][Linalg] NFC - Drop Optional in favor of FailureOr
adds ae698f89b8a4 AMDGPU: Fix hardcoded registers in tests
adds 7d962f9ca365 AMDGPU: Regenerate MIR test checks
adds c4ba1108dd60 [flang] Extension to distinguish specific procedures
adds 2410fb4616b2 Support: Use Expected<T>::moveInto() in a few places
adds a41837d1dad3 [libc++][NFC] Remove duplicate Python imports
adds cd824f9e39c8 [X86] Fix bad formatting. NFC
adds 8d4b74ac3f1f AMDGPU: Don't consider whether amdgpu-flat-work-group-size [...]
adds ec57b3755111 AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size
adds e4235bdf26a2 Fix locals naming in DNBArchMachARM64::GetGPRState for 32- [...]
adds 89d55d3c86f0 [mlir][Linalg] Retire CodegenStrategy::transform
adds 236197e2d026 [lld-macho] Implement -oso_prefix
adds b8452dba28e7 [flang] Support NAMELIST input of short arrays
adds 14b90d1fe0d7 [flang] Fix generic resolution case
adds a5a493e19205 [flang] Speed common runtime cases of DOT_PRODUCT & MATMUL
adds 61cfdf636dc7 [BasicAA] Model implicit trunc of GEP indices
adds bf6f955f393f [libomptarget] Run GPU offloading tests on both new and ol [...]
adds ce71f8e01742 [flang] Fix crash on empty formatted external READs
adds fbb020fb48be [flang] Extension: allow tabs in output format strings
adds f6aac0dd4d13 [flang] Fix DOT_PRODUCT for logical
adds 89a927c67812 [flang] Fix NAMELIST input bug with multiple subscript triplets
adds b83242e20e09 [flang] Support legacy usage of 'A' edit descriptors for i [...]
adds e18ea6f2946a Support: Skip buffering buffer_unique_ostream's owned stream
adds ec2a25296fec [gn build] Port e18ea6f2946a
adds 4e3eebc6bd32 [tools, utils] Use StringRef::contains (NFC)
adds fc3f92a8f457 [flang] Fix buildbot (new warnings on old code)
adds b432583d28ee [NFC][X86] Add MC tests for all untested VIA PadLock instructions
adds 2d8c18fbbdd1 [X86] Don't add implicit REP prefix to VIA PadLock xstore
adds 7088da480c33 [NFC] Correct arc draft option
adds 5de69e16ea9a [clang-tidy] Tidy up spelling, grammar, and inconsistencie [...]
adds ff56d80eaa5e [lldb] [Host/FreeBSD] Remove unused variable (NFC)
adds ea9e9d61b521 [lldb] [Host/SerialPort] Fix build with GCC 7
adds c5348355ee66 [www] Fix Ninja build instructions on Windows
adds 35553d452b32 [mlir] Add polynomial approximation for vectorized math::Rsqrt
adds 4703a07e6cc1 [mlir][Linalg] NFC - Reorganize options nesting.
adds 4f5e9a2bb28e [SCEV] Remove computeLoadConstantCompareExitLimit() (NFCI)
adds e03b4431132e Revert "[mlir][Linalg] NFC - Reorganize options nesting."
adds c5b5b7f621ee [ConstantFolding] Remove ConstantFoldLoadThroughGEPIndices [...]
adds 878060aaf965 [Orc][examples] Re-enable test for LLJITWithRemoteDebugging
adds d14d7068b6b4 [llvm] Use StringRef::contains (NFC)
adds d8e4170b0a14 Ensure newlines at the end of files (NFC)
adds 710596a1e151 [ConstantFolding] Accept offset in ConstantFoldLoadFromCon [...]
adds f9db6a44eb37 Revert "[analyzer][solver] Introduce reasoning for not equ [...]
adds 0c7f85d7864b [InstSimplify] Simplify fetching of index size (NFC)
adds b09f2ee57c47 [X86] findEltLoadSrc - fix shift amount variable name. NFCI.
adds a709787cd988 Add support of the next Ubuntu (Ubuntu 22.04 - Jammy Jellyfish)
adds 4ba9d9c84f4c Use StringRef::contains (NFC)
adds b33c211804d1 [TableGen] Use llvm::erase_value (NFC)
No new revisions were added by this update.
Summary of changes:
.github/lockdown.yml | 8 -
.github/workflows/repo-lockdown.yml | 18 +
README.md | 3 +-
.../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 82 +-
clang-tools-extra/clang-tidy/GlobList.cpp | 5 +-
clang-tools-extra/clang-tidy/GlobList.h | 5 +-
.../VirtualClassDestructorCheck.cpp | 19 +-
clang-tools-extra/clangd/ClangdLSPServer.cpp | 2 +-
clang-tools-extra/clangd/CodeComplete.cpp | 113 +-
clang-tools-extra/clangd/HeuristicResolver.cpp | 2 +-
clang-tools-extra/clangd/TUScheduler.cpp | 13 +-
.../clangd/test/initialize-params.test | 3 +-
.../clangd/unittests/ClangdLSPServerTests.cpp | 2 +-
.../clangd/unittests/CodeCompleteTests.cpp | 31 +-
.../clangd/unittests/DiagnosticsTests.cpp | 2 +-
clang-tools-extra/clangd/unittests/HoverTests.cpp | 2 +-
.../clangd/unittests/TUSchedulerTests.cpp | 47 +-
clang-tools-extra/docs/ReleaseNotes.rst | 3 +
clang-tools-extra/docs/clang-tidy/Contributing.rst | 10 +-
.../checks/abseil-duration-conversion-cast.rst | 2 +-
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.../Transforms/Instrumentation/MemorySanitizer.cpp | 79 +-
llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 84 +-
llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 46 +-
llvm/lib/Transforms/Scalar/LoopPredication.cpp | 79 +-
llvm/lib/Transforms/Scalar/NaryReassociate.cpp | 114 +-
.../Scalar/StraightLineStrengthReduce.cpp | 2 +-
llvm/lib/Transforms/Utils/Local.cpp | 13 +-
llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 4 +-
llvm/lib/Transforms/Utils/LoopUtils.cpp | 43 +-
llvm/lib/Transforms/Utils/LoopVersioning.cpp | 7 +-
llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 8 +-
llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 8 +-
llvm/lib/Transforms/Utils/SplitModule.cpp | 34 +-
llvm/lib/Transforms/Utils/VNCoercion.cpp | 27 +-
llvm/lib/Transforms/Utils/ValueMapper.cpp | 54 +-
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 53 +-
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 368 +-
llvm/lib/Transforms/Vectorize/VPlan.h | 26 +-
llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 6 +-
llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 81 +-
llvm/lib/XRay/InstrumentationMap.cpp | 6 +-
llvm/projects/CMakeLists.txt | 2 -
.../BasicAA/gep-implicit-trunc-32-bit-pointers.ll | 17 +-
llvm/test/Analysis/CostModel/AArch64/div.ll | 620 +-
llvm/test/Analysis/CostModel/AArch64/rem.ll | 604 +
llvm/test/Analysis/CostModel/AArch64/sve-gather.ll | 111 +-
.../Analysis/CostModel/AArch64/sve-intrinsics.ll | 4 +-
.../test/Analysis/CostModel/AArch64/sve-scatter.ll | 111 +-
llvm/test/Analysis/CostModel/X86/div.ll | 609 +
.../CostModel/X86/gather-i16-with-i8-index.ll | 36 +-
.../CostModel/X86/gather-i32-with-i8-index.ll | 36 +-
.../CostModel/X86/gather-i64-with-i8-index.ll | 36 +-
.../CostModel/X86/gather-i8-with-i8-index.ll | 36 +-
.../CostModel/X86/interleaved-load-f32-stride-2.ll | 8 +-
.../CostModel/X86/interleaved-load-f32-stride-3.ll | 5 +-
.../CostModel/X86/interleaved-load-f32-stride-4.ll | 3 +
.../CostModel/X86/interleaved-load-f64-stride-2.ll | 7 +-
.../CostModel/X86/interleaved-load-f64-stride-4.ll | 3 +
.../CostModel/X86/interleaved-load-i16-stride-2.ll | 8 +-
.../CostModel/X86/interleaved-load-i16-stride-5.ll | 3 +
.../CostModel/X86/interleaved-load-i16-stride-6.ll | 3 +
.../interleaved-load-i32-stride-2-indices-0u.ll | 19 +-
.../CostModel/X86/interleaved-load-i32-stride-2.ll | 8 +-
.../interleaved-load-i32-stride-3-indices-01u.ll | 11 +-
.../interleaved-load-i32-stride-3-indices-0uu.ll | 11 +-
.../CostModel/X86/interleaved-load-i32-stride-3.ll | 3 +
.../interleaved-load-i32-stride-4-indices-012u.ll | 11 +-
.../interleaved-load-i32-stride-4-indices-01uu.ll | 11 +-
.../interleaved-load-i32-stride-4-indices-0uuu.ll | 11 +-
.../CostModel/X86/interleaved-load-i32-stride-4.ll | 3 +
.../CostModel/X86/interleaved-load-i64-stride-2.ll | 7 +-
.../CostModel/X86/interleaved-load-i64-stride-4.ll | 3 +
.../X86/interleaved-store-f32-stride-2.ll | 4 +-
.../X86/interleaved-store-f32-stride-3.ll | 3 +
.../X86/interleaved-store-f32-stride-4.ll | 3 +
.../X86/interleaved-store-f64-stride-2.ll | 3 +
.../X86/interleaved-store-f64-stride-4.ll | 3 +
.../X86/interleaved-store-i16-stride-2.ll | 8 +-
.../X86/interleaved-store-i16-stride-5.ll | 3 +
.../X86/interleaved-store-i16-stride-6.ll | 3 +
.../X86/interleaved-store-i32-stride-2.ll | 4 +-
.../X86/interleaved-store-i32-stride-3.ll | 3 +
.../X86/interleaved-store-i32-stride-4.ll | 3 +
.../X86/interleaved-store-i64-stride-2.ll | 3 +
.../X86/interleaved-store-i64-stride-4.ll | 3 +
.../CostModel/X86/interleaved-store-i8-stride-2.ll | 12 +-
llvm/test/Analysis/CostModel/X86/mul.ll | 716 +
llvm/test/Analysis/CostModel/X86/rem.ll | 628 +
...-evolution-prove-implications-via-truncation.ll | 218 +
.../Analysis/StackSafetyAnalysis/i386-bug-fix.ll | 24 +
llvm/test/Bitcode/attr-btf_tag-typedef.ll | 54 +
.../GlobalISel/combine-and-or-disjoint-mask.mir | 83 +
.../form-bitfield-extract-from-shr-and.mir | 190 +
.../AArch64/GlobalISel/merge-stores-truncating.ll | 9 +-
.../test/CodeGen/AArch64/GlobalISel/select-cmp.mir | 291 +-
.../CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir | 872 ++
llvm/test/CodeGen/AArch64/concat-vector.ll | 3 +-
llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll | 408 +-
llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll | 2113 ++-
llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll | 281 +-
llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll | 1619 +--
llvm/test/CodeGen/AArch64/icmp-shift-opt.ll | 142 +
.../AArch64/machine-outliner-retaddr-sign-cfi.ll | 3 +-
.../machine-outliner-retaddr-sign-regsave.mir | 1 +
.../machine-outliner-retaddr-sign-sp-mod.mir | 9 +
.../AArch64/machine-outliner-retaddr-sign-thunk.ll | 5 +
.../CodeGen/AArch64/misched-fusion-addr-tune.ll | 40 +
llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll | 179 +
llvm/test/CodeGen/AArch64/sign-return-address.ll | 84 +-
.../CodeGen/AArch64/sve-fixed-length-concat.ll | 3 +-
.../AArch64/sve-fixed-length-limit-duplane.ll | 28 +
.../CodeGen/AArch64/sve-fp-immediates-merging.ll | 1071 ++
llvm/test/CodeGen/AArch64/sve-insert-vector.ll | 20 +
.../CodeGen/AArch64/sve-intrinsics-fp-arith-imm.ll | 1309 ++
.../sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll | 568 +
.../sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll | 284 +
llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll | 20 +
llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll | 20 +
.../sve2-intrinsics-binary-narrowing-shr.ll | 73 +
.../CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll | 154 +
.../AMDGPU/GlobalISel/atomic_store_local.ll | 103 +
llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll | 27 +-
.../CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll | 7 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll | 336 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll | 253 +-
.../AMDGPU/GlobalISel/insertelement-stack-lower.ll | 90 +-
.../AMDGPU/GlobalISel/insertelement.large.ll | 2 +-
.../AMDGPU/GlobalISel/irtranslator-atomicrmw.ll | 70 +-
.../GlobalISel/irtranslator-constrained-fp.ll | 274 +-
.../AMDGPU/GlobalISel/irtranslator-inline-asm.ll | 315 +-
.../AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll | 14 +-
.../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll | 6 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll | 34 +-
.../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 650 +-
.../CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll | 33 +
llvm/test/CodeGen/AMDGPU/atomic_load_local.ll | 50 +
llvm/test/CodeGen/AMDGPU/atomic_store_local.ll | 50 +
.../attr-amdgpu-flat-work-group-size-vgpr-limit.ll | 5 +
.../CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll | 4 +-
llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll | 44 +-
...-flat-work-group-size-overrides-waves-per-eu.ll | 63 +
llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll | 4 +-
.../test/CodeGen/AMDGPU/extra-sroa-after-unroll.ll | 6 +-
llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll | 102 +-
llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll | 6 +-
llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll | 346 +
llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll | 230 +-
llvm/test/CodeGen/AMDGPU/indirect-call.ll | 4 +-
llvm/test/CodeGen/AMDGPU/infinite-loop.ll | 3 +-
llvm/test/CodeGen/AMDGPU/inline-calls.ll | 15 +-
llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 8 +-
llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll | 156 +
llvm/test/CodeGen/AMDGPU/memcpy-scoped-aa.ll | 14 +-
llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 53 +-
llvm/test/CodeGen/AMDGPU/occupancy-levels.ll | 2 +-
.../propagate-attributes-flat-work-group-size.ll | 49 -
.../AMDGPU/propagate-flat-work-group-size.ll | 214 +
.../CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll | 2 +-
llvm/test/CodeGen/AMDGPU/remat-sop.mir | 60 +
llvm/test/CodeGen/AMDGPU/schedule-ilp.ll | 2 +-
.../CodeGen/AMDGPU/schedule-regpressure-limit3.ll | 2 +-
llvm/test/CodeGen/AMDGPU/sdiv64.ll | 152 +-
llvm/test/CodeGen/AMDGPU/shrink-carry.mir | 8 +-
llvm/test/CodeGen/AMDGPU/srem64.ll | 74 +-
llvm/test/CodeGen/AMDGPU/target-cpu.ll | 4 +-
llvm/test/CodeGen/AMDGPU/udiv64.ll | 74 +-
.../AMDGPU/unstructured-cfg-def-use-issue.ll | 24 +-
llvm/test/CodeGen/AMDGPU/urem64.ll | 112 +-
llvm/test/CodeGen/AMDGPU/usubsat.ll | 36 +
llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll | 700 +
.../vgpr-descriptor-waterfall-loop-idom-update.ll | 6 +-
llvm/test/CodeGen/AMDGPU/wave32.ll | 6 +-
llvm/test/CodeGen/ARM/icmp-shift-opt.ll | 151 +
llvm/test/CodeGen/ARM/movc-peephole.mir | 41 +
llvm/test/CodeGen/ARM/vfloatintrinsics.ll | 30 +-
llvm/test/CodeGen/BPF/BTF/align.ll | 35 +
llvm/test/CodeGen/BPF/BTF/tag-typedef.ll | 87 +
llvm/test/CodeGen/BPF/vla.ll | 115 +
llvm/test/CodeGen/Mips/tls-static.ll | 4 +-
llvm/test/CodeGen/NVPTX/b52037.ll | 250 +
llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll | 4 +-
llvm/test/CodeGen/NVPTX/nvvm-reflect.ll | 4 +-
llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll | 8 +-
.../PowerPC/builtins-ppc-xlcompat-cmpb-32.ll | 4 +-
.../PowerPC/builtins-ppc-xlcompat-sync-32.ll | 10 +-
.../PowerPC/builtins-ppc-xlcompat-sync-64.ll | 14 +-
llvm/test/CodeGen/PowerPC/constant-pool.ll | 4 +-
llvm/test/CodeGen/PowerPC/ctrloop-i128.ll | 5 +-
llvm/test/CodeGen/PowerPC/int128_ldst.ll | 9 +-
llvm/test/CodeGen/PowerPC/mma-acc-spill.ll | 10 +-
llvm/test/CodeGen/PowerPC/mma-intrinsics.ll | 68 +-
llvm/test/CodeGen/PowerPC/mma-outer-product.ll | 40 +-
llvm/test/CodeGen/PowerPC/mma-phi-accs.ll | 16 +-
llvm/test/CodeGen/PowerPC/more-dq-form-prepare.ll | 527 +-
.../PowerPC/opt-builtins-ppc-xlcompat-cas.ll | 2 +-
llvm/test/CodeGen/PowerPC/p10-fi-elim.ll | 74 +-
llvm/test/CodeGen/PowerPC/p10-spill-creq.ll | 30 +-
llvm/test/CodeGen/PowerPC/p10-spill-crgt.ll | 11 +-
llvm/test/CodeGen/PowerPC/p10-spill-crlt.ll | 7 +-
llvm/test/CodeGen/PowerPC/p10-spill-crun.ll | 22 +-
.../CodeGen/PowerPC/pcrel-call-linkage-leaf.ll | 2 +-
.../PowerPC/pcrel-call-linkage-with-calls.ll | 4 +-
llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll | 4 +-
llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll | 35 +-
llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 134 +-
llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc.ll | 50 +-
llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll | 35 +-
llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll | 256 +-
llvm/test/CodeGen/PowerPC/reg-names.ll | 1 +
llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll | 12 +-
llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll | 12 +-
llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll | 16 +-
llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll | 16 +-
llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll | 16 +-
llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll | 16 +-
llvm/test/CodeGen/PowerPC/spill-vec-pair.ll | 48 +-
llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll | 12 +-
llvm/test/CodeGen/PowerPC/testComparesi32ltu.ll | 12 +-
.../CodeGen/RISCV/GlobalISel/calllowering-ret.ll | 13 +-
llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 427 +-
llvm/test/CodeGen/RISCV/byval.ll | 2 +-
llvm/test/CodeGen/RISCV/calls.ll | 6 +-
llvm/test/CodeGen/RISCV/copy-frameindex.mir | 22 +-
llvm/test/CodeGen/RISCV/double-calling-conv.ll | 6 +-
llvm/test/CodeGen/RISCV/double-previous-failure.ll | 2 +-
llvm/test/CodeGen/RISCV/fastcc-int.ll | 4 +-
llvm/test/CodeGen/RISCV/imm.ll | 42 +-
llvm/test/CodeGen/RISCV/rv64zbb.ll | 455 +-
llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll | 48 +-
.../RISCV/rvv/access-fixed-objects-by-rvv.ll | 6 +-
.../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 4 +-
llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll | 4 +-
.../CodeGen/RISCV/rvv/common-shuffle-patterns.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/constant-folding.ll | 18 +-
llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 3017 +++++
llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 1142 ++
llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 2555 ++++
llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 500 +-
llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll | 72 +-
llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 180 +-
llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 144 +-
.../RISCV/rvv/fixed-vector-strided-load-store.ll | 132 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 192 +-
.../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 56 +-
.../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 1768 +--
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 2673 +---
.../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 70 +-
.../RISCV/rvv/fixed-vectors-calling-conv.ll | 498 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 12977 ++-----------------
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 968 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 9067 ++-----------
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll | 32 +-
.../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 1338 +-
.../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 120 +-
.../RISCV/rvv/fixed-vectors-extract-subvector.ll | 290 +-
.../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 294 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 36 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 56 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 152 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 792 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 80 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 84 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 66 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 1152 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 508 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 432 +-
.../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 142 +-
.../RISCV/rvv/fixed-vectors-insert-subvector.ll | 240 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 136 +-
.../RISCV/rvv/fixed-vectors-int-buildvec.ll | 316 +-
.../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 158 +-
.../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 326 +-
.../RISCV/rvv/fixed-vectors-int-shuffles.ll | 252 +-
.../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 450 +-
.../RISCV/rvv/fixed-vectors-int-vrgather.ll | 80 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 5024 +++----
.../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 100 +-
.../RISCV/rvv/fixed-vectors-mask-load-store.ll | 48 +-
.../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 78 +-
.../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 200 +-
.../RISCV/rvv/fixed-vectors-masked-gather.ll | 554 +-
.../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 224 +-
.../RISCV/rvv/fixed-vectors-masked-load-int.ll | 262 +-
.../RISCV/rvv/fixed-vectors-masked-scatter.ll | 572 +-
.../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 200 +-
.../RISCV/rvv/fixed-vectors-masked-store-int.ll | 240 +-
.../RISCV/rvv/fixed-vectors-reduction-fp-vp.ll | 72 +-
.../RISCV/rvv/fixed-vectors-reduction-fp.ll | 566 +-
.../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 592 +-
.../RISCV/rvv/fixed-vectors-reduction-int.ll | 2400 ++--
.../RISCV/rvv/fixed-vectors-reduction-mask-vp.ll | 60 +-
.../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 96 +-
.../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 244 +-
.../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 278 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 44 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 34 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 34 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 30 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll | 44 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll | 44 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll | 44 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll | 44 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll | 44 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll | 44 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 24 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 24 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll | 672 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll | 480 +-
.../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 78 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 34 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 30 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 12 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 12 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 116 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 4 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 8 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 6 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 12 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 12 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 24 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll | 150 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll | 150 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 250 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 200 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 144 +-
llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 208 +-
llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 144 +-
llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 128 +-
.../test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll | 16 +
.../RISCV/rvv/legalize-scalable-vectortype.ll | 8 +-
.../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 16 +
llvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll | 40 +-
llvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll | 32 +-
llvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll | 48 +-
llvm/test/CodeGen/RISCV/rvv/load-mask.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/localvar.ll | 28 +-
.../CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll | 216 +-
.../CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll | 216 +-
llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 6 +-
llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 240 +-
llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 236 +-
.../RISCV/rvv/named-vector-shuffle-reverse.ll | 488 +-
.../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 18 +-
llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 20 +-
.../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 18 +-
llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 20 +-
llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 8 +-
llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 120 +-
llvm/test/CodeGen/RISCV/rvv/select-int.ll | 320 +-
llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 8 +-
llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 460 +-
llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 460 +-
llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 176 +-
llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 176 +-
llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 224 +-
llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll | 837 --
llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll | 809 --
llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 862 ++
llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 46 +-
llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll | 1329 --
llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv64.ll | 1301 --
llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 1354 ++
llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 4 +-
llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 4 +-
llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll | 958 --
llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll | 894 --
llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 1181 ++
llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll | 1001 --
llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv64.ll | 925 --
llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 1169 ++
llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 32 +-
llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll | 619 -
llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll | 619 -
llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll | 620 +
llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 256 +-
llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 60 +-
.../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 60 +-
.../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 88 +-
llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 508 +-
llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 104 +-
llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 48 +-
llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 48 +-
llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 56 +-
llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 56 +-
llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 48 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 48 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 48 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 48 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 28 +-
.../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 28 +-
.../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 56 +-
llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 56 +-
llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 56 +-
llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 56 +-
llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 424 +-
llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 4 +-
llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 4 +-
llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 340 +-
llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 340 +-
llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 340 +-
llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 340 +-
llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 272 +-
llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 264 +-
llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv32.ll | 867 --
llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv64.ll | 839 --
llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 892 ++
llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll | 867 --
llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv64.ll | 839 --
llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 892 ++
llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 192 +-
llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv32.ll | 867 --
llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv64.ll | 839 --
llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 892 ++
llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv32.ll | 867 --
llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv64.ll | 839 --
llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 892 ++
llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 12 +-
.../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 184 +-
.../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 176 +-
llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 70 +-
llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 70 +-
llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 414 +-
llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 396 +-
llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 554 +-
llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 540 +-
llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 554 +-
llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 540 +-
llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 414 +-
llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 396 +-
llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 414 +-
llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 396 +-
llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 70 +-
llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 70 +-
llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 414 +-
llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 396 +-
llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 414 +-
llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 396 +-
llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 414 +-
llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 396 +-
llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 414 +-
llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 396 +-
llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 414 +-
llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 396 +-
llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 70 +-
llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 70 +-
llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv32.ll | 896 --
llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv64.ll | 868 --
llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 921 ++
llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode-rv32.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 108 +-
llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 108 +-
llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 108 +-
llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 108 +-
llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 108 +-
llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 108 +-
llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 108 +-
llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 108 +-
llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 1120 --
llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 1093 --
llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 1146 ++
llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll | 452 +-
llvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vpopc-rv64.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll | 228 +-
.../CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll | 324 +-
llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 108 +-
.../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 672 +-
.../test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll | 576 +-
llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 888 +-
llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll | 84 +-
llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll | 28 +-
llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll | 978 --
llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv64.ll | 938 --
llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 1231 ++
llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 36 +-
llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv32.ll | 1037 --
llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv64.ll | 985 --
llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 1235 ++
llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 32 +-
llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll | 324 +-
llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll | 360 +-
llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll | 112 +-
llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll | 112 +-
llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll | 559 -
llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv64.ll | 531 -
llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 584 +
llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll | 8 +-
llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll | 8 +-
llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vselect-mask.ll | 42 +-
.../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 98 +-
.../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir | 90 +
llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll | 4 +-
llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll | 76 +-
llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll | 88 +-
llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll | 630 -
llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll | 630 -
llvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll | 631 +
llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll | 6 +-
llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll | 30 +-
llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll | 88 +-
llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll | 72 +-
llvm/test/CodeGen/RISCV/rvv/vsm-rv32.ll | 8 +-
llvm/test/CodeGen/RISCV/rvv/vsm-rv64.ll | 8 +-
llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll | 544 +-
llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll | 704 +-
llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll | 803 --
llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv64.ll | 803 --
llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll | 804 ++
llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll | 10 +-
llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll | 583 -
llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll | 583 -
llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll | 584 +
llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll | 8 +-
llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv32.ll | 816 --
llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv64.ll | 788 --
llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll | 841 ++
llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll | 544 +-
llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll | 704 +-
llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll | 315 -
llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll | 315 -
llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll | 316 +
llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll | 96 +-
llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll | 60 +-
llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv32.ll | 1329 --
llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv64.ll | 1301 --
llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll | 1354 ++
llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll | 88 +-
llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll | 88 +-
llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll | 16 +-
.../CodeGen/RISCV/select-optimize-multiple.mir | 348 +-
.../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 60 +-
.../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 96 +-
llvm/test/CodeGen/SystemZ/call-zos-01.ll | 191 +
llvm/test/CodeGen/SystemZ/call-zos-vararg.ll | 195 +
llvm/test/CodeGen/SystemZ/call-zos-vec.ll | 66 +
llvm/test/CodeGen/SystemZ/int-const-02.ll | 26 +
llvm/test/CodeGen/Thumb2/abs.ll | 207 +
.../test/CodeGen/WebAssembly/externref-tableget.ll | 76 +
.../test/CodeGen/WebAssembly/externref-tableset.ll | 82 +
.../test/CodeGen/WebAssembly/funcref-table_call.ll | 32 +
llvm/test/CodeGen/WebAssembly/funcref-tableget.ll | 76 +
llvm/test/CodeGen/WebAssembly/funcref-tableset.ll | 82 +
llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 106 +
llvm/test/CodeGen/WebAssembly/simd-unsupported.ll | 9 +-
llvm/test/CodeGen/X86/bitreverse.ll | 9 +-
llvm/test/CodeGen/X86/combine-bitreverse.ll | 9 +-
llvm/test/CodeGen/X86/icmp-shift-opt.ll | 334 +
llvm/test/CodeGen/X86/neg-abs.ll | 174 +-
llvm/test/CodeGen/X86/parity-vec.ll | 10 +-
llvm/test/CodeGen/X86/parity.ll | 18 +-
llvm/test/CodeGen/X86/pmulh.ll | 83 +-
llvm/test/CodeGen/X86/popcnt.ll | 15 +-
llvm/test/CodeGen/X86/psubus.ll | 165 +
llvm/test/CodeGen/X86/tagged-globals-pic.ll | 45 +
llvm/test/CodeGen/X86/tagged-globals-static.ll | 45 +
llvm/test/CodeGen/X86/testb-je-fusion.ll | 194 +-
llvm/test/CodeGen/X86/vector-bitreverse.ll | 704 +-
.../X86/vector-interleaved-load-i16-stride-5.ll | 1557 +++
.../X86/vector-interleaved-load-i16-stride-6.ll | 1833 +++
.../X86/vector-interleaved-load-i32-stride-3.ll | 777 ++
.../X86/vector-interleaved-load-i32-stride-4.ll | 905 ++
.../X86/vector-interleaved-load-i64-stride-2.ll | 343 +
.../X86/vector-interleaved-load-i64-stride-4.ll | 519 +
.../X86/vector-interleaved-store-i16-stride-5.ll | 1289 ++
.../X86/vector-interleaved-store-i16-stride-6.ll | 1162 ++
.../X86/vector-interleaved-store-i32-stride-3.ll | 655 +
.../X86/vector-interleaved-store-i32-stride-4.ll | 675 +
.../X86/vector-interleaved-store-i64-stride-2.ll | 372 +
.../X86/vector-interleaved-store-i64-stride-4.ll | 470 +
.../DebugInfo/ARM/machine-cp-updates-dbg-reg.mir | 4 +
llvm/test/DebugInfo/ARM/rwpi.ll | 34 +
.../MIR/AArch64/dbgcall-site-indirect-param.mir | 13 +-
.../MIR/AArch64/dbgcall-site-orr-moves.mir | 9 +-
.../InstrRef/livedebugvalues_stackslot_subregs.mir | 56 +
.../livedebugvalues_subreg_substitutions.mir | 11 +-
.../DebugInfo/MIR/X86/callsite-stack-value.mir | 9 +-
.../DebugInfo/MIR/X86/debug-call-site-param.mir | 19 +-
llvm/test/DebugInfo/MSP430/cu-ranges.ll | 72 +
llvm/test/DebugInfo/MSP430/dwarf-basics-v5.ll | 154 +
llvm/test/DebugInfo/MSP430/ranges_always.ll | 241 +
llvm/test/DebugInfo/X86/attr-btf_tag-typedef.ll | 69 +
llvm/test/DebugInfo/X86/convert-loclist.ll | 5 +-
llvm/test/DebugInfo/salvage-gep.ll | 19 +-
llvm/test/DebugInfo/salvage-limit-expr-size.ll | 47 +
llvm/test/DebugInfo/symbolize-demangling.s | 14 +-
llvm/test/Demangle/ms-options.test | 57 +-
.../OrcV2Examples/lljit-with-remote-debugging.test | 12 +
.../Instrumentation/BoundsChecking/many-trap.ll | 4 +-
.../Instrumentation/BoundsChecking/many-traps-2.ll | 2 +-
llvm/test/Instrumentation/BoundsChecking/opt.ll | 2 +-
llvm/test/Instrumentation/BoundsChecking/phi.ll | 2 +-
.../Instrumentation/BoundsChecking/simple-32.ll | 2 +-
llvm/test/Instrumentation/BoundsChecking/simple.ll | 1 -
.../Instrumentation/MemorySanitizer/msan_eager.ll | 59 +-
.../MemorySanitizer/msan_llvm_launder_invariant.ll | 4 +-
.../MemorySanitizer/msan_llvm_strip_invariant.ll | 4 +-
llvm/test/MC/CSKY/basic.s | 270 +-
llvm/test/MC/MachO/chained-alias-offset.s | 12 +
llvm/test/MC/RISCV/attribute-arch.s | 7 +-
llvm/test/MC/RISCV/attribute-with-insts.s | 2 +-
llvm/test/MC/RISCV/insn-invalid.s | 5 +
llvm/test/MC/RISCV/invalid-attribute.s | 4 +-
llvm/test/MC/RISCV/rv32i-invalid.s | 2 +-
llvm/test/MC/RISCV/rv32zbbp-valid.s | 8 +-
llvm/test/MC/RISCV/rv64zba-aliases-valid.s | 40 +
llvm/test/MC/Sparc/sparcv9-instructions.s | 10 +
llvm/test/MC/SystemZ/insn-bad-zos-z13.s | 60 +
llvm/test/MC/SystemZ/insn-bad-zos-z14.s | 23 +
llvm/test/MC/SystemZ/insn-bad-zos-z15.s | 41 +
llvm/test/MC/SystemZ/insn-bad-zos-z196.s | 59 +
llvm/test/MC/SystemZ/insn-bad-zos.s | 158 +
llvm/test/MC/SystemZ/insn-good-zos-pcrel.s | 102 +
.../MC/WebAssembly/custom-section-alignment.ll | 10 +
llvm/test/MC/WebAssembly/simd-encodings.s | 27 +
llvm/test/MC/X86/padlock.s | 29 +-
llvm/test/Other/new-pm-eager-invalidate.ll | 8 +
llvm/test/Other/opt-On.ll | 19 +
.../Attributor/ArgumentPromotion/array.ll | 52 +-
.../Attributor/ArgumentPromotion/attrs.ll | 6 +-
.../Attributor/ArgumentPromotion/byval-2.ll | 6 +-
.../Attributor/ArgumentPromotion/byval.ll | 12 +-
.../Attributor/ArgumentPromotion/fp80.ll | 6 +-
.../Attributor/ArgumentPromotion/tail.ll | 8 +-
.../IPConstantProp/2009-09-24-byval-ptr.ll | 34 +-
.../Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll | 28 +
.../CodeGenPrepare}/RISCV/lit.local.cfg | 0
llvm/test/Transforms/Coroutines/coro-alloca-09.ll | 57 +
.../DeadStoreElimination/memset-unknown-sizes.ll | 42 +-
.../DeadStoreElimination/multiblock-throwing.ll | 37 +-
.../stores-of-existing-values.ll | 194 +-
llvm/test/Transforms/Float2Int/basic.ll | 1 -
.../test/Transforms/Float2Int/float2int-optnone.ll | 2 +-
llvm/test/Transforms/Float2Int/toolarge.ll | 2 +-
.../Transforms/FunctionAttrs/nofree-attributor.ll | 2 +-
.../GlobalOpt/long-compilation-global-sra.ll | 2 +-
llvm/test/Transforms/IndVarSimplify/elim-extend.ll | 22 +-
.../IndVarSimplify/finite-exit-comparisons.ll | 81 +-
.../invalidate-modified-lcssa-phi.ll | 41 +
llvm/test/Transforms/IndVarSimplify/outer_phi.ll | 32 +-
llvm/test/Transforms/Inline/cgscc-inline-replay.ll | 38 +-
llvm/test/Transforms/Inline/devirtualize-3.ll | 1 -
llvm/test/Transforms/Inline/ephemeral.ll | 19 +-
.../Inline/inline-cost-annotation-pass.ll | 3 +
llvm/test/Transforms/InstCombine/and-xor-or.ll | 545 +
llvm/test/Transforms/InstCombine/and.ll | 14 +-
.../InstCombine/bitcast-inselt-bitcast.ll | 179 +
.../InstCombine/debuginfo-scalable-typesize.ll | 9 +
.../Transforms/InstCombine/icmp-topbitssame.ll | 239 +
llvm/test/Transforms/InstCombine/icmp.ll | 4 +-
.../InstCombine/insert-extract-shuffle.ll | 56 +
.../Transforms/InstCombine/load-store-forward.ll | 29 +-
llvm/test/Transforms/InstCombine/lshr.ll | 46 +
.../Transforms/InstCombine/mul-inseltpoison.ll | 28 +-
llvm/test/Transforms/InstCombine/mul.ll | 32 +-
.../InstCombine/sub-ashr-and-to-icmp-select.ll | 4 +-
.../Transforms/InstCombine/truncating-saturate.ll | 615 +
llvm/test/Transforms/InstCombine/xor-ashr.ll | 140 +
llvm/test/Transforms/LICM/no-hoist-prof.ll | 2 +-
.../LoopDistribute/basic-with-memchecks.ll | 2 +-
.../Transforms/LoopIdiom/memset-runtime-32bit.ll | 372 +
.../Transforms/LoopIdiom/memset-runtime-64bit.ll | 360 +
llvm/test/Transforms/LoopIdiom/memset-runtime.ll | 110 -
.../Transforms/LoopPredication/profitability.ll | 8 +-
.../LoopUnswitch/AMDGPU/uniform-unswitch.ll | 2 +-
.../LoopVectorize/AArch64/interleaved_cost.ll | 2 +-
.../LoopVectorize/AArch64/sve-strict-fadd-cost.ll | 12 +-
.../Transforms/LoopVectorize/PowerPC/reg-usage.ll | 4 +-
.../LoopVectorize/PowerPC/widened-massv-call.ll | 2 +-
.../LoopVectorize/RISCV/masked_gather_scatter.ll | 6 +-
.../Transforms/LoopVectorize/X86/cost-model.ll | 167 +-
.../LoopVectorize/X86/float-induction-x86.ll | 2 +-
.../Transforms/LoopVectorize/X86/interleaving.ll | 123 +-
.../LoopVectorize/X86/masked_load_store.ll | 42 +-
.../LoopVectorize/X86/metadata-enable.ll | 19 +-
.../Transforms/LoopVectorize/X86/parallel-loops.ll | 69 +-
llvm/test/Transforms/LoopVectorize/X86/pr47437.ll | 479 +
llvm/test/Transforms/LoopVectorize/X86/pr48340.ll | 4 +-
.../Transforms/LoopVectorize/X86/uniform_mem_op.ll | 109 +-
.../LoopVectorize/X86/x86_fp80-vector-store.ll | 2 +-
llvm/test/Transforms/LoopVectorize/global_alias.ll | 2 +-
.../multiple-strides-vectorization.ll | 3 +-
.../Transforms/LoopVectorize/no_outside_user.ll | 2 +-
.../pr47343-expander-lcssa-after-cfg-update.ll | 3 +-
llvm/test/Transforms/LoopVectorize/pr50686.ll | 3 +-
.../runtime-check-small-clamped-bounds.ll | 6 +-
.../LoopVectorize/skeleton-lcssa-crash.ll | 3 +-
llvm/test/Transforms/LoopVersioning/basic.ll | 2 +-
llvm/test/Transforms/LoopVersioning/lcssa.ll | 4 +-
.../LoopVersioningLICM/loopversioningLICM3.ll | 2 +-
.../test/Transforms/LoopVersioningLICM/metadata.ll | 1 -
.../Mem2Reg/2002-03-28-UninitializedVal.ll | 2 +-
.../2003-04-24-MultipleIdenticalSuccessors.ll | 2 +-
.../Mem2Reg/2003-06-26-IterativePromote.ll | 2 +-
.../Mem2Reg/2003-10-05-DeadPHIInsertion.ll | 2 +-
.../Mem2Reg/2005-06-30-ReadBeforeWrite.ll | 2 +-
llvm/test/Transforms/Mem2Reg/2005-11-28-Crash.ll | 2 +-
llvm/test/Transforms/Mem2Reg/ConvertDebugInfo.ll | 2 +-
llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll | 2 +-
.../Transforms/Mem2Reg/PromoteMemToRegister.ll | 2 +-
llvm/test/Transforms/Mem2Reg/UndefValuesMerge.ll | 2 +-
llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll | 1 -
llvm/test/Transforms/Mem2Reg/atomic.ll | 2 +-
llvm/test/Transforms/Mem2Reg/crash.ll | 2 +-
.../test/Transforms/Mem2Reg/dbg-addr-inline-dse.ll | 2 +-
llvm/test/Transforms/Mem2Reg/dbg-addr.ll | 2 +-
.../Transforms/Mem2Reg/dbg-inline-scope-for-phi.ll | 2 +-
llvm/test/Transforms/Mem2Reg/debug-alloca-phi-2.ll | 2 +-
llvm/test/Transforms/Mem2Reg/debug-alloca-phi.ll | 2 +-
llvm/test/Transforms/Mem2Reg/debug-alloca-vla-1.ll | 2 +-
llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll | 2 +-
llvm/test/Transforms/Mem2Reg/ignore-droppable.ll | 1 -
llvm/test/Transforms/Mem2Reg/ignore-lifetime.ll | 2 +-
llvm/test/Transforms/Mem2Reg/optnone.ll | 2 +-
llvm/test/Transforms/Mem2Reg/pr24179.ll | 1 -
.../Mem2Reg/pr37632-unreachable-list-of-stores.ll | 2 +-
.../Mem2Reg/preserve-nonnull-load-metadata.ll | 2 +-
llvm/test/Transforms/Mem2Reg/undef-order.ll | 2 +-
.../MergeFunc/mergefunc-preserve-debug-info.ll | 4 +-
llvm/test/Transforms/MetaRenamer/main.ll | 1 -
llvm/test/Transforms/MetaRenamer/metarenamer.ll | 1 -
llvm/test/Transforms/NaryReassociate/nary-req.ll | 42 +-
.../PhaseOrdering/AArch64/matrix-extract-insert.ll | 22 +-
llvm/test/Transforms/PhaseOrdering/X86/pr52078.ll | 45 +
.../Transforms/PhaseOrdering/openmp-opt-module.ll | 2 +-
.../PhaseOrdering/reassociate-instcombine.ll | 38 +
.../AArch64/memory-runtime-checks-in-loops.ll | 93 +
.../SLPVectorizer/AArch64/memory-runtime-checks.ll | 1 +
.../Transforms/SLPVectorizer/AArch64/tsc-s352.ll | 2 +-
llvm/test/Transforms/SLPVectorizer/X86/limit.ll | 3 +-
.../SLPVectorizer/X86/memory-runtime-checks.ll | 155 +
.../test/Transforms/SLPVectorizer/X86/powof2div.ll | 78 +-
.../test/Transforms/SLPVectorizer/X86/powof2mul.ll | 334 +
.../SLPVectorizer/X86/shrink_after_reorder2.ll | 78 +
.../test/Transforms/SLPVectorizer/X86/tiny-tree.ll | 13 +-
.../Inputs/inline-replay-function-scope.txt | 1 +
.../SampleProfile/Inputs/inline-replay.txt | 2 +-
.../Inputs/inline-topdown-inline-all.prof | 10 +
.../test/Transforms/SampleProfile/inline-replay.ll | 44 +-
.../Transforms/SampleProfile/remarks-hotness.ll | 6 +-
.../Transforms/Scalarizer/basic-inseltpoison.ll | 1 -
llvm/test/Transforms/Scalarizer/basic.ll | 1 -
llvm/test/Transforms/Scalarizer/cache-bug.ll | 1 -
.../Scalarizer/constant-extractelement.ll | 2 +-
.../Scalarizer/constant-insertelement.ll | 2 +-
llvm/test/Transforms/Scalarizer/crash-bug.ll | 1 -
llvm/test/Transforms/Scalarizer/dbginfo.ll | 1 -
.../Scalarizer/dbgloc-bug-inseltpoison.ll | 1 -
llvm/test/Transforms/Scalarizer/dbgloc-bug.ll | 1 -
llvm/test/Transforms/Scalarizer/global-bug-2.ll | 1 -
llvm/test/Transforms/Scalarizer/global-bug.ll | 1 -
llvm/test/Transforms/Scalarizer/intrinsics.ll | 1 -
.../Scalarizer/order-bug-inseltpoison.ll | 1 -
llvm/test/Transforms/Scalarizer/order-bug.ll | 3 +-
.../Transforms/Scalarizer/phi-bug-inseltpoison.ll | 1 -
llvm/test/Transforms/Scalarizer/phi-bug.ll | 1 -
.../Transforms/Scalarizer/phi-unreachable-pred.ll | 2 +-
llvm/test/Transforms/Scalarizer/scatter-order.ll | 1 -
llvm/test/Transforms/Scalarizer/store-bug.ll | 1 -
.../Scalarizer/variable-extractelement.ll | 6 +-
.../Scalarizer/variable-insertelement.ll | 6 +-
llvm/test/Transforms/Scalarizer/vector-gep.ll | 1 -
.../test/Transforms/SimplifyCFG/unprofitable-pr.ll | 60 +
.../Transforms/SpeculativeExecution/PR46267.ll | 1 -
.../Transforms/SpeculativeExecution/spec-calls.ll | 2 +-
.../Transforms/SpeculativeExecution/spec-casts.ll | 2 +-
.../SpeculativeExecution/spec-compares.ll | 2 +-
.../spec-other-inseltpoison.ll | 2 +-
.../Transforms/SpeculativeExecution/spec-other.ll | 2 +-
llvm/test/Transforms/SpeculativeExecution/spec.ll | 5 +-
llvm/test/Transforms/StripDeadPrototypes/basic.ll | 1 -
.../StripSymbols/2007-01-15-llvm.used.ll | 1 -
.../Transforms/StripSymbols/2010-08-25-crash.ll | 2 +-
llvm/test/Transforms/StripSymbols/block-address.ll | 2 +-
llvm/test/Transforms/StripSymbols/strip-cov.ll | 2 +-
.../StripSymbols/strip-dead-debug-info.ll | 1 -
.../VectorCombine/AArch64/extract-cmp-binop.ll | 2 +-
.../load-extract-insert-store-scalarization.ll | 2 +-
.../AArch64/load-extractelement-scalarization.ll | 5 +-
.../AArch64/vscale-bitcast-shuffle-inseltpoison.ll | 2 +-
.../AArch64/vscale-bitcast-shuffle.ll | 2 +-
.../AMDGPU/as-transition-inseltpoison.ll | 2 +-
.../VectorCombine/AMDGPU/as-transition.ll | 2 +-
.../VectorCombine/Hexagon/load-inseltpoison.ll | 2 +-
llvm/test/Transforms/VectorCombine/Hexagon/load.ll | 2 +-
.../X86/extract-binop-inseltpoison.ll | 4 +-
.../Transforms/VectorCombine/X86/extract-binop.ll | 4 +-
.../VectorCombine/X86/extract-cmp-binop.ll | 4 +-
.../Transforms/VectorCombine/X86/extract-cmp.ll | 4 +-
.../VectorCombine/X86/insert-binop-inseltpoison.ll | 4 +-
.../X86/insert-binop-with-constant-inseltpoison.ll | 4 +-
.../X86/insert-binop-with-constant.ll | 4 +-
.../Transforms/VectorCombine/X86/insert-binop.ll | 4 +-
.../VectorCombine/X86/load-inseltpoison.ll | 4 +-
.../Transforms/VectorCombine/X86/load-widening.ll | 8 +-
llvm/test/Transforms/VectorCombine/X86/load.ll | 4 +-
.../VectorCombine/X86/no-sse-inseltpoison.ll | 2 +-
llvm/test/Transforms/VectorCombine/X86/no-sse.ll | 2 +-
.../X86/scalarize-cmp-inseltpoison.ll | 4 +-
.../Transforms/VectorCombine/X86/scalarize-cmp.ll | 4 +-
.../VectorCombine/X86/scalarize-vector-gep.ll | 4 +-
.../VectorCombine/X86/shuffle-inseltpoison.ll | 4 +-
llvm/test/Transforms/VectorCombine/X86/shuffle.ll | 188 +-
.../Transforms/VectorCombine/load-insert-store.ll | 4 +-
llvm/test/Verifier/assume-bundles.ll | 3 +-
.../X86/debug_addr_invalid_addr_size.s | 2 +-
.../llvm-dwarfdump/X86/debug_rnglists_invalid.s | 4 +-
.../X86/locstats-big-number-of-bytes.yaml | 92 +
.../X86/locstats-bytes-overflow.yaml | 90 +
.../X86/locstats-for-absctract-origin-vars.yaml | 2 +-
.../tools/llvm-dwarfdump/X86/statistics-dwo.test | 2 +-
.../tools/llvm-dwarfdump/X86/statistics-v3.test | 2 +-
llvm/test/tools/llvm-dwarfdump/X86/statistics.ll | 2 +-
.../X86/stats-scope-bytes-covered.yaml | 2 +-
.../test/tools/llvm-mca/X86/SLM/resources-pclmul.s | 4 +-
llvm/test/tools/llvm-mca/X86/SLM/resources-sse42.s | 16 +-
llvm/test/tools/llvm-mca/X86/SLM/resources-ssse3.s | 2 +-
.../test/tools/llvm-mca/X86/SLM/resources-x86_64.s | 224 +-
llvm/test/tools/llvm-profgen/inline-noprobe2.test | 4 +-
.../tools/llvm-reduce/remove-invoked-functions.ll | 2 +-
llvm/test/tools/llvm-reduce/remove-operands.ll | 48 +-
llvm/tools/dsymutil/MachODebugMapParser.cpp | 2 +-
llvm/tools/gold/gold-plugin.cpp | 9 +-
llvm/tools/llvm-c-test/echo.cpp | 2 +-
llvm/tools/llvm-cov/CoverageFilters.cpp | 2 +-
llvm/tools/llvm-cvtres/llvm-cvtres.cpp | 2 +-
llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp | 27 +-
llvm/tools/llvm-dwarfdump/Statistics.cpp | 329 +-
llvm/tools/llvm-exegesis/lib/SnippetFile.h | 2 +-
llvm/tools/llvm-lipo/llvm-lipo.cpp | 2 +-
llvm/tools/llvm-lto/llvm-lto.cpp | 5 +-
llvm/tools/llvm-lto2/llvm-lto2.cpp | 10 +-
llvm/tools/llvm-mca/CodeRegionGenerator.cpp | 2 +-
llvm/tools/llvm-ml/llvm-ml.cpp | 2 +-
llvm/tools/llvm-mt/llvm-mt.cpp | 2 +-
llvm/tools/llvm-nm/llvm-nm.cpp | 4 +-
llvm/tools/llvm-objcopy/ConfigManager.cpp | 8 +-
llvm/tools/llvm-profdata/llvm-profdata.cpp | 7 +-
llvm/tools/llvm-profgen/PerfReader.cpp | 6 +-
llvm/tools/llvm-profgen/ProfileGenerator.cpp | 23 +-
llvm/tools/llvm-rc/llvm-rc.cpp | 4 +-
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz_LTO updated (70589fae -> a079fe77)
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discards 70589fae 6: update: binutils-gcc-linux-glibc: 1
new a079fe77 6: update: llvm-b33c211804d17f88c103d6c05bdb84baf486c2bf: 1
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1808 -> 1528 bytes
02-prepare_abe/console.log.xz | Bin 2784 -> 2784 bytes
03-build_abe-binutils/console.log.xz | Bin 45012 -> 44684 bytes
04-build_abe-stage1/console.log.xz | Bin 92392 -> 95000 bytes
06-build_abe-linux/console.log.xz | Bin 9196 -> 10696 bytes
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09-build_llvm-true/console.log.xz | Bin 60608 -> 59192 bytes
10-benchmark/benchmark-build.log | 38 +-
10-benchmark/benchmark.log | 36 +-
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11-check_regression/console.log.xz | Bin 2756 -> 2744 bytes
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11-check_regression/results-compare.csv | 23 +-
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11-check_regression/results.log | 5104 ++++++++++----------
12-update_baseline/console.log | 4276 ++++++++--------
12-update_baseline/results-1.csv | 209 +-
12-update_baseline/results-brief.csv | 38 +-
12-update_baseline/results-compare.csv | 1 +
12-update_baseline/results-full.csv | 191 +-
12-update_baseline/results.csv | 45 +-
12-update_baseline/results.log | 3472 ++++++-------
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.../top-artifacts/save-temps/403.gcc.tar.xz | Bin 1194716 -> 1196900 bytes
.../top-artifacts/save-temps/429.mcf.tar.xz | Bin 21828 -> 21812 bytes
.../top-artifacts/save-temps/433.milc.tar.xz | Bin 56948 -> 56960 bytes
.../top-artifacts/save-temps/444.namd.tar.xz | Bin 43980 -> 43936 bytes
.../top-artifacts/save-temps/445.gobmk.tar.xz | Bin 611900 -> 616056 bytes
.../top-artifacts/save-temps/447.dealII.tar.xz | Bin 839544 -> 839368 bytes
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.../top-artifacts/save-temps/464.h264ref.tar.xz | Bin 173240 -> 173356 bytes
.../top-artifacts/save-temps/470.lbm.tar.xz | Bin 15380 -> 15376 bytes
.../top-artifacts/save-temps/471.omnetpp.tar.xz | Bin 329456 -> 310636 bytes
.../top-artifacts/save-temps/473.astar.tar.xz | Bin 40932 -> 40660 bytes
.../top-artifacts/save-temps/482.sphinx3.tar.xz | Bin 92292 -> 92344 bytes
.../top-artifacts/save-temps/483.xalancbmk.tar.xz | Bin 3062592 -> 3097232 bytes
jenkins/manifest.sh | 13 +-
results_id | 2 +-
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save-temps/403.gcc.tar.xz | Bin 1194716 -> 1196900 bytes
save-temps/429.mcf.tar.xz | Bin 21828 -> 21812 bytes
save-temps/433.milc.tar.xz | Bin 56948 -> 56960 bytes
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save-temps/445.gobmk.tar.xz | Bin 611900 -> 616056 bytes
save-temps/447.dealII.tar.xz | Bin 839544 -> 839368 bytes
save-temps/450.soplex.tar.xz | Bin 197624 -> 202088 bytes
save-temps/453.povray.tar.xz | Bin 448936 -> 449456 bytes
save-temps/456.hmmer.tar.xz | Bin 120616 -> 120284 bytes
save-temps/458.sjeng.tar.xz | Bin 49976 -> 50020 bytes
save-temps/462.libquantum.tar.xz | Bin 23092 -> 23128 bytes
save-temps/464.h264ref.tar.xz | Bin 173240 -> 173356 bytes
save-temps/470.lbm.tar.xz | Bin 15380 -> 15376 bytes
save-temps/471.omnetpp.tar.xz | Bin 329456 -> 310636 bytes
save-temps/473.astar.tar.xz | Bin 40932 -> 40660 bytes
save-temps/482.sphinx3.tar.xz | Bin 92292 -> 92344 bytes
save-temps/483.xalancbmk.tar.xz | Bin 3062592 -> 3097232 bytes
66 files changed, 7056 insertions(+), 7114 deletions(-)
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3 years, 8 months
- 1
- 0
[linux] branch master updated (9c0c4d24ac00 -> 6c62666d8879)
by git＠git.linaro.org
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unknown user pushed a change to branch master
in repository linux.
from 9c0c4d24ac00 Merge tag 'block-5.15-2021-10-22' of git://git.kernel.dk/l [...]
new 50b6cb351636 scsi: core: Fix shost->cmd_per_lun calculation in scsi_add [...]
new 187a580c9e78 scsi: iscsi: Fix set_param() handling
new 6fd13d699d24 scsi: storvsc: Fix validation for unsolicited incoming packets
new f2b85040acec scsi: core: Put LLD module refcnt after SCSI device is released
new 97e6ea6d7806 scsi: mpi3mr: Fix duplicate device entries when scanning t [...]
new 85374b639229 scsi: sd: Fix crashes in sd_resume_runtime()
new 06634d5b6e92 scsi: qla2xxx: Return -ENOMEM if kzalloc() fails
new 7fb223d0ad80 scsi: qla2xxx: Fix a memory leak in an error path of qla2x [...]
new 4a8f71014b4d scsi: qla2xxx: Fix unmap of already freed sgl
new 4e5483b8440d scsi: ufs: ufs-pci: Force a full restore after suspend-to-disk
new 0f386a604ce5 Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/lin [...]
new f7db8fd03a4b ksmbd: add validation in smb2_ioctl
new bf8acc9e10e2 ksmbd: improve credits management
new 9a63b999ae54 ksmbd: fix potencial 32bit overflow from data area check i [...]
new dbad63001eac ksmbd: validate compound response buffer
new 4bc59477c329 ksmbd: limit read/write/trans buffer size not to exceed 8MB
new 2ea086e35c3d ksmbd: add buffer validation for smb direct
new 7a3348870500 ksmbd: validate credit charge after validating SMB2 PDU body size
new 34061d6b76a4 ksmbd: validate OutputBufferLength of QUERY_DIR, QUERY_INF [...]
new 621be84a9d1f ksmbd: throttle session setup failures to avoid dictionary [...]
new 0d994cd482ee ksmbd: add buffer validation in session setup
new c460e7896e69 Merge tag '5.15-rc6-ksmbd-fixes' of git://git.samba.org/ksmbd
new 0a30896fc502 MAINTAINERS: Add Dave Hansen to the x86 maintainer team
new 16bc177666c0 Merge tag 'x86_urgent_for_v5.15_rc7' of git://git.kernel.o [...]
new 63acd42c0d49 sched/scs: Reset the shadow stack when idle_task_exit
new 6c62666d8879 Merge tag 'sched_urgent_for_v5.15_rc7' of git://git.kernel [...]
The 26 revisions listed above as "new" are entirely new to this
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been added to this reference.
Summary of changes:
MAINTAINERS | 1 +
drivers/scsi/hosts.c | 3 +-
drivers/scsi/mpi3mr/mpi3mr_os.c | 2 +-
drivers/scsi/qla2xxx/qla_bsg.c | 2 +-
drivers/scsi/qla2xxx/qla_os.c | 2 +-
drivers/scsi/qla2xxx/qla_target.c | 14 +-
drivers/scsi/scsi.c | 4 +-
drivers/scsi/scsi_sysfs.c | 9 +
drivers/scsi/scsi_transport_iscsi.c | 2 -
drivers/scsi/sd.c | 7 +-
drivers/scsi/storvsc_drv.c | 32 +++-
drivers/scsi/ufs/ufshcd-pci.c | 33 ++--
fs/ksmbd/auth.c | 16 +-
fs/ksmbd/connection.c | 2 +
fs/ksmbd/ksmbd_netlink.h | 2 +
fs/ksmbd/mgmt/user_config.c | 2 +-
fs/ksmbd/mgmt/user_config.h | 1 +
fs/ksmbd/smb2misc.c | 55 ++++--
fs/ksmbd/smb2ops.c | 3 +
fs/ksmbd/smb2pdu.c | 346 +++++++++++++++++++++++-------------
fs/ksmbd/smb2pdu.h | 2 +
fs/ksmbd/transport_ipc.c | 3 +-
fs/ksmbd/transport_ipc.h | 2 +-
fs/ksmbd/transport_rdma.c | 21 ++-
fs/ksmbd/vfs.c | 2 +-
fs/ksmbd/vfs.h | 2 +-
kernel/sched/core.c | 1 +
27 files changed, 377 insertions(+), 194 deletions(-)
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3 years, 8 months
- 1
- 0
[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allmodconfig updated (50352cce13 -> c5b2f55981)
by git＠git.linaro.org
This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allmodconfig
in repository toolchain/ci/qemu.
from 50352cce13 Merge remote-tracking branch 'remotes/juanquintela/tags/migr [...]
adds 685db13a38 tests: acpi: dump table with failed checksum
adds e741aff0f4 tests: qtest: add qtest_has_accel() to check if tested binar [...]
adds c306cdb0cc tests: acpi: whitelist expected tables for acpi/q35/xapic testcase
adds 80a2f3387c tests: acpi: q35: test for x2APIC entries in SRAT
adds b59a898458 tests: acpi: update expected tables blobs
adds f6826ac4ae tests: acpi: whitelist new expected table tests/data/acpi/q3 [...]
adds 0ff92b6d99 tests: acpi: add testcase for intel_iommu (DMAR table)
adds 44d3bdd8a6 tests: acpi: add expected blob for DMAR table
adds c5a7baad29 tests: acpi: whitelist expected blobs for new acpi/q35/ivrs [...]
adds a4c730cbb2 tests: acpi: add testcase for amd-iommu (IVRS table)
adds ef422a1422 tests: acpi: update expected blobs
adds 709611cb23 tests: acpi: arm/virt: drop redundant test_acpi_one() in tes [...]
adds 07e6ed2c79 tests: arm-cpu-features: use qtest_has_kvm() API
adds b72c76033d tests: migration-test: use qtest_has_accel() API
adds 220ffd949b tests: bios-tables-test: use qtest_has_accel() API to regist [...]
adds c64038c93e vdpa: Skip protected ram IOMMU mappings
adds 032e4d686e vdpa: Add vhost_vdpa_section_end
adds 013108b6e5 vdpa: Check for iova range at mappings changes
adds 819bbda81f virtio-iommu: Remove the non transitional name
adds 19d20e910a virtio-iommu: Drop base_name and change generic_name
adds 6889eb2d43 libvhost-user: fix VHOST_USER_REM_MEM_REG skipping mmap_addr
adds 821d28b88f vhost-user-rng: Add vhost-user-rng implementation
adds c7160fff7d vhost-user-rng-pci: Add vhost-user-rng-pci implementation
adds c47d4fa0c8 docs: Add documentation for vhost based RNG implementation
adds a1ed9ef1de vhost-user: fix duplicated notifier MR init
adds 7fe7791e3f failover: fix a regression introduced by JSON'ification of -device
adds 515efffc2f vhost-user-blk-test: pass vhost-user socket fds to QSD
adds bcfc906be4 qdev/qbus: remove failover specific code
adds 71352aa95b rebuild-expected-aml.sh: allow partial target list
adds 81d7228647 bios-tables-test: don't disassemble empty files
adds 7327813d17 vhost-vdpa: open device fd in net_init_vhost_vdpa()
adds 4d191cfdc7 vhost-vdpa: classify one time request
adds 353244d8b9 vhost-vdpa: prepare for the multiqueue support
adds 654790b65b vhost-vdpa: let net_vhost_vdpa_init() returns NetClientState *
adds 2f849dbdb2 net: introduce control client
adds 05ba3f63d1 vhost-net: control virtqueue support
adds 441537f1ce virtio-net: use "queue_pairs" instead of "queues" when possible
adds 049eb15b5f vhost: record the last virtqueue index for the virtio device
adds 22288fe5a3 virtio-net: vhost control virtqueue support
adds 402378407d vhost-vdpa: multiqueue support
adds 0e464f7d99 pci: fix PCI resource reserve capability on BE
adds 6dcb1cc951 tests/acpi/bios-tables-test: add and allow changes to a new [...]
adds 04dd78b9e8 tests/acpi/pcihp: add unit tests for hotplug on multifunctio [...]
adds a8339e07f9 tests/acpi/bios-tables-test: update DSDT blob for multifunct [...]
adds afc9fcde55 Merge remote-tracking branch 'remotes/mst/tags/for_upstream' [...]
adds 621f70d210 spapr/xive: Add source status helpers
adds 6f4912a416 target/ppc: Use tcg_constant_i32() in gen_setb()
adds 491b3cca36 target/ppc: Use tcg_constant_i64() in gen_brh()
adds a8dcb8da8a target/ppc: Fix the test raising the decrementer exception
adds 3c706d0252 hw/ppc/spapr_softmmu: Reduce include list
adds 644c68696e spapr/xive: Use xive_esb_rw() to trigger interrupts
adds 5ae3d2e8ba hw/ppc: Fix iothread locking in the 405 code
adds 252fcf36bb tests/acceptance: Add tests for the ppc405 boards
adds 66c6b40aba linux-user/ppc: Fix XER access in save/restore_user_regs
adds 7974dc5900 target/ppc: Fix XER access in gdbstub
adds 10de052188 linux-user: Fix XER access in ppc version of elf_core_copy_regs
adds 3938cacdb2 target/ppc: Fix XER access in monitor
adds 239fec2497 ppc/pegasos2: Restrict memory to 2 gigabytes
adds 99173b679a ppc/pegasos2: Warn when using VOF but no kernel is specified
adds 94cd1ffbe1 ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
adds bd20cde50b ppc/pegasos2: Access MV64361 registers via their memory region
adds d200ea14b7 ppc/pegasos2: Add constants for PCI config addresses
adds 284c0486e7 ppc/pegasos2: Implement power-off RTAS function with VOF
adds 5ff1dfdf66 tests/acceptance: Add a test for the bamboo ppc board
adds 6fa5726be6 target/ppc: Filter mtmsr[d] input before setting MSR
adds f7460df271 target/ppc: add MMCR0 PMCC bits to hflags
adds 565cb10967 target/ppc: add user read/write functions for MMCR0
adds 7b3ecf16c8 target/ppc: add user read/write functions for MMCR2
adds cedf706956 target/ppc: adding user read/write functions for PMCs
adds 6f9e8515c1 hw/ppc/ppc4xx_pci: Fix ppc4xx_pci_map_irq() for recent Linux [...]
adds e016b58f6e Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-6 [...]
adds 5384adef5d tests/acpi: Get prepared for IORT E.b revision upgrade
adds 1c2cb7e0b3 hw/arm/virt-acpi-build: IORT upgrade up to revision E.b
adds 47432863ff tests/acpi: Generate reference blob for IORT rev E.b
adds 99abb72520 hw/arm/virt: Don't create device-tree node for empty NUMA node
adds b152229697 roms/edk2: Only init brotli submodule to build BaseTools
adds bd0da3a3d4 roms/edk2: Only initialize required submodules
adds b84722cf44 hw/arm/sbsa-ref: Fixed cpu type error message typo.
adds 8975eb891f hw/elf_ops.h: switch to ssize_t for elf loader return type
adds 3cc322f437 tests/acpi: Add void table for virt/DBG2 bios-tables-test
adds f0dc9a5d8d hw/arm/virt_acpi_build: Generate DBG2 table
adds 98f5c60fbd bios-tables-test: Generate reference table for virt/DBG2
adds 31511b6fe0 hw/arm/virt: Only describe cpu topology since virt-6.2
adds b863f0b758 device_tree: Add qemu_fdt_add_path
adds 72b0527ff6 hw/arm/virt: Add cpu-map to device tree
adds 9de36ef872 hw/acpi/aml-build: Add Processor hierarchy node structure
adds 099f2df2e6 hw/acpi/aml-build: Add PPTT table
adds 4ebd52b92a tests/data/acpi/virt: Add an empty expected file for PPTT
adds 70d23ed534 hw/arm/virt-acpi-build: Generate PPTT table
adds f801789ff0 tests/data/acpi/virt: Update the empty expected file for PPTT
adds 4c127fdbe8 Merge remote-tracking branch 'remotes/rth/tags/pull-arm-2021 [...]
adds e976459b3b mac_via: update comment for VIA1B_vMystery bit
adds 39950b16ec q800: move VIA1 IRQ from level 1 to level 6
adds 91ff5e4dcd q800: use GLUE IRQ numbers instead of IRQ level for GLUE IRQs
adds 291bc1809a mac_via: add GPIO for A/UX mode
adds a85d18aabd q800: wire up auxmode GPIO to GLUE
adds f7c6e12e24 q800: route SONIC on-board Ethernet IRQ via nubus IRQ 9 in c [...]
adds c7710c1ebf q800: wire up remaining IRQs in classic mode
adds 3ea74abe2d q800: add NMI handler
adds a56c12fb76 q800: drop 8-bit graphic_depth check for Apple 21 inch display
adds 1dafe7656a Merge remote-tracking branch 'remotes/vivier-m68k/tags/q800- [...]
adds 82b6a3f64d aspeed: Add support for the fp5280g2-bmc board
adds fc6642544e aspeed/smc: Use a container for the flash mmio address space
adds b12fa6118f speed/sdhci: Add trace events
adds eb8f1d57bd Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-2 [...]
adds b4b9a0e32f update seabios to master branch snapshot
adds 9fb3fcfce5 update seabios binaries
adds 2c64ff92ec Merge remote-tracking branch 'remotes/kraxel/tags/seabios-20 [...]
adds c672f19f32 target/riscv: Pass the same value to oprsz and maxsz for vmv.v.v
adds e573a7f325 target/riscv: line up all of the registers in the info regis [...]
adds 54c1760937 target/riscv: Fix orc.b implementation
adds 03fd0c5fe9 hw/riscv: virt: Use machine->ram as the system memory
adds 61d5649488 target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh
adds 31dbcff713 target/riscv: Remove some unused macros
adds 9d3d60b704 target/riscv: Organise the CPU properties
adds 53677acf25 target/riscv: Move cpu_get_tb_cpu_state out of line
adds 99bc874fb3 target/riscv: Create RISCVMXL enumeration
adds e91a7227cb target/riscv: Split misa.mxl and misa.ext
adds db23e5d981 target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl
adds 92371bd903 target/riscv: Add MXL/SXL/UXL to TB_FLAGS
adds fbb48032e4 target/riscv: Use REQUIRE_64BIT in amo_check64
adds 4e97d459a0 target/riscv: Properly check SEW in amo_op
adds 905b9fcde1 target/riscv: Replace is_32bit with get_xl/get_xlen
adds 7667cafd5a target/riscv: Replace DisasContext.w with DisasContext.ol
adds 80347ae9f2 target/riscv: Use gen_arith_per_ol for RVM
adds 673be37163 target/riscv: Adjust trans_rev8_32 for riscv64
adds fdab665f6e target/riscv: Use gen_unary_per_ol for RVB
adds a0245d91dd target/riscv: Use gen_shift*_per_ol for RVB, RVI
adds 665b90d8a4 target/riscv: Use riscv_csrrw_debug for cpu_dump
adds b550f89457 target/riscv: Compute mstatus.sd on demand
adds ef63100648 hw/riscv: opentitan: Update to the latest build
adds 434e7e0217 hw/intc: Remove the Ibex PLIC
adds d8c6590f18 hw/intc: sifive_plic: Move the properties
adds d680ff664e hw/intc: sifive_plic: Cleanup the realize function
adds 8d3dae162e hw/intc: sifive_plic: Cleanup the irq_request function
adds d4c624f482 hw/riscv: microchip_pfsoc: Use MachineState::ram and Machine [...]
adds 91b1fbdc0c hw/riscv: opentitan: Use MachineState::ram and MachineClass: [...]
adds 56917307f4 hw/riscv: shakti_c: Use MachineState::ram and MachineClass:: [...]
adds e2b3ef7544 hw/riscv: sifive_e: Use MachineState::ram and MachineClass:: [...]
adds c188a9c4f7 hw/riscv: sifive_u: Use MachineState::ram and MachineClass:: [...]
adds 11ec06f9ea hw/riscv: spike: Use MachineState::ram and MachineClass::def [...]
adds 660efed8b3 Merge remote-tracking branch 'remotes/alistair23/tags/pull-r [...]
adds 764ecf77d0 po: update turkish translation
adds ed899ac77d disas/nios2: Fix style in print_insn_nios2()
adds dcc99bd833 disas/nios2: Simplify endianess conversion
adds 3bc1bb8042 MAINTAINERS: Add myself as reviewer of 'Machine core' API
adds f18d403f15 softmmu/physmem.c: Fix typo in comment
adds c4e4d0d92b hw/nvram: Fix Memory Leak in Xilinx eFuse QOM
adds 512a63b2b0 hw/nvram: Fix Memory Leak in Xilinx Versal eFuse device
adds e3f368e0b2 hw/nvram: Fix Memory Leak in Xilinx ZynqMP eFuse device
adds 1c3515ad59 README: Fix some documentation URLs
adds f98d372aef analyze-migration.py: fix a long standing typo
adds 2c92be50bc analyze-migration.py: fix extract contents ('-x') errors
adds c5b2f55981 Merge remote-tracking branch 'remotes/vivier/tags/trivial-br [...]
No new revisions were added by this update.
Summary of changes:
.gitlab-ci.d/edk2.yml | 6 +-
MAINTAINERS | 2 +
README.rst | 14 +-
disas/nios2.c | 73 +++---
docs/system/device-emulation.rst | 1 +
docs/system/devices/vhost-user-rng.rst | 39 +++
hw/acpi/aml-build.c | 89 +++++++
hw/arm/aspeed.c | 74 ++++++
hw/arm/boot.c | 13 +
hw/arm/sbsa-ref.c | 2 +-
hw/arm/virt-acpi-build.c | 117 +++++++--
hw/arm/virt.c | 71 +++++-
hw/core/loader.c | 60 ++---
hw/intc/ibex_plic.c | 307 ------------------------
hw/intc/meson.build | 1 -
hw/intc/sifive_plic.c | 85 +++----
hw/intc/spapr_xive.c | 2 +-
hw/intc/spapr_xive_kvm.c | 14 +-
hw/intc/xive.c | 8 +-
hw/m68k/q800.c | 169 ++++++++++++-
hw/misc/mac_via.c | 23 ++
hw/misc/trace-events | 1 +
hw/net/vhost_net-stub.c | 4 +-
hw/net/vhost_net.c | 55 +++--
hw/net/virtio-net.c | 201 +++++++++-------
hw/nvram/xlnx-efuse.c | 9 +-
hw/nvram/xlnx-versal-efuse-ctrl.c | 20 +-
hw/nvram/xlnx-zynqmp-efuse.c | 18 +-
hw/pci-host/mv64361.c | 1 +
hw/pci/pci_bridge.c | 10 +-
hw/ppc/pegasos2.c | 162 ++++++++-----
hw/ppc/ppc.c | 6 +-
hw/ppc/ppc4xx_pci.c | 8 +-
hw/ppc/spapr_softmmu.c | 15 --
hw/riscv/boot.c | 2 +-
hw/riscv/microchip_pfsoc.c | 36 +--
hw/riscv/opentitan.c | 38 ++-
hw/riscv/shakti_c.c | 6 +-
hw/riscv/sifive_e.c | 16 +-
hw/riscv/sifive_u.c | 6 +-
hw/riscv/spike.c | 6 +-
hw/riscv/virt.c | 6 +-
hw/sd/aspeed_sdhci.c | 5 +
hw/sd/trace-events | 4 +
hw/ssi/aspeed_smc.c | 11 +-
hw/virtio/Kconfig | 5 +
hw/virtio/meson.build | 2 +
hw/virtio/trace-events | 1 +
hw/virtio/vhost-user-rng-pci.c | 79 ++++++
hw/virtio/vhost-user-rng.c | 289 ++++++++++++++++++++++
hw/virtio/vhost-user.c | 5 +-
hw/virtio/vhost-vdpa.c | 140 ++++++++---
hw/virtio/virtio-iommu-pci.c | 4 +-
include/disas/dis-asm.h | 3 +-
include/hw/acpi/aml-build.h | 3 +
include/hw/arm/virt.h | 4 +-
include/hw/elf_ops.h | 27 ++-
include/hw/loader.h | 58 ++---
include/hw/misc/mac_via.h | 1 +
include/hw/ppc/xive.h | 24 ++
include/hw/riscv/opentitan.h | 6 +-
include/hw/ssi/aspeed_smc.h | 2 +-
include/hw/virtio/vhost-user-rng.h | 33 +++
include/hw/virtio/vhost-vdpa.h | 3 +
include/hw/virtio/vhost.h | 2 +
include/hw/virtio/virtio-iommu.h | 2 +-
include/hw/virtio/virtio-net.h | 5 +-
include/net/net.h | 5 +
include/net/vhost_net.h | 6 +-
include/sysemu/device_tree.h | 1 +
linux-user/elfload.c | 4 +-
linux-user/ppc/signal.c | 9 +-
linux-user/riscv/cpu_loop.c | 2 +-
meson.build | 6 +
net/net.c | 24 +-
net/vhost-vdpa.c | 127 ++++++++--
pc-bios/bios-256k.bin | Bin 262144 -> 262144 bytes
pc-bios/bios-microvm.bin | Bin 131072 -> 131072 bytes
pc-bios/bios.bin | Bin 131072 -> 131072 bytes
pc-bios/vgabios-ati.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios-bochs-display.bin | Bin 28672 -> 28672 bytes
pc-bios/vgabios-cirrus.bin | Bin 38912 -> 39424 bytes
pc-bios/vgabios-qxl.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios-ramfb.bin | Bin 28672 -> 28672 bytes
pc-bios/vgabios-stdvga.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios-virtio.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios-vmware.bin | Bin 39424 -> 39424 bytes
pc-bios/vgabios.bin | Bin 38912 -> 38912 bytes
po/tr.po | 25 +-
roms/Makefile | 3 +-
roms/Makefile.edk2 | 7 +-
roms/seabios | 2 +-
scripts/analyze-migration.py | 6 +-
scripts/make-release | 7 +-
semihosting/arm-compat-semi.c | 2 +-
softmmu/device_tree.c | 44 +++-
softmmu/physmem.c | 2 +-
softmmu/qdev-monitor.c | 18 +-
subprojects/libvhost-user/libvhost-user.c | 1 +
target/nios2/cpu.c | 6 +-
target/ppc/cpu.c | 2 +-
target/ppc/cpu.h | 25 +-
target/ppc/cpu_init.c | 16 +-
target/ppc/gdbstub.c | 8 +-
target/ppc/helper_regs.c | 6 +
target/ppc/monitor.c | 9 +-
target/ppc/power8-pmu-regs.c.inc | 262 ++++++++++++++++++++
target/ppc/spr_tcg.h | 8 +
target/ppc/translate.c | 95 ++++----
target/riscv/cpu.c | 216 +++++++++--------
target/riscv/cpu.h | 87 +++----
target/riscv/cpu_bits.h | 16 +-
target/riscv/cpu_helper.c | 92 ++++++-
target/riscv/csr.c | 104 +++++---
target/riscv/gdbstub.c | 10 +-
target/riscv/insn_trans/trans_rvb.c.inc | 153 ++++++------
target/riscv/insn_trans/trans_rvi.c.inc | 44 ++--
target/riscv/insn_trans/trans_rvm.c.inc | 36 ++-
target/riscv/insn_trans/trans_rvv.c.inc | 32 +--
target/riscv/machine.c | 10 +-
target/riscv/monitor.c | 4 +-
target/riscv/translate.c | 174 ++++++++++----
tests/acceptance/ppc_405.py | 42 ++++
tests/acceptance/ppc_bamboo.py | 39 +++
tests/data/acpi/q35/APIC.xapic | Bin 0 -> 2686 bytes
tests/data/acpi/q35/DMAR.dmar | Bin 0 -> 120 bytes
tests/data/acpi/q35/{DSDT => DSDT.ivrs} | Bin 8289 -> 8306 bytes
tests/data/acpi/q35/{DSDT => DSDT.multi-bridge} | Bin 8289 -> 8583 bytes
tests/data/acpi/q35/DSDT.xapic | Bin 0 -> 35652 bytes
tests/data/acpi/q35/FACP.xapic | Bin 0 -> 244 bytes
tests/data/acpi/q35/IVRS.ivrs | Bin 0 -> 104 bytes
tests/data/acpi/q35/SRAT.xapic | Bin 0 -> 5080 bytes
tests/data/acpi/rebuild-expected-aml.sh | 22 +-
tests/data/acpi/virt/DBG2 | Bin 0 -> 87 bytes
tests/data/acpi/virt/IORT | Bin 124 -> 128 bytes
tests/data/acpi/virt/IORT.memhp | Bin 124 -> 128 bytes
tests/data/acpi/virt/IORT.numamem | Bin 124 -> 128 bytes
tests/data/acpi/virt/IORT.pxb | Bin 124 -> 128 bytes
tests/data/acpi/virt/PPTT | Bin 0 -> 76 bytes
tests/qtest/acpi-utils.c | 14 ++
tests/qtest/arm-cpu-features.c | 29 +--
tests/qtest/bios-tables-test.c | 122 ++++++++--
tests/qtest/libqos/libqtest.h | 8 +
tests/qtest/libqtest.c | 27 +++
tests/qtest/migration-test.c | 15 +-
tests/qtest/vhost-user-blk-test.c | 4 +-
tests/tcg/ppc64/Makefile.target | 2 +
tests/tcg/ppc64le/Makefile.target | 2 +
tests/tcg/ppc64le/signal_save_restore_xer.c | 42 ++++
149 files changed, 3217 insertions(+), 1381 deletions(-)
create mode 100644 docs/system/devices/vhost-user-rng.rst
delete mode 100644 hw/intc/ibex_plic.c
create mode 100644 hw/virtio/vhost-user-rng-pci.c
create mode 100644 hw/virtio/vhost-user-rng.c
create mode 100644 include/hw/virtio/vhost-user-rng.h
create mode 100644 target/ppc/power8-pmu-regs.c.inc
create mode 100644 tests/acceptance/ppc_405.py
create mode 100644 tests/acceptance/ppc_bamboo.py
create mode 100644 tests/data/acpi/q35/APIC.xapic
create mode 100644 tests/data/acpi/q35/DMAR.dmar
copy tests/data/acpi/q35/{DSDT => DSDT.ivrs} (97%)
copy tests/data/acpi/q35/{DSDT => DSDT.multi-bridge} (94%)
create mode 100644 tests/data/acpi/q35/DSDT.xapic
create mode 100644 tests/data/acpi/q35/FACP.xapic
create mode 100644 tests/data/acpi/q35/IVRS.ivrs
create mode 100644 tests/data/acpi/q35/SRAT.xapic
create mode 100644 tests/data/acpi/virt/DBG2
create mode 100644 tests/data/acpi/virt/PPTT
create mode 100644 tests/tcg/ppc64le/signal_save_restore_xer.c
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