Tcwg-commits October 2021

tcwg-commits@lists.linaro.org

4 participants
14787 discussions

[gcc] branch master updated (f9190a1c6d0 -> 28006282028)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from f9190a1c6d0 Fix broken use of alloca in C interoperability testcase new 28006282028 MAINTAINERS: Add myself as a VAX port maintainer The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: MAINTAINERS | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap updated (6b8b2557557 -> f9190a1c6d0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap in repository toolchain/ci/gcc. from 6b8b2557557 x86_64: Implement V1TI mode shifts/rotates by a constant adds a31a3d0421f Fortran: Fix character(len=cst) dummies with bind(C) [PR102885] adds ccbd6c37c4f Turn vect_create_addr_base_for_vector_ref offset into a byt [...] adds 54e4e1769e4 forwprop: Remove incorrect assertion [PR102897] adds 94f28340513 Move negative stride bias out of dr_misalignment adds 6adfdff68b1 Unify offset and byte_offset for vect_create_addr_base_for_ [...] adds de185d71767 testsuite: i386: Use -fomit-frame-pointer for gcc.target/i3 [...] adds 88037d82d76 libstdc++: Fix 17_intro/names.cc on Solaris adds 931f1e377ad libstdc++: Fix 28_regex/basic_regex/84110.cc on Solaris adds ace06d730a8 testsuite: i386: Fix gcc.target/i386/pieces-memset-1.c etc. [...] adds 2243f6cf4d1 testsuite: i386: Fix gcc.target/i386/avx512fp16-trunchf.c o [...] adds a1516b50f29 testsuite: i386: Fix gcc.target/i386/avx512f-pr96891-3.c on [...] new f9190a1c6d0 Fix broken use of alloca in C interoperability testcase The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/fortran/trans-decl.c | 7 ++ gcc/testsuite/gcc.dg/pr102897.c | 16 ++++ gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c | 2 +- gcc/testsuite/gcc.target/i386/avx512fp16-trunchf.c | 4 +- gcc/testsuite/gcc.target/i386/pieces-memset-1.c | 2 +- gcc/testsuite/gcc.target/i386/pieces-memset-4.c | 2 +- gcc/testsuite/gcc.target/i386/pieces-memset-41.c | 2 +- gcc/testsuite/gcc.target/i386/pieces-memset-7.c | 2 +- gcc/testsuite/gcc.target/i386/pieces-memset-8.c | 2 +- gcc/testsuite/gcc.target/i386/pr100704-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr100704-2.c | 2 +- gcc/testsuite/gcc.target/i386/pr90773-1.c | 2 +- .../gfortran.dg/c-interop/cf-descriptor-5-c.c | 9 ++- gcc/testsuite/gfortran.dg/lto/bind-c-char_0.f90 | 49 ++++++++++++ gcc/tree-ssa-forwprop.c | 2 - gcc/tree-vect-data-refs.c | 90 +++++++++++----------- gcc/tree-vect-loop-manip.c | 8 +- gcc/tree-vect-stmts.c | 47 ++++++----- gcc/tree-vectorizer.h | 7 +- libstdc++-v3/testsuite/17_intro/names.cc | 4 + .../testsuite/28_regex/basic_regex/84110.cc | 3 + 21 files changed, 176 insertions(+), 88 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr102897.c create mode 100644 gcc/testsuite/gfortran.dg/lto/bind-c-char_0.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap updated (d528ca69 -> 4ce70c0e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap in repository toolchain/ci/base-artifacts. discards d528ca69 0: update: binutils-gcc: 2 new 4ce70c0e 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d528ca69) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1532 -> 1528 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2740 bytes 04-build_abe-binutils/console.log.xz | Bin 64376 -> 65536 bytes 05-build_abe-bootstrap/console.log.xz | Bin 473688 -> 465932 bytes 06-check_regression/console.log.xz | Bin 420 -> 416 bytes 07-update_baseline/console.log | 36 ---------------------------------- jenkins/manifest.sh | 8 ++++---- 7 files changed, 4 insertions(+), 40 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (3976e96a02 -> a4b0231e17)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/gdb. from 3976e96a02 Automatic date update in version.in adds a4b0231e17 [gdb/doc] Fix print inferior-events default No new revisions were added by this update. Summary of changes: gdb/doc/gdb.texinfo | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (4e417eea8f3 -> a1516b50f29)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/gcc. from 4e417eea8f3 [PR testsuite/102857] Tweak ssa-dom-thread-7.c for aarch64. adds 6b8b2557557 x86_64: Implement V1TI mode shifts/rotates by a constant adds a31a3d0421f Fortran: Fix character(len=cst) dummies with bind(C) [PR102885] adds ccbd6c37c4f Turn vect_create_addr_base_for_vector_ref offset into a byt [...] adds 54e4e1769e4 forwprop: Remove incorrect assertion [PR102897] adds 94f28340513 Move negative stride bias out of dr_misalignment adds 6adfdff68b1 Unify offset and byte_offset for vect_create_addr_base_for_ [...] adds de185d71767 testsuite: i386: Use -fomit-frame-pointer for gcc.target/i3 [...] adds 88037d82d76 libstdc++: Fix 17_intro/names.cc on Solaris adds 931f1e377ad libstdc++: Fix 28_regex/basic_regex/84110.cc on Solaris adds ace06d730a8 testsuite: i386: Fix gcc.target/i386/pieces-memset-1.c etc. [...] adds 2243f6cf4d1 testsuite: i386: Fix gcc.target/i386/avx512fp16-trunchf.c o [...] adds a1516b50f29 testsuite: i386: Fix gcc.target/i386/avx512f-pr96891-3.c on [...] No new revisions were added by this update. Summary of changes: gcc/config/i386/i386-expand.c | 163 ++++++++++++++++ gcc/config/i386/i386-protos.h | 2 + gcc/config/i386/sse.md | 44 +++++ gcc/fortran/trans-decl.c | 7 + gcc/testsuite/gcc.dg/pr102897.c | 16 ++ gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c | 2 +- gcc/testsuite/gcc.target/i386/avx512fp16-trunchf.c | 4 +- gcc/testsuite/gcc.target/i386/pieces-memset-1.c | 2 +- gcc/testsuite/gcc.target/i386/pieces-memset-4.c | 2 +- gcc/testsuite/gcc.target/i386/pieces-memset-41.c | 2 +- gcc/testsuite/gcc.target/i386/pieces-memset-7.c | 2 +- gcc/testsuite/gcc.target/i386/pieces-memset-8.c | 2 +- gcc/testsuite/gcc.target/i386/pr100704-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr100704-2.c | 2 +- gcc/testsuite/gcc.target/i386/pr90773-1.c | 2 +- gcc/testsuite/gcc.target/i386/sse2-v1ti-shift.c | 212 +++++++++++++++++++++ gcc/testsuite/gfortran.dg/lto/bind-c-char_0.f90 | 49 +++++ gcc/tree-ssa-forwprop.c | 2 - gcc/tree-vect-data-refs.c | 90 ++++----- gcc/tree-vect-loop-manip.c | 8 +- gcc/tree-vect-stmts.c | 47 +++-- gcc/tree-vectorizer.h | 7 +- libstdc++-v3/testsuite/17_intro/names.cc | 4 + .../testsuite/28_regex/basic_regex/84110.cc | 3 + 24 files changed, 590 insertions(+), 86 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr102897.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-v1ti-shift.c create mode 100644 gcc/testsuite/gfortran.dg/lto/bind-c-char_0.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (3976e96a02 -> a4b0231e17)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/binutils-gdb. from 3976e96a02 Automatic date update in version.in adds a4b0231e17 [gdb/doc] Fix print inferior-events default No new revisions were added by this update. Summary of changes: gdb/doc/gdb.texinfo | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (9a9c6456 -> 61adc890)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/base-artifacts. discards 9a9c6456 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 new 61adc890 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9a9c6456) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_check_gcc/mast [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1544 -> 1548 bytes 02-prepare_abe/console.log.xz | Bin 2768 -> 2796 bytes 03-build_abe-binutils/console.log.xz | Bin 44100 -> 43832 bytes 04-build_abe-stage1/console.log.xz | Bin 90404 -> 91008 bytes 05-clean_sysroot/console.log.xz | Bin 332 -> 332 bytes 06-build_abe-linux/console.log.xz | Bin 8584 -> 8768 bytes 07-build_abe-glibc/console.log.xz | Bin 230456 -> 231496 bytes 08-build_abe-stage2/console.log.xz | Bin 223820 -> 225592 bytes 09-build_abe-gdb/console.log.xz | Bin 43804 -> 44832 bytes 10-build_abe-qemu/console.log.xz | Bin 29844 -> 30168 bytes 11-build_abe-dejagnu/console.log.xz | Bin 3896 -> 3880 bytes 12-build_abe-check_gcc/console.log.xz | Bin 2940 -> 2760 bytes 13-check_regression/console.log.xz | Bin 3036 -> 2604 bytes 13-check_regression/results.compare | 38 +- 13-check_regression/results.compare2 | 69 +- 14-update_baseline/console.log | 357 +++--- 14-update_baseline/results.compare | 38 +- 14-update_baseline/results.compare2 | 69 +- jenkins/manifest.sh | 18 +- sumfiles/g++.log.xz | Bin 2575416 -> 2543036 bytes sumfiles/g++.sum | 106 +- sumfiles/gcc.log.xz | Bin 2085524 -> 2094352 bytes sumfiles/gcc.sum | 2219 +++++++++++++++++---------------- sumfiles/gfortran.log.xz | Bin 852668 -> 856108 bytes sumfiles/gfortran.sum | 50 +- sumfiles/libatomic.log.xz | Bin 2244 -> 2244 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 165440 -> 165420 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2652 -> 2652 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 417748 -> 422664 bytes sumfiles/libstdc++.sum | 10 +- 33 files changed, 1428 insertions(+), 1572 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (4c127fdbe8 -> c5b2f55981)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/qemu. from 4c127fdbe8 Merge remote-tracking branch 'remotes/rth/tags/pull-arm-2021 [...] adds e976459b3b mac_via: update comment for VIA1B_vMystery bit adds 39950b16ec q800: move VIA1 IRQ from level 1 to level 6 adds 91ff5e4dcd q800: use GLUE IRQ numbers instead of IRQ level for GLUE IRQs adds 291bc1809a mac_via: add GPIO for A/UX mode adds a85d18aabd q800: wire up auxmode GPIO to GLUE adds f7c6e12e24 q800: route SONIC on-board Ethernet IRQ via nubus IRQ 9 in c [...] adds c7710c1ebf q800: wire up remaining IRQs in classic mode adds 3ea74abe2d q800: add NMI handler adds a56c12fb76 q800: drop 8-bit graphic_depth check for Apple 21 inch display adds 1dafe7656a Merge remote-tracking branch 'remotes/vivier-m68k/tags/q800- [...] adds 82b6a3f64d aspeed: Add support for the fp5280g2-bmc board adds fc6642544e aspeed/smc: Use a container for the flash mmio address space adds b12fa6118f speed/sdhci: Add trace events adds eb8f1d57bd Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-2 [...] adds b4b9a0e32f update seabios to master branch snapshot adds 9fb3fcfce5 update seabios binaries adds 2c64ff92ec Merge remote-tracking branch 'remotes/kraxel/tags/seabios-20 [...] adds c672f19f32 target/riscv: Pass the same value to oprsz and maxsz for vmv.v.v adds e573a7f325 target/riscv: line up all of the registers in the info regis [...] adds 54c1760937 target/riscv: Fix orc.b implementation adds 03fd0c5fe9 hw/riscv: virt: Use machine->ram as the system memory adds 61d5649488 target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh adds 31dbcff713 target/riscv: Remove some unused macros adds 9d3d60b704 target/riscv: Organise the CPU properties adds 53677acf25 target/riscv: Move cpu_get_tb_cpu_state out of line adds 99bc874fb3 target/riscv: Create RISCVMXL enumeration adds e91a7227cb target/riscv: Split misa.mxl and misa.ext adds db23e5d981 target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl adds 92371bd903 target/riscv: Add MXL/SXL/UXL to TB_FLAGS adds fbb48032e4 target/riscv: Use REQUIRE_64BIT in amo_check64 adds 4e97d459a0 target/riscv: Properly check SEW in amo_op adds 905b9fcde1 target/riscv: Replace is_32bit with get_xl/get_xlen adds 7667cafd5a target/riscv: Replace DisasContext.w with DisasContext.ol adds 80347ae9f2 target/riscv: Use gen_arith_per_ol for RVM adds 673be37163 target/riscv: Adjust trans_rev8_32 for riscv64 adds fdab665f6e target/riscv: Use gen_unary_per_ol for RVB adds a0245d91dd target/riscv: Use gen_shift*_per_ol for RVB, RVI adds 665b90d8a4 target/riscv: Use riscv_csrrw_debug for cpu_dump adds b550f89457 target/riscv: Compute mstatus.sd on demand adds ef63100648 hw/riscv: opentitan: Update to the latest build adds 434e7e0217 hw/intc: Remove the Ibex PLIC adds d8c6590f18 hw/intc: sifive_plic: Move the properties adds d680ff664e hw/intc: sifive_plic: Cleanup the realize function adds 8d3dae162e hw/intc: sifive_plic: Cleanup the irq_request function adds d4c624f482 hw/riscv: microchip_pfsoc: Use MachineState::ram and Machine [...] adds 91b1fbdc0c hw/riscv: opentitan: Use MachineState::ram and MachineClass: [...] adds 56917307f4 hw/riscv: shakti_c: Use MachineState::ram and MachineClass:: [...] adds e2b3ef7544 hw/riscv: sifive_e: Use MachineState::ram and MachineClass:: [...] adds c188a9c4f7 hw/riscv: sifive_u: Use MachineState::ram and MachineClass:: [...] adds 11ec06f9ea hw/riscv: spike: Use MachineState::ram and MachineClass::def [...] adds 660efed8b3 Merge remote-tracking branch 'remotes/alistair23/tags/pull-r [...] adds 764ecf77d0 po: update turkish translation adds ed899ac77d disas/nios2: Fix style in print_insn_nios2() adds dcc99bd833 disas/nios2: Simplify endianess conversion adds 3bc1bb8042 MAINTAINERS: Add myself as reviewer of 'Machine core' API adds f18d403f15 softmmu/physmem.c: Fix typo in comment adds c4e4d0d92b hw/nvram: Fix Memory Leak in Xilinx eFuse QOM adds 512a63b2b0 hw/nvram: Fix Memory Leak in Xilinx Versal eFuse device adds e3f368e0b2 hw/nvram: Fix Memory Leak in Xilinx ZynqMP eFuse device adds 1c3515ad59 README: Fix some documentation URLs adds f98d372aef analyze-migration.py: fix a long standing typo adds 2c92be50bc analyze-migration.py: fix extract contents ('-x') errors adds c5b2f55981 Merge remote-tracking branch 'remotes/vivier/tags/trivial-br [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 1 + README.rst | 14 +- disas/nios2.c | 73 +++----- hw/arm/aspeed.c | 74 ++++++++ hw/intc/ibex_plic.c | 307 -------------------------------- hw/intc/meson.build | 1 - hw/intc/sifive_plic.c | 85 ++++----- hw/m68k/q800.c | 169 +++++++++++++++++- hw/misc/mac_via.c | 23 +++ hw/misc/trace-events | 1 + hw/nvram/xlnx-efuse.c | 9 +- hw/nvram/xlnx-versal-efuse-ctrl.c | 20 ++- hw/nvram/xlnx-zynqmp-efuse.c | 18 +- hw/riscv/boot.c | 2 +- hw/riscv/microchip_pfsoc.c | 36 ++-- hw/riscv/opentitan.c | 38 +++- hw/riscv/shakti_c.c | 6 +- hw/riscv/sifive_e.c | 16 +- hw/riscv/sifive_u.c | 6 +- hw/riscv/spike.c | 6 +- hw/riscv/virt.c | 6 +- hw/sd/aspeed_sdhci.c | 5 + hw/sd/trace-events | 4 + hw/ssi/aspeed_smc.c | 11 +- include/disas/dis-asm.h | 3 +- include/hw/misc/mac_via.h | 1 + include/hw/riscv/opentitan.h | 6 +- include/hw/ssi/aspeed_smc.h | 2 +- linux-user/elfload.c | 2 +- linux-user/riscv/cpu_loop.c | 2 +- pc-bios/bios-256k.bin | Bin 262144 -> 262144 bytes pc-bios/bios-microvm.bin | Bin 131072 -> 131072 bytes pc-bios/bios.bin | Bin 131072 -> 131072 bytes pc-bios/vgabios-ati.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-bochs-display.bin | Bin 28672 -> 28672 bytes pc-bios/vgabios-cirrus.bin | Bin 38912 -> 39424 bytes pc-bios/vgabios-qxl.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-ramfb.bin | Bin 28672 -> 28672 bytes pc-bios/vgabios-stdvga.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-virtio.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-vmware.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios.bin | Bin 38912 -> 38912 bytes po/tr.po | 25 ++- roms/seabios | 2 +- scripts/analyze-migration.py | 6 +- semihosting/arm-compat-semi.c | 2 +- softmmu/physmem.c | 2 +- target/nios2/cpu.c | 6 +- target/riscv/cpu.c | 216 ++++++++++++---------- target/riscv/cpu.h | 87 +++------ target/riscv/cpu_bits.h | 16 +- target/riscv/cpu_helper.c | 92 +++++++++- target/riscv/csr.c | 104 ++++++----- target/riscv/gdbstub.c | 10 +- target/riscv/insn_trans/trans_rvb.c.inc | 153 +++++++++------- target/riscv/insn_trans/trans_rvi.c.inc | 44 ++--- target/riscv/insn_trans/trans_rvm.c.inc | 36 +++- target/riscv/insn_trans/trans_rvv.c.inc | 32 ++-- target/riscv/machine.c | 10 +- target/riscv/monitor.c | 4 +- target/riscv/translate.c | 174 +++++++++++++----- 61 files changed, 1088 insertions(+), 880 deletions(-) delete mode 100644 hw/intc/ibex_plic.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (cce92cd8d11 -> 40d76242a2c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/gcc. from cce92cd8d11 Daily bump. adds 97262ad1c2c Daily bump. adds 73833f5d0e0 Daily bump. adds e20ec3be901 Don't use 'G' constraint in integer move patterns adds 4b304e3d639 Revise -mdisable-fpregs option and add new -msoft-mult option adds dd028e763d5 Daily bump. adds 40d76242a2c Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 20 +++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/pa/pa-d.c | 2 +- gcc/config/pa/pa.c | 10 +++++----- gcc/config/pa/pa.h | 1 - gcc/config/pa/pa.md | 54 ++++++++++++++++++++++++++-------------------------- gcc/config/pa/pa.opt | 8 ++++++-- 7 files changed, 60 insertions(+), 37 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (3b7669ac54 -> 70cfd17bbd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from 3b7669ac54 Automatic date update in version.in adds 582c08278c Automatic date update in version.in adds 471a3e5663 Automatic date update in version.in adds 5af30d001a Automatic date update in version.in adds 70cfd17bbd Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

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Tcwg-commits October 2021