Tcwg-commits October 2021

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (66cc044255 -> 3976e96a02)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/binutils-gdb. from 66cc044255 gdb: fix remote-sim.c build adds 9abcdc10b2 RISC-V: Don't separate pcgp relaxation to another relax pass. adds c628f812eb RISC-V: Added ld testcase for pcgp relaxation. adds 431be556b0 gdb: make disassembler fprintf callback a static member function adds 8b87fbe6bb gdb/python: new gdb.architecture_names function adds 625f7b1cdc gdb/python: move gdb.Membuf support into a new file adds d5684c961f [gdb/testsuite] Fix FAILs in gdb.mi/mi-breakpoint-changed.exp adds 5d71c60df5 [gdb/testsuite] Fix gdb.threads/linux-dp.exp adds 63b868ddf8 Remove unused variables from gdbserver's Makefile adds aab00c2dff Fix 'uninstall' target adds c8480b58e1 x86: Add -muse-unaligned-vector-move to assembler adds eaf4a97352 Automatic date update in version.in adds e515d93264 Automatic date update in version.in adds e214f8db56 LoongArch bfd support adds 6cc76c40a9 LoongArch opcodes support adds e9a0721f82 LoongArch binutils support adds 4462d7c440 LoongArch gas support adds 560b3fe208 LoongArch ld support adds 3f9661f12a asan: aout: heap buffer overflow adds e028124942 asan: arm-darwin: buffer overflow adds 1ed0032b40 asan: c4x, c54x coff_canonicalize_reloc buffer overflow adds 30459fe4ef Automatic date update in version.in adds b920bc3722 asan: evax_bfd_print_image buffer overflow adds 1e5a28be0f ubsan: _bfd_xcoff64_swap_aux_in left shift of negative value adds bd84a8e2e0 bfd_nonfatal_message, localise va_start adds 5513527b59 objdump doesn't accept -L option adds 80b56fad5c binutils: make objdump/readelf --ctf-parent actually useful adds 10909ea819 binutils, ld: make objdump --ctf's parameter optional adds a0cc569d59 libctf: dump: do not stop dumping types on error adds eb5323fdf8 libctf, ld: handle nonrepresentable types better adds 9de46719da [gdb/testsuite] Fix duplicate in gdb.mi/mi-var-cp.exp adds b3a9fe6f51 x86: Also handle stores for -muse-unaligned-vector-move adds 61d7f128e6 gdbserver: make target_pid_to_str return std::string adds d9f82e9313 gdbsupport: add assertions in array_view adds 50888e42dc gdb: change functions returning value contents to use gdb::a [...] adds 3976e96a02 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/Makefile.am | 17 +- bfd/Makefile.in | 21 +- bfd/aoutx.h | 5 +- bfd/archures.c | 5 + bfd/bfd-in.h | 4 +- bfd/bfd-in2.h | 52 +- bfd/coff-tic54x.c | 2 +- bfd/coff64-rs6000.c | 7 +- bfd/coffcode.h | 22 +- bfd/coffgen.c | 2 +- bfd/coffswap.h | 27 + bfd/config.bfd | 15 + bfd/configure | 2 + bfd/configure.ac | 2 + bfd/cpu-loongarch.c | 61 + bfd/elf-bfd.h | 9 + bfd/elf.c | 109 + bfd/elfnn-loongarch.c | 3265 ++++++++++++++++++++ bfd/elfnn-riscv.c | 354 +-- bfd/elfxx-loongarch.c | 661 ++++ bfd/elfxx-loongarch.h | 31 + bfd/elfxx-riscv.h | 5 - bfd/libbfd.h | 43 + bfd/mach-o-arm.c | 39 +- bfd/pdp11.c | 5 +- bfd/po/BLD-POTFILES.in | 2 + bfd/po/SRC-POTFILES.in | 3 + bfd/reloc.c | 89 + bfd/targets.c | 8 + bfd/version.h | 2 +- bfd/vms-alpha.c | 93 +- binutils/ChangeLog | 23 + binutils/NEWS | 2 + binutils/bucomm.c | 6 +- binutils/doc/ctf.options.texi | 19 +- binutils/objdump.c | 88 +- binutils/readelf.c | 123 +- binutils/testsuite/binutils-all/objdump.exp | 1 + gas/Makefile.am | 17 +- gas/Makefile.in | 28 +- gas/NEWS | 5 + gas/config/loongarch-lex-wrapper.c | 20 + gas/config/loongarch-lex.h | 34 + gas/config/loongarch-lex.l | 61 + gas/config/loongarch-parse.y | 441 +++ gas/config/tc-i386.c | 41 + gas/config/tc-loongarch.c | 1382 +++++++++ gas/config/tc-loongarch.h | 91 + gas/configure | 17 + gas/configure.ac | 13 + gas/configure.tgt | 6 +- gas/doc/as.texi | 31 + gas/doc/c-i386.texi | 6 + gas/doc/c-loongarch.texi | 39 + gas/po/POTFILES.in | 1 + gas/testsuite/gas/all/gas.exp | 5 +- gas/testsuite/gas/elf/elf.exp | 1 + gas/testsuite/gas/i386/i386.exp | 2 + gas/testsuite/gas/i386/unaligned-vector-move.d | 41 + gas/testsuite/gas/i386/unaligned-vector-move.s | 34 + .../gas/i386/x86-64-unaligned-vector-move.d | 42 + gas/testsuite/gas/loongarch/4opt_op.d | 70 + gas/testsuite/gas/loongarch/4opt_op.s | 61 + gas/testsuite/gas/loongarch/fix_op.d | 134 + gas/testsuite/gas/loongarch/fix_op.s | 125 + gas/testsuite/gas/loongarch/float_op.d | 85 + gas/testsuite/gas/loongarch/float_op.s | 76 + gas/testsuite/gas/loongarch/imm_op.d | 48 + gas/testsuite/gas/loongarch/imm_op.s | 39 + gas/testsuite/gas/loongarch/jmp_op.d | 68 + gas/testsuite/gas/loongarch/jmp_op.s | 22 + gas/testsuite/gas/loongarch/load_store_op.d | 178 ++ gas/testsuite/gas/loongarch/load_store_op.s | 169 + gas/testsuite/gas/loongarch/loongarch.exp | 23 + gas/testsuite/gas/loongarch/macro_op.d | 733 +++++ gas/testsuite/gas/loongarch/macro_op.s | 29 + gas/testsuite/gas/loongarch/nop.d | 10 + .../gas/{riscv/t_insns.s => loongarch/nop.s} | 0 gas/testsuite/gas/loongarch/privilege_op.d | 44 + gas/testsuite/gas/loongarch/privilege_op.s | 35 + gas/testsuite/gas/loongarch/syscall.d | 11 + gas/testsuite/gas/loongarch/syscall.s | 2 + gas/testsuite/lib/gas-defs.exp | 4 + gdb/Makefile.in | 13 +- gdb/NEWS | 4 + gdb/aarch64-linux-tdep.c | 2 +- gdb/aarch64-tdep.c | 14 +- gdb/ada-lang.c | 54 +- gdb/ada-tasks.c | 2 +- gdb/ada-valprint.c | 10 +- gdb/alpha-tdep.c | 8 +- gdb/amd64-tdep.c | 6 +- gdb/amd64-windows-tdep.c | 6 +- gdb/arc-tdep.c | 5 +- gdb/arm-tdep.c | 2 +- gdb/avr-tdep.c | 2 +- gdb/bfin-tdep.c | 2 +- gdb/breakpoint.c | 2 +- gdb/c-lang.c | 4 +- gdb/c-valprint.c | 8 +- gdb/cli/cli-cmds.c | 2 +- gdb/cli/cli-dump.c | 4 +- gdb/compile/compile-object-load.c | 3 +- gdb/cp-valprint.c | 6 +- gdb/cris-tdep.c | 2 +- gdb/csky-tdep.c | 2 +- gdb/d-valprint.c | 2 +- gdb/disasm.c | 31 +- gdb/disasm.h | 3 + gdb/doc/python.texi | 9 + gdb/dummy-frame.c | 4 +- gdb/dwarf2/expr.c | 18 +- gdb/dwarf2/loc.c | 3 +- gdb/dwarf2/read.c | 2 +- gdb/elfread.c | 2 +- gdb/eval.c | 14 +- gdb/f-lang.c | 31 +- gdb/f-valprint.c | 2 +- gdb/findcmd.c | 2 +- gdb/findvar.c | 10 +- gdb/frame-unwind.c | 7 +- gdb/frame.c | 23 +- gdb/frv-tdep.c | 4 +- gdb/gdbtypes.c | 2 +- gdb/gnu-v3-abi.c | 2 +- gdb/go-valprint.c | 2 +- gdb/guile/scm-value.c | 5 +- gdb/h8300-tdep.c | 2 +- gdb/hppa-tdep.c | 22 +- gdb/i386-darwin-tdep.c | 4 +- gdb/i386-tdep.c | 7 +- gdb/i387-tdep.c | 2 +- gdb/ia64-tdep.c | 34 +- gdb/infcall.c | 6 +- gdb/infcmd.c | 4 +- gdb/infrun.c | 4 +- gdb/iq2000-tdep.c | 2 +- gdb/lm32-tdep.c | 2 +- gdb/m2-valprint.c | 4 +- gdb/m32c-tdep.c | 2 +- gdb/m32r-tdep.c | 4 +- gdb/m68hc11-tdep.c | 4 +- gdb/m68k-tdep.c | 2 +- gdb/mep-tdep.c | 4 +- gdb/mips-tdep.c | 10 +- gdb/mn10300-tdep.c | 2 +- gdb/msp430-tdep.c | 2 +- gdb/nds32-tdep.c | 2 +- gdb/nios2-tdep.c | 2 +- gdb/opencl-lang.c | 22 +- gdb/or1k-tdep.c | 6 +- gdb/p-valprint.c | 4 +- gdb/ppc-sysv-tdep.c | 4 +- gdb/printcmd.c | 11 +- gdb/python/py-arch.c | 23 + gdb/python/py-inferior.c | 184 +- gdb/python/py-membuf.c | 226 ++ gdb/python/py-unwind.c | 5 +- gdb/python/py-value.c | 6 +- gdb/python/python-internal.h | 6 + gdb/python/python.c | 5 + gdb/regcache.c | 4 +- gdb/riscv-tdep.c | 10 +- gdb/rl78-tdep.c | 2 +- gdb/rs6000-aix-tdep.c | 13 +- gdb/rs6000-lynx178-tdep.c | 13 +- gdb/rust-lang.c | 11 +- gdb/rx-tdep.c | 8 +- gdb/s390-tdep.c | 23 +- gdb/score-tdep.c | 2 +- gdb/sh-tdep.c | 6 +- gdb/sparc-tdep.c | 4 +- gdb/sparc64-tdep.c | 4 +- gdb/stack.c | 6 +- gdb/std-regs.c | 4 +- gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp | 4 +- gdb/testsuite/gdb.mi/mi-var-cp.cc | 2 +- gdb/testsuite/gdb.python/py-arch.exp | 51 + gdb/testsuite/gdb.threads/linux-dp.exp | 2 +- gdb/tic6x-tdep.c | 2 +- gdb/tilegx-tdep.c | 4 +- gdb/tracepoint.c | 2 +- gdb/v850-tdep.c | 2 +- gdb/valarith.c | 71 +- gdb/valops.c | 79 +- gdb/valprint.c | 26 +- gdb/value.c | 80 +- gdb/value.h | 14 +- gdb/vax-tdep.c | 2 +- gdb/windows-tdep.c | 2 +- gdb/xstormy16-tdep.c | 4 +- gdb/xtensa-tdep.c | 4 +- gdbserver/Makefile.in | 32 +- gdbserver/linux-low.cc | 62 +- gdbserver/remote-utils.cc | 2 +- gdbserver/server.cc | 4 +- gdbserver/target.cc | 23 +- gdbserver/target.h | 2 +- gdbserver/tracepoint.cc | 8 +- gdbsupport/array-view.h | 28 +- include/dis-asm.h | 1 + include/elf/common.h | 12 +- include/elf/loongarch.h | 119 + include/opcode/loongarch.h | 239 ++ ld/ChangeLog | 38 + ld/Makefile.am | 4 + ld/Makefile.in | 5 + ld/NEWS | 2 + ld/configure.tgt | 4 + ld/emulparams/elf32loongarch-defs.sh | 36 + ld/emulparams/elf32loongarch.sh | 11 + ld/emulparams/elf64loongarch-defs.sh | 39 + ld/emulparams/elf64loongarch.sh | 11 + ld/emultempl/{riscvelf.em => loongarchelf.em} | 50 +- ld/emultempl/riscvelf.em | 8 +- ld/po/BLD-POTFILES.in | 2 + ld/testsuite/ld-ctf/array.d | 2 +- ld/testsuite/ld-ctf/conflicting-cycle-1.B-1.d | 2 +- ld/testsuite/ld-ctf/conflicting-cycle-1.B-2.d | 2 +- ld/testsuite/ld-ctf/conflicting-cycle-1.parent.d | 2 +- ld/testsuite/ld-ctf/conflicting-cycle-2.A-1.d | 2 +- ld/testsuite/ld-ctf/conflicting-cycle-2.A-2.d | 2 +- ld/testsuite/ld-ctf/conflicting-cycle-2.parent.d | 2 +- ld/testsuite/ld-ctf/conflicting-cycle-3.C-1.d | 2 +- ld/testsuite/ld-ctf/conflicting-cycle-3.C-2.d | 2 +- ld/testsuite/ld-ctf/conflicting-cycle-3.parent.d | 2 +- ld/testsuite/ld-ctf/conflicting-enums.d | 2 +- ld/testsuite/ld-ctf/conflicting-typedefs.d | 2 +- ld/testsuite/ld-ctf/cross-tu-cyclic-conflicting.d | 2 +- .../ld-ctf/cross-tu-cyclic-nonconflicting.d | 2 +- ld/testsuite/ld-ctf/cross-tu-into-cycle.d | 2 +- ld/testsuite/ld-ctf/cross-tu-noncyclic.d | 2 +- ld/testsuite/ld-ctf/cycle-1.d | 2 +- ld/testsuite/ld-ctf/cycle-2.A.d | 2 +- ld/testsuite/ld-ctf/cycle-2.B.d | 2 +- ld/testsuite/ld-ctf/cycle-2.C.d | 2 +- ld/testsuite/ld-ctf/data-func-conflicted.d | 2 +- ld/testsuite/ld-ctf/diag-cttname-null.d | 2 +- ld/testsuite/ld-ctf/diag-cuname.d | 2 +- ld/testsuite/ld-ctf/diag-parlabel.d | 2 +- ld/testsuite/ld-ctf/enum-forward.d | 2 +- ld/testsuite/ld-ctf/enums.d | 2 +- ld/testsuite/ld-ctf/forward.d | 2 +- ld/testsuite/ld-ctf/function.d | 2 +- ld/testsuite/ld-ctf/nonrepresentable-member.c | 7 + ld/testsuite/ld-ctf/nonrepresentable-member.d | 25 + ld/testsuite/ld-ctf/nonrepresentable.d | 2 +- ld/testsuite/ld-ctf/slice.d | 2 +- ld/testsuite/ld-ctf/super-sub-cycles.d | 2 +- ld/testsuite/ld-loongarch-elf/disas-jirl.d | 14 + ld/testsuite/ld-loongarch-elf/disas-jirl.s | 5 + ld/testsuite/ld-loongarch-elf/jmp_op.d | 68 + ld/testsuite/ld-loongarch-elf/jmp_op.s | 22 + ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp | 34 + ld/testsuite/ld-loongarch-elf/macro_op.d | 732 +++++ ld/testsuite/ld-loongarch-elf/macro_op.s | 29 + ld/testsuite/ld-loongarch-elf/syscall-0.s | 9 + ld/testsuite/ld-loongarch-elf/syscall-1.s | 20 + ld/testsuite/ld-loongarch-elf/syscall.d | 5 + ld/testsuite/ld-riscv-elf/align-small-region.d | 12 + ld/testsuite/ld-riscv-elf/align-small-region.ld | 12 + ld/testsuite/ld-riscv-elf/align-small-region.s | 7 + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 5 +- .../ld-riscv-elf/{pcgp-relax.d => pcgp-relax-01.d} | 2 +- .../ld-riscv-elf/{pcgp-relax.s => pcgp-relax-01.s} | 0 ld/testsuite/ld-riscv-elf/pcgp-relax-02.d | 15 + ld/testsuite/ld-riscv-elf/pcgp-relax-02.s | 18 + ld/testsuite/ld-riscv-elf/restart-relax.d | 14 - ld/testsuite/ld-riscv-elf/restart-relax.s | 17 - ld/testsuite/ld-srec/srec.exp | 6 + ld/testsuite/ld-unique/pr21529.d | 2 +- libctf/ChangeLog | 8 + libctf/ctf-dump.c | 14 +- libctf/ctf-types.c | 19 +- opcodes/Makefile.am | 3 + opcodes/Makefile.in | 6 + opcodes/configure | 1 + opcodes/configure.ac | 1 + opcodes/disassemble.c | 9 + opcodes/disassemble.h | 1 + opcodes/loongarch-coder.c | 473 +++ opcodes/loongarch-dis.c | 342 ++ opcodes/loongarch-opc.c | 798 +++++ opcodes/po/POTFILES.in | 3 + 284 files changed, 13319 insertions(+), 1222 deletions(-) create mode 100644 bfd/cpu-loongarch.c create mode 100644 bfd/elfnn-loongarch.c create mode 100644 bfd/elfxx-loongarch.c create mode 100644 bfd/elfxx-loongarch.h create mode 100644 gas/config/loongarch-lex-wrapper.c create mode 100644 gas/config/loongarch-lex.h create mode 100644 gas/config/loongarch-lex.l create mode 100644 gas/config/loongarch-parse.y create mode 100644 gas/config/tc-loongarch.c create mode 100644 gas/config/tc-loongarch.h create mode 100644 gas/doc/c-loongarch.texi create mode 100644 gas/testsuite/gas/i386/unaligned-vector-move.d create mode 100644 gas/testsuite/gas/i386/unaligned-vector-move.s create mode 100644 gas/testsuite/gas/i386/x86-64-unaligned-vector-move.d create mode 100644 gas/testsuite/gas/loongarch/4opt_op.d create mode 100644 gas/testsuite/gas/loongarch/4opt_op.s create mode 100644 gas/testsuite/gas/loongarch/fix_op.d create mode 100644 gas/testsuite/gas/loongarch/fix_op.s create mode 100644 gas/testsuite/gas/loongarch/float_op.d create mode 100644 gas/testsuite/gas/loongarch/float_op.s create mode 100644 gas/testsuite/gas/loongarch/imm_op.d create mode 100644 gas/testsuite/gas/loongarch/imm_op.s create mode 100644 gas/testsuite/gas/loongarch/jmp_op.d create mode 100644 gas/testsuite/gas/loongarch/jmp_op.s create mode 100644 gas/testsuite/gas/loongarch/load_store_op.d create mode 100644 gas/testsuite/gas/loongarch/load_store_op.s create mode 100644 gas/testsuite/gas/loongarch/loongarch.exp create mode 100644 gas/testsuite/gas/loongarch/macro_op.d create mode 100644 gas/testsuite/gas/loongarch/macro_op.s create mode 100644 gas/testsuite/gas/loongarch/nop.d copy gas/testsuite/gas/{riscv/t_insns.s => loongarch/nop.s} (100%) create mode 100644 gas/testsuite/gas/loongarch/privilege_op.d create mode 100644 gas/testsuite/gas/loongarch/privilege_op.s create mode 100644 gas/testsuite/gas/loongarch/syscall.d create mode 100644 gas/testsuite/gas/loongarch/syscall.s create mode 100644 gdb/python/py-membuf.c create mode 100644 include/elf/loongarch.h create mode 100644 include/opcode/loongarch.h create mode 100644 ld/emulparams/elf32loongarch-defs.sh create mode 100644 ld/emulparams/elf32loongarch.sh create mode 100644 ld/emulparams/elf64loongarch-defs.sh create mode 100644 ld/emulparams/elf64loongarch.sh copy ld/emultempl/{riscvelf.em => loongarchelf.em} (52%) create mode 100644 ld/testsuite/ld-ctf/nonrepresentable-member.c create mode 100644 ld/testsuite/ld-ctf/nonrepresentable-member.d create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.d create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.s create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.d create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.s create mode 100644 ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.d create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.s create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-0.s create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-1.s create mode 100644 ld/testsuite/ld-loongarch-elf/syscall.d create mode 100644 ld/testsuite/ld-riscv-elf/align-small-region.d create mode 100644 ld/testsuite/ld-riscv-elf/align-small-region.ld create mode 100644 ld/testsuite/ld-riscv-elf/align-small-region.s rename ld/testsuite/ld-riscv-elf/{pcgp-relax.d => pcgp-relax-01.d} (94%) rename ld/testsuite/ld-riscv-elf/{pcgp-relax.s => pcgp-relax-01.s} (100%) create mode 100644 ld/testsuite/ld-riscv-elf/pcgp-relax-02.d create mode 100644 ld/testsuite/ld-riscv-elf/pcgp-relax-02.s delete mode 100644 ld/testsuite/ld-riscv-elf/restart-relax.d delete mode 100644 ld/testsuite/ld-riscv-elf/restart-relax.s create mode 100644 opcodes/loongarch-coder.c create mode 100644 opcodes/loongarch-dis.c create mode 100644 opcodes/loongarch-opc.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (8a7dde08 -> 78819f9b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 8a7dde08 0: update: binutils-llvm-linux-qemu: boot new 78819f9b 0: update: binutils-llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8a7dde08) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1556 -> 1556 bytes 02-prepare_abe/console.log.xz | Bin 2756 -> 2780 bytes 03-build_abe-binutils/console.log.xz | Bin 45184 -> 45108 bytes 04-build_llvm/console.log.xz | Bin 58276 -> 58480 bytes 05-build_abe-qemu/console.log.xz | Bin 30016 -> 30200 bytes 06-build_linux/console.log.xz | Bin 3296 -> 3224 bytes 07-boot_linux/console.log.xz | Bin 504 -> 504 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 2 +- jenkins/manifest.sh | 22 +++++++++++----------- 10 files changed, 12 insertions(+), 12 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled_lto updated (3f861a5c8fd -> f5bacd9c5be)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled_lto in repository toolchain/ci/gcc. from 3f861a5c8fd Revise -mdisable-fpregs option and add new -msoft-mult option adds 37935c01841 Daily bump. adds 7c20a9b738a Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combi [...] adds aa15952d646 tree-optimization/102920 - fix PHI VN with undefined args adds 1a07bc9cda7 Simplify (_Float16) sqrtf((float) a) to .SQRT(a) when a is [...] adds 149e217033f RISC-V: Minimal support of bitmanip extension adds 283b1707f23 RISC-V: Implement instruction patterns for ZBA extension. adds 04a9b554ba1 RISC-V: Cost model for zba extension. adds e596a283e54 RISC-V: Implement instruction patterns for ZBB extension. adds 3329d892eb6 RISC-V: Cost model for zbb extension. adds 26d2818bb73 RISC-V: Use li and rori to load constants. adds 4e1e0d79ecb RISC-V: Implement instruction patterns for ZBS extension. adds 77b84fb0a8e RISC-V: Cost model for ZBS extension. adds 0b028fb4989 tree-optimization/102905 - restore re-align load for alignm [...] adds 7518e4c2f07 Fix PR 102908: wrongly removing null pointer loads adds f217e87972a sra: Fix the fix for PR 102505 (PR 102886) adds 2cbfaba6066 AArch64 testsuite: Force shrn-combine-*.c to use NEON. adds 2bfb21bb8ce Tweak ranger-debug flags. adds 17d26698aa3 Always output exported ranges to a dump_file. adds 387c6653923 Initialize variable. adds ea5f7f3962a [Ada] Fix deleted Compile_Time warnings causing crashes adds 5145d173a85 [Ada] Issue error on invalid use of Ghost inside pragma Predicate adds bb20000c9f7 [Ada] Remove more uses of exception propagation during bootstrap adds 19e7eae5b91 [Ada] Renamed_Or_Alias cleanup adds 67397bb9888 [Ada] Ada 2022: Class-wide types and formal abstract subprograms adds c652a33260b [Ada] Shutdown codepeer message adds f977a792721 [Ada] Don't expect enumeration literals to be renamings adds 98f939e9c98 [Ada] Reference in Unbounded_String is almost never null adds c9d2cc2ac82 [Ada] Initialize variable to Empty adds 1be75e7451b [Ada] Do not expect execv to return 0 adds 6888031123e [Ada] Remove redundant guard in expansion of dispatching calls adds 9e67eed1efd [Ada] Simplify detection of a parent interface equality adds a3a6a0a50af [Ada] Global contracts on expression functions in Ada.Strin [...] adds 93c63f32a2c [Ada] Make Declaration_Node return nondeclarations in fewer cases adds 8bada6e9751 [Ada] Update the inactive GMP variant of Big_Integers adds 1ddc39479b9 [Ada] Relax INOX restrictions when casing on composite value. adds 234815d4c38 [Ada] Simplify iteration of record components when expandin [...] adds 034c3117520 [Ada] Fix bugs in Base_Type_Only (etc.) fields adds 83e6be717c5 [Ada] Fix a comment adds ed00b051d90 [Ada] Change format of the ?? warning insertion sequence adds 42b39995546 [Ada] Follow-on cleanups for Uint fields adds 51e38f3b287 [Ada] Spurious error on user-defined literal and operator adds 5b0e0158830 [Ada] Remove gnatfind and gnatxref adds c49f389e3de Constant fold/simplify SS_ASHIFT and US_ASHIFT in simplify-rtx.c adds 72dc270be79 libgomp.oacc-c-c++-common/loop-gwv-2.c: Use __builtin_alloca adds d6240ea016e rs6000: Fix missing "externs" in smmintrin.h adds 90205f67e46 rs6000: Fix bootstrap (libffi) adds cb153222404 Fold all statements in Ranger VRP. adds f5bacd9c5be Move vrp_simplify_cond_using_ranges into the simplifier. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 26 + gcc/DATESTAMP | 2 +- gcc/ada/adaint.c | 12 +- gcc/ada/atree.adb | 11 +- gcc/ada/atree.ads | 15 + gcc/ada/checks.adb | 7 +- .../doc/gnat_rm/implementation_defined_pragmas.rst | 21 +- gcc/ada/einfo-utils.adb | 99 +- gcc/ada/einfo-utils.ads | 42 +- gcc/ada/einfo.ads | 10 +- gcc/ada/errout.adb | 55 +- gcc/ada/errout.ads | 43 +- gcc/ada/erroutc.adb | 94 +- gcc/ada/erroutc.ads | 28 +- gcc/ada/exp_attr.adb | 4 +- gcc/ada/exp_ch11.adb | 16 +- gcc/ada/exp_ch3.adb | 14 +- gcc/ada/exp_ch4.adb | 50 +- gcc/ada/exp_ch5.adb | 1 + gcc/ada/exp_ch6.adb | 4 +- gcc/ada/exp_dbug.adb | 9 +- gcc/ada/exp_disp.adb | 2 +- gcc/ada/exp_prag.adb | 4 +- gcc/ada/exp_util.adb | 7 +- gcc/ada/freeze.adb | 20 +- gcc/ada/gcc-interface/Make-lang.in | 7 +- gcc/ada/gcc-interface/Makefile.in | 6 +- gcc/ada/gen_il-gen-gen_nodes.adb | 19 +- gcc/ada/gen_il-gen.adb | 25 +- gcc/ada/gen_il-gen.ads | 19 +- gcc/ada/gen_il-internals.ads | 3 + gcc/ada/gnat_rm.texi | 31 +- gcc/ada/inline.adb | 6 +- gcc/ada/lib-xref.adb | 4 +- gcc/ada/libgnat/a-nbnbin__gmp.adb | 2 +- gcc/ada/libgnat/a-strsup.ads | 11 +- gcc/ada/libgnat/a-strunb.adb | 10 +- gcc/ada/libgnat/a-strunb.ads | 4 +- gcc/ada/libgnat/s-widthu.adb | 5 +- gcc/ada/par-util.adb | 2 +- gcc/ada/repinfo.adb | 6 +- gcc/ada/repinfo.ads | 8 +- gcc/ada/sem_attr.adb | 2 +- gcc/ada/sem_case.adb | 280 ++-- gcc/ada/sem_ch10.adb | 12 +- gcc/ada/sem_ch12.adb | 83 +- gcc/ada/sem_ch13.adb | 196 ++- gcc/ada/sem_ch3.adb | 4 +- gcc/ada/sem_ch4.adb | 87 +- gcc/ada/sem_ch5.adb | 1 + gcc/ada/sem_ch6.adb | 16 +- gcc/ada/sem_ch7.adb | 11 +- gcc/ada/sem_ch8.adb | 1441 +++++++++++--------- gcc/ada/sem_elab.adb | 8 +- gcc/ada/sem_prag.adb | 2 +- gcc/ada/sem_res.adb | 417 ++++-- gcc/ada/sem_util.adb | 49 +- gcc/ada/sem_warn.adb | 16 +- gcc/ada/sinfo-utils.adb | 12 +- gcc/ada/tbuild.ads | 9 +- gcc/ada/treepr.adb | 5 +- gcc/ada/uintp.adb | 4 +- gcc/ada/uintp.ads | 1 + gcc/ada/warnsw.ads | 3 +- gcc/common/config/riscv/riscv-common.c | 10 + gcc/config/i386/sse.md | 52 + gcc/config/riscv/bitmanip.md | 342 +++++ gcc/config/riscv/predicates.md | 22 + gcc/config/riscv/riscv-opts.h | 10 + gcc/config/riscv/riscv.c | 221 ++- gcc/config/riscv/riscv.h | 8 + gcc/config/riscv/riscv.md | 33 +- gcc/config/riscv/riscv.opt | 3 + gcc/config/rs6000/smmintrin.h | 40 +- gcc/flag-types.h | 3 +- gcc/fortran/trans-decl.c | 2 +- gcc/gimple-range.cc | 2 +- gcc/match.pd | 6 +- gcc/params.opt | 2 +- gcc/simplify-rtx.c | 38 +- gcc/testsuite/ChangeLog | 4 + gcc/testsuite/gcc.dg/torture/pr102920.c | 25 + .../gcc.dg/tree-ssa/{vrp98.c => vrp98-1.c} | 8 +- gcc/testsuite/gcc.dg/tree-ssa/vrp98.c | 2 +- gcc/testsuite/gcc.target/aarch64/shrn-combine-1.c | 2 + gcc/testsuite/gcc.target/aarch64/shrn-combine-2.c | 2 + gcc/testsuite/gcc.target/aarch64/shrn-combine-3.c | 2 + gcc/testsuite/gcc.target/aarch64/shrn-combine-4.c | 2 + gcc/testsuite/gcc.target/aarch64/shrn-combine-5.c | 2 + gcc/testsuite/gcc.target/aarch64/shrn-combine-6.c | 2 + gcc/testsuite/gcc.target/aarch64/shrn-combine-7.c | 2 + gcc/testsuite/gcc.target/bfin/ssashift-1.c | 52 + .../gcc.target/i386/avx512fp16-complex-fma.c | 18 + gcc/testsuite/gcc.target/i386/pr102464-sqrtph.c | 27 + gcc/testsuite/gcc.target/i386/pr102464-sqrtsh.c | 23 + gcc/testsuite/gcc.target/riscv/zba-adduw.c | 12 + gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c | 19 + gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c | 19 + gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c | 31 + gcc/testsuite/gcc.target/riscv/zba-slliuw.c | 11 + gcc/testsuite/gcc.target/riscv/zba-zextw.c | 10 + .../gcc.target/riscv/zbb-andn-orn-xnor-01.c | 21 + .../gcc.target/riscv/zbb-andn-orn-xnor-02.c | 21 + gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c | 35 + gcc/testsuite/gcc.target/riscv/zbb-min-max.c | 31 + gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c | 16 + gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c | 16 + gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c | 17 + gcc/testsuite/gcc.target/riscv/zbbw.c | 25 + gcc/testsuite/gcc.target/riscv/zbs-bclr.c | 20 + gcc/testsuite/gcc.target/riscv/zbs-bext.c | 20 + gcc/testsuite/gcc.target/riscv/zbs-binv.c | 20 + gcc/testsuite/gcc.target/riscv/zbs-bset.c | 41 + gcc/tree-sra.c | 2 +- gcc/tree-ssa-dce.c | 5 + gcc/tree-ssa-sccvn.c | 21 +- gcc/tree-ssa-sccvn.h | 2 +- gcc/tree-vect-data-refs.c | 5 +- gcc/tree-vrp.c | 96 +- gcc/vr-values.c | 69 + gcc/vr-values.h | 1 + libffi/src/powerpc/linux64.S | 2 + libffi/src/powerpc/linux64_closure.S | 2 + .../libgomp.oacc-c-c++-common/loop-gwv-2.c | 7 +- 124 files changed, 3490 insertions(+), 1497 deletions(-) create mode 100644 gcc/config/riscv/bitmanip.md create mode 100644 gcc/testsuite/gcc.dg/torture/pr102920.c copy gcc/testsuite/gcc.dg/tree-ssa/{vrp98.c => vrp98-1.c} (90%) create mode 100644 gcc/testsuite/gcc.target/bfin/ssashift-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-complex-fma.c create mode 100644 gcc/testsuite/gcc.target/i386/pr102464-sqrtph.c create mode 100644 gcc/testsuite/gcc.target/i386/pr102464-sqrtsh.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-adduw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-slliuw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-zextw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-min-max.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbbw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bclr.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bext.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-binv.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bset.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled_lto updated (30459fe4ef -> 3976e96a02)

by git＠git.linaro.org

3 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled_lto updated (32398ab6 -> b8787c07)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled_lto in repository toolchain/ci/base-artifacts. discards 32398ab6 0: update: binutils-gcc: 2 new b8787c07 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (32398ab6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1544 -> 1544 bytes 02-prepare_abe/console.log.xz | Bin 2816 -> 2780 bytes 04-build_abe-binutils/console.log.xz | Bin 53744 -> 53936 bytes 05-build_abe-bootstrap_profiled_lto/console.log.xz | Bin 550400 -> 549608 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 36 +++++++++++++++++++++ jenkins/manifest.sh | 12 +++---- 7 files changed, 42 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[gcc] branch master updated (4e417eea8f3 -> 6b8b2557557)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 4e417eea8f3 [PR testsuite/102857] Tweak ssa-dom-thread-7.c for aarch64. new 6b8b2557557 x86_64: Implement V1TI mode shifts/rotates by a constant The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/i386/i386-expand.c | 163 ++++++++++++++++++ gcc/config/i386/i386-protos.h | 2 + gcc/config/i386/sse.md | 44 +++++ gcc/testsuite/gcc.target/i386/sse2-v1ti-shift.c | 212 ++++++++++++++++++++++++ 4 files changed, 421 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/sse2-v1ti-shift.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_debug updated (37935c01841 -> 4e417eea8f3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_debug in repository toolchain/ci/gcc. from 37935c01841 Daily bump. adds 7c20a9b738a Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combi [...] adds aa15952d646 tree-optimization/102920 - fix PHI VN with undefined args adds 1a07bc9cda7 Simplify (_Float16) sqrtf((float) a) to .SQRT(a) when a is [...] adds 149e217033f RISC-V: Minimal support of bitmanip extension adds 283b1707f23 RISC-V: Implement instruction patterns for ZBA extension. adds 04a9b554ba1 RISC-V: Cost model for zba extension. adds e596a283e54 RISC-V: Implement instruction patterns for ZBB extension. adds 3329d892eb6 RISC-V: Cost model for zbb extension. adds 26d2818bb73 RISC-V: Use li and rori to load constants. adds 4e1e0d79ecb RISC-V: Implement instruction patterns for ZBS extension. adds 77b84fb0a8e RISC-V: Cost model for ZBS extension. adds 0b028fb4989 tree-optimization/102905 - restore re-align load for alignm [...] adds 7518e4c2f07 Fix PR 102908: wrongly removing null pointer loads adds f217e87972a sra: Fix the fix for PR 102505 (PR 102886) adds 2cbfaba6066 AArch64 testsuite: Force shrn-combine-*.c to use NEON. adds 2bfb21bb8ce Tweak ranger-debug flags. adds 17d26698aa3 Always output exported ranges to a dump_file. adds 387c6653923 Initialize variable. adds ea5f7f3962a [Ada] Fix deleted Compile_Time warnings causing crashes adds 5145d173a85 [Ada] Issue error on invalid use of Ghost inside pragma Predicate adds bb20000c9f7 [Ada] Remove more uses of exception propagation during bootstrap adds 19e7eae5b91 [Ada] Renamed_Or_Alias cleanup adds 67397bb9888 [Ada] Ada 2022: Class-wide types and formal abstract subprograms adds c652a33260b [Ada] Shutdown codepeer message adds f977a792721 [Ada] Don't expect enumeration literals to be renamings adds 98f939e9c98 [Ada] Reference in Unbounded_String is almost never null adds c9d2cc2ac82 [Ada] Initialize variable to Empty adds 1be75e7451b [Ada] Do not expect execv to return 0 adds 6888031123e [Ada] Remove redundant guard in expansion of dispatching calls adds 9e67eed1efd [Ada] Simplify detection of a parent interface equality adds a3a6a0a50af [Ada] Global contracts on expression functions in Ada.Strin [...] adds 93c63f32a2c [Ada] Make Declaration_Node return nondeclarations in fewer cases adds 8bada6e9751 [Ada] Update the inactive GMP variant of Big_Integers adds 1ddc39479b9 [Ada] Relax INOX restrictions when casing on composite value. adds 234815d4c38 [Ada] Simplify iteration of record components when expandin [...] adds 034c3117520 [Ada] Fix bugs in Base_Type_Only (etc.) fields adds 83e6be717c5 [Ada] Fix a comment adds ed00b051d90 [Ada] Change format of the ?? warning insertion sequence adds 42b39995546 [Ada] Follow-on cleanups for Uint fields adds 51e38f3b287 [Ada] Spurious error on user-defined literal and operator adds 5b0e0158830 [Ada] Remove gnatfind and gnatxref adds c49f389e3de Constant fold/simplify SS_ASHIFT and US_ASHIFT in simplify-rtx.c adds 72dc270be79 libgomp.oacc-c-c++-common/loop-gwv-2.c: Use __builtin_alloca adds d6240ea016e rs6000: Fix missing "externs" in smmintrin.h adds 90205f67e46 rs6000: Fix bootstrap (libffi) adds cb153222404 Fold all statements in Ranger VRP. adds f5bacd9c5be Move vrp_simplify_cond_using_ranges into the simplifier. adds b621508d6fa Daily bump. adds f3dbd3f36d5 vect: Don't update inits for simd_lane_access DRs [PR102789] adds f6d012338bf Try to resolve paths in threader without looking further back. adds 8a04a5fb07f Attempt to resolve all incoming paths to a PHI. adds e53fbb17839 Avoid threading circular paths. adds 4e417eea8f3 [PR testsuite/102857] Tweak ssa-dom-thread-7.c for aarch64. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 212 +++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 303 ++++ gcc/ada/adaint.c | 12 +- gcc/ada/atree.adb | 11 +- gcc/ada/atree.ads | 15 + gcc/ada/checks.adb | 7 +- .../doc/gnat_rm/implementation_defined_pragmas.rst | 21 +- gcc/ada/einfo-utils.adb | 99 +- gcc/ada/einfo-utils.ads | 42 +- gcc/ada/einfo.ads | 10 +- gcc/ada/errout.adb | 55 +- gcc/ada/errout.ads | 43 +- gcc/ada/erroutc.adb | 94 +- gcc/ada/erroutc.ads | 28 +- gcc/ada/exp_attr.adb | 4 +- gcc/ada/exp_ch11.adb | 16 +- gcc/ada/exp_ch3.adb | 14 +- gcc/ada/exp_ch4.adb | 50 +- gcc/ada/exp_ch5.adb | 1 + gcc/ada/exp_ch6.adb | 4 +- gcc/ada/exp_dbug.adb | 9 +- gcc/ada/exp_disp.adb | 2 +- gcc/ada/exp_prag.adb | 4 +- gcc/ada/exp_util.adb | 7 +- gcc/ada/freeze.adb | 20 +- gcc/ada/gcc-interface/Make-lang.in | 7 +- gcc/ada/gcc-interface/Makefile.in | 6 +- gcc/ada/gen_il-gen-gen_nodes.adb | 19 +- gcc/ada/gen_il-gen.adb | 25 +- gcc/ada/gen_il-gen.ads | 19 +- gcc/ada/gen_il-internals.ads | 3 + gcc/ada/gnat_rm.texi | 31 +- gcc/ada/inline.adb | 6 +- gcc/ada/lib-xref.adb | 4 +- gcc/ada/libgnat/a-nbnbin__gmp.adb | 2 +- gcc/ada/libgnat/a-strsup.ads | 11 +- gcc/ada/libgnat/a-strunb.adb | 10 +- gcc/ada/libgnat/a-strunb.ads | 4 +- gcc/ada/libgnat/s-widthu.adb | 5 +- gcc/ada/par-util.adb | 2 +- gcc/ada/repinfo.adb | 6 +- gcc/ada/repinfo.ads | 8 +- gcc/ada/sem_attr.adb | 2 +- gcc/ada/sem_case.adb | 280 ++-- gcc/ada/sem_ch10.adb | 12 +- gcc/ada/sem_ch12.adb | 83 +- gcc/ada/sem_ch13.adb | 196 ++- gcc/ada/sem_ch3.adb | 4 +- gcc/ada/sem_ch4.adb | 87 +- gcc/ada/sem_ch5.adb | 1 + gcc/ada/sem_ch6.adb | 16 +- gcc/ada/sem_ch7.adb | 11 +- gcc/ada/sem_ch8.adb | 1441 +++++++++++--------- gcc/ada/sem_elab.adb | 8 +- gcc/ada/sem_prag.adb | 2 +- gcc/ada/sem_res.adb | 417 ++++-- gcc/ada/sem_util.adb | 49 +- gcc/ada/sem_warn.adb | 16 +- gcc/ada/sinfo-utils.adb | 12 +- gcc/ada/tbuild.ads | 9 +- gcc/ada/treepr.adb | 5 +- gcc/ada/uintp.adb | 4 +- gcc/ada/uintp.ads | 1 + gcc/ada/warnsw.ads | 3 +- gcc/common/config/riscv/riscv-common.c | 10 + gcc/config/i386/sse.md | 52 + gcc/config/riscv/bitmanip.md | 342 +++++ gcc/config/riscv/predicates.md | 22 + gcc/config/riscv/riscv-opts.h | 10 + gcc/config/riscv/riscv.c | 221 ++- gcc/config/riscv/riscv.h | 8 + gcc/config/riscv/riscv.md | 33 +- gcc/config/riscv/riscv.opt | 3 + gcc/config/rs6000/smmintrin.h | 40 +- gcc/flag-types.h | 3 +- gcc/fortran/ChangeLog | 4 + gcc/fortran/trans-decl.c | 2 +- gcc/gimple-range.cc | 2 +- gcc/match.pd | 6 +- gcc/params.opt | 2 +- gcc/simplify-rtx.c | 38 +- gcc/testsuite/ChangeLog | 73 + gcc/testsuite/gcc.dg/graphite/scop-dsyr2k-2.c | 1 + gcc/testsuite/gcc.dg/graphite/scop-dsyr2k.c | 1 + gcc/testsuite/gcc.dg/graphite/scop-dsyrk-2.c | 1 + gcc/testsuite/gcc.dg/graphite/scop-dsyrk.c | 1 + gcc/testsuite/gcc.dg/torture/pr102920.c | 25 + gcc/testsuite/gcc.dg/tree-ssa/pr20701.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr20702.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr21086.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr21090.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr25382.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr58480.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c | 60 - 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3 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_debug updated (5513527b59 -> 3976e96a02)

by git＠git.linaro.org

3 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_debug updated (150d8242 -> f181b2f3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_debug in repository toolchain/ci/base-artifacts. discards 150d8242 0: update: binutils-gcc: 2 new f181b2f3 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (150d8242) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1500 -> 1540 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2748 bytes 04-build_abe-binutils/console.log.xz | Bin 52500 -> 52664 bytes 05-build_abe-bootstrap_debug/console.log.xz | Bin 266284 -> 267076 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 14 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (4c127fdbe8 -> c5b2f55981)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/qemu. from 4c127fdbe8 Merge remote-tracking branch 'remotes/rth/tags/pull-arm-2021 [...] adds e976459b3b mac_via: update comment for VIA1B_vMystery bit adds 39950b16ec q800: move VIA1 IRQ from level 1 to level 6 adds 91ff5e4dcd q800: use GLUE IRQ numbers instead of IRQ level for GLUE IRQs adds 291bc1809a mac_via: add GPIO for A/UX mode adds a85d18aabd q800: wire up auxmode GPIO to GLUE adds f7c6e12e24 q800: route SONIC on-board Ethernet IRQ via nubus IRQ 9 in c [...] adds c7710c1ebf q800: wire up remaining IRQs in classic mode adds 3ea74abe2d q800: add NMI handler adds a56c12fb76 q800: drop 8-bit graphic_depth check for Apple 21 inch display adds 1dafe7656a Merge remote-tracking branch 'remotes/vivier-m68k/tags/q800- [...] adds 82b6a3f64d aspeed: Add support for the fp5280g2-bmc board adds fc6642544e aspeed/smc: Use a container for the flash mmio address space adds b12fa6118f speed/sdhci: Add trace events adds eb8f1d57bd Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-2 [...] adds b4b9a0e32f update seabios to master branch snapshot adds 9fb3fcfce5 update seabios binaries adds 2c64ff92ec Merge remote-tracking branch 'remotes/kraxel/tags/seabios-20 [...] adds c672f19f32 target/riscv: Pass the same value to oprsz and maxsz for vmv.v.v adds e573a7f325 target/riscv: line up all of the registers in the info regis [...] adds 54c1760937 target/riscv: Fix orc.b implementation adds 03fd0c5fe9 hw/riscv: virt: Use machine->ram as the system memory adds 61d5649488 target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh adds 31dbcff713 target/riscv: Remove some unused macros adds 9d3d60b704 target/riscv: Organise the CPU properties adds 53677acf25 target/riscv: Move cpu_get_tb_cpu_state out of line adds 99bc874fb3 target/riscv: Create RISCVMXL enumeration adds e91a7227cb target/riscv: Split misa.mxl and misa.ext adds db23e5d981 target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl adds 92371bd903 target/riscv: Add MXL/SXL/UXL to TB_FLAGS adds fbb48032e4 target/riscv: Use REQUIRE_64BIT in amo_check64 adds 4e97d459a0 target/riscv: Properly check SEW in amo_op adds 905b9fcde1 target/riscv: Replace is_32bit with get_xl/get_xlen adds 7667cafd5a target/riscv: Replace DisasContext.w with DisasContext.ol adds 80347ae9f2 target/riscv: Use gen_arith_per_ol for RVM adds 673be37163 target/riscv: Adjust trans_rev8_32 for riscv64 adds fdab665f6e target/riscv: Use gen_unary_per_ol for RVB adds a0245d91dd target/riscv: Use gen_shift*_per_ol for RVB, RVI adds 665b90d8a4 target/riscv: Use riscv_csrrw_debug for cpu_dump adds b550f89457 target/riscv: Compute mstatus.sd on demand adds ef63100648 hw/riscv: opentitan: Update to the latest build adds 434e7e0217 hw/intc: Remove the Ibex PLIC adds d8c6590f18 hw/intc: sifive_plic: Move the properties adds d680ff664e hw/intc: sifive_plic: Cleanup the realize function adds 8d3dae162e hw/intc: sifive_plic: Cleanup the irq_request function adds d4c624f482 hw/riscv: microchip_pfsoc: Use MachineState::ram and Machine [...] adds 91b1fbdc0c hw/riscv: opentitan: Use MachineState::ram and MachineClass: [...] adds 56917307f4 hw/riscv: shakti_c: Use MachineState::ram and MachineClass:: [...] adds e2b3ef7544 hw/riscv: sifive_e: Use MachineState::ram and MachineClass:: [...] adds c188a9c4f7 hw/riscv: sifive_u: Use MachineState::ram and MachineClass:: [...] adds 11ec06f9ea hw/riscv: spike: Use MachineState::ram and MachineClass::def [...] adds 660efed8b3 Merge remote-tracking branch 'remotes/alistair23/tags/pull-r [...] adds 764ecf77d0 po: update turkish translation adds ed899ac77d disas/nios2: Fix style in print_insn_nios2() adds dcc99bd833 disas/nios2: Simplify endianess conversion adds 3bc1bb8042 MAINTAINERS: Add myself as reviewer of 'Machine core' API adds f18d403f15 softmmu/physmem.c: Fix typo in comment adds c4e4d0d92b hw/nvram: Fix Memory Leak in Xilinx eFuse QOM adds 512a63b2b0 hw/nvram: Fix Memory Leak in Xilinx Versal eFuse device adds e3f368e0b2 hw/nvram: Fix Memory Leak in Xilinx ZynqMP eFuse device adds 1c3515ad59 README: Fix some documentation URLs adds f98d372aef analyze-migration.py: fix a long standing typo adds 2c92be50bc analyze-migration.py: fix extract contents ('-x') errors adds c5b2f55981 Merge remote-tracking branch 'remotes/vivier/tags/trivial-br [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 1 + README.rst | 14 +- disas/nios2.c | 73 +++----- hw/arm/aspeed.c | 74 ++++++++ hw/intc/ibex_plic.c | 307 -------------------------------- hw/intc/meson.build | 1 - hw/intc/sifive_plic.c | 85 ++++----- hw/m68k/q800.c | 169 +++++++++++++++++- hw/misc/mac_via.c | 23 +++ hw/misc/trace-events | 1 + hw/nvram/xlnx-efuse.c | 9 +- hw/nvram/xlnx-versal-efuse-ctrl.c | 20 ++- hw/nvram/xlnx-zynqmp-efuse.c | 18 +- hw/riscv/boot.c | 2 +- hw/riscv/microchip_pfsoc.c | 36 ++-- hw/riscv/opentitan.c | 38 +++- hw/riscv/shakti_c.c | 6 +- hw/riscv/sifive_e.c | 16 +- hw/riscv/sifive_u.c | 6 +- hw/riscv/spike.c | 6 +- hw/riscv/virt.c | 6 +- hw/sd/aspeed_sdhci.c | 5 + hw/sd/trace-events | 4 + hw/ssi/aspeed_smc.c | 11 +- include/disas/dis-asm.h | 3 +- include/hw/misc/mac_via.h | 1 + include/hw/riscv/opentitan.h | 6 +- include/hw/ssi/aspeed_smc.h | 2 +- linux-user/elfload.c | 2 +- linux-user/riscv/cpu_loop.c | 2 +- pc-bios/bios-256k.bin | Bin 262144 -> 262144 bytes pc-bios/bios-microvm.bin | Bin 131072 -> 131072 bytes pc-bios/bios.bin | Bin 131072 -> 131072 bytes pc-bios/vgabios-ati.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-bochs-display.bin | Bin 28672 -> 28672 bytes pc-bios/vgabios-cirrus.bin | Bin 38912 -> 39424 bytes pc-bios/vgabios-qxl.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-ramfb.bin | Bin 28672 -> 28672 bytes pc-bios/vgabios-stdvga.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-virtio.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios-vmware.bin | Bin 39424 -> 39424 bytes pc-bios/vgabios.bin | Bin 38912 -> 38912 bytes po/tr.po | 25 ++- roms/seabios | 2 +- scripts/analyze-migration.py | 6 +- semihosting/arm-compat-semi.c | 2 +- softmmu/physmem.c | 2 +- target/nios2/cpu.c | 6 +- target/riscv/cpu.c | 216 ++++++++++++---------- target/riscv/cpu.h | 87 +++------ target/riscv/cpu_bits.h | 16 +- target/riscv/cpu_helper.c | 92 +++++++++- target/riscv/csr.c | 104 ++++++----- target/riscv/gdbstub.c | 10 +- target/riscv/insn_trans/trans_rvb.c.inc | 153 +++++++++------- target/riscv/insn_trans/trans_rvi.c.inc | 44 ++--- target/riscv/insn_trans/trans_rvm.c.inc | 36 +++- target/riscv/insn_trans/trans_rvv.c.inc | 32 ++-- target/riscv/machine.c | 10 +- target/riscv/monitor.c | 4 +- target/riscv/translate.c | 174 +++++++++++++----- 61 files changed, 1088 insertions(+), 880 deletions(-) delete mode 100644 hw/intc/ibex_plic.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 8 months

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Tcwg-commits October 2021